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Mon, 18 Dec 2023 02:26:28 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id o9-20020a5d62c9000000b003364aa5cc13sm11365333wrv.1.2023.12.18.02.26.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Dec 2023 02:26:27 -0800 (PST) From: Neil Armstrong Date: Mon, 18 Dec 2023 11:26:24 +0100 Subject: [PATCH 1/2] arm64: dts: qcom: sm8650-qrd: add USB-C Altmode Support Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231218-topic-sm8650-upstream-altmode-v1-1-7900660693cf@linaro.org> References: <20231218-topic-sm8650-upstream-altmode-v1-0-7900660693cf@linaro.org> In-Reply-To: <20231218-topic-sm8650-upstream-altmode-v1-0-7900660693cf@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Add the necessary nodes to support the USB-C Altmode path by adding the following - WCD939x USBSS Mux I2C device - nb7vpq904m Redriver I2C device - Port/Endpoint graph links bettween PMIC-Glink, Mux, Redriver and USB PHY nodes. WCD939x USBSS port 2 Path to Codec will be added later when Audio support is added. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 104 +++++++++++++++++++++++++++++++- 1 file changed, 102 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts index 592a67a47c78..121fbbb5d015 100644 --- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts @@ -77,9 +77,17 @@ port@1 { reg = <1>; pmic_glink_ss_in: endpoint { - remote-endpoint = <&usb_1_dwc3_ss>; + remote-endpoint = <&redriver_ss_out>; }; }; + + port@2 { + reg = <2>; + + pmic_glink_sbu: endpoint { + remote-endpoint = <&wcd_usbss_sbu_mux>; + }; + }; }; }; }; @@ -446,6 +454,70 @@ &gpi_dma1 { status = "okay"; }; +&i2c3 { + status = "ok"; + + wcd_usbss: typec-mux@e { + compatible = "qcom,wcd9395-usbss", "qcom,wcd9390-usbss"; + reg = <0xe>; + + vdd-supply = <&vreg_l15b_1p8>; + reset-gpios = <&tlmm 152 GPIO_ACTIVE_HIGH>; + + mode-switch; + orientation-switch; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + wcd_usbss_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_sbu>; + }; + }; + }; + }; +}; + +&i2c6 { + status = "ok"; + + typec-mux@1c { + compatible = "onnn,nb7vpq904m"; + reg = <0x1c>; + + vcc-supply = <&vreg_l15b_1p8>; + + retimer-switch; + orientation-switch; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + redriver_ss_out: endpoint { + remote-endpoint = <&pmic_glink_ss_in>; + }; + }; + + port@1 { + reg = <1>; + + redriver_ss_in: endpoint { + data-lanes = <3 2 1 0>; + remote-endpoint = <&usb_dp_qmpphy_out>; + }; + }; + }; + }; +}; + &ipa { qcom,gsi-loader = "self"; memory-region = <&ipa_fw_mem>; @@ -495,6 +567,15 @@ &mdss_dsi0_phy { status = "okay"; }; +&mdss_dp0 { + status = "okay"; +}; + +&mdss_dp0_out { + data-lanes = <0 1>; + remote-endpoint = <&usb_dp_qmpphy_dp_in>; +}; + &mdss_mdp { status = "okay"; }; @@ -600,6 +681,11 @@ &pmk8550_rtc { status = "okay"; }; +&qup_i2c3_data_clk { + /* Use internal I2C pull-up */ + bias-pull-up = <2200>; +}; + &qupv3_id_0 { status = "okay"; }; @@ -787,7 +873,7 @@ &usb_1_dwc3_hs { }; &usb_1_dwc3_ss { - remote-endpoint = <&pmic_glink_ss_in>; + remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>; }; &usb_1_hsphy { @@ -803,9 +889,23 @@ &usb_dp_qmpphy { vdda-phy-supply = <&vreg_l3i_1p2>; vdda-pll-supply = <&vreg_l3g_0p91>; + orientation-switch; + status = "okay"; }; +&usb_dp_qmpphy_dp_in { + remote-endpoint = <&mdss_dp0_out>; +}; + +&usb_dp_qmpphy_out { + remote-endpoint = <&redriver_ss_in>; +}; + +&usb_dp_qmpphy_usb_ss_in { + remote-endpoint = <&usb_1_dwc3_ss>; +}; + &xo_board { clock-frequency = <76800000>; }; From patchwork Mon Dec 18 10:26:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 756216 Received: from mail-wr1-f51.google.com (mail-wr1-f51.google.com [209.85.221.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B55814F67 for ; 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Mon, 18 Dec 2023 02:26:28 -0800 (PST) From: Neil Armstrong Date: Mon, 18 Dec 2023 11:26:25 +0100 Subject: [PATCH 2/2] arm64: defconfig: enable WCD939x USBSS driver as module Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231218-topic-sm8650-upstream-altmode-v1-2-7900660693cf@linaro.org> References: <20231218-topic-sm8650-upstream-altmode-v1-0-7900660693cf@linaro.org> In-Reply-To: <20231218-topic-sm8650-upstream-altmode-v1-0-7900660693cf@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=684; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=VmNuAmZkD7FpY6bewTnP4V/44GbGai75MKliuJO6u5w=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBlgB5RimQtAs9PeGRtiSAGBP1AMuyy5B3ombLnCBnF Z3moa8SJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZYAeUQAKCRB33NvayMhJ0WxzD/ 0YsYDmmoMF3Iae0OPlvRrSJaU9e/uoitz3urGosVlEIoYk1nv8+nrDpaumY//Y5wo5uj+ASYQjBo5A qa7RY2yvR3MneZPK3l9z4/7GBsM3ZErAPwwVIIgj/43DSRlhj5x9d+bG4s/IcjqfYbkgq7JlhIfXfm LYbbgtsv6sa997P+RQl8cB503BFyRvjYUb8dKADykfb3jsmRclWwV9w7Mf9rOLY0znjXsQyS954FaF Md85WGvgAiwkiKBObBYGsQOCGxyMQ5jfsJlDSkUvIyYk+stlo71ACCRgD91xMvFY9JzjPPjEneu4f/ 3jfldyA6c/LXheGz+ENQLPEaNeO3uyvQuheysITInQf2Uja2NBsW8fXDuKtpT20d92Z+0RZQRULOj/ Gu6zBBnSsyt3ObWTzYyteIgNpN4jDvIfMDllBPkX8v7M4VjA46jJgWMOHQ0md5/Etb+luPJK09SgDa +dH2rzfG9Vm0ahrjnI9zUX1GTv0E2jRDhHcixGRo9VmVExCq7PMuJhkNW+U5XynzhnY2FbkdsEd++i Tcw2qglR8OP7sUGJZKriobfotvtPySTZN0or735C2Cmun5nRAzu+YJ9r6y2OmL8JvJr8y4ntWIqqP7 g1t72CW/bWL7vKogprF52MORtnzsC0EaMpF2HGWqAOSMj8sgPGQgyjosYt2w== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Enable the Qualcomm WCD939x USBSS Type-C mux as module as is now used on the SM8650 QRD platform. Signed-off-by: Neil Armstrong --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 0e67a4849b91..c9ba75f1b248 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1067,6 +1067,7 @@ CONFIG_TYPEC_QCOM_PMIC=m CONFIG_TYPEC_UCSI=m CONFIG_TYPEC_MUX_FSA4480=m CONFIG_TYPEC_MUX_NB7VPQ904M=m +CONFIG_TYPEC_MUX_WCD939X_USBSS=m CONFIG_UCSI_CCG=m CONFIG_TYPEC_MUX_GPIO_SBU=m CONFIG_TYPEC_DP_ALTMODE=m