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[178.235.179.137]) by smtp.gmail.com with ESMTPSA id go32-20020a1709070da000b00a1ce98016besm14141718ejc.224.2023.12.18.06.38.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Dec 2023 06:38:37 -0800 (PST) From: Konrad Dybcio Date: Mon, 18 Dec 2023 15:38:33 +0100 Subject: [PATCH] arm64: dts: qcom: sc7280: Mark SDHCI hosts as cache-coherent Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231218-topic-7280_dmac_sdhci-v1-1-97af7efd64a1@linaro.org> X-B4-Tracking: v=1; b=H4sIAGhZgGUC/x2N0QrCMAwAf2Xk2UDbKZ3+isjI0mgDsxuNijD27 xYf7+C4DUyqisGl26DKR02X0sAfOuBM5SGoqTEEF3of/ICvZVXGGAY3pifxaCmzYk+OopziUc4 CrZ3IBKdKhXOry3uem1yr3PX7n11v+/4DogKiynwAAAA= To: cros-qcom-dts-watchers@chromium.org, Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stephen Boyd , Shaik Sajida Bhanu Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss , Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1702910316; l=1106; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=FIyohTj/QMEcc9QxeFddK2gL9Q6S2as+uH4t0LwM+RA=; b=hkEcmF1nVbZohzlbX29PA4k3BMQqBWCvLL+KcGEPwO2aH7wu0TgZHabijsYUmY6v6G7e6N9+1 VtxxEF7kqzaBmDsDORaILASsTSq9eYKVvuL7vRtQYsajFCAxaIi6Wc0 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= The SDHCI hosts on SC7280 are cache-coherent, just like on most fairly recent Qualcomm SoCs. Mark them as such. Fixes: 298c81a7d44f ("arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card") Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 ++ 1 file changed, 2 insertions(+) --- base-commit: ceb2fe0d438644e1de06b9a6468a1fb8e2199c70 change-id: 20231218-topic-7280_dmac_sdhci-3a0a7e574e9e Best regards, diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index ff1e07171dc4..83b5b76ba179 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -1000,6 +1000,7 @@ sdhc_1: mmc@7c4000 { bus-width = <8>; supports-cqe; + dma-coherent; qcom,dll-config = <0x0007642c>; qcom,ddr-config = <0x80040868>; @@ -3458,6 +3459,7 @@ sdhc_2: mmc@8804000 { operating-points-v2 = <&sdhc2_opp_table>; bus-width = <4>; + dma-coherent; qcom,dll-config = <0x0007642c>;