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([223.178.213.6]) by smtp.gmail.com with ESMTPSA id nr21-20020a17090b241500b0028b8b269aedsm1038997pjb.57.2023.12.17.23.24.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 23:24:51 -0800 (PST) From: Sumit Garg To: u-boot@lists.denx.de Cc: caleb.connolly@linaro.org, neil.armstrong@linaro.org, lukma@denx.de, seanga2@gmail.com, marex@denx.de, laetitia.mariottini@se.com, pascal.eberhard@se.com, abdou.saker@se.com, jimmy.lalande@se.com, benjamin.missey@non.se.com, daniel.thompson@linaro.org, Sumit Garg Subject: [PATCH 1/7] clk: apq8016: Add support for UART1 clocks Date: Mon, 18 Dec 2023 12:54:22 +0530 Message-Id: <20231218072428.1802969-2-sumit.garg@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231218072428.1802969-1-sumit.garg@linaro.org> References: <20231218072428.1802969-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean SE HMIBSC board uses UART1 as the main debug console, so add corresponding clocks support. Signed-off-by: Sumit Garg --- drivers/clk/qcom/clock-apq8016.c | 44 ++++++++++++++++++++++++++++---- 1 file changed, 39 insertions(+), 5 deletions(-) diff --git a/drivers/clk/qcom/clock-apq8016.c b/drivers/clk/qcom/clock-apq8016.c index c0ce570edc7..fb663d2e92e 100644 --- a/drivers/clk/qcom/clock-apq8016.c +++ b/drivers/clk/qcom/clock-apq8016.c @@ -42,6 +42,14 @@ #define BLSP1_UART2_APPS_N (0x3040) #define BLSP1_UART2_APPS_D (0x3044) +#define BLSP1_UART1_BCR (0x2038) +#define BLSP1_UART1_APPS_CBCR (0x203C) +#define BLSP1_UART1_APPS_CMD_RCGR (0x2044) +#define BLSP1_UART1_APPS_CFG_RCGR (0x2048) +#define BLSP1_UART1_APPS_M (0x204C) +#define BLSP1_UART1_APPS_N (0x2050) +#define BLSP1_UART1_APPS_D (0x2054) + /* GPLL0 clock control registers */ #define GPLL0_STATUS_ACTIVE BIT(17) @@ -93,6 +101,33 @@ static int clk_init_sdc(struct msm_clk_priv *priv, int slot, uint rate) return rate; } +static const struct bcr_regs uart1_regs = { + .cfg_rcgr = BLSP1_UART1_APPS_CFG_RCGR, + .cmd_rcgr = BLSP1_UART1_APPS_CMD_RCGR, + .M = BLSP1_UART1_APPS_M, + .N = BLSP1_UART1_APPS_N, + .D = BLSP1_UART1_APPS_D, +}; + +/* UART: 115200 */ +static int clk_init_uart1(struct msm_clk_priv *priv) +{ + /* Enable AHB clock */ + clk_enable_vote_clk(priv->base, &gcc_blsp1_ahb_clk); + + /* 7372800 uart block clock @ GPLL0 */ + clk_rcg_set_rate_mnd(priv->base, &uart1_regs, 1, 144, 15625, + CFG_CLK_SRC_GPLL0, 16); + + /* Vote for gpll0 clock */ + clk_enable_gpll0(priv->base, &gpll0_vote_clk); + + /* Enable core clk */ + clk_enable_cbc(priv->base + BLSP1_UART1_APPS_CBCR); + + return 0; +} + static const struct bcr_regs uart2_regs = { .cfg_rcgr = BLSP1_UART2_APPS_CFG_RCGR, .cmd_rcgr = BLSP1_UART2_APPS_CMD_RCGR, @@ -102,7 +137,7 @@ static const struct bcr_regs uart2_regs = { }; /* UART: 115200 */ -static int clk_init_uart(struct msm_clk_priv *priv) +static int clk_init_uart2(struct msm_clk_priv *priv) { /* Enable AHB clock */ clk_enable_vote_clk(priv->base, &gcc_blsp1_ahb_clk); @@ -127,13 +162,12 @@ static ulong apq8016_clk_set_rate(struct clk *clk, ulong rate) switch (clk->id) { case 0: /* SDC1 */ return clk_init_sdc(priv, 0, rate); - break; case 1: /* SDC2 */ return clk_init_sdc(priv, 1, rate); - break; case 4: /* UART2 */ - return clk_init_uart(priv); - break; + return clk_init_uart2(priv); + case 5: /* UART1 */ + return clk_init_uart1(priv); default: return 0; } From patchwork Mon Dec 18 07:24:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Garg X-Patchwork-Id: 755460 Delivered-To: patch@linaro.org Received: by 2002:adf:b181:0:b0:336:6142:bf13 with SMTP id q1csp745901wra; Sun, 17 Dec 2023 23:25:18 -0800 (PST) X-Google-Smtp-Source: AGHT+IGdaRTxogDg9fgu+ay3OzZal/3CS+dbb/dG7x9Jjxb5jxltxDf6pgssnYxV3mFcFjI5XlOF X-Received: by 2002:a05:6000:246:b0:336:67c0:54d0 with SMTP id m6-20020a056000024600b0033667c054d0mr744793wrz.45.1702884317948; Sun, 17 Dec 2023 23:25:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702884317; cv=none; d=google.com; s=arc-20160816; b=zfsAOpGSCSCccWnWMCD9wEzHRBIgen0xvJKJgvwZVlxYm5aMtP+z1EsB9oSN8W6zle c/IqwtIy7RRlUfHXoAih5FDvoUCzDcc2s2zs932JAE5iFc2jDMc+O3CBTAO0mAX8d2AB KwU9+t/Rcaex96ocajKGSsMbtrIeKA0J5RVeFlCuDuVfTzToc1sNFR2piVm089t3ywy+ PvqysUxJ1lP/G2ACG1ajxJ62ySfWbE2PqYytCP5rc+f+45CnSsvxPOfYZjbcAUCMgK1I yqMTPSadvAvHxS6DW5kFMXLGCYFOqDg3+DxQpRINq4V3hkYGHVX3tzankWSDJTSVt7xw M1Zw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=7i3Z+uj8sOIKALQYqBqrCrfHFp8GRgc4559iPiy+ZKI=; fh=EPAXKs+rTOunvfiRvsa3VTOJx1yl2mZQeEuTZH0yVZ0=; b=eikvbCnwAYGhYIzTyBEYrKA1NXxc7HAOqquNtXmUqNE3ett0D/FD9YZZrm/syBm7Ys oJJKd80G50N5GgL0y9aG+8SqN7TG8tX/AP+25LnJDI/TWNHpZpIWuryGW0ioDUJmyp5j ZJNqnZm/a9bAY0lUCFDYi0mF2lpga+UNdfw2JgxB5Bdgg9Jpi6ccgwEEhs5YTvfddaK/ E4CvZFup358xHs9q4GS8GQVzAwWzn2f7VoLGRqS5vp7cuTF82TAHt2qn/3mbekXgT/NI K0bUNA9MXASXUd6azfZ1HvWmn+f981lonavttrJAw62srERIc7yY0MhhB3VWK2XjliGW RZcw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uWs1FDd4; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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([223.178.213.6]) by smtp.gmail.com with ESMTPSA id nr21-20020a17090b241500b0028b8b269aedsm1038997pjb.57.2023.12.17.23.24.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 23:24:56 -0800 (PST) From: Sumit Garg To: u-boot@lists.denx.de Cc: caleb.connolly@linaro.org, neil.armstrong@linaro.org, lukma@denx.de, seanga2@gmail.com, marex@denx.de, laetitia.mariottini@se.com, pascal.eberhard@se.com, abdou.saker@se.com, jimmy.lalande@se.com, benjamin.missey@non.se.com, daniel.thompson@linaro.org, Sumit Garg Subject: [PATCH 2/7] serial_msm: Add support for RS232 GPIOs Date: Mon, 18 Dec 2023 12:54:23 +0530 Message-Id: <20231218072428.1802969-3-sumit.garg@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231218072428.1802969-1-sumit.garg@linaro.org> References: <20231218072428.1802969-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Signed-off-by: Sumit Garg --- drivers/serial/serial_msm.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c index a22623c316e..43e58595dc2 100644 --- a/drivers/serial/serial_msm.c +++ b/drivers/serial/serial_msm.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -210,6 +211,7 @@ static int msm_serial_probe(struct udevice *dev) { int ret; struct msm_serial_data *priv = dev_get_priv(dev); + struct gpio_desc rs232_0, rs232_1; /* No need to reinitialize the UART after relocation */ if (gd->flags & GD_FLG_RELOC) @@ -219,6 +221,11 @@ static int msm_serial_probe(struct udevice *dev) if (ret) return ret; + if (!gpio_request_by_name(dev, "gpios", 0, &rs232_0, GPIOD_IS_OUT)) + dm_gpio_set_value(&rs232_0, 1); + if (!gpio_request_by_name(dev, "gpios", 1, &rs232_1, GPIOD_IS_OUT)) + dm_gpio_set_value(&rs232_1, 0); + pinctrl_select_state(dev, "uart"); uart_dm_init(priv); From patchwork Mon Dec 18 07:24:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Garg X-Patchwork-Id: 755461 Delivered-To: patch@linaro.org Received: by 2002:adf:b181:0:b0:336:6142:bf13 with SMTP id q1csp745959wra; Sun, 17 Dec 2023 23:25:29 -0800 (PST) X-Google-Smtp-Source: AGHT+IFwncOu6iExeB71DZhpabgckDVPOpecyM8tBr5O05/Kq7ZDNRixHOblT9XskMYxQnOeEMhn X-Received: by 2002:a05:6000:c4c:b0:333:3bc1:1f95 with SMTP id do12-20020a0560000c4c00b003333bc11f95mr8461617wrb.106.1702884329029; Sun, 17 Dec 2023 23:25:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702884329; cv=none; d=google.com; s=arc-20160816; b=KTLsTRePySk+Ywylxt+bfKiLjUc14jyJqOCeCOdBubSKYCEW4zMrvrvfUnKByden9Q HF5ZrsZhiVBnoNimbU8VvQWFWCSfMs+OPUz/fUuYs50zNdSbHys0wutbEoijjGNx12yY eGeiiTqi6lIFa7qeen51JB/wvhAllVrsOholHWahz3UTvHA3PDmYGXdxd/vRcSgny1XW oDHPYXvnhac++wG9gZsRtrzsXG+ytpgMvScUAUflDANuUrASstRiH+vHW4ds7Cewmrsc rH3JhBcXFBmhvIXciWEz5I4mDGjbKOg6Scnzjj0NEW5JutrgimmavZgiMPXzbfB5SK2d ItIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=vuUQJQ5LVDA4cpetWZiqqwI3Iv8r8ZP4hNH7VPbYyl8=; fh=EPAXKs+rTOunvfiRvsa3VTOJx1yl2mZQeEuTZH0yVZ0=; b=bNDjIRpL8eoNacDmZR2oKPzQ5qac1hDZQahsodpSTYnOhbrypZP2vE5c31lt6splMt +K40wSyBrw4ov/PouJ2XprKb1P0nn+S1F/xBMzvGeBMtfvt7DITiHG4niTBx6L7I2EZP ahZ8/YiblI2Ia0CgJnBD3uLvbEkcSQc3wLHYMrHFsCI7wA46Kx2OC2gMZpOASamC68Td 5FSYcfBefYsPQqfL6PXWsWbn4Y3sJeM0AwdMoIB+QekGJqCVWuOzBWjrnzzydblUomzD B4DtbqSUIjOf7qweTues8+qdyXdBlyfA2F8disTkN/4gaNFwIGJ/gsb3w5Bvzex60mkg eJVQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qsDQFTaF; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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([223.178.213.6]) by smtp.gmail.com with ESMTPSA id nr21-20020a17090b241500b0028b8b269aedsm1038997pjb.57.2023.12.17.23.24.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 23:25:01 -0800 (PST) From: Sumit Garg To: u-boot@lists.denx.de Cc: caleb.connolly@linaro.org, neil.armstrong@linaro.org, lukma@denx.de, seanga2@gmail.com, marex@denx.de, laetitia.mariottini@se.com, pascal.eberhard@se.com, abdou.saker@se.com, jimmy.lalande@se.com, benjamin.missey@non.se.com, daniel.thompson@linaro.org, Sumit Garg Subject: [PATCH 3/7] serial_msm: Enable RS232 flow control Date: Mon, 18 Dec 2023 12:54:24 +0530 Message-Id: <20231218072428.1802969-4-sumit.garg@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231218072428.1802969-1-sumit.garg@linaro.org> References: <20231218072428.1802969-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean SE HMIBSC board debug console requires RS232 flow control, so enable corresponding support if RS232 gpios are present. Signed-off-by: Sumit Garg --- drivers/serial/serial_msm.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c index 43e58595dc2..a38bf229f06 100644 --- a/drivers/serial/serial_msm.c +++ b/drivers/serial/serial_msm.c @@ -35,6 +35,8 @@ #define UARTDM_MR2 0x04 #define UARTDM_CSR 0xA0 +#define MSM_UART_MR1_RX_RDY_CTL BIT(7) + #define UARTDM_SR 0xA4 /* Status register */ #define UARTDM_SR_RX_READY (1 << 0) /* Word is the receiver FIFO */ #define UARTDM_SR_TX_EMPTY (1 << 3) /* Transmitter underrun */ @@ -193,13 +195,18 @@ static int msm_uart_clk_init(struct udevice *dev) return 0; } -static void uart_dm_init(struct msm_serial_data *priv) +static void uart_dm_init(struct msm_serial_data *priv, bool is_rs232) { /* Delay initialization for a bit to let pins stabilize if necessary */ mdelay(5); writel(priv->clk_bit_rate, priv->base + UARTDM_CSR); - writel(0x0, priv->base + UARTDM_MR1); + + if (is_rs232) + writel(MSM_UART_MR1_RX_RDY_CTL, priv->base + UARTDM_MR1); + else + writel(0x0, priv->base + UARTDM_MR1); + writel(MSM_BOOT_UART_DM_8_N_1_MODE, priv->base + UARTDM_MR2); writel(MSM_BOOT_UART_DM_CMD_RESET_RX, priv->base + UARTDM_CR); writel(MSM_BOOT_UART_DM_CMD_RESET_TX, priv->base + UARTDM_CR); @@ -212,6 +219,7 @@ static int msm_serial_probe(struct udevice *dev) int ret; struct msm_serial_data *priv = dev_get_priv(dev); struct gpio_desc rs232_0, rs232_1; + bool is_rs232 = false; /* No need to reinitialize the UART after relocation */ if (gd->flags & GD_FLG_RELOC) @@ -221,13 +229,15 @@ static int msm_serial_probe(struct udevice *dev) if (ret) return ret; - if (!gpio_request_by_name(dev, "gpios", 0, &rs232_0, GPIOD_IS_OUT)) + if (!gpio_request_by_name(dev, "gpios", 0, &rs232_0, GPIOD_IS_OUT)) { dm_gpio_set_value(&rs232_0, 1); + is_rs232 = true; + } if (!gpio_request_by_name(dev, "gpios", 1, &rs232_1, GPIOD_IS_OUT)) dm_gpio_set_value(&rs232_1, 0); pinctrl_select_state(dev, "uart"); - uart_dm_init(priv); + uart_dm_init(priv, is_rs232); return 0; } From patchwork Mon Dec 18 07:24:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Garg X-Patchwork-Id: 755462 Delivered-To: patch@linaro.org Received: by 2002:adf:b181:0:b0:336:6142:bf13 with SMTP id q1csp745999wra; Sun, 17 Dec 2023 23:25:40 -0800 (PST) X-Google-Smtp-Source: AGHT+IGz+jbNEjSzwMllrXoby6mZr3ZvkLgQHYqf69um01vjW6kI/ws5J94X9aL49YZ2tzfVPHC0 X-Received: by 2002:a05:6000:4e4:b0:336:6ba1:5571 with SMTP id cr4-20020a05600004e400b003366ba15571mr182630wrb.24.1702884340140; Sun, 17 Dec 2023 23:25:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702884340; cv=none; d=google.com; s=arc-20160816; b=GTPXKldzK2ssJxJQ3rumewEL4pjnNNuWityzoO5PKDTXo8e3Tce4pk1LGrHNUS02U1 RTiAjlLNFhFoEMRSbdmigQA1YUOK4P/OXim3MjZaOZu/Qu4thk6w+q1BuNGEPyC6QVHN mGA4YVSfPvQKRVbyxvlucmTp6BgB0v54caBYwQjLjFO/shkEYXZsEPkx2+j3+uIWBXMW tOHAjsqjk61SYKmq9Ns7atWnzlIc5uc2E6LI2MjSSe6FweO1TPKK6HhdEdoHF0Kmvl2L cOLXycMYNoqrGCl3xIDwXuyzsbW4v18lysEHyeUiY5QthNfUYsh5eSTqBuQzQ3bCuuLv XykQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=XGsLmeu6lxDABuW2GRQzNf/hk+50FqYGbIBY8Z4h744=; fh=EPAXKs+rTOunvfiRvsa3VTOJx1yl2mZQeEuTZH0yVZ0=; b=DHJTKylQh044pFwCrZXluKPB1XVy0HhSldPxSSlC22u5ozg3XLztjM/WG0llLLNdts oaXv2sKtDj/kVIjA4KttuP1blGkEqqv/fy0ChUrgn+bZi2ywWHf+jAS2vRRR9w4zr90g P7iCT5A7OCy16pUetLixdom8NopzBveLPOe3RpDpf6DDFwk7Ne4/jkB7KfpSTybTLUaQ 8GaRYtOOdUymqMHC6pJdHUEUw8kuGZFEKq0zWq/w1+BllqSwljrY26C315FF0LiA8y5a IpumTX68DQSHi9EctM6gscVUqTutcT4NGhOowg2v/C/ES35+WxsBXmg63QaOl9noX341 B0LA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wifsNWND; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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([223.178.213.6]) by smtp.gmail.com with ESMTPSA id nr21-20020a17090b241500b0028b8b269aedsm1038997pjb.57.2023.12.17.23.25.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 23:25:06 -0800 (PST) From: Sumit Garg To: u-boot@lists.denx.de Cc: caleb.connolly@linaro.org, neil.armstrong@linaro.org, lukma@denx.de, seanga2@gmail.com, marex@denx.de, laetitia.mariottini@se.com, pascal.eberhard@se.com, abdou.saker@se.com, jimmy.lalande@se.com, benjamin.missey@non.se.com, daniel.thompson@linaro.org, Sumit Garg Subject: [PATCH 4/7] board: Add SE HMIBSC board support Date: Mon, 18 Dec 2023 12:54:25 +0530 Message-Id: <20231218072428.1802969-5-sumit.garg@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231218072428.1802969-1-sumit.garg@linaro.org> References: <20231218072428.1802969-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Support for Schneider Electric HMIBSC. Features: - Qualcomm Snapdragon 410C SoC - APQ8016 (4xCortex A53, Adreno 306) - 2GiB RAM - 64GiB eMMC, SD slot - WiFi and Bluetooth - 2x Host, 1x Device USB port - HDMI - Discrete TPM2 chip over SPI Signed-off-by: Sumit Garg --- arch/arm/dts/Makefile | 1 + arch/arm/dts/hmibsc-uboot.dtsi | 43 +++++++ arch/arm/dts/hmibsc.dts | 188 +++++++++++++++++++++++++++++ arch/arm/mach-snapdragon/Kconfig | 18 +++ arch/arm/mach-snapdragon/Makefile | 1 + board/schneider/hmibsc/Kconfig | 15 +++ board/schneider/hmibsc/MAINTAINERS | 6 + board/schneider/hmibsc/Makefile | 5 + board/schneider/hmibsc/hmibsc.c | 179 +++++++++++++++++++++++++++ board/schneider/hmibsc/hmibsc.env | 11 ++ configs/hmibsc_defconfig | 73 +++++++++++ drivers/usb/host/Kconfig | 1 + include/configs/hmibsc.h | 19 +++ 13 files changed, 560 insertions(+) create mode 100644 arch/arm/dts/hmibsc-uboot.dtsi create mode 100644 arch/arm/dts/hmibsc.dts create mode 100644 board/schneider/hmibsc/Kconfig create mode 100644 board/schneider/hmibsc/MAINTAINERS create mode 100644 board/schneider/hmibsc/Makefile create mode 100644 board/schneider/hmibsc/hmibsc.c create mode 100644 board/schneider/hmibsc/hmibsc.env create mode 100644 configs/hmibsc_defconfig create mode 100644 include/configs/hmibsc.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 55aceb51cdb..59cfc318400 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -601,6 +601,7 @@ dtb-$(CONFIG_TARGET_SL28) += fsl-ls1028a-kontron-sl28.dtb \ dtb-$(CONFIG_TARGET_TEN64) += fsl-ls1088a-ten64.dtb dtb-$(CONFIG_TARGET_DRAGONBOARD410C) += dragonboard410c.dtb +dtb-$(CONFIG_TARGET_HMIBSC) += hmibsc.dtb dtb-$(CONFIG_TARGET_DRAGONBOARD820C) += dragonboard820c.dtb dtb-$(CONFIG_TARGET_STARQLTECHN) += starqltechn.dtb dtb-$(CONFIG_TARGET_QCS404EVB) += qcs404-evb.dtb diff --git a/arch/arm/dts/hmibsc-uboot.dtsi b/arch/arm/dts/hmibsc-uboot.dtsi new file mode 100644 index 00000000000..1629e9263f5 --- /dev/null +++ b/arch/arm/dts/hmibsc-uboot.dtsi @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * U-Boot addition to handle HMIBSC pins + * + * (C) Copyright 2022 Sumit Garg + */ + +/ { + + smem { + bootph-all; + }; + + soc { + bootph-all; + + pinctrl@1000000 { + bootph-all; + + uart { + bootph-all; + }; + }; + + qcom,gcc@1800000 { + bootph-all; + }; + + serial@78af000 { + bootph-all; + }; + }; +}; + +&pm8916_gpios { + usb_hub_reset_pm { + gpios = <&pm8916_gpios 2 0>; + }; + + usb_sw_sel_pm { + gpios = <&pm8916_gpios 3 0>; + }; +}; diff --git a/arch/arm/dts/hmibsc.dts b/arch/arm/dts/hmibsc.dts new file mode 100644 index 00000000000..5b01870cb90 --- /dev/null +++ b/arch/arm/dts/hmibsc.dts @@ -0,0 +1,188 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm APQ8016 based HMIBSC board device tree source + * + * (C) Copyright 2023 Sumit Garg + */ + +/dts-v1/; + +#include "skeleton64.dtsi" +#include + +/ { + model = "Schneider Electric HMIBSC"; + compatible = "se,hmibsc", "qcom,apq8016-sbc"; + qcom,msm-id = <0xce 0x0 0xf8 0x0 0xf9 0x0 0xfa 0x0 0xf7 0x0>; + qcom,board-id = <0x10018 0x0>; + #address-cells = <0x2>; + #size-cells = <0x2>; + + aliases { + usb0 = "/soc/ehci@78d9000"; + }; + + memory { + device_type = "memory"; + reg = <0 0x80000000 0 0x3da00000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + smem_mem: smem_region@86300000 { + reg = <0x0 0x86300000 0x0 0x100000>; + no-map; + }; + }; + + chosen { + stdout-path = "/soc/serial@78af000"; + }; + + smem { + compatible = "qcom,smem"; + memory-region = <&smem_mem>; + qcom,rpm-msg-ram = <&rpm_msg_ram>; + }; + + soc { + #address-cells = <0x1>; + #size-cells = <0x1>; + ranges = <0x0 0x0 0x0 0xffffffff>; + compatible = "simple-bus"; + + rpm_msg_ram: memory@60000 { + compatible = "qcom,rpm-msg-ram"; + reg = <0x60000 0x8000>; + }; + + soc_gpios: pinctrl@1000000 { + compatible = "qcom,msm8916-pinctrl"; + reg = <0x1000000 0x400000>; + gpio-controller; + gpio-count = <122>; + gpio-bank-name="soc"; + #gpio-cells = <2>; + + blsp1_uart: uart { + function = "blsp1_uart"; + pins = "GPIO_0", "GPIO_1", "GPIO_2", "GPIO_3"; + drive-strength = <8>; + bias-disable; + }; + }; + clkc: qcom,gcc@1800000 { + compatible = "qcom,gcc-apq8016"; + reg = <0x1800000 0x80000>; + #address-cells = <0x1>; + #size-cells = <0x0>; + }; + + serial@78af000 { + compatible = "qcom,msm-uartdm-v1.4"; + reg = <0x78af000 0x200>; + clock = <&clkc 5>; + pinctrl-names = "uart"; + pinctrl-0 = <&blsp1_uart>; + gpios = <&soc_gpios 99 GPIO_ACTIVE_HIGH>, + <&soc_gpios 100 GPIO_ACTIVE_HIGH>; + }; + + ehci@78d9000 { + compatible = "qcom,ehci-host"; + reg = <0x78d9000 0x400>; + phys = <&ehci_phy>; + }; + + ehci_phy: ehci_phy@78d9000 { + compatible = "qcom,apq8016-usbphy"; + reg = <0x78d9000 0x400>; + #phy-cells = <0>; + }; + + sdhci@07824000 { + compatible = "qcom,sdhci-msm-v4"; + reg = <0x7824900 0x11c 0x7824000 0x800>; + bus-width = <0x8>; + index = <0x0>; + non-removable; + clock = <&clkc 0>; + clock-frequency = <100000000>; + }; + + sdhci@07864000 { + compatible = "qcom,sdhci-msm-v4"; + reg = <0x7864900 0x11c 0x7864000 0x800>; + index = <0x1>; + bus-width = <0x4>; + clock = <&clkc 1>; + clock-frequency = <200000000>; + cd-gpios = <&soc_gpios 38 GPIO_ACTIVE_LOW>; + }; + + wcnss { + bt { + compatible="qcom,wcnss-bt"; + }; + + wifi { + compatible="qcom,wcnss-wlan"; + }; + }; + + spmi_bus: spmi@200f000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x0200f000 0x001000>, + <0x02400000 0x400000>, + <0x02c00000 0x400000>, + <0x03800000 0x200000>, + <0x0200a000 0x002100>; + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; + #address-cells = <0x1>; + #size-cells = <0x1>; + pmic0: pm8916@0 { + compatible = "qcom,spmi-pmic"; + reg = <0x0 0x1>; + #address-cells = <0x1>; + #size-cells = <0x1>; + + pon@800 { + compatible = "qcom,pm8916-pon"; + reg = <0x800 0x100>; + mode-bootloader = <0x2>; + mode-recovery = <0x1>; + + pwrkey { + compatible = "qcom,pm8941-pwrkey"; + debounce = <15625>; + bias-pull-up; + }; + + pm8916_resin: resin { + compatible = "qcom,pm8941-resin"; + debounce = <15625>; + bias-pull-up; + }; + }; + + pm8916_gpios: pm8916_gpios@c000 { + compatible = "qcom,pm8916-gpio"; + reg = <0xc000 0x400>; + gpio-controller; + gpio-ranges = <&pm8916_gpios 0 0 4>; + #gpio-cells = <2>; + }; + }; + + pmic1: pm8916@1 { + compatible = "qcom,spmi-pmic"; + reg = <0x1 0x1>; + }; + }; + }; +}; + +#include "hmibsc-uboot.dtsi" diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig index ad667108191..d1312f1c2ab 100644 --- a/arch/arm/mach-snapdragon/Kconfig +++ b/arch/arm/mach-snapdragon/Kconfig @@ -43,6 +43,23 @@ config TARGET_DRAGONBOARD410C - HDMI - 20-pin low speed and 40-pin high speed expanders, 4 LED, 3 buttons +config TARGET_HMIBSC + bool "Schneider Electric HMIBSC" + select BOARD_LATE_INIT + select ENABLE_ARM_SOC_BOOT0_HOOK + imply CLK_QCOM_APQ8016 + imply PINCTRL_QCOM_APQ8016 + imply BUTTON_QCOM_PMIC + help + Support for Schneider Electric HMIBSC. Features: + - Qualcomm Snapdragon 410C SoC - APQ8016 (4xCortex A53, Adreno 306) + - 2GiB RAM + - 64GiB eMMC, SD slot + - WiFi and Bluetooth + - 2x Host, 1x Device USB port + - HDMI + - Discrete TPM2 chip over SPI + config TARGET_DRAGONBOARD820C bool "96Boards Dragonboard 820C" imply CLK_QCOM_APQ8096 @@ -93,6 +110,7 @@ config TARGET_QCS404EVB endchoice source "board/qualcomm/dragonboard410c/Kconfig" +source "board/schneider/hmibsc/Kconfig" source "board/qualcomm/dragonboard820c/Kconfig" source "board/qualcomm/dragonboard845c/Kconfig" source "board/samsung/starqltechn/Kconfig" diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile index 3a3a297c176..971196942b7 100644 --- a/arch/arm/mach-snapdragon/Makefile +++ b/arch/arm/mach-snapdragon/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_SDM845) += sysmap-sdm845.o obj-$(CONFIG_SDM845) += init_sdm845.o obj-$(CONFIG_TARGET_DRAGONBOARD820C) += sysmap-apq8096.o obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o +obj-$(CONFIG_TARGET_HMIBSC) += sysmap-apq8016.o obj-y += misc.o obj-y += dram.o obj-$(CONFIG_TARGET_QCS404EVB) += sysmap-qcs404.o diff --git a/board/schneider/hmibsc/Kconfig b/board/schneider/hmibsc/Kconfig new file mode 100644 index 00000000000..f093350b868 --- /dev/null +++ b/board/schneider/hmibsc/Kconfig @@ -0,0 +1,15 @@ +if TARGET_HMIBSC + +config SYS_BOARD + default "hmibsc" + +config SYS_VENDOR + default "schneider" + +config SYS_SOC + default "apq8016" + +config SYS_CONFIG_NAME + default "hmibsc" + +endif diff --git a/board/schneider/hmibsc/MAINTAINERS b/board/schneider/hmibsc/MAINTAINERS new file mode 100644 index 00000000000..0f31bbda966 --- /dev/null +++ b/board/schneider/hmibsc/MAINTAINERS @@ -0,0 +1,6 @@ +HMIBSC BOARD +M: Sumit Garg +S: Maintained +F: board/schneider/hmibsc/ +F: include/configs/hmibsc.h +F: configs/hmibsc_defconfig diff --git a/board/schneider/hmibsc/Makefile b/board/schneider/hmibsc/Makefile new file mode 100644 index 00000000000..7c9edd6a90d --- /dev/null +++ b/board/schneider/hmibsc/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2023 Sumit Garg + +obj-y := hmibsc.o diff --git a/board/schneider/hmibsc/hmibsc.c b/board/schneider/hmibsc/hmibsc.c new file mode 100644 index 00000000000..b2d506b528b --- /dev/null +++ b/board/schneider/hmibsc/hmibsc.c @@ -0,0 +1,179 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Board init file for SE HMIBSC + * + * (C) Copyright 2023 Sumit Garg + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + gd->ram_size = PHYS_SDRAM_1_SIZE; + + return 0; +} + +int dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return 0; +} + +int board_usb_init(int index, enum usb_init_type init) +{ + static struct udevice *pmic_gpio; + static struct gpio_desc hub_reset, usb_sel; + int ret = 0, node; + + if (!pmic_gpio) { + ret = uclass_get_device_by_name(UCLASS_GPIO, + "pm8916_gpios@c000", + &pmic_gpio); + if (ret < 0) { + printf("Failed to find pm8916_gpios@c000 node.\n"); + return ret; + } + } + + /* Try to request gpios needed to start usb host on dragonboard */ + if (!dm_gpio_is_valid(&hub_reset)) { + node = fdt_subnode_offset(gd->fdt_blob, + dev_of_offset(pmic_gpio), + "usb_hub_reset_pm"); + if (node < 0) { + printf("Failed to find usb_hub_reset_pm dt node.\n"); + return node; + } + ret = gpio_request_by_name_nodev(offset_to_ofnode(node), + "gpios", 0, &hub_reset, 0); + if (ret < 0) { + printf("Failed to request usb_hub_reset_pm gpio.\n"); + return ret; + } + } + + if (!dm_gpio_is_valid(&usb_sel)) { + node = fdt_subnode_offset(gd->fdt_blob, + dev_of_offset(pmic_gpio), + "usb_sw_sel_pm"); + if (node < 0) { + printf("Failed to find usb_sw_sel_pm dt node.\n"); + return 0; + } + ret = gpio_request_by_name_nodev(offset_to_ofnode(node), + "gpios", 0, &usb_sel, 0); + if (ret < 0) { + printf("Failed to request usb_sw_sel_pm gpio.\n"); + return ret; + } + } + + if (init == USB_INIT_HOST) { + /* Start USB Hub */ + dm_gpio_set_dir_flags(&hub_reset, + GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); + mdelay(100); + /* Switch usb to host connectors */ + dm_gpio_set_dir_flags(&usb_sel, + GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); + mdelay(100); + } else { /* Device */ + /* Disable hub */ + dm_gpio_set_dir_flags(&hub_reset, GPIOD_IS_OUT); + /* Switch back to device connector */ + dm_gpio_set_dir_flags(&usb_sel, GPIOD_IS_OUT); + } + + return 0; +} + +/* Check for vol- button - if pressed - stop autoboot */ +int misc_init_r(void) +{ + struct udevice *btn; + int ret; + enum button_state_t state; + + ret = button_get_by_label("vol_down", &btn); + if (ret < 0) { + printf("Couldn't find power button!\n"); + return ret; + } + + state = button_get_state(btn); + if (state == BUTTON_ON) { + env_set("preboot", "setenv preboot; fastboot 0"); + printf("vol_down pressed - Starting fastboot.\n"); + } + + return 0; +} + +int board_init(void) +{ + return 0; +} + +int board_late_init(void) +{ + return 0; +} + +/* + * Fixup of DTB for Linux Kernel + * 1. Fixup installed DRAM. + * 2. Fixup WLAN/BT Mac address: + * First, check if MAC addresses for WLAN/BT exists as environemnt + * variables wlanaddr,btaddr. if not, generate a unique address. + */ + +int ft_board_setup(void *blob, struct bd_info *bd) +{ + u8 mac[ARP_HLEN]; + + msm_fixup_memory(blob); + + if (!eth_env_get_enetaddr("wlanaddr", mac)) { + msm_generate_mac_addr(mac); + }; + + do_fixup_by_compat(blob, "qcom,wcnss-wlan", + "local-mac-address", mac, ARP_HLEN, 1); + + if (!eth_env_get_enetaddr("btaddr", mac)) { + msm_generate_mac_addr(mac); + + /* + * The BD address is same as WLAN MAC address but with + * least significant bit flipped. + */ + mac[0] ^= 0x01; + }; + + do_fixup_by_compat(blob, "qcom,wcnss-bt", + "local-bd-address", mac, ARP_HLEN, 1); + return 0; +} + +void reset_cpu(void) +{ + psci_system_reset(); +} diff --git a/board/schneider/hmibsc/hmibsc.env b/board/schneider/hmibsc/hmibsc.env new file mode 100644 index 00000000000..692722058f5 --- /dev/null +++ b/board/schneider/hmibsc/hmibsc.env @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +loadaddr=0x90000000 +initrd_high=0xffffffffffffffff +linux_image=Image +kernel_addr_r=0x81000000 +fdtfile=qcom/hmibsc.dtb +fdt_addr_r=0x83000000 +ramdisk_addr_r=0x84000000 +scriptaddr=0x90000000 +pxefile_addr_r=0x90100000 diff --git a/configs/hmibsc_defconfig b/configs/hmibsc_defconfig new file mode 100644 index 00000000000..cef9e304b3a --- /dev/null +++ b/configs/hmibsc_defconfig @@ -0,0 +1,73 @@ +CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=19000000 +CONFIG_ARCH_SNAPDRAGON=y +CONFIG_TEXT_BASE=0x8f600000 +CONFIG_SYS_MALLOC_LEN=0x802000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0x0 +CONFIG_TARGET_HMIBSC=y +CONFIG_DEFAULT_DEVICE_TREE="hmibsc" +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_IDENT_STRING="\nSchneider Electric-HMIBSC" +CONFIG_SYS_LOAD_ADDR=0x80080000 +CONFIG_REMAKE_ELF=y +# CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_FIT=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_USE_PREBOOT=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_MISC_INIT_R=y +CONFIG_SYS_PROMPT="hmibsc => " +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=512 +CONFIG_SYS_PBSIZE=548 +# CONFIG_CMD_IMI is not set +CONFIG_CMD_MD5SUM=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_BOOTP_BOOTFILESIZE=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIMER=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_PART=2 +CONFIG_CLK=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x91000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_MSM_GPIO=y +CONFIG_QCOM_PMIC_GPIO=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_MSM=y +CONFIG_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_QCOM=y +CONFIG_MSM_SERIAL=y +CONFIG_SPMI_MSM=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_MSM=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x18d1 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd00d +CONFIG_CI_UDC=y diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index b501ea514bc..776466978f7 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -266,6 +266,7 @@ config USB_EHCI_MSM depends on DM_USB select USB_ULPI_VIEWPORT select MSM8916_USB_PHY + select EHCI_HCD_INIT_AFTER_RESET ---help--- Enables support for the on-chip EHCI controller on Qualcomm Snapdragon SoCs. diff --git a/include/configs/hmibsc.h b/include/configs/hmibsc.h new file mode 100644 index 00000000000..04052ed6dee --- /dev/null +++ b/include/configs/hmibsc.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Board configuration file for HMIBSC + * + * (C) Copyright 2023 Sumit Garg + */ + +#ifndef __CONFIGS_HMIBSC_H +#define __CONFIGS_HMIBSC_H + +#include + +/* Physical Memory Map */ +#define PHYS_SDRAM_1 0x80000000 +/* Note: 8 MiB (0x86000000 - 0x86800000) are reserved for tz/smem/hyp/rmtfs/rfsa */ +#define PHYS_SDRAM_1_SIZE SZ_1G +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 + +#endif From patchwork Mon Dec 18 07:24:26 2023 Content-Type: text/plain; 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([223.178.213.6]) by smtp.gmail.com with ESMTPSA id nr21-20020a17090b241500b0028b8b269aedsm1038997pjb.57.2023.12.17.23.25.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 23:25:10 -0800 (PST) From: Sumit Garg To: u-boot@lists.denx.de Cc: caleb.connolly@linaro.org, neil.armstrong@linaro.org, lukma@denx.de, seanga2@gmail.com, marex@denx.de, laetitia.mariottini@se.com, pascal.eberhard@se.com, abdou.saker@se.com, jimmy.lalande@se.com, benjamin.missey@non.se.com, daniel.thompson@linaro.org, Sumit Garg Subject: [PATCH 5/7] hmibsc: Enable RAUC support Date: Mon, 18 Dec 2023 12:54:26 +0530 Message-Id: <20231218072428.1802969-6-sumit.garg@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231218072428.1802969-1-sumit.garg@linaro.org> References: <20231218072428.1802969-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Signed-off-by: Sumit Garg --- include/configs/hmibsc.h | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/include/configs/hmibsc.h b/include/configs/hmibsc.h index 04052ed6dee..b614dec7870 100644 --- a/include/configs/hmibsc.h +++ b/include/configs/hmibsc.h @@ -16,4 +16,42 @@ #define PHYS_SDRAM_1_SIZE SZ_1G #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#undef CONFIG_BOOTCOMMAND +# define CONFIG_BOOTCOMMAND \ + "setenv devtype mmc; setenv devnum 0; " \ + "test -n \"${BOOT_ORDER}\" || setenv BOOT_ORDER \"A B\"; " \ + "test -n \"${BOOT_A_LEFT}\" || setenv BOOT_A_LEFT 3; " \ + "test -n \"${BOOT_B_LEFT}\" || setenv BOOT_B_LEFT 3; " \ + "setenv raucslot; " \ + "for BOOT_SLOT in \"${BOOT_ORDER}\"; do " \ + " if test \"x${raucslot}\" != \"x\"; then " \ + " echo \"skip remaining slots...\"; " \ + " elif test \"x${BOOT_SLOT}\" = \"xA\"; then " \ + " if test ${BOOT_A_LEFT} -gt 0; then " \ + " setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1; " \ + " echo \"Found valid RAUC slot A\"; " \ + " setenv raucslot \"rauc.slot=A\"; " \ + " setenv raucpart A; setenv distro_bootpart 6;" \ + " fi; " \ + " elif test \"x${BOOT_SLOT}\" = \"xB\"; then " \ + " if test ${BOOT_B_LEFT} -gt 0; then " \ + " setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1; " \ + " echo \"Found valid RAUC slot B\"; " \ + " setenv raucslot \"rauc.slot=B\"; " \ + " setenv raucpart B; setenv distro_bootpart 7;" \ + " fi; " \ + " fi; " \ + "done; " \ + "if test -n \"${raucslot}\"; then " \ + " setenv bootargs console=ttyMSM1 root=PARTLABEL=rootfs_${raucpart} rw rootwait ${raucslot}; " \ + " saveenv; " \ + "else " \ + " echo \"No valid RAUC slot found. Resetting tries to 3\"; " \ + " setenv BOOT_A_LEFT 3; " \ + " setenv BOOT_B_LEFT 3; " \ + " saveenv; " \ + " reset; " \ + "fi; " \ + "load ${devtype} ${devnum}:${distro_bootpart} ${loadaddr} /boot/fitImage && bootm" + #endif From patchwork Mon Dec 18 07:24:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Garg X-Patchwork-Id: 755464 Delivered-To: patch@linaro.org Received: by 2002:adf:b181:0:b0:336:6142:bf13 with SMTP id q1csp746094wra; Sun, 17 Dec 2023 23:26:02 -0800 (PST) X-Google-Smtp-Source: AGHT+IGMeYSuIIdF9tbFW5ocwHLOWc0C7aM3kLs66lNeiTwGzdteKOiHeSYN4Yntk/Sc8FhZfDDs X-Received: by 2002:a7b:c7c9:0:b0:40c:3e0c:d000 with SMTP id z9-20020a7bc7c9000000b0040c3e0cd000mr7180580wmk.166.1702884361845; Sun, 17 Dec 2023 23:26:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702884361; cv=none; d=google.com; s=arc-20160816; b=GrSO3qb9A11Nt3rws1hVsiiiTDKF/SH6MYHOCOPVuxsAkh4IRppS4PpQ+0TfkFdbsX mVu2Z6IOR/wuqhZjbiAvhbH/As85m2pwRyuswqV5XlWz84jTMNnYqXd0V9yqdRui7jdY Ncnl8HVmbKPWC/ka6IMSPlFGh6hSmSusIM+Fu9q4z9ggigN4vraKdZ+WSTEYHvgjnNTE YysBooWTqMql9rd1uDAAPQtY6GJIJm857w0PBCqT9LCRYT6aL0Zsaw/XmUS/sO3ReN10 N1288WzgUEJg/XDhH4IqHmL4nSGVXgRrWDuVmnqzoJ2yNv2YbAbkD+QX8k8aLe7Ow8md NaPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=IK+ADiv6RJioLn2TE34SiYKpwSEbF3I+hmtgTd3SEMA=; fh=EPAXKs+rTOunvfiRvsa3VTOJx1yl2mZQeEuTZH0yVZ0=; b=Ft4gPbBsLIAmWx3/aKnpv+QRYNEKz9iUPcvN6iUKIH2y3X2oYZBl26kxqqDkiFgQzv 1u2tgw1VTn5xSEPeVDiYtY1CezLW1P7VKJX5GrvYO2Wy3inSmX77Rh/DkOhUCM1uj+Up EU+dYW0Ub9jgSu29m5f0MCnXYBBavsaltMOEJJEbzvM/QnC5OElQ+jZh6vx4K6JD6uD3 0YA7jMl3Z4w0nvvzMXfVi4Dq882UDUbq/pgw8tZdZgSn0nS8QsJA/HYgG9DmiTb2tHsd RPj1aNtpEBAzLQatWQy6i1HpUA7koUSKJvRTO7u9r+BsG6HEl05cYhR34ySTVj8n2tCp q5NA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Wgt2tjeR; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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([223.178.213.6]) by smtp.gmail.com with ESMTPSA id nr21-20020a17090b241500b0028b8b269aedsm1038997pjb.57.2023.12.17.23.25.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 23:25:15 -0800 (PST) From: Sumit Garg To: u-boot@lists.denx.de Cc: caleb.connolly@linaro.org, neil.armstrong@linaro.org, lukma@denx.de, seanga2@gmail.com, marex@denx.de, laetitia.mariottini@se.com, pascal.eberhard@se.com, abdou.saker@se.com, jimmy.lalande@se.com, benjamin.missey@non.se.com, daniel.thompson@linaro.org, Sumit Garg Subject: [PATCH 6/7] hmibsc: enable U-Boot Environment variables protection Date: Mon, 18 Dec 2023 12:54:27 +0530 Message-Id: <20231218072428.1802969-7-sumit.garg@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231218072428.1802969-1-sumit.garg@linaro.org> References: <20231218072428.1802969-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Enable Environment protection with: CONFIG_ENV_WRITEABLE_LIST=y CONFIG_ENV_ACCESS_IGNORE_FORCE=y Signed-off-by: Sumit Garg --- configs/hmibsc_defconfig | 4 ++++ include/configs/hmibsc.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/configs/hmibsc_defconfig b/configs/hmibsc_defconfig index cef9e304b3a..656c9c6d0d6 100644 --- a/configs/hmibsc_defconfig +++ b/configs/hmibsc_defconfig @@ -36,6 +36,10 @@ CONFIG_CMD_USB=y CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y +CONFIG_CMD_ENV_FLAGS=y +CONFIG_CMD_NVEDIT_INFO=y +CONFIG_ENV_WRITEABLE_LIST=y +CONFIG_ENV_ACCESS_IGNORE_FORCE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_PART=2 diff --git a/include/configs/hmibsc.h b/include/configs/hmibsc.h index b614dec7870..b228e035429 100644 --- a/include/configs/hmibsc.h +++ b/include/configs/hmibsc.h @@ -54,4 +54,6 @@ "fi; " \ "load ${devtype} ${devnum}:${distro_bootpart} ${loadaddr} /boot/fitImage && bootm" +#define CFG_ENV_FLAGS_LIST_STATIC "BOOT_A_LEFT:dw,BOOT_B_LEFT:dw,BOOT_ORDER:sw" + #endif From patchwork Mon Dec 18 07:24:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Garg X-Patchwork-Id: 755465 Delivered-To: patch@linaro.org Received: by 2002:adf:b181:0:b0:336:6142:bf13 with SMTP id q1csp746139wra; Sun, 17 Dec 2023 23:26:10 -0800 (PST) X-Google-Smtp-Source: AGHT+IExHEwLMmoLLF8XFvFlnEeQUqJtMLPP/6R5RtQQOSSNq7kFohMhRLmgsm75flIZ8blOXtS3 X-Received: by 2002:a7b:c385:0:b0:40c:1d9b:d50e with SMTP id s5-20020a7bc385000000b0040c1d9bd50emr3473457wmj.171.1702884370691; Sun, 17 Dec 2023 23:26:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702884370; cv=none; d=google.com; s=arc-20160816; b=ztlD0PgzIsQTSgDO8InHsWNgu0Tk5vbLn3/DHs9bXg4cjJwqJnqu6L5l2TM1VYefV+ cZr9XCHCaZNmrQiyPY4oPdQ1IHcZ4ec6eWHZjGQPHjuWBIzHLfOPHYovXj8z4WgWbtAI 2H+jKgyyMo7z4sHeo8PxQaeMduveDLdK6NRcs60voGSKY3ISDERRy03BrkxPNSR9Wauk 6CyVUbtR52HAZNKicKn7gLJcbu1wsbB1SZpT4SriWLd0f3S2uVGtRfp/lo30m5bsZsDy E2GiSo68LWwLYAeSb677qeBinyqrsOZsU8c1TSImj9ViXAYjnhvi08TazTvXsoyM9isB 8YRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=9KX0oMS9fKHDG92d984I+WGMrCqo5x7crkUbdPUftnA=; fh=EPAXKs+rTOunvfiRvsa3VTOJx1yl2mZQeEuTZH0yVZ0=; b=LwbexgmdNYI1IetbwGKa1v4D4ImdI+C3wAhFI/1J5MbwyxCtcc0f1BfbmUS6/jVwDL whbZeRMXOd6uLdxgeycW4QXsFUk/dvy+wX9HuAk3hQImXLG2XXL3eX0JgElO79fbdTCP OeELuzwWCl6RpO3DEvzT1F+4WWwtZFjLp+e1/9WZPAyxAi397yE75VVdtlXIdJw5T5Q9 j/0Qu3bxDhZ1uQ1kNzNbbKOssuFEEXbA5IF2/THHhSUQZ1IaqOdL84YB/bZV0v5nH5cv hb7I+h1r9riVRN1RGKg5Kx3Jby9D8D444eBeS+h+saJGh7yS6jQNaQp9jVIuZd3m7p9e wS8g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=T3ydjKXl; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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([223.178.213.6]) by smtp.gmail.com with ESMTPSA id nr21-20020a17090b241500b0028b8b269aedsm1038997pjb.57.2023.12.17.23.25.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 23:25:20 -0800 (PST) From: Sumit Garg To: u-boot@lists.denx.de Cc: caleb.connolly@linaro.org, neil.armstrong@linaro.org, lukma@denx.de, seanga2@gmail.com, marex@denx.de, laetitia.mariottini@se.com, pascal.eberhard@se.com, abdou.saker@se.com, jimmy.lalande@se.com, benjamin.missey@non.se.com, daniel.thompson@linaro.org, Sumit Garg Subject: [PATCH 7/7] hmibsc: Enable LAN75XX USB ethernet driver Date: Mon, 18 Dec 2023 12:54:28 +0530 Message-Id: <20231218072428.1802969-8-sumit.garg@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231218072428.1802969-1-sumit.garg@linaro.org> References: <20231218072428.1802969-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean HMIBSC board has hardwired support for 2 USB host LAN75XX ethernet adaptors. So enable corresponding driver in u-boot. Steps to test networking: hmibsc => setenv bootfile fitImage hmibsc => setenv serverip 192.168.1.24 hmibsc => usb start starting USB... Bus ehci@78d9000: USB EHCI 1.00 scanning bus ehci@78d9000 for devices... 5 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found hmibsc => dhcp lan75xx_eth Waiting for PHY auto negotiation to complete......... TIMEOUT ! phy_startup failed lan75xx_eth Waiting for PHY auto negotiation to complete....... done BOOTP broadcast 1 BOOTP broadcast 2 *** Unhandled DHCP Option in OFFER/ACK: 125 *** Unhandled DHCP Option in OFFER/ACK: 125 DHCP client bound to address 192.168.1.22 (6220 ms) Using lan75xx_eth device TFTP from server 192.168.1.24; our IP address is 192.168.1.22 Filename 'fitImage'. Load address: 0x90000000 Loading: ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################ 5.2 MiB/s done Bytes transferred = 30992680 (1d8e928 hex) Signed-off-by: Sumit Garg --- configs/hmibsc_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/hmibsc_defconfig b/configs/hmibsc_defconfig index 656c9c6d0d6..dd3d18a5953 100644 --- a/configs/hmibsc_defconfig +++ b/configs/hmibsc_defconfig @@ -71,6 +71,8 @@ CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_PHYLIB=y +CONFIG_USB_ETHER_LAN75XX=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_VENDOR_NUM=0x18d1 CONFIG_USB_GADGET_PRODUCT_NUM=0xd00d