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[85.76.13.188]) by smtp.gmail.com with ESMTPSA id c16-20020a056512239000b0050dff5bb793sm1389263lfv.143.2023.12.15.09.41.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 09:41:56 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 1/7] arm64: dts: qcom: sm8150: make dispcc cast minimal vote on MMCX Date: Fri, 15 Dec 2023 19:40:33 +0200 Message-ID: <20231215174152.315403-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231215174152.315403-1-dmitry.baryshkov@linaro.org> References: <20231215174152.315403-1-dmitry.baryshkov@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add required-opps property to the display clock controller. This makes it cast minimal vote on the MMCX lane and prevents further 'clock stuck' errors when enabling the display. Fixes: 2ef3bb17c45c ("arm64: dts: qcom: sm8150: Add DISPCC node") Acked-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 2ce07910dd13..ad03ede906bb 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3925,6 +3925,7 @@ dispcc: clock-controller@af00000 { "dp_phy_pll_link_clk", "dp_phy_pll_vco_div_clk"; power-domains = <&rpmhpd SM8150_MMCX>; + required-opps = <&rpmhpd_opp_low_svs>; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; From patchwork Fri Dec 15 17:40:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 755284 Received: from mail-lf1-f51.google.com (mail-lf1-f51.google.com [209.85.167.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C2C51DDC1 for ; Fri, 15 Dec 2023 17:41:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="mIarOCv+" Received: by mail-lf1-f51.google.com with SMTP id 2adb3069b0e04-50e2461f8a2so146835e87.0 for ; Fri, 15 Dec 2023 09:41:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702662118; x=1703266918; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VkZ0d7wqWaT2Oid/3peHdN8kAaqN3lW46U8589k3qIY=; b=mIarOCv+IT/rqIjg9GlRLCJmvHsWMr4tZHNQ2X/KO8RsEYFHCuDi5qeF3mEFSWdLfj QTC0W4Slkl+r/ZpuLw5CmQBRMCiFZc4cFk5A9C7dwqEoCdzxNbiqI/+6M8XS/U1yOYEb JYLlHVuFePhAfyhewCakOYGONprWjKXh0e3bmMt9HjENcvvq6qsV/jfwiqpxZVWDPwdc unDwPqEt6fpP9rC6QLZcloI85+HIz/4SbQGkSnzI9JLnUKhviHoeyksUXMPluN2iv011 yTxYJyFxvdmrlHrTNa0FqDq9oxtiBaW9ZJqIs40cMdgTjfo3yl+LdtoCQTN+rWx5Sfaf Ke/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702662118; x=1703266918; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VkZ0d7wqWaT2Oid/3peHdN8kAaqN3lW46U8589k3qIY=; b=AMFGJsy1IcnS5lQ70YpiL/gnqY5VbWD7n+cDJYQiOO5wcKtWz6OmDXmuI4d1yl2v6b iL9YnxxI40cN3ufxQ+Rl1Qnae8jAMXWFOpOEP16Q0sCWWCIpkEHKpG7zyQqeXNBMPsEv SST49vTq99bZJCFdjIM1tHavcjXt01jkxDvdHekHoPf1xCRE/+Esie7QzoSz6Xa1jB0y eZKU29bxdx920oDfw7P3WCA56VLDe3j4lB/12450JGvnw7ehYv98yBUkKyxZrdlmMnyy lRji1qGwPXm9mhbBJb64x3LcS53SXO1F4wab74zRIDwTJZ96PqLDCfDTiUSIvvBpJp0O 0tJA== X-Gm-Message-State: AOJu0YxnnLoV+nW+8rLdc7zljeAx4sL7kG60SfVQ8ZM5PTAA+aJMlk7f v02v7zeTGWM/FXpFQI6V6w9qbw== X-Google-Smtp-Source: AGHT+IG6asdVxl3ZeJA5fGQH0/rlG1vk8xcqUDsS9ognza44Q/oogrHhARfDGbPNCDjGQm306HdzZQ== X-Received: by 2002:a05:6512:36d2:b0:50b:fc6d:bb8d with SMTP id e18-20020a05651236d200b0050bfc6dbb8dmr5348985lfs.56.1702662118229; Fri, 15 Dec 2023 09:41:58 -0800 (PST) Received: from eriador.lumag.spb.ru (85-76-13-188-nat.elisa-mobile.fi. [85.76.13.188]) by smtp.gmail.com with ESMTPSA id c16-20020a056512239000b0050dff5bb793sm1389263lfv.143.2023.12.15.09.41.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 09:41:57 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 2/7] arm64: dts: qcom: sm8150-hdk: enable HDMI output Date: Fri, 15 Dec 2023 19:40:34 +0200 Message-ID: <20231215174152.315403-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231215174152.315403-1-dmitry.baryshkov@linaro.org> References: <20231215174152.315403-1-dmitry.baryshkov@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add DSI outputs and link them to the onboard Lontium LT9611 DSI-to-HDMI bridge, enabling HDMI output on this board. While adding the display resources, also drop the headless ("amd,imageon") compat string from the GPU node, since the board now has output. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8150-hdk.dts | 128 +++++++++++++++++++++++- 1 file changed, 123 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts index bb161b536da4..6a036f9ba1c9 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts @@ -54,6 +54,17 @@ key-vol-up { gpios = <&pm8150_gpios 6 GPIO_ACTIVE_LOW>; }; }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <<9611_out>; + }; + }; + }; }; &apps_rsc { @@ -359,12 +370,112 @@ &gmu { status = "okay"; }; +&gpi_dma1 { + status = "okay"; +}; + &gpu { - /* - * NOTE: "amd,imageon" makes Adreno start in headless mode, remove it - * after display support is added on this board. - */ - compatible = "qcom,adreno-640.1", "qcom,adreno", "amd,imageon"; + status = "okay"; +}; + +&i2c9 { + status = "okay"; + clock-frequency = <400000>; + + lt9611_codec: hdmi-bridge@3b { + compatible = "lontium,lt9611"; + reg = <0x3b>; + #sound-dai-cells = <1>; + + interrupts-extended = <&tlmm 9 IRQ_TYPE_EDGE_FALLING>; + + reset-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>; + + vdd-supply = <&vreg_s4a_1p8>; + vcc-supply = <&vreg_bob>; + + pinctrl-names = "default"; + pinctrl-0 = <<9611_irq_pin>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lt9611_a: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + + lt9611_b: endpoint { + remote-endpoint = <&mdss_dsi1_out>; + }; + }; + + port@2 { + reg = <2>; + + lt9611_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; +}; + +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + status = "okay"; + vdda-supply = <&vreg_l3c_1p2>; + + qcom,dual-dsi-mode; + qcom,master-dsi; + + ports { + port@1 { + endpoint { + remote-endpoint = <<9611_a>; + data-lanes = <0 1 2 3>; + }; + }; + }; +}; + +&mdss_dsi0_phy { + status = "okay"; + vdds-supply = <&vreg_l5a_0p875>; +}; + +&mdss_dsi1 { + vdda-supply = <&vreg_l3c_1p2>; + + qcom,dual-dsi-mode; + + /* DSI1 is slave, so use DSI0 clocks */ + assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; + + status = "okay"; + + ports { + port@1 { + endpoint { + remote-endpoint = <<9611_b>; + data-lanes = <0 1 2 3>; + }; + }; + }; +}; + +&mdss_dsi1_phy { + vdds-supply = <&vreg_l5a_0p875>; status = "okay"; }; @@ -402,6 +513,13 @@ &remoteproc_slpi { &tlmm { gpio-reserved-ranges = <0 4>, <126 4>; + + lt9611_irq_pin: lt9611-irq-state { + pins = "gpio9"; + function = "gpio"; + bias-disable; + }; + }; &uart2 { From patchwork Fri Dec 15 17:40:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 754476 Received: from mail-lf1-f51.google.com (mail-lf1-f51.google.com [209.85.167.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AC97982EF8 for ; Fri, 15 Dec 2023 17:42:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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[85.76.13.188]) by smtp.gmail.com with ESMTPSA id c16-20020a056512239000b0050dff5bb793sm1389263lfv.143.2023.12.15.09.41.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 09:41:59 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 3/7] arm64: dts: qcom: sm8150-hdk: fix SS USB regulators Date: Fri, 15 Dec 2023 19:40:35 +0200 Message-ID: <20231215174152.315403-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231215174152.315403-1-dmitry.baryshkov@linaro.org> References: <20231215174152.315403-1-dmitry.baryshkov@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The SM8150-HDK uses two different regulators to power up SuperSpeed USB PHYs. The L5A regulator is used for the second USB host, while the first (OTG) USB host uses different regulator, L18A. Fix the regulator for the usb_1 QMPPHY and (to remove possible confusion) drop the usb_ss_dp_core_1/_2 labels. Fixes: 0ab1b2d10afe ("arm64: dts: qcom: add sm8150 hdk dts") Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8150-hdk.dts | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts index 6a036f9ba1c9..ea4d75308ac8 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts @@ -138,8 +138,6 @@ vdda_qrefs_0p875_5: vdda_sp_sensor: vdda_ufs_2ln_core_1: vdda_ufs_2ln_core_2: - vdda_usb_ss_dp_core_1: - vdda_usb_ss_dp_core_2: vdda_qlink_lv: vdda_qlink_lv_ck: vreg_l5a_0p875: ldo5 { @@ -221,6 +219,12 @@ vreg_l17a_3p0: ldo17 { regulator-max-microvolt = <3008000>; regulator-initial-mode = ; }; + + vreg_l18a_0p8: ldo18 { + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + regulator-initial-mode = ; + }; }; regulators-1 { @@ -563,13 +567,13 @@ &usb_2_hsphy { &usb_1_qmpphy { status = "okay"; vdda-phy-supply = <&vreg_l3c_1p2>; - vdda-pll-supply = <&vdda_usb_ss_dp_core_1>; + vdda-pll-supply = <&vreg_l18a_0p8>; }; &usb_2_qmpphy { status = "okay"; vdda-phy-supply = <&vreg_l3c_1p2>; - vdda-pll-supply = <&vdda_usb_ss_dp_core_1>; + vdda-pll-supply = <&vreg_l5a_0p875>; }; &usb_1 { From patchwork Fri Dec 15 17:40:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 755283 Received: from mail-lf1-f54.google.com (mail-lf1-f54.google.com [209.85.167.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 413D430109 for ; Fri, 15 Dec 2023 17:42:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="uEBIgFuq" Received: by mail-lf1-f54.google.com with SMTP id 2adb3069b0e04-50d176eb382so1209616e87.2 for ; Fri, 15 Dec 2023 09:42:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702662121; x=1703266921; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jb3yyT60JxfN3wtZfqwGr6jtCxjpRC2WofuVNBbqItw=; b=uEBIgFuqPzfjKvP7GY3qWkFuXCQIE5PBGffr+b7YkRHeVs+4oD7jSXcwrlQJ0+qHfx vEtY80+nn3nNxsBWY2vS9EqbLRm8DnVidFx5pa7la0MYTTZZXtZvqIaP2i8zNmJm1hDP o5g9eYgfhHUl4bV8STk3ny4bfhIUMi4FSpBrcwZqAM9BkujMBPI2KwFSr1+Ktx/fBz0v wKpu4vWx/CnHcfP4LHfjZf0LxGicaVXMveB408RjgN1kHRNpPC0O5Gmo0MgQRN7GiN65 h2PW3e8V1So8MgAHPUWiS3NlekLA9wgIz+gp+iZn8wDJcT4UkggUNVjEXyCX1U6f0CMz WQBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702662121; x=1703266921; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jb3yyT60JxfN3wtZfqwGr6jtCxjpRC2WofuVNBbqItw=; b=g1OTX+4N/J/cXjIM7yFry1MkFvo6rA+QlnNPIuZ6hFrZMi2WXfjNHkoEwEk5HtwsTT Ma78lZ0+SQHi20QFFthw+nhCcTeR6I1AV4r8z49JVotm0pxJV1UM6Mo4muO9sxKSRpX6 wzAqsMqE1EmMHsv2iTJTu58HPhyLV7zgST524ttXysiIqs5WD5JKlILS5W1mrTD8oPU0 HyQ6AMTjGaA0sMV+8ISah2hjiOwJHfslogXft1EmRDFRQ11RRO49XTIk+i8F8x2sp/01 5JcRalfJToHX9G2unX3EM39H8zz1IofkWl2Z+3dKrQTcdZcpsrxAFvRAPP2R2czSqiS4 71Nw== X-Gm-Message-State: AOJu0YwaF1VaW/+QHy+ZyfqM+YAJpuOjyzNBl9HRhR5vSAFZhYaZ0vbO mFGba2pK/iSdFNddgS8TOXkqmg== X-Google-Smtp-Source: AGHT+IG+QLXDAXKKgY6LgrZ851rUXPmXG2u94e0dOIK+um/QxLnD+u3sgh5+dYP4UwoEbHFk6s1aSQ== X-Received: by 2002:a05:6512:36c4:b0:50b:ffb9:7a4e with SMTP id e4-20020a05651236c400b0050bffb97a4emr5039637lfs.46.1702662121338; Fri, 15 Dec 2023 09:42:01 -0800 (PST) Received: from eriador.lumag.spb.ru (85-76-13-188-nat.elisa-mobile.fi. [85.76.13.188]) by smtp.gmail.com with ESMTPSA id c16-20020a056512239000b0050dff5bb793sm1389263lfv.143.2023.12.15.09.41.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 09:42:01 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 4/7] arm64: dts: qcom: sm8150: add DisplayPort controller Date: Fri, 15 Dec 2023 19:40:36 +0200 Message-ID: <20231215174152.315403-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231215174152.315403-1-dmitry.baryshkov@linaro.org> References: <20231215174152.315403-1-dmitry.baryshkov@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add device tree node for the DisplayPort controller and link it to the display controller interface. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 87 ++++++++++++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index ad03ede906bb..0a002ac744e5 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3712,6 +3712,13 @@ dpu_intf2_out: endpoint { remote-endpoint = <&mdss_dsi1_in>; }; }; + + port@2 { + reg = <2>; + dpu_intf0_out: endpoint { + remote-endpoint = <&mdss_dp_in>; + }; + }; }; mdp_opp_table: opp-table { @@ -3739,6 +3746,86 @@ opp-460000000 { }; }; + mdss_dp: displayport-controller@ae90000 { + compatible = "qcom,sm8150-dp", "qcom,sm8350-dp"; + reg = <0 0xae90000 0 0x200>, + <0 0xae90200 0 0x200>, + <0 0xae90400 0 0x600>, + <0 0x0ae90a00 0 0x600>, + <0 0x0ae91000 0 0x600>; + + interrupt-parent = <&mdss>; + interrupts = <12>; + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_DP_AUX_CLK>, + <&dispcc DISP_CC_MDSS_DP_LINK_CLK>, + <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>, + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>; + clock-names = "core_iface", + "core_aux", + "ctrl_link", + "ctrl_link_iface", + "stream_pixel"; + + assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>, + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>; + assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; + + phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>; + phy-names = "dp"; + + #sound-dai-cells = <0>; + + operating-points-v2 = <&dp_opp_table>; + power-domains = <&rpmhpd SM8250_MMCX>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mdss_dp_in: endpoint { + remote-endpoint = <&dpu_intf0_out>; + }; + }; + + port@1 { + reg = <1>; + + mdss_dp_out: endpoint { + }; + }; + }; + + dp_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-160000000 { + opp-hz = /bits/ 64 <160000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-270000000 { + opp-hz = /bits/ 64 <270000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-540000000 { + opp-hz = /bits/ 64 <540000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-810000000 { + opp-hz = /bits/ 64 <810000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + mdss_dsi0: dsi@ae94000 { compatible = "qcom,sm8150-dsi-ctrl", "qcom,mdss-dsi-ctrl"; reg = <0 0x0ae94000 0 0x400>; From patchwork Fri Dec 15 17:40:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 754475 Received: from mail-lf1-f42.google.com (mail-lf1-f42.google.com [209.85.167.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D01F430117 for ; Fri, 15 Dec 2023 17:42:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; 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[85.76.13.188]) by smtp.gmail.com with ESMTPSA id c16-20020a056512239000b0050dff5bb793sm1389263lfv.143.2023.12.15.09.42.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 09:42:02 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 5/7] arm64: dts: qcom: sm8150: add USB-C ports to the USB+DP QMP PHY Date: Fri, 15 Dec 2023 19:40:37 +0200 Message-ID: <20231215174152.315403-6-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231215174152.315403-1-dmitry.baryshkov@linaro.org> References: <20231215174152.315403-1-dmitry.baryshkov@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Expand Combo USB+DP QMP PHY device node with the OF ports required to support USB-C / DisplayPort switching. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 0a002ac744e5..d29dfdd0583c 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3447,6 +3447,32 @@ usb_1_qmpphy: phy@88e8000 { #phy-cells = <1>; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_qmpphy_out: endpoint { + }; + }; + + port@1 { + reg = <1>; + + usb_1_qmpphy_usb_ss_in: endpoint { + }; + }; + + port@2 { + reg = <2>; + + usb_1_qmpphy_dp_in: endpoint { + }; + }; + }; }; usb_2_qmpphy: phy@88eb000 { From patchwork Fri Dec 15 17:40:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 755282 Received: from mail-lf1-f41.google.com (mail-lf1-f41.google.com [209.85.167.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6FC593012A for ; Fri, 15 Dec 2023 17:42:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="UKKnEbME" Received: by mail-lf1-f41.google.com with SMTP id 2adb3069b0e04-50bfd7be487so1038108e87.0 for ; Fri, 15 Dec 2023 09:42:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702662124; x=1703266924; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KnnM4NLYYXQL9h/0MUW7hGGl0ViRyq8ukmFIOJoxzgQ=; b=UKKnEbMEKj1eBV1g1ZKv1c+cObyXkcVDWhBnGj0OU53tcpRvqUsu/4fVXfRT8w4LR5 GVCwcCgzvtA+jFQB510txW2VAHeejyLT1Ywht4eti6Hqy6RA2EH5ZbRcayY2Shlibo6k 6BUovs1mxarKqAmp3teXzN0852hsxCZlW2y/UPnbVepPOxN6z/gVsspiuOxXTKG4XMtd 6Nnx9VuO5ByyU4RQ2+N2Jlj6xgQx+I05CR1Hy9MaPYaY8gq6uOdftRmL0PuDhXzc0Tiq BnJmugmuHN8d3wLPzHQIo7l5yvHRQBiRI9BwuK2OF3SvVOnIKYZqAd6lcPMyA7ITGTZR GE0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702662124; x=1703266924; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KnnM4NLYYXQL9h/0MUW7hGGl0ViRyq8ukmFIOJoxzgQ=; b=g9uYY84uA8TiL8XROLPW+zFPHCF8snjcL9V+IevndehcOBHsFy1Vdoz5ipxQLztccG 6m/xBexs6GAmsItHTG9muNZ4R9ihac63wJsmkrCAxFujrL/HNI6k+bOXEPIeCaKTwsmb 1ge3c1o/eaBqod0rFN1mX0RLcrvQti9i6M/8GdYtVv24pk+Sm/dV9g/KA9qn/iAsGAVG KHO0I5Lk49qC03ctd4a3wgFNhC9lGHnP3UcWbS8f/tGK8iJGJaSTAMdIcdJpZ8LOhLq4 Y63E+AWDL/WUwdDZ2x16A51zZ0dmSpNo4piAqjDNxljY+UbB8fF7fb6FE48rGexLnJIU z5KQ== X-Gm-Message-State: AOJu0YyGTW2OQxLMaABW3TA0cCcV0uw5gG/uHVZhG3yiLWy5wIA5tZ0J YfKPoJzTW2SrZOwFVTzHAicwEg== X-Google-Smtp-Source: AGHT+IHkwyZNCl+tIBTF8hgjNJYrcVRsjpKNHb8C2OrOlBAiZNUrlviD7eIsR4mKIlz+PVc+wmHZSw== X-Received: by 2002:a05:6512:2807:b0:50c:c63:1d20 with SMTP id cf7-20020a056512280700b0050c0c631d20mr6510772lfb.76.1702662124630; Fri, 15 Dec 2023 09:42:04 -0800 (PST) Received: from eriador.lumag.spb.ru (85-76-13-188-nat.elisa-mobile.fi. [85.76.13.188]) by smtp.gmail.com with ESMTPSA id c16-20020a056512239000b0050dff5bb793sm1389263lfv.143.2023.12.15.09.42.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 09:42:04 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 6/7] arm64: dts: qcom: sm8150: add USB-C ports to the OTG USB host Date: Fri, 15 Dec 2023 19:40:38 +0200 Message-ID: <20231215174152.315403-7-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231215174152.315403-1-dmitry.baryshkov@linaro.org> References: <20231215174152.315403-1-dmitry.baryshkov@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Expand first USB host controller device node with the OF ports required to support USB-C / DisplayPort switching. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index d29dfdd0583c..fd50fa79dff1 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3608,6 +3608,25 @@ usb_1_dwc3: usb@a600000 { snps,dis_enblslpm_quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_dwc3_hs: endpoint { + }; + }; + + port@1 { + reg = <1>; + + usb_1_dwc3_ss: endpoint { + }; + }; + }; }; }; From patchwork Fri Dec 15 17:40:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 754474 Received: from mail-lf1-f41.google.com (mail-lf1-f41.google.com [209.85.167.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE37B3011F for ; Fri, 15 Dec 2023 17:42:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="kT3VhiU9" Received: by mail-lf1-f41.google.com with SMTP id 2adb3069b0e04-50e1112b95cso951900e87.0 for ; Fri, 15 Dec 2023 09:42:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702662126; x=1703266926; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CKgsVk0fjSxD37WNiVSTe954mlFL2bYCq2rQX68jkaY=; b=kT3VhiU9QeQt9z22Kstvbm4CmeiQYmsTiyXzKhrycGhCPyCOAdFKhD39HUmlc7BsRg tgXB+4hkY2uYVU6Pv9bqTsCl4q2VhleplgQ9+vcbqIC7ey11wdygLERnEcCMmjMiR5Un PLeam/3MDjCSCe1oXABxStmuNkBy2zUi34OdWtLBRrycubda2i6C53Pfj4CihCVkTBYu 8hhyECtpt7+s6r7PfU62A2WeXjZ/2Lbc4dZ9POwWt1pyPx7eiWJQVA7RfAY/5POOgjdK fJOEnp1e3XmJZBSrQLGqxhJBGdh2/lH6EpSF3lsOwWJC2jTU5OXieiPah4SlKg7YWkVv 7s1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702662126; x=1703266926; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CKgsVk0fjSxD37WNiVSTe954mlFL2bYCq2rQX68jkaY=; b=pN04EcGsk5+BkFvZRGggnaroFyEpe06v0QQ2A63ZpIG9qjHTCmHOPcH2nEsznYpm1f GGYSusHL9eEq7uMHM8GLSAqVZz5QdIl9P/qaWUiSl6ul3InQRowetvoH4gJLswk01+xc LWZ34SUVXuQUZjBq/Gzm/BEKPxASCo4XRzTDKJtjFPi5HGPvKbHE0tAcrr7/5FyaGLrm Cc5qv8Hlf/XCCy49uiAahiHnoWh/zL7SKkiiGc42kNtM/1TZBbEC0KSxATxEnGiOJPjf jGw5lGgDE4VZizyCmemS4KZlHLlLH3XJJvj4W3R/bgKGqNoZMX8S/amY00fUTmKpSqXA MU+g== X-Gm-Message-State: AOJu0Yy2t6EUNMtVDVtuJ6cGAoFK8S4K97wvccTaMSr3hoMs+HN0n5yR Hlzuq+wxQAHS8NfyQFdgFnIyWw== X-Google-Smtp-Source: AGHT+IFlvxXC5TE5auDkzGipxwETeZ8JnKAa47UPmrKiIe2mKiF+REikFN6qCk/43O/2LJaQMRKjcg== X-Received: by 2002:a19:4f49:0:b0:50e:2222:6ca3 with SMTP id a9-20020a194f49000000b0050e22226ca3mr175189lfk.90.1702662126180; Fri, 15 Dec 2023 09:42:06 -0800 (PST) Received: from eriador.lumag.spb.ru (85-76-13-188-nat.elisa-mobile.fi. [85.76.13.188]) by smtp.gmail.com with ESMTPSA id c16-20020a056512239000b0050dff5bb793sm1389263lfv.143.2023.12.15.09.42.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 09:42:05 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 7/7] arm64: dts: qcom: sm8150-hdk: enable DisplayPort and USB-C altmode Date: Fri, 15 Dec 2023 19:40:39 +0200 Message-ID: <20231215174152.315403-8-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231215174152.315403-1-dmitry.baryshkov@linaro.org> References: <20231215174152.315403-1-dmitry.baryshkov@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enable the USB-C related functionality for the USB-C port on this board. This includes OTG, PowerDelivery and DP AltMode. Also enable the DisplayPort itself. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8150-hdk.dts | 124 +++++++++++++++++++++++- 1 file changed, 123 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts index ea4d75308ac8..de670b407ef1 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8150-hdk.dts @@ -7,6 +7,7 @@ #include #include +#include #include "sm8150.dtsi" #include "pm8150.dtsi" #include "pm8150b.dtsi" @@ -374,6 +375,10 @@ &gmu { status = "okay"; }; +&gpi_dma0 { + status = "okay"; +}; + &gpi_dma1 { status = "okay"; }; @@ -382,6 +387,29 @@ &gpu { status = "okay"; }; +&i2c4 { + clock-frequency = <100000>; + + status = "okay"; + + typec-mux@42 { + compatible = "fcs,fsa4480"; + reg = <0x42>; + + interrupts-extended = <&tlmm 152 IRQ_TYPE_LEVEL_LOW>; + + vcc-supply = <&vreg_bob>; + mode-switch; + orientation-switch; + + port { + fsa4480_sbu_mux: endpoint { + remote-endpoint = <&pm8150b_typec_sbu_out>; + }; + }; + }; +}; + &i2c9 { status = "okay"; clock-frequency = <400000>; @@ -436,6 +464,15 @@ &mdss { status = "okay"; }; +&mdss_dp { + status = "okay"; +}; + +&mdss_dp_out { + data-lanes = <0 1>; + remote-endpoint = <&usb_1_qmpphy_dp_in>; +}; + &mdss_dsi0 { status = "okay"; vdda-supply = <&vreg_l3c_1p2>; @@ -483,6 +520,65 @@ &mdss_dsi1_phy { status = "okay"; }; +&pm8150b_vbus { + regulator-min-microamp = <500000>; + regulator-max-microamp = <3000000>; + status = "okay"; +}; + +&pm8150b_typec { + status = "okay"; + + vdd-pdphy-supply = <&vreg_l2a_3p1>; + + connector { + compatible = "usb-c-connector"; + + power-role = "source"; + data-role = "dual"; + self-powered; + + source-pdos = ; + + altmodes { + displayport { + svid = /bits/ 16 <0xff01>; + vdo = <0x00001c46>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + pm8150b_role_switch_in: endpoint { + remote-endpoint = <&usb_1_dwc3_hs>; + }; + }; + + port@1 { + reg = <1>; + pm8150b_typec_mux_in: endpoint { + remote-endpoint = <&usb_1_qmpphy_out>; + }; + }; + + port@2 { + reg = <2>; + + pm8150b_typec_sbu_out: endpoint { + remote-endpoint = <&fsa4480_sbu_mux>; + }; + }; + }; + }; +}; + &pon_pwrkey { status = "okay"; }; @@ -493,6 +589,10 @@ &pon_resin { linux,code = ; }; +&qupv3_id_0 { + status = "okay"; +}; + &qupv3_id_1 { status = "okay"; }; @@ -568,6 +668,19 @@ &usb_1_qmpphy { status = "okay"; vdda-phy-supply = <&vreg_l3c_1p2>; vdda-pll-supply = <&vreg_l18a_0p8>; + orientation-switch; +}; + +&usb_1_qmpphy_dp_in { + remote-endpoint = <&mdss_dp_out>; +}; + +&usb_1_qmpphy_out { + remote-endpoint = <&pm8150b_typec_mux_in>; +}; + +&usb_1_qmpphy_usb_ss_in { + remote-endpoint = <&usb_1_dwc3_ss>; }; &usb_2_qmpphy { @@ -585,7 +698,16 @@ &usb_2 { }; &usb_1_dwc3 { - dr_mode = "peripheral"; + dr_mode = "otg"; + usb-role-switch; +}; + +&usb_1_dwc3_hs { + remote-endpoint = <&pm8150b_role_switch_in>; +}; + +&usb_1_dwc3_ss { + remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; }; &usb_2_dwc3 {