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([223.178.213.6]) by smtp.gmail.com with ESMTPSA id j3-20020a170902c08300b001cfc68125desm12474956pld.203.2023.12.14.05.51.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Dec 2023 05:51:43 -0800 (PST) From: Sumit Garg To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, u-boot-custodians@lists.denx.de Cc: trini@konsulko.com, sjg@chromium.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor@kernel.org, neil.armstrong@linaro.org, caleb.connolly@linaro.org, ff@shokubai.tech, daniel.thompson@linaro.org, dgilmore@fedoraproject.org, pbrobinson@gmail.com, ilias.apalodimas@linaro.org, maxim.uvarov@linaro.org, b.galvani@gmail.com, xypron.glpk@gmx.de, michal.simek@amd.com, seanga2@gmail.com, rasmus.villemoes@prevas.dk, peng.fan@nxp.com, jh80.chung@samsung.com, rfried.dev@gmail.com, marex@denx.de, Sumit Garg Subject: [PATCH 1/8] Azure CI: Exclude devicetree-rebasing subtree for CONFIG checks Date: Thu, 14 Dec 2023 19:20:56 +0530 Message-Id: <20231214135103.1606605-2-sumit.garg@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231214135103.1606605-1-sumit.garg@linaro.org> References: <20231214135103.1606605-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Signed-off-by: Sumit Garg --- .azure-pipelines.yml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index d6f3fa423c6..f100c4493e6 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -65,7 +65,8 @@ stages: # have no matches. - script: git grep -E '^#[[:blank:]]*(define|undef)[[:blank:]]*CONFIG_' :^doc/ :^arch/arm/dts/ :^scripts/kconfig/lkc.h - :^include/linux/kconfig.h :^tools/ && exit 1 || exit 0 + :^include/linux/kconfig.h :^tools/ :^devicetree-rebasing/ && + exit 1 || exit 0 - job: docs displayName: 'Build documentation' From patchwork Thu Dec 14 13:50:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Garg X-Patchwork-Id: 753923 Delivered-To: patch@linaro.org Received: by 2002:adf:ff85:0:b0:336:3f68:820c with SMTP id j5csp758007wrr; Thu, 14 Dec 2023 05:52:05 -0800 (PST) X-Google-Smtp-Source: AGHT+IFs36cypdpnta/dyluduDI5ydRamm7iWi0ojVHKZnkFqx2U9JJyMK4Qkm86w94IrCbfJB0B X-Received: by 2002:a2e:b6d3:0:b0:2c9:f58b:703 with SMTP id m19-20020a2eb6d3000000b002c9f58b0703mr4661339ljo.77.1702561925695; Thu, 14 Dec 2023 05:52:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702561925; cv=none; d=google.com; s=arc-20160816; b=NzU5mhg83aLXh3/ecLME4JmS20sQNWZoClw45HBliYOTFEB3G+7PtHGHQS92kaFwIa m9U4FUIsnB9FDcjOtJQ7oUM/a1IL8sUN2dzCCn+WHbOkrAtcUCuYL/VJ815OovvWgnRz NmBGlcITQ4Sn3itlGxQQR7GOx9HKDHFrJ4oF6jkXbl8sresWri/Ff1FcnFQYwiGpPRYs uNLip4q5xHnJmWLueabPJw+fGqNMyP82if679XMGnDpYHDgEbkcbVYNZRYAusnwN55d1 eYqXfUYeoUQigcQS+Cq2CnUKz4tdSQXVTu3h1JTN1eH+5m/0VQzsa1BIcPTKYh01WBtC pd/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=u1OsPqfGmFH05ZPKbNH4dIRe46agPWiUEln2hoUy/k4=; fh=VZWdizSVWfhngo19Gt5nLjhnxzdtHBYWvcywp4ujR58=; b=IebvPva9Hh2eNX+jpUy+JDl0y+jEDf3tMdi/F9KmYiSRp+J5oEun/r0Wci/qPIi3vk i9vATpxog0TnQDE/dE17Y5beNKjbJJ4prriDXOTCauAZ1yJfff7LqRipq8JGHap7j1Cb W/XBn5vlhIeCAsjFCJdEu+ZXWFCTClA2oIxp5FahIcx3TQXXPT3QO4adilC+o9c6E9me OAJA06Kni4hHVv7LO3z7AYaPiQJSsneSAWlcS4GVCy8AqUg3p3LdpUfkZJWd1AFdn1ZO iWhuHYZZX1zR/BKDG9KxaZidxIBjtUmmhSDkrkWLnGCXADyyL0yuknaPupsfXZNTGzxN tQQw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="vwcZRWD/"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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([223.178.213.6]) by smtp.gmail.com with ESMTPSA id j3-20020a170902c08300b001cfc68125desm12474956pld.203.2023.12.14.05.51.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Dec 2023 05:51:51 -0800 (PST) From: Sumit Garg To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, u-boot-custodians@lists.denx.de Cc: trini@konsulko.com, sjg@chromium.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor@kernel.org, neil.armstrong@linaro.org, caleb.connolly@linaro.org, ff@shokubai.tech, daniel.thompson@linaro.org, dgilmore@fedoraproject.org, pbrobinson@gmail.com, ilias.apalodimas@linaro.org, maxim.uvarov@linaro.org, b.galvani@gmail.com, xypron.glpk@gmx.de, michal.simek@amd.com, seanga2@gmail.com, rasmus.villemoes@prevas.dk, peng.fan@nxp.com, jh80.chung@samsung.com, rfried.dev@gmail.com, marex@denx.de, Sumit Garg Subject: [PATCH 2/8] Makefile: Add support for DT bindings schema checks Date: Thu, 14 Dec 2023 19:20:57 +0530 Message-Id: <20231214135103.1606605-3-sumit.garg@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231214135103.1606605-1-sumit.garg@linaro.org> References: <20231214135103.1606605-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This adds the build infrastructure for checking DT binding schema documents and validating dtb files using the binding schema. Here we use devicetree-rebasing directory to provide the DT bindings. Dependency: ----------- The DT schema project must be installed in order to validate the DT schema binding documents and validate DTS files using the DT schema. The DT schema project can be installed with pip:: pip3 install dtschema Note that 'dtschema' installation requires 'swig' and Python development files installed first. On Debian/Ubuntu systems:: apt install swig python3-dev Testing: -------- Build dts files and check using DT binding schema: $ make dtbs_check Optionally, DT_SCHEMA_FILES can be passed in with a schema file(s) to use for validation. This makes it easier to find and fix errors generated by a specific schema. Note, at this point dtbs_check is an optional build target as there are many warnings generated due to custom DT properties used by many platforms in u-boot. It is expected with these checks that compliance with DT bindings to take place. Once that's done it can be added to CI builds to remain compliant with DT bindings. Signed-off-by: Sumit Garg --- Makefile | 20 ++++++++++++++++++-- scripts/Makefile.lib | 17 +++++++++++++++-- 2 files changed, 33 insertions(+), 4 deletions(-) diff --git a/Makefile b/Makefile index 750bbdb1b71..d8d168cd4c3 100644 --- a/Makefile +++ b/Makefile @@ -1158,12 +1158,28 @@ endif @# disabling OF_BOARD. $(call cmd,ofcheck,$(KCONFIG_CONFIG)) -PHONY += dtbs +PHONY += dtbs dtbs_check dtbs: dts/dt.dtb @: -dts/dt.dtb: u-boot +dts/dt.dtb: dtbs_prepare u-boot $(Q)$(MAKE) $(build)=dts dtbs +dtbs_prepare: prepare3 + +ifneq ($(filter dtbs_check, $(MAKECMDGOALS)),) +export CHECK_DTBS=y +endif + +ifneq ($(CHECK_DTBS),) +dtbs_prepare: dt_binding_check +endif + +dtbs_check: dt_binding_check dtbs + +DT_BINDING_DIR := devicetree-rebasing/Bindings +dt_binding_check: scripts_dtc + $(Q)$(MAKE) $(build)=$(DT_BINDING_DIR) $(DT_BINDING_DIR)/processed-schema.json + quiet_cmd_copy = COPY $@ cmd_copy = cp $< $@ diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 16bbc277a9f..27b9437027c 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -356,8 +356,21 @@ endif dtsi_include_list_deps = $(addprefix $(obj)/,$(subst $(quote),,$(dtsi_include_list))) -$(obj)/%.dtb: $(src)/%.dts $(DTC) $(dtsi_include_list_deps) FORCE - $(call if_changed_dep,dtc) +ifneq ($(CHECK_DTBS),) +DT_CHECKER ?= dt-validate +DT_CHECKER_FLAGS ?= $(if $(DT_SCHEMA_FILES),-l $(DT_SCHEMA_FILES),-m) +DT_BINDING_DIR := devicetree-rebasing/Bindings +DT_TMP_SCHEMA := $(objtree)/$(DT_BINDING_DIR)/processed-schema.json + +quiet_cmd_dtb = DTC_CHK $@ + cmd_dtb = $(cmd_dtc) ; $(DT_CHECKER) $(DT_CHECKER_FLAGS) -u $(srctree)/$(DT_BINDING_DIR) -p $(DT_TMP_SCHEMA) $@ || true +else +quiet_cmd_dtb = $(quiet_cmd_dtc) + cmd_dtb = $(cmd_dtc) +endif + +$(obj)/%.dtb: $(src)/%.dts $(DTC) $(dtsi_include_list_deps) $(DT_TMP_SCHEMA) FORCE + $(call if_changed_dep,dtb) pre-tmp = $(subst $(comma),_,$(dot-target).pre.tmp) dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp) From patchwork Thu Dec 14 13:50:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Garg X-Patchwork-Id: 753924 Delivered-To: patch@linaro.org Received: by 2002:adf:ff85:0:b0:336:3f68:820c with SMTP id j5csp758087wrr; Thu, 14 Dec 2023 05:52:16 -0800 (PST) X-Google-Smtp-Source: AGHT+IEdb9mcO5EVKX4BmzorrL4mvwLPxqll7tImU+hYwTTF84bcNG7LDtrdhkJqdamwZuwayjZj X-Received: by 2002:a05:6512:313a:b0:50c:a3a:45bd with SMTP id p26-20020a056512313a00b0050c0a3a45bdmr2355523lfd.160.1702561936307; Thu, 14 Dec 2023 05:52:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702561936; cv=none; d=google.com; s=arc-20160816; b=y6NNzxuhcfV0NP2RaSSh+BaxxS/7bUGT8zCPOv1OUVDLhi96yI3C3EoYuDb+1+AvvB XEctjKV6pRtuPDdMI0MY/eGzSzvbnVfda4q9BeZ8AkpISZO1VraNNhp79clyq5XLsTvE QKS1DyH3+SDAMZP2W9808UvePXikQjCs3jpIj0/dQqLNBeJa0A1zRbkMYXhPh8hFPNIV WvTMQGGWaa+nTKTVB+DBmUfPxIFpfwtdFLZFKObC8xMl4CwU+oMfdqGTCJiCNkMYvD4H XfcXPgNtScXzfemE2EYUxOK9/jD9TJcrZsguD99FR245nO5ejihEUftPtNg4JCkzGfHi CQaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=LJhXFrv8uHuP5uiECV7lR9faylLwkNArQN5KLLNNmik=; fh=VZWdizSVWfhngo19Gt5nLjhnxzdtHBYWvcywp4ujR58=; b=mOTG+swUc/hY3O1ssTQF7ohQzNYj5t1dSnQ/op3OV7vZgTXen+heUJ7bKgQah0ugaO A9qN6lngbiS1a4tiKfCu6Qjz9ut7w78iwdX/Xe8q4rEnXWLlEB2HDbmADB67R7ZTOz6I joDFFS1zRwx7TPqv7x2SNXqXcmuNv2u5sxxNtgGrRW0rQbR7wRoxTCeAFT7+Gfcdjk/p Xq4tj2PkMkeGBD+wccsbb3dHA09IBRjuEibj/ydsTFjPuHtr4baqkj/fZnJseEI52ZcR 518Z73UPBVhq2Thc+JWLBnsGeHLfhAfIiNHgGH45La2TJPF7/0xO8kfKnAXVGbp17qx8 6WRg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TBySlIwo; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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([223.178.213.6]) by smtp.gmail.com with ESMTPSA id j3-20020a170902c08300b001cfc68125desm12474956pld.203.2023.12.14.05.51.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Dec 2023 05:51:59 -0800 (PST) From: Sumit Garg To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, u-boot-custodians@lists.denx.de Cc: trini@konsulko.com, sjg@chromium.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor@kernel.org, neil.armstrong@linaro.org, caleb.connolly@linaro.org, ff@shokubai.tech, daniel.thompson@linaro.org, dgilmore@fedoraproject.org, pbrobinson@gmail.com, ilias.apalodimas@linaro.org, maxim.uvarov@linaro.org, b.galvani@gmail.com, xypron.glpk@gmx.de, michal.simek@amd.com, seanga2@gmail.com, rasmus.villemoes@prevas.dk, peng.fan@nxp.com, jh80.chung@samsung.com, rfried.dev@gmail.com, marex@denx.de, Sumit Garg Subject: [PATCH 3/8] scripts/Makefile.lib: Statically define *-u-boot.dtsi files location Date: Thu, 14 Dec 2023 19:20:58 +0530 Message-Id: <20231214135103.1606605-4-sumit.garg@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231214135103.1606605-1-sumit.garg@linaro.org> References: <20231214135103.1606605-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Allow u-boot to build DTB from a different directory tree such that *-u-boot.dtsi files can be included from a common location. Currently that location is arch/$(ARCH)/dts/, so statically define that common location. This is needed for platform owners to start building DTB files from devicetree-rebasing directory but still being able to include *-u-boot.dtsi files. Signed-off-by: Sumit Garg --- scripts/Makefile.lib | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 27b9437027c..4a002b0e0ca 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -159,18 +159,20 @@ cpp_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(UBOOTINCLUDE) \ ld_flags = $(KBUILD_LDFLAGS) $(ldflags-y) $(LDFLAGS_$(@F)) # Try these files in order to find the U-Boot-specific .dtsi include file -u_boot_dtsi_options = $(strip $(wildcard $(dir $<)$(basename $(notdir $<))-u-boot.dtsi) \ - $(wildcard $(dir $<)$(subst $\",,$(CONFIG_SYS_SOC))-u-boot.dtsi) \ - $(wildcard $(dir $<)$(subst $\",,$(CONFIG_SYS_CPU))-u-boot.dtsi) \ - $(wildcard $(dir $<)$(subst $\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi) \ - $(wildcard $(dir $<)u-boot.dtsi)) +UBOOT_DTSI_LOC = $(srctree)/arch/$(ARCH)/dts/ + +u_boot_dtsi_options = $(strip $(wildcard $(UBOOT_DTSI_LOC)$(basename $(notdir $<))-u-boot.dtsi) \ + $(wildcard $(UBOOT_DTSI_LOC)$(subst $\",,$(CONFIG_SYS_SOC))-u-boot.dtsi) \ + $(wildcard $(UBOOT_DTSI_LOC)$(subst $\",,$(CONFIG_SYS_CPU))-u-boot.dtsi) \ + $(wildcard $(UBOOT_DTSI_LOC)$(subst $\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi) \ + $(wildcard $(UBOOT_DTSI_LOC)u-boot.dtsi)) u_boot_dtsi_options_raw = $(warning Automatic .dtsi inclusion: options: \ - $(dir $<)$(basename $(notdir $<))-u-boot.dtsi \ - $(dir $<)$(subst $\",,$(CONFIG_SYS_SOC))-u-boot.dtsi \ - $(dir $<)$(subst $\",,$(CONFIG_SYS_CPU))-u-boot.dtsi \ - $(dir $<)$(subst $\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi \ - $(dir $<)u-boot.dtsi ... \ + $(UBOOT_DTSI_LOC)$(basename $(notdir $<))-u-boot.dtsi \ + $(UBOOT_DTSI_LOC)$(subst $\",,$(CONFIG_SYS_SOC))-u-boot.dtsi \ + $(UBOOT_DTSI_LOC)$(subst $\",,$(CONFIG_SYS_CPU))-u-boot.dtsi \ + $(UBOOT_DTSI_LOC)$(subst $\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi \ + $(UBOOT_DTSI_LOC)u-boot.dtsi ... \ found: $(if $(u_boot_dtsi_options),"$(u_boot_dtsi_options)",nothing!)) # Uncomment for debugging @@ -190,6 +192,7 @@ dtsi_include_list += $(CONFIG_DEVICE_TREE_INCLUDES) dtc_cpp_flags = -Wp,-MD,$(depfile).pre.tmp -nostdinc \ $(UBOOTINCLUDE) \ -I$(dir $<) \ + -I$(UBOOT_DTSI_LOC) \ -I$(srctree)/arch/$(ARCH)/dts/include \ -I$(srctree)/include \ -D__ASSEMBLY__ \ @@ -328,7 +331,7 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \ echo '$(pound)include "$(f)"' >> $(pre-tmp);) \ $(HOSTCC) -E $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $(pre-tmp) ; \ $(DTC) -O dtb -o $@ -b 0 \ - -i $(dir $<) $(DTC_FLAGS) \ + -i $(dir $<) -i $(UBOOT_DTSI_LOC) $(DTC_FLAGS) \ -d $(depfile).dtc.tmp $(dtc-tmp) || \ (echo "Check $(shell pwd)/$(pre-tmp) for errors" && false) \ ; \ From patchwork Thu Dec 14 13:50:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Garg X-Patchwork-Id: 753925 Delivered-To: patch@linaro.org Received: by 2002:adf:ff85:0:b0:336:3f68:820c with SMTP id j5csp758179wrr; Thu, 14 Dec 2023 05:52:27 -0800 (PST) X-Google-Smtp-Source: AGHT+IEC8YfN2LFLcTt9nUpklF77ar0v95kZDg1FUdyY+DHJhzHxyKgmtN8p0OOkLoo4U5YtLtYI X-Received: by 2002:a2e:be0c:0:b0:2cc:200f:4392 with SMTP id z12-20020a2ebe0c000000b002cc200f4392mr4098750ljq.46.1702561947218; Thu, 14 Dec 2023 05:52:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702561947; cv=none; d=google.com; s=arc-20160816; b=GwYBH68ZC6bA8e8IYVa/+OiwX1UoRiDJlZCJ3rsY7w++tvFtrfqH+TqlIiD4r3rlQc gtbqDSg5rWrHC2VpVnkJX1sbSME+jQrym+kVz9HEZcikYPlwG4c0TWRUYBPB5itGOL4s ldhOeDbhMGstslAtiFnhdSYfUgxTgzRyFUh5jDOjI4MoID2ezUoaiAZ6q0rf0nOBy1IN kBNo0iijafhg/aUMOrUzdqkiafBouku5FrBXQ/8qEZH8Y+M62kRY7D4t0qAdTsq5HIdH +lQodVG1XOqsigdjJQ94QPyuHNC25XzjZIv/rbPxUf4OXWf3LkkSBKPn6cgFNii0jZjW Oa0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=1TnzdH67t338vIUJxhhWpafn7v8Et2UIYp9pfQ6QVcw=; fh=VZWdizSVWfhngo19Gt5nLjhnxzdtHBYWvcywp4ujR58=; b=VAb+V4BS7kLSCLXW/SJm0r8V1TunuRz7Csh0d1sFEpkdBeZgE1HSoxjcA+lwt3tykY ZrkXwkMqocDZMr3MR1C9kEd+HcoadDwHwdFuDONw7ADsrXJ4XHhAO0mOAzgs31QLq/fl 3p5h+LKegFv+LiyS/RQGnFeVmcf7oZl34I70t8hwawzOxCOuQnK6YR4IkhAtD1Hj4cEe NLRbRW9ksjDRwyKYA7h/xch+HqG/KE2ecwcbsp6L1gjbtpipL1Mv0wEf5Wbsc9zbGWGw nv1bv4U9et/yE46bXTZ021fUF4t0YPrgZ3+xxOrbFoSAZUBwJHR8touY9iOuKyrHz0Zg sclw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ufeWsX2U; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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([223.178.213.6]) by smtp.gmail.com with ESMTPSA id j3-20020a170902c08300b001cfc68125desm12474956pld.203.2023.12.14.05.52.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Dec 2023 05:52:07 -0800 (PST) From: Sumit Garg To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, u-boot-custodians@lists.denx.de Cc: trini@konsulko.com, sjg@chromium.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor@kernel.org, neil.armstrong@linaro.org, caleb.connolly@linaro.org, ff@shokubai.tech, daniel.thompson@linaro.org, dgilmore@fedoraproject.org, pbrobinson@gmail.com, ilias.apalodimas@linaro.org, maxim.uvarov@linaro.org, b.galvani@gmail.com, xypron.glpk@gmx.de, michal.simek@amd.com, seanga2@gmail.com, rasmus.villemoes@prevas.dk, peng.fan@nxp.com, jh80.chung@samsung.com, rfried.dev@gmail.com, marex@denx.de, Sumit Garg Subject: [PATCH 4/8] dts: Add alternative location for upstream DTB builds Date: Thu, 14 Dec 2023 19:20:59 +0530 Message-Id: <20231214135103.1606605-5-sumit.garg@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231214135103.1606605-1-sumit.garg@linaro.org> References: <20231214135103.1606605-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Allow platform owners to mirror devicetree files from devitree-rebasing directory into dts/arch/$(ARCH) (special case for dts/arch/arm64). Then build then along with any *-u-boot.dtsi file present in arch/$(ARCH)/dts directory. This will help easy migration for platforms which currently are compliant with upstream Linux kernel devicetree files. Signed-off-by: Sumit Garg --- dts/Kconfig | 11 +++++++++++ dts/Makefile | 17 ++++++++++++++--- dts/arch/arm64/Makefile | 14 ++++++++++++++ 3 files changed, 39 insertions(+), 3 deletions(-) create mode 100644 dts/arch/arm64/Makefile diff --git a/dts/Kconfig b/dts/Kconfig index 00c0aeff893..96396f12b67 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -85,6 +85,17 @@ config OF_LIVE enables a live tree which is available after relocation, and can be adjusted as needed. +config OF_UPSTREAM + bool "Enable use of devicetree imported from Linux kernel release" + help + Traditionally, U-boot platforms used to have their custom devicetree + files or copy devicetree files from Linux kernel which are hard to + maintain and can usually get out-of-sync from Linux kernel. This + option enables platforms to migrate to devicetree-rebasing repo where + a regular sync will be maintained every major Linux kernel release + cycle. However, platforms can still have some custom u-boot specific + bits maintained as part of *-u-boot.dtsi files. + choice prompt "Provider of DTB for DT control" depends on OF_CONTROL diff --git a/dts/Makefile b/dts/Makefile index 3437e54033d..8098bf8191a 100644 --- a/dts/Makefile +++ b/dts/Makefile @@ -10,10 +10,20 @@ ifeq ($(DEVICE_TREE),) DEVICE_TREE := unset endif +ifeq ($(CONFIG_OF_UPSTREAM),y) +ifeq ($(CONFIG_ARM64),y) +DEVICE_TREE_LOC := dts/arch/arm64 +else +DEVICE_TREE_LOC := dts/arch/$(ARCH) +endif +else +DEVICE_TREE_LOC := arch/$(ARCH)/dts +endif + ifneq ($(EXT_DTB),) DTB := $(EXT_DTB) else -DTB := arch/$(ARCH)/dts/$(DEVICE_TREE).dtb +DTB := $(DEVICE_TREE_LOC)/$(DEVICE_TREE).dtb endif $(obj)/dt-$(SPL_NAME).dtb: dts/dt.dtb $(objtree)/tools/fdtgrep FORCE @@ -41,7 +51,7 @@ $(DTB): arch-dtbs PHONY += arch-dtbs arch-dtbs: - $(Q)$(MAKE) $(build)=arch/$(ARCH)/dts dtbs + $(Q)$(MAKE) $(build)=$(DEVICE_TREE_LOC) dtbs ifeq ($(CONFIG_SPL_BUILD),y) obj-$(CONFIG_OF_EMBED) := dt-spl.dtb.o @@ -65,4 +75,5 @@ clean-files := dt.dtb.S # Let clean descend into dts directories subdir- += ../arch/arc/dts ../arch/arm/dts ../arch/m68k/dts ../arch/microblaze/dts \ ../arch/mips/dts ../arch/nios2/dts ../arch/powerpc/dts ../arch/riscv/dts \ - ../arch/sandbox/dts ../arch/sh/dts ../arch/x86/dts ../arch/xtensa/dts + ../arch/sandbox/dts ../arch/sh/dts ../arch/x86/dts ../arch/xtensa/dts \ + ./arch/arm64 ./arch/$(ARCH) diff --git a/dts/arch/arm64/Makefile b/dts/arch/arm64/Makefile new file mode 100644 index 00000000000..16e9fea622d --- /dev/null +++ b/dts/arch/arm64/Makefile @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0+ + +include $(srctree)/scripts/Makefile.dts + +targets += $(dtb-y) + +# Add any required device tree compiler flags here +DTC_FLAGS += -a 0x8 + +PHONY += dtbs +dtbs: $(addprefix $(obj)/, $(dtb-y)) + @: + +clean-files := */*.dtb */*.dtbo */*_HS From patchwork Thu Dec 14 13:51:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Garg X-Patchwork-Id: 753926 Delivered-To: patch@linaro.org Received: by 2002:adf:ff85:0:b0:336:3f68:820c with SMTP id j5csp758267wrr; Thu, 14 Dec 2023 05:52:38 -0800 (PST) X-Google-Smtp-Source: AGHT+IHq0WACk4MrlDeTLqYhwh1HPptEslElaRm5ThibKMLMQcnwzDP+fDB1durPALtcpyPiP7bi X-Received: by 2002:ac2:5ecf:0:b0:50b:f78b:d30e with SMTP id d15-20020ac25ecf000000b0050bf78bd30emr3084771lfq.153.1702561957881; Thu, 14 Dec 2023 05:52:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702561957; cv=none; d=google.com; s=arc-20160816; b=qQ/jssNjIUT+tk7QDA6QFL4hg8eJs6yINfHAFH6Blkc2OmPys/xiF5u084bELBpMyY 26Bg66vIvk6aKR+6sLRWpAOEpiRUmRbcYK+6mXQ3oVW01obJNDMcZtpRGfMfcjVMM6L0 C+LNWv1W+skOAlJqTEVJqncbhXkgYjU1EQU6HYhDVpTvN9NBnxphFkVRohJ8vWMmoBs5 gV+My/Qv5F+FTnqRQFUfoB/A7wdasAvMEhpX3yz7XC4MiTwns5G8RLac5Ka70xbBgYdy iljdqDzaUMXfMDpKuDTtFksNZU5/ENNmA3/KKK3GNpKaK2snYpDw+c7XzmXyx4jROgfX TaLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=tZ0RqhubyDUCF2xX96gajzIW8IB+xNdVb3GHMNv714o=; fh=VZWdizSVWfhngo19Gt5nLjhnxzdtHBYWvcywp4ujR58=; b=VLMyswmEFlIezFDGjY0E9a8GNjrtxP25IOO6cA56byljkeCanET41OV5fqcUN58wMT Wd3i843Ued8s3NdlFrQYtuijohW5uq/1RuBkzKHJlVpTEU2x7yNi7L+TLjcOPeTadLtW QeGKWd4ANPU607Uqt3BVARRsNzNHHIJs750li+svkpg0ke2yESFRlsqGSUrOAQpu2eVD P8PBFqPwPQeAXzI8SIqLHqvTMJJD7ZOWFzCjFRSYgJz6AczrsKkxXaYrPdAZvO4jSOyb zcZJxYGZhIsEuDt1WapBcSHUlvc6KlOvddQoZmIxKdb+E1JSIQJs0Dbp+Puw8+5vpuRZ ENEQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sr1ePytq; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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([223.178.213.6]) by smtp.gmail.com with ESMTPSA id j3-20020a170902c08300b001cfc68125desm12474956pld.203.2023.12.14.05.52.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Dec 2023 05:52:15 -0800 (PST) From: Sumit Garg To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, u-boot-custodians@lists.denx.de Cc: trini@konsulko.com, sjg@chromium.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor@kernel.org, neil.armstrong@linaro.org, caleb.connolly@linaro.org, ff@shokubai.tech, daniel.thompson@linaro.org, dgilmore@fedoraproject.org, pbrobinson@gmail.com, ilias.apalodimas@linaro.org, maxim.uvarov@linaro.org, b.galvani@gmail.com, xypron.glpk@gmx.de, michal.simek@amd.com, seanga2@gmail.com, rasmus.villemoes@prevas.dk, peng.fan@nxp.com, jh80.chung@samsung.com, rfried.dev@gmail.com, marex@denx.de, Sumit Garg Subject: [PATCH 5/8] doc: devicetree: Updates for devicetree-rebasing subtree Date: Thu, 14 Dec 2023 19:21:00 +0530 Message-Id: <20231214135103.1606605-6-sumit.garg@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231214135103.1606605-1-sumit.garg@linaro.org> References: <20231214135103.1606605-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Encourage SoC/board maintainers to migrate to using devicetree-rebasing subtree and maintain a regular sync with Linux kernel devicetree files and bindings. Along with that add documentation regarding how to run DT bindings schema checks. Signed-off-by: Sumit Garg --- doc/develop/devicetree/control.rst | 108 +++++++++++++++++++++++------ 1 file changed, 86 insertions(+), 22 deletions(-) diff --git a/doc/develop/devicetree/control.rst b/doc/develop/devicetree/control.rst index cbb65c9b177..12ef55ed368 100644 --- a/doc/develop/devicetree/control.rst +++ b/doc/develop/devicetree/control.rst @@ -1,5 +1,6 @@ .. SPDX-License-Identifier: GPL-2.0+ .. sectionauthor:: Copyright 2011 The Chromium OS Authors +.. Copyright 2023 Linaro Ltd. Devicetree Control in U-Boot ============================ @@ -22,12 +23,11 @@ for three reasons: hierarchical format - It is fairly efficient to read incrementally -The arch//dts directories contains a Makefile for building the devicetree -blob and embedding it in the U-Boot image. This is useful since it allows -U-Boot to configure itself according to what it finds there. If you have -a number of similar boards with different peripherals, you can describe -the features of each board in the devicetree file, and have a single -generic source base. +The U-boot Makefile infrastructure allows for building the devicetree blob +and embedding it in the U-Boot image. This is useful since it allows U-Boot +to configure itself according to what it finds there. If you have a number +of similar boards with different peripherals, you can describe the features +of each board in the devicetree file, and have a single generic source base. To enable this feature, add CONFIG_OF_CONTROL to your board config file. @@ -68,8 +68,21 @@ a binary file. U-Boot adds its own `fdtgrep` for creating subsets of the file. Where do I get a devicetree file for my board? ---------------------------------------------- -You may find that the Linux kernel has a suitable file. Look in the -kernel source in arch//boot/dts. +Linux kernel Git repository has been the place where devicetree files along +with devicetree bindings are stored and maintained. There is devicetee-rebasing +(dtrepo_) which maintains a forked copy of devicetree files along with bindings +at every Linux kernel major release or intermideate release candidates. + +In order to maintain devicetree files sync, U-boot maintains a Git subtree for +devicetee-rebasing repo as `devicetee-rebasing/` sub-directory. It is regularly +kept updated with every new kernel major release via subtree pull as follows:: + + git subtree pull --prefix devicetree-rebasing \ + git://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git \ + --squash + +You may find that the `devicetee-rebasing/` sub-directory has a suitable +devicetree file for your board. Look in `devicetree-rebasing/src//`. If not you might find other boards with suitable files that you can modify to your needs. Look in the board directories for files with a @@ -81,18 +94,21 @@ Failing that, you could write one from scratch yourself! Configuration ------------- -Use:: +Traditionally, U-boot placed copies of devicetree source files from Linux +kernel into `arch//dts/.dts` which can be selected via:: - #define CONFIG_DEFAULT_DEVICE_TREE "" + #define CONFIG_DEFAULT_DEVICE_TREE "" -to set the filename of the devicetree source. Then put your devicetree -file into:: +However, it has become combersome over time for each SoC/board maintainer to +keep devicetree files in sync with Linux kernel. Thereby, SoC/board maintainers +are encouraged to migrate to use mirrored copies from `devicetree-rebasing/` +into `dts/arch//` via:: - arch//dts/.dts + #define CONFIG_OF_UPSTREAM=y + #define CONFIG_DEFAULT_DEVICE_TREE "/" -This should include your CPU or SOC's devicetree file, placed in -`arch//dts`, and then make any adjustments required using a u-boot-dtsi -file for your board. +This should include your CPU or SOC's devicetree file. On top of that any U-boot +specific tweaks (see: dttweaks_) can be made for your board. If CONFIG_OF_EMBED is defined, then it will be picked up and built into the U-Boot image (including u-boot.bin). This is suitable for debugging @@ -156,8 +172,9 @@ ways: Adding tweaks for U-Boot ------------------------ -It is strongly recommended that devicetree files in U-Boot are an exact copy of -those in Linux, so that it is easy to sync them up from time to time. +With devicetee-rebasing Git subtree, it is ensured that devicetree files in +U-Boot are an exact copy of those in Linux kernel via mirroring into +`dts/arch//`. U-Boot is of course a very different project from Linux, e.g. it operates under much more restrictive memory and code-size constraints. Where Linux may use a @@ -170,8 +187,8 @@ constraints are even more extreme and the devicetree is shrunk to remove unwanted nodes, or even turned into C code to avoid access overhead. U-Boot automatically looks for and includes a file with updates to the standard -devicetree for your board, searching for them in the same directory as the -main file, in this order:: +devicetree for your board, searching for them in `arch//dts/` in this +order:: -u-boot.dtsi -u-boot.dtsi @@ -200,6 +217,52 @@ to specify a list of .dtsi files that will also be included when building .dtb files. +Devicetree bindings schema checks +--------------------------------- + +With devicetee-rebasing Git subtree, the devicetree bindings are also regularly +synced with Linux kernel as `devicetree-rebasing/Bindings/` sub-directory. This +allows U-boot to run devicetree bindings schema checks which will bring +compliance to U-boot core/drivers regarding usage of devicetree. + +Dependencies +~~~~~~~~~~~~ + +The DT schema project must be installed in order to validate the DT schema +binding documents and validate DTS files using the DT schema. The DT schema +project can be installed with pip:: + + pip3 install dtschema + +Note that 'dtschema' installation requires 'swig' and Python development files +installed first. On Debian/Ubuntu systems:: + + apt install swig python3-dev + +Several executables (dt-doc-validate, dt-mk-schema, dt-validate) will be +installed. Ensure they are in your PATH (~/.local/bin by default). + +Recommended is also to install yamllint (used by dtschema when present). + +Running checks +~~~~~~~~~~~~~~ + +In order to perform validation of DTB files, use the ``dtbs_check`` target:: + + make dtbs_check + +It is also possible to run checks with a subset of matching schema files by +setting the ``DT_SCHEMA_FILES`` variable to 1 or more specific schema files or +patterns (partial match of a fixed string). Each file or pattern should be +separated by ':'. + +:: + + make dtbs_check DT_SCHEMA_FILES=trivial-devices.yaml:rtc.yaml + make dtbs_check DT_SCHEMA_FILES=/gpio/ + make dtbs_check DT_SCHEMA_FILES=trivial-devices.yaml + + Relocation, SPL and TPL ----------------------- @@ -261,8 +324,9 @@ used it before Linux (e.g. snow). The two projects developed in parallel and there are still some differences in the bindings for certain boards. While there has been discussion of having a separate repository for devicetree files, in practice the Linux kernel Git repository has become the place where -these are stored, with U-Boot taking copies and adding tweaks with u-boot.dtsi -files. +these are stored, with U-Boot taking copies via devicetree-rebasing repo +(see: dtrepo_) and adding tweaks with u-boot.dtsi files. .. _dtspec: https://www.devicetree.org/specifications/ .. _dtlist: https://www.spinics.net/lists/devicetree-compiler/ +.. _dtrepo: https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git From patchwork Thu Dec 14 13:51:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Garg X-Patchwork-Id: 753927 Delivered-To: patch@linaro.org Received: by 2002:adf:ff85:0:b0:336:3f68:820c with SMTP id j5csp758367wrr; Thu, 14 Dec 2023 05:52:48 -0800 (PST) X-Google-Smtp-Source: AGHT+IG/WyZ/0+p8yTmXo9eDC+AVoPzNA14ChHAxf5HERqES0S0yobTqHXNoDKeqcVjJws88QovK X-Received: by 2002:a2e:bd17:0:b0:2cc:207d:842a with SMTP id n23-20020a2ebd17000000b002cc207d842amr5944372ljq.7.1702561968029; Thu, 14 Dec 2023 05:52:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702561968; cv=none; d=google.com; s=arc-20160816; b=Cgsp2hStMAQIm7u8qFLm5P6mGTo58QoPfcRfjhpeBycCIq8ZtYhJZ9AVm6og6lEY7Q D/PhHskc8sRhL751fqHwudYB7XCqGFUJnnRgH/ka01pUtfm6XJ8fIP03qji9ZWMYceSg Cu/wOqF2JKJC5sS3u492/HgXDBHeY2X+sF4YG+nY/6PGv1rmgAhp/KKNqEGTTL4InEYx wKAXqodte5pkpR/3oo5AK1n8BWHhpQs3c+daYxvdAWAvo8WyY3T7Wdb7meOsJsP+nO11 wc3fj9Ns2NDGCVlDTuw3/ZAGUHnclkfz8yHpMcYPuxELH0P9DE37pn7f0UfoGTpkjWHb LBWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Td8aJIXbMp5JqUrMaHqKAzI/IeFL8/SoXqjrn04NGuE=; fh=VZWdizSVWfhngo19Gt5nLjhnxzdtHBYWvcywp4ujR58=; b=PWvkMOGcavsHvdEaSPxKKQxQ/e+lrAyAU4CNenwxbc0woYgcp233Bux3Byau5yaMJ5 a29oo3O7y6KaiZKpAQutc+ozRq7mXDHYw/hNIKRpaj7xng3jdbrLnHsDoXzD5xGHyox/ yuracrzKCsWsU+JCPdmVSFLlw2KVa6ytOTCVUCfBw1pd/1N4De6xlLGitMIaTKoadcNm zmgTrjnEWweqdupVsvEHLKzWN5QPr4nruBCuU0NNWvMM6nSqsnj2Tnvm6RYGniDokiWq RcjF2uRYON58NEf0xgs3FwIsab/GIBpHsXt+om024OCGL73TjDnCHwOJmKhXHayVtpGb gMRw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GIwRF2L4; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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([223.178.213.6]) by smtp.gmail.com with ESMTPSA id j3-20020a170902c08300b001cfc68125desm12474956pld.203.2023.12.14.05.52.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Dec 2023 05:52:22 -0800 (PST) From: Sumit Garg To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, u-boot-custodians@lists.denx.de Cc: trini@konsulko.com, sjg@chromium.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor@kernel.org, neil.armstrong@linaro.org, caleb.connolly@linaro.org, ff@shokubai.tech, daniel.thompson@linaro.org, dgilmore@fedoraproject.org, pbrobinson@gmail.com, ilias.apalodimas@linaro.org, maxim.uvarov@linaro.org, b.galvani@gmail.com, xypron.glpk@gmx.de, michal.simek@amd.com, seanga2@gmail.com, rasmus.villemoes@prevas.dk, peng.fan@nxp.com, jh80.chung@samsung.com, rfried.dev@gmail.com, marex@denx.de, Sumit Garg Subject: [PATCH 6/8] MAINTAINERS: Add myself as devicetree-rebasing maintainer Date: Thu, 14 Dec 2023 19:21:01 +0530 Message-Id: <20231214135103.1606605-7-sumit.garg@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231214135103.1606605-1-sumit.garg@linaro.org> References: <20231214135103.1606605-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Signed-off-by: Sumit Garg Reviewed-by: Simon Glass --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 969514468cb..253092c345c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -951,6 +951,12 @@ F: cmd/cyclic.c F: common/cyclic.c F: include/cyclic.h +DEVICETREE REBASING SUBTREE +M: Sumit Garg +S: Maintained +F: devicetree-rebasing/ +F: dts/arch/ + DFU M: Lukasz Majewski M: Mattijs Korpershoek From patchwork Thu Dec 14 13:51:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Garg X-Patchwork-Id: 753928 Delivered-To: patch@linaro.org Received: by 2002:adf:ff85:0:b0:336:3f68:820c with SMTP id j5csp758458wrr; Thu, 14 Dec 2023 05:52:59 -0800 (PST) X-Google-Smtp-Source: AGHT+IE+Il4nrpmPdHpqkhGtCdsVobOrVVuWAwjtMzut0onM8TKtnhP1m2khcn/1LRHGuVwvYxhI X-Received: by 2002:a19:6454:0:b0:50b:fcdb:8df8 with SMTP id b20-20020a196454000000b0050bfcdb8df8mr4340562lfj.24.1702561979055; Thu, 14 Dec 2023 05:52:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702561979; cv=none; d=google.com; s=arc-20160816; b=tYILhv4Fn2VH+BuuMmPv8AVuYdKly/6F/tBROzdjPJqpUmqahbxGfwbOIFqr1DU8s7 WLtc9W53d4zump2J/vVz0lkJ28fajh6XUtNQKJGV43MiCKdmfbdsrwZt31IGU+/k+vMA 4WEiR7AUwAoYyqstNGsOFiGCwiL3IksFpF8npp4d6Rl+gthj5DKIqHbYc2SMSAgENmm5 j8Pbl4igSx4AFyEa5g+u8bwZ+wq9GzXZbe0hWY3bwxuiZEHoq17y9y8dcr508pTng09S odQHoNng/Z3p37iKWUcBZ3jbm/x7ywDuoA3zh/y2RJZUW/VLZ/6obGjoOiZTr3HeM5yv UnVA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=NmsHndC6oc2FsYxMykcqQqeyLL2RBBp2X/qx9cpH09c=; fh=VZWdizSVWfhngo19Gt5nLjhnxzdtHBYWvcywp4ujR58=; b=EecVUxJYM19Ec+JAoQ+JHRbC0myMQHT5AKg2eD96KbR9RCXCjSbfWycYOZbp8fhzL1 TZegYAs5oHEUH81HcFux0TniMha9x4BJlU7GFLRmp9b1kMtiQghezUJ5FIUdv2T3RKAr xR2/2Of3r/Pvfszh3pinZsiAdb52puUt+pfeOaF0EGlvR0sAVJToo95tCKyKu5IVwSWm Yio4yoFkH0Zb+9GJi5Vi7YlVw+M/ihR8r0lsIxDJRYYprtrHVsKlKoSqlZGa0FvajX8F okgtfmFctXGg6WSewtsKlbVUzNNHs+bK704g5I0hEnNqqk3RASKC+N8qEbL3UrREsSBt D85A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=q1PQ+3qQ; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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([223.178.213.6]) by smtp.gmail.com with ESMTPSA id j3-20020a170902c08300b001cfc68125desm12474956pld.203.2023.12.14.05.52.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Dec 2023 05:52:30 -0800 (PST) From: Sumit Garg To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, u-boot-custodians@lists.denx.de Cc: trini@konsulko.com, sjg@chromium.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor@kernel.org, neil.armstrong@linaro.org, caleb.connolly@linaro.org, ff@shokubai.tech, daniel.thompson@linaro.org, dgilmore@fedoraproject.org, pbrobinson@gmail.com, ilias.apalodimas@linaro.org, maxim.uvarov@linaro.org, b.galvani@gmail.com, xypron.glpk@gmx.de, michal.simek@amd.com, seanga2@gmail.com, rasmus.villemoes@prevas.dk, peng.fan@nxp.com, jh80.chung@samsung.com, rfried.dev@gmail.com, marex@denx.de, Sumit Garg Subject: [PATCH 7/8] dts: meson-gxbb: Switch to using upstream DT Date: Thu, 14 Dec 2023 19:21:02 +0530 Message-Id: <20231214135103.1606605-8-sumit.garg@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231214135103.1606605-1-sumit.garg@linaro.org> References: <20231214135103.1606605-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Although there were still some variations in board DTS files based on meson-gxbb SoC but I think those were minor differences from upstream and shouldn't impact boot on these devices. So switch to upstream DT via mirroring amlogic/ directory from devicetree-rebasing/src/arm64/amlogic/ directory. And thereby directly building DTB from there including *-u-boot.dtsi files from arch/$(ARCH)/dts/ directory. Signed-off-by: Sumit Garg Reviewed-by: Neil Armstrong --- configs/nanopi-k2_defconfig | 3 ++- configs/odroid-c2_defconfig | 3 ++- configs/p200_defconfig | 3 ++- configs/p201_defconfig | 3 ++- configs/videostrong-kii-pro_defconfig | 3 ++- configs/wetek-hub_defconfig | 3 ++- configs/wetek-play2_defconfig | 3 ++- dts/arch/arm64/Makefile | 9 +++++++++ dts/arch/arm64/amlogic | 1 + 9 files changed, 24 insertions(+), 7 deletions(-) create mode 120000 dts/arch/arm64/amlogic diff --git a/configs/nanopi-k2_defconfig b/configs/nanopi-k2_defconfig index 41dbf7981f8..3db296916e9 100644 --- a/configs/nanopi-k2_defconfig +++ b/configs/nanopi-k2_defconfig @@ -6,7 +6,8 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-nanopi-k2" +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-nanopi-k2" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 5f9f323e06e..65857ff478c 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -6,7 +6,8 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-odroidc2" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 diff --git a/configs/p200_defconfig b/configs/p200_defconfig index cd579ef5f14..c1792db51fd 100644 --- a/configs/p200_defconfig +++ b/configs/p200_defconfig @@ -6,7 +6,8 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p200" +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-p200" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 diff --git a/configs/p201_defconfig b/configs/p201_defconfig index b2f0a0ccdb4..202e1da5bcc 100644 --- a/configs/p201_defconfig +++ b/configs/p201_defconfig @@ -7,7 +7,8 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p201" +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-p201" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 diff --git a/configs/videostrong-kii-pro_defconfig b/configs/videostrong-kii-pro_defconfig index 3eda8f14a21..d09333d3b96 100644 --- a/configs/videostrong-kii-pro_defconfig +++ b/configs/videostrong-kii-pro_defconfig @@ -6,7 +6,8 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-kii-pro" +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-kii-pro" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 diff --git a/configs/wetek-hub_defconfig b/configs/wetek-hub_defconfig index fd92b041e73..73f3d4aad5d 100644 --- a/configs/wetek-hub_defconfig +++ b/configs/wetek-hub_defconfig @@ -6,7 +6,8 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-hub" +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-wetek-hub" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 diff --git a/configs/wetek-play2_defconfig b/configs/wetek-play2_defconfig index b887419a6ba..26f57b4214a 100644 --- a/configs/wetek-play2_defconfig +++ b/configs/wetek-play2_defconfig @@ -6,7 +6,8 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-play2" +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-wetek-play2" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 diff --git a/dts/arch/arm64/Makefile b/dts/arch/arm64/Makefile index 16e9fea622d..d548584cf5c 100644 --- a/dts/arch/arm64/Makefile +++ b/dts/arch/arm64/Makefile @@ -1,5 +1,14 @@ # SPDX-License-Identifier: GPL-2.0+ +dtb-$(CONFIG_ARCH_MESON) += \ + amlogic/meson-gxbb-kii-pro.dtb \ + amlogic/meson-gxbb-nanopi-k2.dtb \ + amlogic/meson-gxbb-odroidc2.dtb \ + amlogic/meson-gxbb-p200.dtb \ + amlogic/meson-gxbb-p201.dtb \ + amlogic/meson-gxbb-wetek-hub.dtb \ + amlogic/meson-gxbb-wetek-play2.dtb + include $(srctree)/scripts/Makefile.dts targets += $(dtb-y) diff --git a/dts/arch/arm64/amlogic b/dts/arch/arm64/amlogic new file mode 120000 index 00000000000..73f7c3e7bd0 --- /dev/null +++ b/dts/arch/arm64/amlogic @@ -0,0 +1 @@ +../../../devicetree-rebasing/src/arm64/amlogic/ \ No newline at end of file From patchwork Thu Dec 14 13:51:03 2023 Content-Type: text/plain; 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([223.178.213.6]) by smtp.gmail.com with ESMTPSA id j3-20020a170902c08300b001cfc68125desm12474956pld.203.2023.12.14.05.52.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Dec 2023 05:52:39 -0800 (PST) From: Sumit Garg To: u-boot@lists.denx.de, u-boot-amlogic@groups.io, u-boot-custodians@lists.denx.de Cc: trini@konsulko.com, sjg@chromium.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor@kernel.org, neil.armstrong@linaro.org, caleb.connolly@linaro.org, ff@shokubai.tech, daniel.thompson@linaro.org, dgilmore@fedoraproject.org, pbrobinson@gmail.com, ilias.apalodimas@linaro.org, maxim.uvarov@linaro.org, b.galvani@gmail.com, xypron.glpk@gmx.de, michal.simek@amd.com, seanga2@gmail.com, rasmus.villemoes@prevas.dk, peng.fan@nxp.com, jh80.chung@samsung.com, rfried.dev@gmail.com, marex@denx.de, Sumit Garg Subject: [PATCH 8/8] dts: meson-gxbb: Drop redundant devicetree files Date: Thu, 14 Dec 2023 19:21:03 +0530 Message-Id: <20231214135103.1606605-9-sumit.garg@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231214135103.1606605-1-sumit.garg@linaro.org> References: <20231214135103.1606605-1-sumit.garg@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Since meson-gxbb based boards switched to using upstream DT, so drop redundant files from arch/arm/dts directory. Only *-u-boot.dtsi files kept in arch/arm/dts directory for these boards. Signed-off-by: Sumit Garg --- arch/arm/dts/Makefile | 8 - arch/arm/dts/meson-gxbb-kii-pro.dts | 140 ---- arch/arm/dts/meson-gxbb-nanopi-k2.dts | 415 ------------ arch/arm/dts/meson-gxbb-odroidc2.dts | 418 ------------ arch/arm/dts/meson-gxbb-p200.dts | 100 --- arch/arm/dts/meson-gxbb-p201.dts | 26 - arch/arm/dts/meson-gxbb-p20x.dtsi | 250 ------- arch/arm/dts/meson-gxbb-wetek-hub.dts | 58 -- arch/arm/dts/meson-gxbb-wetek-play2.dts | 119 ---- arch/arm/dts/meson-gxbb-wetek.dtsi | 292 -------- arch/arm/dts/meson-gxbb.dtsi | 856 ------------------------ 11 files changed, 2682 deletions(-) delete mode 100644 arch/arm/dts/meson-gxbb-kii-pro.dts delete mode 100644 arch/arm/dts/meson-gxbb-nanopi-k2.dts delete mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts delete mode 100644 arch/arm/dts/meson-gxbb-p200.dts delete mode 100644 arch/arm/dts/meson-gxbb-p201.dts delete mode 100644 arch/arm/dts/meson-gxbb-p20x.dtsi delete mode 100644 arch/arm/dts/meson-gxbb-wetek-hub.dts delete mode 100644 arch/arm/dts/meson-gxbb-wetek-play2.dts delete mode 100644 arch/arm/dts/meson-gxbb-wetek.dtsi delete mode 100644 arch/arm/dts/meson-gxbb.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 5fc888680b3..45bd1166029 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -212,14 +212,6 @@ dtb-$(CONFIG_ARCH_MESON) += \ meson-a1-ad401.dtb \ meson-axg-s400.dtb \ meson-axg-jethome-jethub-j100.dtb \ - meson-gxbb-kii-pro.dtb \ - meson-gxbb-nanopi-k2.dtb \ - meson-gxbb-odroidc2.dtb \ - meson-gxbb-nanopi-k2.dtb \ - meson-gxbb-p200.dtb \ - meson-gxbb-p201.dtb \ - meson-gxbb-wetek-hub.dtb \ - meson-gxbb-wetek-play2.dtb \ meson-gxl-s805x-libretech-ac.dtb \ meson-gxl-s905d-libretech-pc.dtb \ meson-gxl-s905w-jethome-jethub-j80.dtb \ diff --git a/arch/arm/dts/meson-gxbb-kii-pro.dts b/arch/arm/dts/meson-gxbb-kii-pro.dts deleted file mode 100644 index e238f1f1012..00000000000 --- a/arch/arm/dts/meson-gxbb-kii-pro.dts +++ /dev/null @@ -1,140 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2019 Mohammad Rasim - */ - -/dts-v1/; - -#include "meson-gxbb-p20x.dtsi" -#include -#include -#include -#include - -/ { - compatible = "videostrong,kii-pro", "amlogic,meson-gxbb"; - model = "Videostrong KII Pro"; - - spdif_dit: audio-codec-0 { - #sound-dai-cells = <0>; - compatible = "linux,spdif-dit"; - status = "okay"; - sound-name-prefix = "DIT"; - }; - - leds { - compatible = "gpio-leds"; - led { - gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>; - color = ; - function = LED_FUNCTION_STATUS; - default-state = "off"; - }; - }; - - gpio-keys-polled { - compatible = "gpio-keys-polled"; - poll-interval = <20>; - - button-reset { - label = "reset"; - linux,code = ; - gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; - }; - }; - - sound { - compatible = "amlogic,gx-sound-card"; - model = "KII-PRO"; - assigned-clocks = <&clkc CLKID_MPLL0>, - <&clkc CLKID_MPLL1>, - <&clkc CLKID_MPLL2>; - assigned-clock-parents = <0>, <0>, <0>; - assigned-clock-rates = <294912000>, - <270950400>, - <393216000>; - - dai-link-0 { - sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; - }; - - dai-link-1 { - sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>; - }; - - dai-link-2 { - sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; - dai-format = "i2s"; - mclk-fs = <256>; - - codec-0 { - sound-dai = <&aiu AIU_HDMI CTRL_I2S>; - }; - }; - - dai-link-3 { - sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>; - - codec-0 { - sound-dai = <&spdif_dit>; - }; - }; - - dai-link-4 { - sound-dai = <&aiu AIU_HDMI CTRL_OUT>; - - codec-0 { - sound-dai = <&hdmi_tx>; - }; - }; - }; -}; - -&aiu { - status = "okay"; - pinctrl-0 = <&spdif_out_y_pins>; - pinctrl-names = "default"; -}; - -ðmac { - status = "okay"; - pinctrl-0 = <ð_rmii_pins>; - pinctrl-names = "default"; - - phy-handle = <ð_phy0>; - phy-mode = "rmii"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - eth_phy0: ethernet-phy@0 { - /* IC Plus IP101GR (0x02430c54) */ - reg = <0>; - reset-assert-us = <10000>; - reset-deassert-us = <10000>; - reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&ir { - linux,rc-map-name = "rc-videostrong-kii-pro"; -}; - -&uart_A { - status = "okay"; - pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; - pinctrl-names = "default"; - uart-has-rtscts; - - bluetooth { - compatible = "brcm,bcm4335a0"; - shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio GPIOX_21 GPIO_ACTIVE_HIGH>; - max-speed = <2000000>; - clocks = <&wifi32k>; - clock-names = "lpo"; - }; -}; diff --git a/arch/arm/dts/meson-gxbb-nanopi-k2.dts b/arch/arm/dts/meson-gxbb-nanopi-k2.dts deleted file mode 100644 index 7273eed5292..00000000000 --- a/arch/arm/dts/meson-gxbb-nanopi-k2.dts +++ /dev/null @@ -1,415 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 Andreas Färber - */ - -/dts-v1/; - -#include "meson-gxbb.dtsi" -#include -#include - -/ { - compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb"; - model = "FriendlyARM NanoPi K2"; - - aliases { - serial0 = &uart_AO; - ethernet0 = ðmac; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x80000000>; - }; - - leds { - compatible = "gpio-leds"; - - led-stat { - label = "nanopi-k2:blue:stat"; - gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>; - default-state = "on"; - panic-indicator; - }; - }; - - vdd_5v: regulator-vdd-5v { - compatible = "regulator-fixed"; - regulator-name = "VDD_5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vddio_ao18: regulator-vddio-ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - vddio_ao3v3: regulator-vddio-ao3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vddio_tf: regulator-vddio-tf { - compatible = "regulator-gpio"; - - regulator-name = "VDDIO_TF"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; - gpios-states = <0>; - - states = <3300000 0>, - <1800000 1>; - - regulator-settling-time-up-us = <100>; - regulator-settling-time-down-us = <5000>; - }; - - wifi_32k: wifi-32k { - compatible = "pwm-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; - clocks = <&wifi_32k>; - clock-names = "ext_clock"; - }; - - vcc1v8: regulator-vcc1v8 { - compatible = "regulator-fixed"; - regulator-name = "VCC1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - vcc3v3: regulator-vcc3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - emmc_pwrseq: emmc-pwrseq { - compatible = "mmc-pwrseq-emmc"; - reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; - }; - - /* CVBS is available on CON1 pin 36, disabled by default */ - cvbs-connector { - compatible = "composite-video-connector"; - status = "disabled"; - - port { - cvbs_connector_in: endpoint { - remote-endpoint = <&cvbs_vdac_out>; - }; - }; - }; - - hdmi-connector { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_connector_in: endpoint { - remote-endpoint = <&hdmi_tx_tmds_out>; - }; - }; - }; - - sound { - compatible = "amlogic,gx-sound-card"; - model = "NANOPI-K2"; - assigned-clocks = <&clkc CLKID_MPLL0>, - <&clkc CLKID_MPLL1>, - <&clkc CLKID_MPLL2>; - assigned-clock-parents = <0>, <0>, <0>; - assigned-clock-rates = <294912000>, - <270950400>, - <393216000>; - status = "okay"; - - dai-link-0 { - sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; - }; - - dai-link-1 { - sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; - dai-format = "i2s"; - mclk-fs = <256>; - - codec-0 { - sound-dai = <&aiu AIU_HDMI CTRL_I2S>; - }; - }; - - dai-link-2 { - sound-dai = <&aiu AIU_HDMI CTRL_OUT>; - - codec-0 { - sound-dai = <&hdmi_tx>; - }; - }; - }; -}; - -&aiu { - status = "okay"; -}; - -&cec_AO { - status = "okay"; - pinctrl-0 = <&ao_cec_pins>; - pinctrl-names = "default"; - hdmi-phandle = <&hdmi_tx>; -}; - -&cvbs_vdac_port { - cvbs_vdac_out: endpoint { - remote-endpoint = <&cvbs_connector_in>; - }; -}; - -ðmac { - status = "okay"; - pinctrl-0 = <ð_rgmii_pins>; - pinctrl-names = "default"; - - phy-handle = <ð_phy0>; - phy-mode = "rgmii"; - - amlogic,tx-delay-ns = <2>; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - eth_phy0: ethernet-phy@0 { - /* Realtek RTL8211F (0x001cc916) */ - reg = <0>; - - reset-assert-us = <10000>; - reset-deassert-us = <80000>; - reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; - - interrupt-parent = <&gpio_intc>; - /* MAC_INTR on GPIOZ_15 */ - interrupts = <29 IRQ_TYPE_LEVEL_LOW>; - }; - }; -}; - -&hdmi_tx { - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; - pinctrl-names = "default"; -}; - -&hdmi_tx_tmds_port { - hdmi_tx_tmds_out: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; -}; - -&ir { - status = "okay"; - pinctrl-0 = <&remote_input_ao_pins>; - pinctrl-names = "default"; -}; - -&gpio_ao { - gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In", - "VCCK En", "CON1 Header Pin31", - "I2S Header Pin6", "IR In", "I2S Header Pin7", - "I2S Header Pin3", "I2S Header Pin4", - "I2S Header Pin5", "HDMI CEC", "SYS LED", - /* GPIO_TEST_N */ - ""; -}; - -&gpio { - gpio-line-names = /* Bank GPIOZ */ - "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk", - "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2", - "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En", - "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3", - "Eth PHY nRESET", "Eth PHY Intc", - /* Bank GPIOH */ - "HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL", - "CON1 Header Pin33", - /* Bank BOOT */ - "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4", - "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk", - "eMMC Reset", "eMMC CMD", - "", "", "", "", "eMMC DS", - "", "", - /* Bank CARD */ - "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD", - "SDCard D3", "SDCard D2", "SDCard Det", - /* Bank GPIODV */ - "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", - "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK", - "VDDEE Regulator", "VCCK Regulator", - /* Bank GPIOY */ - "CON1 Header Pin7", "CON1 Header Pin11", - "CON1 Header Pin13", "CON1 Header Pin15", - "CON1 Header Pin18", "CON1 Header Pin19", - "CON1 Header Pin22", "CON1 Header Pin21", - "CON1 Header Pin24", "CON1 Header Pin23", - "CON1 Header Pin26", "CON1 Header Pin29", - "CON1 Header Pin32", "CON1 Header Pin8", - "CON1 Header Pin10", "CON1 Header Pin16", - "CON1 Header Pin12", - /* Bank GPIOX */ - "WIFI SDIO D0", "WIFI SDIO D1", "WIFI SDIO D2", - "WIFI SDIO D3", "WIFI SDIO CLK", "WIFI SDIO CMD", - "WIFI Power Enable", "WIFI WAKE HOST", - "Bluetooth PCM DOUT", "Bluetooth PCM DIN", - "Bluetooth PCM SYNC", "Bluetooth PCM CLK", - "Bluetooth UART TX", "Bluetooth UART RX", - "Bluetooth UART CTS", "Bluetooth UART RTS", - "", "", "", "WIFI 32K", "Bluetooth Enable", - "Bluetooth WAKE HOST", "", - /* Bank GPIOCLK */ - "", "CON1 Header Pin35", "", ""; -}; - -&pwm_ef { - status = "okay"; - pinctrl-0 = <&pwm_e_pins>; - pinctrl-names = "default"; - clocks = <&clkc CLKID_FCLK_DIV4>; - clock-names = "clkin0"; -}; - -&saradc { - status = "okay"; - vref-supply = <&vddio_ao18>; -}; - -/* SDIO */ -&sd_emmc_a { - status = "okay"; - pinctrl-0 = <&sdio_pins>, <&sdio_irq_pins>; - pinctrl-1 = <&sdio_clk_gate_pins>; - pinctrl-names = "default", "clk-gate"; - #address-cells = <1>; - #size-cells = <0>; - - bus-width = <4>; - cap-sd-highspeed; - max-frequency = <50000000>; - - non-removable; - disable-wp; - - /* WiFi firmware requires power to be kept while in suspend */ - keep-power-in-suspend; - - mmc-pwrseq = <&sdio_pwrseq>; - - vmmc-supply = <&vddio_ao3v3>; - vqmmc-supply = <&vddio_ao18>; - - brcmf: wifi@1 { - compatible = "brcm,bcm4329-fmac"; - reg = <1>; - }; -}; - -/* SD */ -&sd_emmc_b { - status = "okay"; - pinctrl-0 = <&sdcard_pins>; - pinctrl-1 = <&sdcard_clk_gate_pins>; - pinctrl-names = "default", "clk-gate"; - - bus-width = <4>; - cap-sd-highspeed; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-ddr50; - max-frequency = <100000000>; - disable-wp; - - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; - - vmmc-supply = <&vddio_ao3v3>; - vqmmc-supply = <&vddio_tf>; -}; - -/* eMMC */ -&sd_emmc_c { - status = "disabled"; - pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; - pinctrl-1 = <&emmc_clk_gate_pins>; - pinctrl-names = "default", "clk-gate"; - - bus-width = <8>; - max-frequency = <200000000>; - non-removable; - disable-wp; - cap-mmc-highspeed; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - - mmc-pwrseq = <&emmc_pwrseq>; - vmmc-supply = <&vcc3v3>; - vqmmc-supply = <&vcc1v8>; -}; - -/* DBG_UART */ -&uart_AO { - status = "okay"; - pinctrl-0 = <&uart_ao_a_pins>; - pinctrl-names = "default"; -}; - -/* Bluetooth on AP6212 */ -&uart_A { - status = "disabled"; - pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; - pinctrl-names = "default"; -}; - -/* 40-pin CON1 */ -&uart_C { - status = "disabled"; - pinctrl-0 = <&uart_c_pins>; - pinctrl-names = "default"; -}; - -&usb0_phy { - status = "okay"; - phy-supply = <&vdd_5v>; -}; - -&usb1_phy { - status = "okay"; -}; - -&usb0 { - status = "okay"; -}; - -&usb1 { - status = "okay"; -}; diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts deleted file mode 100644 index 201596247fd..00000000000 --- a/arch/arm/dts/meson-gxbb-odroidc2.dts +++ /dev/null @@ -1,418 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2016 Andreas Färber - * Copyright (c) 2016 BayLibre, Inc. - * Author: Kevin Hilman - */ - -/dts-v1/; - -#include "meson-gxbb.dtsi" -#include -#include - -/ { - compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb"; - model = "Hardkernel ODROID-C2"; - - aliases { - serial0 = &uart_AO; - ethernet0 = ðmac; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x80000000>; - }; - - usb_otg_pwr: regulator-usb-pwrs { - compatible = "regulator-fixed"; - - regulator-name = "USB_OTG_PWR"; - - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - - /* - * signal name from schematics: PWREN - */ - gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>; - enable-active-high; - /* - * signal name from schematics: USB_POWER - */ - vin-supply = <&p5v0>; - }; - - leds { - compatible = "gpio-leds"; - led-blue { - label = "c2:blue:alive"; - gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>; - linux,default-trigger = "heartbeat"; - default-state = "off"; - }; - }; - - p5v0: regulator-p5v0 { - compatible = "regulator-fixed"; - - regulator-name = "P5V0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; - - hdmi_p5v0: regulator-hdmi_p5v0 { - compatible = "regulator-fixed"; - regulator-name = "HDMI_P5V0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - /* AP2331SA-7 */ - vin-supply = <&p5v0>; - }; - - tflash_vdd: regulator-tflash_vdd { - compatible = "regulator-fixed"; - - regulator-name = "TFLASH_VDD"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - /* - * signal name from schematics: TFLASH_VDD_EN - */ - gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>; - enable-active-high; - /* U16 RT9179GB */ - vin-supply = <&vddio_ao3v3>; - }; - - tf_io: gpio-regulator-tf_io { - compatible = "regulator-gpio"; - - regulator-name = "TF_IO"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - /* - * signal name from schematics: TF_3V3N_1V8_EN - */ - gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; - gpios-states = <0>; - - states = <3300000 0>, - <1800000 1>; - /* U12/U13 RT9179GB */ - vin-supply = <&vddio_ao3v3>; - }; - - vcc1v8: regulator-vcc1v8 { - compatible = "regulator-fixed"; - regulator-name = "VCC1V8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - /* U18 RT9179GB */ - vin-supply = <&vddio_ao3v3>; - }; - - vcc3v3: regulator-vcc3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vddio_ao1v8: regulator-vddio-ao1v8 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO1V8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - /* U17 RT9179GB */ - vin-supply = <&p5v0>; - }; - - vddio_ao3v3: regulator-vddio-ao3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - /* U11 MP2161GJ-C499 */ - vin-supply = <&p5v0>; - }; - - ddr3_1v5: regulator-ddr3_1v5 { - compatible = "regulator-fixed"; - regulator-name = "DDR3_1V5"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - /* U15 MP2161GJ-C499 */ - vin-supply = <&p5v0>; - }; - - emmc_pwrseq: emmc-pwrseq { - compatible = "mmc-pwrseq-emmc"; - reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; - }; - - hdmi-connector { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_connector_in: endpoint { - remote-endpoint = <&hdmi_tx_tmds_out>; - }; - }; - }; - - sound { - compatible = "amlogic,gx-sound-card"; - model = "ODROID-C2"; - assigned-clocks = <&clkc CLKID_MPLL0>, - <&clkc CLKID_MPLL1>, - <&clkc CLKID_MPLL2>; - assigned-clock-parents = <0>, <0>, <0>; - assigned-clock-rates = <294912000>, - <270950400>, - <393216000>; - status = "okay"; - - dai-link-0 { - sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; - }; - - dai-link-1 { - sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; - dai-format = "i2s"; - mclk-fs = <256>; - - codec-0 { - sound-dai = <&aiu AIU_HDMI CTRL_I2S>; - }; - }; - - dai-link-2 { - sound-dai = <&aiu AIU_HDMI CTRL_OUT>; - - codec-0 { - sound-dai = <&hdmi_tx>; - }; - }; - }; -}; - -&aiu { - status = "okay"; -}; - -&cec_AO { - status = "okay"; - pinctrl-0 = <&ao_cec_pins>; - pinctrl-names = "default"; - hdmi-phandle = <&hdmi_tx>; -}; - -ðmac { - status = "okay"; - pinctrl-0 = <ð_rgmii_pins>; - pinctrl-names = "default"; - phy-handle = <ð_phy0>; - phy-mode = "rgmii"; - - amlogic,tx-delay-ns = <2>; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - eth_phy0: ethernet-phy@0 { - /* Realtek RTL8211F (0x001cc916) */ - reg = <0>; - - reset-assert-us = <10000>; - reset-deassert-us = <80000>; - reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; - - interrupt-parent = <&gpio_intc>; - /* MAC_INTR on GPIOZ_15 */ - interrupts = <29 IRQ_TYPE_LEVEL_LOW>; - }; - }; -}; - -&gpio_ao { - /* - * WARNING: The USB Hub on the Odroid-C2 needs a reset signal - * to be turned high in order to be detected by the USB Controller - * This signal should be handled by a USB specific power sequence - * in order to reset the Hub when USB bus is powered down. - */ - hog-0 { - gpio-hog; - gpios = ; - output-high; - line-name = "usb-hub-reset"; - }; -}; - -&hdmi_tx { - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; - pinctrl-names = "default"; - hdmi-supply = <&hdmi_p5v0>; -}; - -&hdmi_tx_tmds_port { - hdmi_tx_tmds_out: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; -}; - -&i2c_A { - status = "okay"; - pinctrl-0 = <&i2c_a_pins>; - pinctrl-names = "default"; -}; - -&ir { - status = "okay"; - pinctrl-0 = <&remote_input_ao_pins>; - pinctrl-names = "default"; - linux,rc-map-name = "rc-odroid"; -}; - -&gpio_ao { - gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En", - "USB HUB nRESET", "USB OTG Power En", - "J7 Header Pin2", "IR In", "J7 Header Pin4", - "J7 Header Pin6", "J7 Header Pin5", "J7 Header Pin7", - "HDMI CEC", "SYS LED", - /* GPIO_TEST_N */ - ""; -}; - -&gpio { - gpio-line-names = /* Bank GPIOZ */ - "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk", - "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2", - "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En", - "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3", - "Eth PHY nRESET", "Eth PHY Intc", - /* Bank GPIOH */ - "HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL", "", - /* Bank BOOT */ - "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4", - "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk", - "eMMC Reset", "eMMC CMD", - "", "", "", "", "", "", "", - /* Bank CARD */ - "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD", - "SDCard D3", "SDCard D2", "SDCard Det", - /* Bank GPIODV */ - "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", "", - "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK", - "PWM D", "PWM B", - /* Bank GPIOY */ - "Revision Bit0", "Revision Bit1", "", - "J2 Header Pin35", "", "", "", "J2 Header Pin36", - "J2 Header Pin31", "", "", "", "TF VDD En", - "J2 Header Pin32", "J2 Header Pin26", "", "", - /* Bank GPIOX */ - "J2 Header Pin29", "J2 Header Pin24", - "J2 Header Pin23", "J2 Header Pin22", - "J2 Header Pin21", "J2 Header Pin18", - "J2 Header Pin33", "J2 Header Pin19", - "J2 Header Pin16", "J2 Header Pin15", - "J2 Header Pin12", "J2 Header Pin13", - "J2 Header Pin8", "J2 Header Pin10", - "", "", "", "", "", - "J2 Header Pin11", "", "J2 Header Pin7", "", - /* Bank GPIOCLK */ - "", "", "", ""; -}; - -&saradc { - status = "okay"; - vref-supply = <&vcc1v8>; -}; - -&scpi_clocks { - status = "disabled"; -}; - -/* SD */ -&sd_emmc_b { - status = "okay"; - pinctrl-0 = <&sdcard_pins>; - pinctrl-1 = <&sdcard_clk_gate_pins>; - pinctrl-names = "default", "clk-gate"; - - bus-width = <4>; - cap-sd-highspeed; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-ddr50; - max-frequency = <100000000>; - disable-wp; - - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; - - vmmc-supply = <&tflash_vdd>; - vqmmc-supply = <&tf_io>; -}; - -/* eMMC */ -&sd_emmc_c { - status = "okay"; - pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; - pinctrl-1 = <&emmc_clk_gate_pins>; - pinctrl-names = "default", "clk-gate"; - - bus-width = <8>; - max-frequency = <200000000>; - non-removable; - disable-wp; - cap-mmc-highspeed; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - - mmc-pwrseq = <&emmc_pwrseq>; - vmmc-supply = <&vcc3v3>; - vqmmc-supply = <&vcc1v8>; -}; - -&uart_AO { - status = "okay"; - pinctrl-0 = <&uart_ao_a_pins>; - pinctrl-names = "default"; -}; - -&usb0_phy { - status = "disabled"; - phy-supply = <&usb_otg_pwr>; -}; - -&usb1_phy { - status = "okay"; - phy-supply = <&usb_otg_pwr>; -}; - -&usb0 { - status = "disabled"; -}; - -&usb1 { - status = "okay"; -}; diff --git a/arch/arm/dts/meson-gxbb-p200.dts b/arch/arm/dts/meson-gxbb-p200.dts deleted file mode 100644 index 3c93d1898b4..00000000000 --- a/arch/arm/dts/meson-gxbb-p200.dts +++ /dev/null @@ -1,100 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2016 Andreas Färber - * Copyright (c) 2016 BayLibre, Inc. - * Author: Kevin Hilman - */ - -/dts-v1/; - -#include "meson-gxbb-p20x.dtsi" -#include - -/ { - compatible = "amlogic,p200", "amlogic,meson-gxbb"; - model = "Amlogic Meson GXBB P200 Development Board"; - - avdd18_usb_adc: regulator-avdd18_usb_adc { - compatible = "regulator-fixed"; - regulator-name = "AVDD18_USB_ADC"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - adc_keys { - compatible = "adc-keys"; - io-channels = <&saradc 0>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1800000>; - - button-home { - label = "Home"; - linux,code = ; - press-threshold-microvolt = <900000>; /* 50% */ - }; - - button-esc { - label = "Esc"; - linux,code = ; - press-threshold-microvolt = <684000>; /* 38% */ - }; - - button-up { - label = "Volume Up"; - linux,code = ; - press-threshold-microvolt = <468000>; /* 26% */ - }; - - button-down { - label = "Volume Down"; - linux,code = ; - press-threshold-microvolt = <252000>; /* 14% */ - }; - - button-menu { - label = "Menu"; - linux,code = ; - press-threshold-microvolt = <0>; /* 0% */ - }; - }; -}; - -ðmac { - status = "okay"; - pinctrl-0 = <ð_rgmii_pins>; - pinctrl-names = "default"; - phy-handle = <ð_phy0>; - phy-mode = "rgmii"; - - amlogic,tx-delay-ns = <2>; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - eth_phy0: ethernet-phy@3 { - /* Micrel KSZ9031 (0x00221620) */ - reg = <3>; - - reset-assert-us = <10000>; - reset-deassert-us = <30000>; - reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; - - interrupt-parent = <&gpio_intc>; - /* MAC_INTR on GPIOZ_15 */ - interrupts = <29 IRQ_TYPE_LEVEL_LOW>; - }; - }; -}; - -&i2c_B { - status = "okay"; - pinctrl-0 = <&i2c_b_pins>; - pinctrl-names = "default"; -}; - -&saradc { - status = "okay"; - vref-supply = <&avdd18_usb_adc>; -}; diff --git a/arch/arm/dts/meson-gxbb-p201.dts b/arch/arm/dts/meson-gxbb-p201.dts deleted file mode 100644 index 150a82f3b2d..00000000000 --- a/arch/arm/dts/meson-gxbb-p201.dts +++ /dev/null @@ -1,26 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2016 Andreas Färber - * Copyright (c) 2016 BayLibre, Inc. - * Author: Kevin Hilman - */ - -/dts-v1/; - -#include "meson-gxbb-p20x.dtsi" - -/ { - compatible = "amlogic,p201", "amlogic,meson-gxbb"; - model = "Amlogic Meson GXBB P201 Development Board"; -}; - -ðmac { - status = "okay"; - pinctrl-0 = <ð_rmii_pins>; - pinctrl-names = "default"; - phy-mode = "rmii"; - - snps,reset-gpio = <&gpio GPIOZ_14 0>; - snps,reset-delays-us = <0>, <10000>, <1000000>; - snps,reset-active-low; -}; diff --git a/arch/arm/dts/meson-gxbb-p20x.dtsi b/arch/arm/dts/meson-gxbb-p20x.dtsi deleted file mode 100644 index e803a466fe4..00000000000 --- a/arch/arm/dts/meson-gxbb-p20x.dtsi +++ /dev/null @@ -1,250 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2016 Andreas Färber - * Copyright (c) 2016 BayLibre, Inc. - * Author: Kevin Hilman - */ - -#include "meson-gxbb.dtsi" - -/ { - aliases { - serial0 = &uart_AO; - ethernet0 = ðmac; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x40000000>; - }; - - usb_pwr: regulator-usb-pwrs { - compatible = "regulator-fixed"; - - regulator-name = "USB_PWR"; - - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - - /* signal name in schematic: USB_PWR_EN */ - gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vddio_card: gpio-regulator { - compatible = "regulator-gpio"; - - regulator-name = "VDDIO_CARD"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - - /* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */ - states = <1800000 0>, - <3300000 1>; - - regulator-settling-time-up-us = <10000>; - regulator-settling-time-down-us = <150000>; - }; - - vddio_boot: regulator-vddio_boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - vddao_3v3: regulator-vddao_3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vcc_3v3: regulator-vcc_3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - emmc_pwrseq: emmc-pwrseq { - compatible = "mmc-pwrseq-emmc"; - reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; - }; - - wifi32k: wifi32k { - compatible = "pwm-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; - clocks = <&wifi32k>; - clock-names = "ext_clock"; - }; - - cvbs_connector: cvbs-connector { - compatible = "composite-video-connector"; - - port { - cvbs_connector_in: endpoint { - remote-endpoint = <&cvbs_vdac_out>; - }; - }; - }; - - hdmi-connector { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_connector_in: endpoint { - remote-endpoint = <&hdmi_tx_tmds_out>; - }; - }; - }; -}; - -&cec_AO { - status = "okay"; - pinctrl-0 = <&ao_cec_pins>; - pinctrl-names = "default"; - hdmi-phandle = <&hdmi_tx>; -}; - -&cvbs_vdac_port { - cvbs_vdac_out: endpoint { - remote-endpoint = <&cvbs_connector_in>; - }; -}; - -&hdmi_tx { - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; - pinctrl-names = "default"; -}; - -&hdmi_tx_tmds_port { - hdmi_tx_tmds_out: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; -}; - -&ir { - status = "okay"; - pinctrl-0 = <&remote_input_ao_pins>; - pinctrl-names = "default"; -}; - -&pwm_ef { - status = "okay"; - pinctrl-0 = <&pwm_e_pins>; - pinctrl-names = "default"; - clocks = <&clkc CLKID_FCLK_DIV4>; - clock-names = "clkin0"; -}; - -/* Wireless SDIO Module */ -&sd_emmc_a { - status = "okay"; - pinctrl-0 = <&sdio_pins>; - pinctrl-1 = <&sdio_clk_gate_pins>; - pinctrl-names = "default", "clk-gate"; - #address-cells = <1>; - #size-cells = <0>; - - bus-width = <4>; - cap-sd-highspeed; - max-frequency = <50000000>; - - non-removable; - disable-wp; - - /* WiFi firmware requires power to be kept while in suspend */ - keep-power-in-suspend; - - mmc-pwrseq = <&sdio_pwrseq>; - - vmmc-supply = <&vddao_3v3>; - vqmmc-supply = <&vddio_boot>; - - brcmf: wifi@1 { - reg = <1>; - compatible = "brcm,bcm4329-fmac"; - }; -}; - -/* SD card */ -&sd_emmc_b { - status = "okay"; - pinctrl-0 = <&sdcard_pins>; - pinctrl-1 = <&sdcard_clk_gate_pins>; - pinctrl-names = "default", "clk-gate"; - - bus-width = <4>; - cap-sd-highspeed; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - max-frequency = <100000000>; - disable-wp; - - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; - - vmmc-supply = <&vddao_3v3>; - vqmmc-supply = <&vddio_card>; -}; - -/* eMMC */ -&sd_emmc_c { - status = "okay"; - pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; - pinctrl-1 = <&emmc_clk_gate_pins>; - pinctrl-names = "default", "clk-gate"; - - bus-width = <8>; - cap-mmc-highspeed; - max-frequency = <200000000>; - non-removable; - disable-wp; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - - mmc-pwrseq = <&emmc_pwrseq>; - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&vddio_boot>; -}; - -/* This UART is brought out to the DB9 connector */ -&uart_AO { - status = "okay"; - pinctrl-0 = <&uart_ao_a_pins>; - pinctrl-names = "default"; -}; - -&usb0_phy { - status = "okay"; - phy-supply = <&usb_pwr>; -}; - -&usb1_phy { - status = "okay"; -}; - -&usb0 { - status = "okay"; -}; - -&usb1 { - status = "okay"; -}; diff --git a/arch/arm/dts/meson-gxbb-wetek-hub.dts b/arch/arm/dts/meson-gxbb-wetek-hub.dts deleted file mode 100644 index 58733017eda..00000000000 --- a/arch/arm/dts/meson-gxbb-wetek-hub.dts +++ /dev/null @@ -1,58 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2016 BayLibre, Inc. - * Author: Neil Armstrong - */ - -/dts-v1/; - -#include "meson-gxbb-wetek.dtsi" -#include - -/ { - compatible = "wetek,hub", "amlogic,meson-gxbb"; - model = "WeTek Hub"; - - sound { - compatible = "amlogic,gx-sound-card"; - model = "WETEK-HUB"; - assigned-clocks = <&clkc CLKID_MPLL0>, - <&clkc CLKID_MPLL1>, - <&clkc CLKID_MPLL2>; - assigned-clock-parents = <0>, <0>, <0>; - assigned-clock-rates = <294912000>, - <270950400>, - <393216000>; - status = "okay"; - - dai-link-0 { - sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; - }; - - dai-link-1 { - sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; - dai-format = "i2s"; - mclk-fs = <256>; - - codec-0 { - sound-dai = <&aiu AIU_HDMI CTRL_I2S>; - }; - }; - - dai-link-2 { - sound-dai = <&aiu AIU_HDMI CTRL_OUT>; - - codec-0 { - sound-dai = <&hdmi_tx>; - }; - }; - }; -}; - -&aiu { - status = "okay"; -}; - -&ir { - linux,rc-map-name = "rc-wetek-hub"; -}; diff --git a/arch/arm/dts/meson-gxbb-wetek-play2.dts b/arch/arm/dts/meson-gxbb-wetek-play2.dts deleted file mode 100644 index 505ffcd8eb7..00000000000 --- a/arch/arm/dts/meson-gxbb-wetek-play2.dts +++ /dev/null @@ -1,119 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2016 BayLibre, Inc. - * Author: Neil Armstrong - */ - -/dts-v1/; - -#include "meson-gxbb-wetek.dtsi" -#include -#include - -/ { - compatible = "wetek,play2", "amlogic,meson-gxbb"; - model = "WeTek Play 2"; - - spdif_dit: audio-codec-0 { - #sound-dai-cells = <0>; - compatible = "linux,spdif-dit"; - status = "okay"; - sound-name-prefix = "DIT"; - }; - - leds { - led-wifi { - label = "wetek-play:wifi-status"; - gpios = <&gpio GPIODV_26 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - - led-ethernet { - label = "wetek-play:ethernet-status"; - gpios = <&gpio GPIODV_27 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - }; - - gpio-keys-polled { - compatible = "gpio-keys-polled"; - poll-interval = <100>; - - button { - label = "reset"; - linux,code = ; - gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>; - }; - }; - - sound { - compatible = "amlogic,gx-sound-card"; - model = "WETEK-PLAY2"; - assigned-clocks = <&clkc CLKID_MPLL0>, - <&clkc CLKID_MPLL1>, - <&clkc CLKID_MPLL2>; - assigned-clock-parents = <0>, <0>, <0>; - assigned-clock-rates = <294912000>, - <270950400>, - <393216000>; - status = "okay"; - - dai-link-0 { - sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; - }; - - dai-link-1 { - sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>; - }; - - dai-link-2 { - sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; - dai-format = "i2s"; - mclk-fs = <256>; - - codec-0 { - sound-dai = <&aiu AIU_HDMI CTRL_I2S>; - }; - }; - - dai-link-3 { - sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>; - - codec-0 { - sound-dai = <&spdif_dit>; - }; - }; - - dai-link-4 { - sound-dai = <&aiu AIU_HDMI CTRL_OUT>; - - codec-0 { - sound-dai = <&hdmi_tx>; - }; - }; - }; -}; - -&aiu { - status = "okay"; - pinctrl-0 = <&spdif_out_y_pins>; - pinctrl-names = "default"; -}; - -&i2c_A { - status = "okay"; - pinctrl-0 = <&i2c_a_pins>; - pinctrl-names = "default"; -}; - -&usb1_phy { - status = "okay"; -}; - -&usb1 { - status = "okay"; -}; - -&ir { - linux,rc-map-name = "rc-wetek-play2"; -}; diff --git a/arch/arm/dts/meson-gxbb-wetek.dtsi b/arch/arm/dts/meson-gxbb-wetek.dtsi deleted file mode 100644 index 94dafb95530..00000000000 --- a/arch/arm/dts/meson-gxbb-wetek.dtsi +++ /dev/null @@ -1,292 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2016 Andreas Färber - * Copyright (c) 2016 BayLibre, Inc. - * Author: Kevin Hilman - */ - -#include "meson-gxbb.dtsi" -#include -#include - -/ { - aliases { - serial0 = &uart_AO; - ethernet0 = ðmac; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x40000000>; - }; - - leds { - compatible = "gpio-leds"; - - led-power { - /* red in suspend or power-off */ - color = ; - function = LED_FUNCTION_POWER; - gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>; - default-state = "on"; - panic-indicator; - }; - }; - - usb_pwr: regulator-usb-pwrs { - compatible = "regulator-fixed"; - - regulator-name = "USB_PWR"; - - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - - gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vddio_boot: regulator-vddio_boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - vddao_3v3: regulator-vddao_3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vddio_ao18: regulator-vddio_ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - vcc_3v3: regulator-vcc_3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - emmc_pwrseq: emmc-pwrseq { - compatible = "mmc-pwrseq-emmc"; - reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; - }; - - wifi32k: wifi32k { - compatible = "pwm-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; - clocks = <&wifi32k>; - clock-names = "ext_clock"; - }; - - cvbs-connector { - compatible = "composite-video-connector"; - - port { - cvbs_connector_in: endpoint { - remote-endpoint = <&cvbs_vdac_out>; - }; - }; - }; - - hdmi-connector { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_connector_in: endpoint { - remote-endpoint = <&hdmi_tx_tmds_out>; - }; - }; - }; -}; - -&cec_AO { - status = "okay"; - pinctrl-0 = <&ao_cec_pins>; - pinctrl-names = "default"; - hdmi-phandle = <&hdmi_tx>; -}; - -&cvbs_vdac_port { - cvbs_vdac_out: endpoint { - remote-endpoint = <&cvbs_connector_in>; - }; -}; - -ðmac { - status = "okay"; - pinctrl-0 = <ð_rgmii_pins>; - pinctrl-names = "default"; - - phy-handle = <ð_phy0>; - phy-mode = "rgmii"; - - amlogic,tx-delay-ns = <2>; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - eth_phy0: ethernet-phy@0 { - /* Realtek RTL8211F (0x001cc916) */ - reg = <0>; - - reset-assert-us = <10000>; - reset-deassert-us = <80000>; - reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; - - interrupt-parent = <&gpio_intc>; - /* MAC_INTR on GPIOZ_15 */ - interrupts = <29 IRQ_TYPE_LEVEL_LOW>; - }; - }; -}; - -&hdmi_tx { - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; - pinctrl-names = "default"; - hdmi-supply = <&vddio_ao18>; -}; - -&hdmi_tx_tmds_port { - hdmi_tx_tmds_out: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; -}; - -&ir { - status = "okay"; - pinctrl-0 = <&remote_input_ao_pins>; - pinctrl-names = "default"; -}; - -&pwm_ef { - status = "okay"; - pinctrl-0 = <&pwm_e_pins>; - pinctrl-names = "default"; - clocks = <&clkc CLKID_FCLK_DIV4>; - clock-names = "clkin0"; -}; - -&saradc { - status = "okay"; - vref-supply = <&vddio_ao18>; -}; - -/* Wireless SDIO Module */ -&sd_emmc_a { - status = "okay"; - pinctrl-0 = <&sdio_pins>; - pinctrl-1 = <&sdio_clk_gate_pins>; - pinctrl-names = "default", "clk-gate"; - #address-cells = <1>; - #size-cells = <0>; - - bus-width = <4>; - cap-sd-highspeed; - max-frequency = <50000000>; - - non-removable; - disable-wp; - - /* WiFi firmware requires power to be kept while in suspend */ - keep-power-in-suspend; - - mmc-pwrseq = <&sdio_pwrseq>; - - vmmc-supply = <&vddao_3v3>; - vqmmc-supply = <&vddio_boot>; - - brcmf: wifi@1 { - reg = <1>; - compatible = "brcm,bcm4329-fmac"; - }; -}; - -/* SD card */ -&sd_emmc_b { - status = "okay"; - pinctrl-0 = <&sdcard_pins>; - pinctrl-1 = <&sdcard_clk_gate_pins>; - pinctrl-names = "default", "clk-gate"; - - bus-width = <4>; - cap-sd-highspeed; - max-frequency = <50000000>; - disable-wp; - - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; - - vmmc-supply = <&vddao_3v3>; - vqmmc-supply = <&vcc_3v3>; -}; - -/* eMMC */ -&sd_emmc_c { - status = "okay"; - pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; - pinctrl-1 = <&emmc_clk_gate_pins>; - pinctrl-names = "default", "clk-gate"; - - bus-width = <8>; - cap-mmc-highspeed; - max-frequency = <200000000>; - non-removable; - disable-wp; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - - mmc-pwrseq = <&emmc_pwrseq>; - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&vddio_boot>; -}; - -/* This is connected to the Bluetooth module: */ -&uart_A { - status = "okay"; - pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; - pinctrl-names = "default"; - uart-has-rtscts; - - bluetooth { - compatible = "brcm,bcm43438-bt"; - shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>; - }; -}; - -/* This UART is brought out to the DB9 connector */ -&uart_AO { - status = "okay"; - pinctrl-0 = <&uart_ao_a_pins>; - pinctrl-names = "default"; -}; - -&usb0_phy { - status = "okay"; - phy-supply = <&usb_pwr>; -}; - -&usb0 { - status = "okay"; -}; diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi deleted file mode 100644 index 7c029f552a2..00000000000 --- a/arch/arm/dts/meson-gxbb.dtsi +++ /dev/null @@ -1,856 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2016 Andreas Färber - */ - -#include "meson-gx.dtsi" -#include "meson-gx-mali450.dtsi" -#include -#include -#include -#include -#include - -/ { - compatible = "amlogic,meson-gxbb"; - - soc { - usb0_phy: phy@c0000000 { - compatible = "amlogic,meson-gxbb-usb2-phy"; - #phy-cells = <0>; - reg = <0x0 0xc0000000 0x0 0x20>; - resets = <&reset RESET_USB_OTG>; - clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>; - clock-names = "usb_general", "usb"; - status = "disabled"; - }; - - usb1_phy: phy@c0000020 { - compatible = "amlogic,meson-gxbb-usb2-phy"; - #phy-cells = <0>; - reg = <0x0 0xc0000020 0x0 0x20>; - resets = <&reset RESET_USB_OTG>; - clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>; - clock-names = "usb_general", "usb"; - status = "disabled"; - }; - - usb0: usb@c9000000 { - compatible = "amlogic,meson-gxbb-usb", "snps,dwc2"; - reg = <0x0 0xc9000000 0x0 0x40000>; - interrupts = ; - clocks = <&clkc CLKID_USB0_DDR_BRIDGE>; - clock-names = "otg"; - phys = <&usb0_phy>; - phy-names = "usb2-phy"; - dr_mode = "host"; - status = "disabled"; - }; - - usb1: usb@c9100000 { - compatible = "amlogic,meson-gxbb-usb", "snps,dwc2"; - reg = <0x0 0xc9100000 0x0 0x40000>; - interrupts = ; - clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; - clock-names = "otg"; - phys = <&usb1_phy>; - phy-names = "usb2-phy"; - dr_mode = "host"; - status = "disabled"; - }; - }; -}; - -&aiu { - compatible = "amlogic,aiu-gxbb", "amlogic,aiu"; - clocks = <&clkc CLKID_AIU_GLUE>, - <&clkc CLKID_I2S_OUT>, - <&clkc CLKID_AOCLK_GATE>, - <&clkc CLKID_CTS_AMCLK>, - <&clkc CLKID_MIXER_IFACE>, - <&clkc CLKID_IEC958>, - <&clkc CLKID_IEC958_GATE>, - <&clkc CLKID_CTS_MCLK_I958>, - <&clkc CLKID_CTS_I958>; - clock-names = "pclk", - "i2s_pclk", - "i2s_aoclk", - "i2s_mclk", - "i2s_mixer", - "spdif_pclk", - "spdif_aoclk", - "spdif_mclk", - "spdif_mclk_sel"; - resets = <&reset RESET_AIU>; -}; - -&aobus { - pinctrl_aobus: pinctrl@14 { - compatible = "amlogic,meson-gxbb-aobus-pinctrl"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - gpio_ao: bank@14 { - reg = <0x0 0x00014 0x0 0x8>, - <0x0 0x0002c 0x0 0x4>, - <0x0 0x00024 0x0 0x8>; - reg-names = "mux", "pull", "gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pinctrl_aobus 0 0 14>; - }; - - uart_ao_a_pins: uart_ao_a { - mux { - groups = "uart_tx_ao_a", "uart_rx_ao_a"; - function = "uart_ao"; - bias-disable; - }; - }; - - uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts { - mux { - groups = "uart_cts_ao_a", - "uart_rts_ao_a"; - function = "uart_ao"; - bias-disable; - }; - }; - - uart_ao_b_pins: uart_ao_b { - mux { - groups = "uart_tx_ao_b", "uart_rx_ao_b"; - function = "uart_ao_b"; - bias-disable; - }; - }; - - uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts { - mux { - groups = "uart_cts_ao_b", - "uart_rts_ao_b"; - function = "uart_ao_b"; - bias-disable; - }; - }; - - remote_input_ao_pins: remote_input_ao { - mux { - groups = "remote_input_ao"; - function = "remote_input_ao"; - bias-disable; - }; - }; - - i2c_ao_pins: i2c_ao { - mux { - groups = "i2c_sck_ao", - "i2c_sda_ao"; - function = "i2c_ao"; - bias-disable; - }; - }; - - pwm_ao_a_3_pins: pwm_ao_a_3 { - mux { - groups = "pwm_ao_a_3"; - function = "pwm_ao_a_3"; - bias-disable; - }; - }; - - pwm_ao_a_6_pins: pwm_ao_a_6 { - mux { - groups = "pwm_ao_a_6"; - function = "pwm_ao_a_6"; - bias-disable; - }; - }; - - pwm_ao_a_12_pins: pwm_ao_a_12 { - mux { - groups = "pwm_ao_a_12"; - function = "pwm_ao_a_12"; - bias-disable; - }; - }; - - pwm_ao_b_pins: pwm_ao_b { - mux { - groups = "pwm_ao_b"; - function = "pwm_ao_b"; - bias-disable; - }; - }; - - i2s_am_clk_pins: i2s_am_clk { - mux { - groups = "i2s_am_clk"; - function = "i2s_out_ao"; - bias-disable; - }; - }; - - i2s_out_ao_clk_pins: i2s_out_ao_clk { - mux { - groups = "i2s_out_ao_clk"; - function = "i2s_out_ao"; - bias-disable; - }; - }; - - i2s_out_lr_clk_pins: i2s_out_lr_clk { - mux { - groups = "i2s_out_lr_clk"; - function = "i2s_out_ao"; - bias-disable; - }; - }; - - i2s_out_ch01_ao_pins: i2s_out_ch01_ao { - mux { - groups = "i2s_out_ch01_ao"; - function = "i2s_out_ao"; - bias-disable; - }; - }; - - i2s_out_ch23_ao_pins: i2s_out_ch23_ao { - mux { - groups = "i2s_out_ch23_ao"; - function = "i2s_out_ao"; - bias-disable; - }; - }; - - i2s_out_ch45_ao_pins: i2s_out_ch45_ao { - mux { - groups = "i2s_out_ch45_ao"; - function = "i2s_out_ao"; - bias-disable; - }; - }; - - spdif_out_ao_6_pins: spdif_out_ao_6 { - mux { - groups = "spdif_out_ao_6"; - function = "spdif_out_ao"; - }; - }; - - spdif_out_ao_13_pins: spdif_out_ao_13 { - mux { - groups = "spdif_out_ao_13"; - function = "spdif_out_ao"; - bias-disable; - }; - }; - - ao_cec_pins: ao_cec { - mux { - groups = "ao_cec"; - function = "cec_ao"; - bias-disable; - }; - }; - - ee_cec_pins: ee_cec { - mux { - groups = "ee_cec"; - function = "cec_ao"; - bias-disable; - }; - }; - }; -}; - -&cbus { - spifc: spi@8c80 { - compatible = "amlogic,meson-gxbb-spifc"; - reg = <0x0 0x08c80 0x0 0x80>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&clkc CLKID_SPI>; - status = "disabled"; - }; -}; - -&cec_AO { - clocks = <&clkc_AO CLKID_AO_CEC_32K>; - clock-names = "core"; -}; - -&clkc_AO { - compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc"; - clocks = <&xtal>, <&clkc CLKID_CLK81>; - clock-names = "xtal", "mpeg-clk"; -}; - -&efuse { - clocks = <&clkc CLKID_EFUSE>; -}; - -ðmac { - clocks = <&clkc CLKID_ETH>, - <&clkc CLKID_FCLK_DIV2>, - <&clkc CLKID_MPLL2>, - <&clkc CLKID_FCLK_DIV2>; - clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment"; -}; - -&gpio_intc { - compatible = "amlogic,meson-gpio-intc", - "amlogic,meson-gxbb-gpio-intc"; - status = "okay"; -}; - -&hdmi_tx { - compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi"; - resets = <&reset RESET_HDMITX_CAPB3>, - <&reset RESET_HDMI_SYSTEM_RESET>, - <&reset RESET_HDMI_TX>; - reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; - clocks = <&clkc CLKID_HDMI_PCLK>, - <&clkc CLKID_CLK81>, - <&clkc CLKID_GCLK_VENCI_INT0>; - clock-names = "isfr", "iahb", "venci"; -}; - -&sysctrl { - clkc: clock-controller { - compatible = "amlogic,gxbb-clkc"; - #clock-cells = <1>; - clocks = <&xtal>; - clock-names = "xtal"; - }; -}; - -&hwrng { - clocks = <&clkc CLKID_RNG0>; - clock-names = "core"; -}; - -&i2c_A { - clocks = <&clkc CLKID_I2C>; -}; - -&i2c_AO { - clocks = <&clkc CLKID_AO_I2C>; -}; - -&i2c_B { - clocks = <&clkc CLKID_I2C>; -}; - -&i2c_C { - clocks = <&clkc CLKID_I2C>; -}; - -&mali { - compatible = "amlogic,meson-gxbb-mali", "arm,mali-450"; - - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; - clock-names = "bus", "core"; - - assigned-clocks = <&clkc CLKID_GP0_PLL>; - assigned-clock-rates = <744000000>; -}; - -&periphs { - pinctrl_periphs: pinctrl@4b0 { - compatible = "amlogic,meson-gxbb-periphs-pinctrl"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - gpio: bank@4b0 { - reg = <0x0 0x004b0 0x0 0x28>, - <0x0 0x004e8 0x0 0x14>, - <0x0 0x00520 0x0 0x14>, - <0x0 0x00430 0x0 0x40>; - reg-names = "mux", "pull", "pull-enable", "gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pinctrl_periphs 0 0 119>; - }; - - emmc_pins: emmc { - mux-0 { - groups = "emmc_nand_d07", - "emmc_cmd"; - function = "emmc"; - bias-pull-up; - }; - - mux-1 { - groups = "emmc_clk"; - function = "emmc"; - bias-disable; - }; - }; - - emmc_ds_pins: emmc-ds { - mux { - groups = "emmc_ds"; - function = "emmc"; - bias-pull-down; - }; - }; - - emmc_clk_gate_pins: emmc_clk_gate { - mux { - groups = "BOOT_8"; - function = "gpio_periphs"; - bias-pull-down; - }; - }; - - nor_pins: nor { - mux { - groups = "nor_d", - "nor_q", - "nor_c", - "nor_cs"; - function = "nor"; - bias-disable; - }; - }; - - spi_pins: spi-pins { - mux { - groups = "spi_miso", - "spi_mosi", - "spi_sclk"; - function = "spi"; - bias-disable; - }; - }; - - spi_ss0_pins: spi-ss0 { - mux { - groups = "spi_ss0"; - function = "spi"; - bias-disable; - }; - }; - - sdcard_pins: sdcard { - mux-0 { - groups = "sdcard_d0", - "sdcard_d1", - "sdcard_d2", - "sdcard_d3", - "sdcard_cmd"; - function = "sdcard"; - bias-pull-up; - }; - - mux-1 { - groups = "sdcard_clk"; - function = "sdcard"; - bias-disable; - }; - }; - - sdcard_clk_gate_pins: sdcard_clk_gate { - mux { - groups = "CARD_2"; - function = "gpio_periphs"; - bias-pull-down; - }; - }; - - sdio_pins: sdio { - mux-0 { - groups = "sdio_d0", - "sdio_d1", - "sdio_d2", - "sdio_d3", - "sdio_cmd"; - function = "sdio"; - bias-pull-up; - }; - - mux-1 { - groups = "sdio_clk"; - function = "sdio"; - bias-disable; - }; - }; - - sdio_clk_gate_pins: sdio_clk_gate { - mux { - groups = "GPIOX_4"; - function = "gpio_periphs"; - bias-pull-down; - }; - }; - - sdio_irq_pins: sdio_irq { - mux { - groups = "sdio_irq"; - function = "sdio"; - bias-disable; - }; - }; - - uart_a_pins: uart_a { - mux { - groups = "uart_tx_a", - "uart_rx_a"; - function = "uart_a"; - bias-disable; - }; - }; - - uart_a_cts_rts_pins: uart_a_cts_rts { - mux { - groups = "uart_cts_a", - "uart_rts_a"; - function = "uart_a"; - bias-disable; - }; - }; - - uart_b_pins: uart_b { - mux { - groups = "uart_tx_b", - "uart_rx_b"; - function = "uart_b"; - bias-disable; - }; - }; - - uart_b_cts_rts_pins: uart_b_cts_rts { - mux { - groups = "uart_cts_b", - "uart_rts_b"; - function = "uart_b"; - bias-disable; - }; - }; - - uart_c_pins: uart_c { - mux { - groups = "uart_tx_c", - "uart_rx_c"; - function = "uart_c"; - bias-disable; - }; - }; - - uart_c_cts_rts_pins: uart_c_cts_rts { - mux { - groups = "uart_cts_c", - "uart_rts_c"; - function = "uart_c"; - bias-disable; - }; - }; - - i2c_a_pins: i2c_a { - mux { - groups = "i2c_sck_a", - "i2c_sda_a"; - function = "i2c_a"; - bias-disable; - }; - }; - - i2c_b_pins: i2c_b { - mux { - groups = "i2c_sck_b", - "i2c_sda_b"; - function = "i2c_b"; - bias-disable; - }; - }; - - i2c_c_pins: i2c_c { - mux { - groups = "i2c_sck_c", - "i2c_sda_c"; - function = "i2c_c"; - bias-disable; - }; - }; - - eth_rgmii_pins: eth-rgmii { - mux { - groups = "eth_mdio", - "eth_mdc", - "eth_clk_rx_clk", - "eth_rx_dv", - "eth_rxd0", - "eth_rxd1", - "eth_rxd2", - "eth_rxd3", - "eth_rgmii_tx_clk", - "eth_tx_en", - "eth_txd0", - "eth_txd1", - "eth_txd2", - "eth_txd3"; - function = "eth"; - bias-disable; - }; - }; - - eth_rmii_pins: eth-rmii { - mux { - groups = "eth_mdio", - "eth_mdc", - "eth_clk_rx_clk", - "eth_rx_dv", - "eth_rxd0", - "eth_rxd1", - "eth_tx_en", - "eth_txd0", - "eth_txd1"; - function = "eth"; - bias-disable; - }; - }; - - pwm_a_x_pins: pwm_a_x { - mux { - groups = "pwm_a_x"; - function = "pwm_a_x"; - bias-disable; - }; - }; - - pwm_a_y_pins: pwm_a_y { - mux { - groups = "pwm_a_y"; - function = "pwm_a_y"; - bias-disable; - }; - }; - - pwm_b_pins: pwm_b { - mux { - groups = "pwm_b"; - function = "pwm_b"; - bias-disable; - }; - }; - - pwm_d_pins: pwm_d { - mux { - groups = "pwm_d"; - function = "pwm_d"; - bias-disable; - }; - }; - - pwm_e_pins: pwm_e { - mux { - groups = "pwm_e"; - function = "pwm_e"; - bias-disable; - }; - }; - - pwm_f_x_pins: pwm_f_x { - mux { - groups = "pwm_f_x"; - function = "pwm_f_x"; - bias-disable; - }; - }; - - pwm_f_y_pins: pwm_f_y { - mux { - groups = "pwm_f_y"; - function = "pwm_f_y"; - bias-disable; - }; - }; - - hdmi_hpd_pins: hdmi_hpd { - mux { - groups = "hdmi_hpd"; - function = "hdmi_hpd"; - bias-disable; - }; - }; - - hdmi_i2c_pins: hdmi_i2c { - mux { - groups = "hdmi_sda", "hdmi_scl"; - function = "hdmi_i2c"; - bias-disable; - }; - }; - - i2sout_ch23_y_pins: i2sout_ch23_y { - mux { - groups = "i2sout_ch23_y"; - function = "i2s_out"; - bias-disable; - }; - }; - - i2sout_ch45_y_pins: i2sout_ch45_y { - mux { - groups = "i2sout_ch45_y"; - function = "i2s_out"; - bias-disable; - }; - }; - - i2sout_ch67_y_pins: i2sout_ch67_y { - mux { - groups = "i2sout_ch67_y"; - function = "i2s_out"; - bias-disable; - }; - }; - - spdif_out_y_pins: spdif_out_y { - mux { - groups = "spdif_out_y"; - function = "spdif_out"; - bias-disable; - }; - }; - }; -}; - -&pwrc { - resets = <&reset RESET_VIU>, - <&reset RESET_VENC>, - <&reset RESET_VCBUS>, - <&reset RESET_BT656>, - <&reset RESET_DVIN_RESET>, - <&reset RESET_RDMA>, - <&reset RESET_VENCI>, - <&reset RESET_VENCP>, - <&reset RESET_VDAC>, - <&reset RESET_VDI6>, - <&reset RESET_VENCL>, - <&reset RESET_VID_LOCK>; - reset-names = "viu", "venc", "vcbus", "bt656", - "dvin", "rdma", "venci", "vencp", - "vdac", "vdi6", "vencl", "vid_lock"; - clocks = <&clkc CLKID_VPU>, - <&clkc CLKID_VAPB>; - clock-names = "vpu", "vapb"; - /* - * VPU clocking is provided by two identical clock paths - * VPU_0 and VPU_1 muxed to a single clock by a glitch - * free mux to safely change frequency while running. - * Same for VAPB but with a final gate after the glitch free mux. - */ - assigned-clocks = <&clkc CLKID_VPU_0_SEL>, - <&clkc CLKID_VPU_0>, - <&clkc CLKID_VPU>, /* Glitch free mux */ - <&clkc CLKID_VAPB_0_SEL>, - <&clkc CLKID_VAPB_0>, - <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */ - assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, - <0>, /* Do Nothing */ - <&clkc CLKID_VPU_0>, - <&clkc CLKID_FCLK_DIV4>, - <0>, /* Do Nothing */ - <&clkc CLKID_VAPB_0>; - assigned-clock-rates = <0>, /* Do Nothing */ - <666666666>, - <0>, /* Do Nothing */ - <0>, /* Do Nothing */ - <250000000>, - <0>; /* Do Nothing */ -}; - -&saradc { - compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc"; - clocks = <&xtal>, - <&clkc CLKID_SAR_ADC>, - <&clkc CLKID_SAR_ADC_CLK>, - <&clkc CLKID_SAR_ADC_SEL>; - clock-names = "clkin", "core", "adc_clk", "adc_sel"; -}; - -&sd_emmc_a { - clocks = <&clkc CLKID_SD_EMMC_A>, - <&clkc CLKID_SD_EMMC_A_CLK0>, - <&clkc CLKID_FCLK_DIV2>; - clock-names = "core", "clkin0", "clkin1"; - resets = <&reset RESET_SD_EMMC_A>; -}; - -&sd_emmc_b { - clocks = <&clkc CLKID_SD_EMMC_B>, - <&clkc CLKID_SD_EMMC_B_CLK0>, - <&clkc CLKID_FCLK_DIV2>; - clock-names = "core", "clkin0", "clkin1"; - resets = <&reset RESET_SD_EMMC_B>; -}; - -&sd_emmc_c { - clocks = <&clkc CLKID_SD_EMMC_C>, - <&clkc CLKID_SD_EMMC_C_CLK0>, - <&clkc CLKID_FCLK_DIV2>; - clock-names = "core", "clkin0", "clkin1"; - resets = <&reset RESET_SD_EMMC_C>; -}; - -&simplefb_hdmi { - clocks = <&clkc CLKID_HDMI_PCLK>, - <&clkc CLKID_CLK81>, - <&clkc CLKID_GCLK_VENCI_INT0>; -}; - -&spicc { - clocks = <&clkc CLKID_SPICC>; - clock-names = "core"; - resets = <&reset RESET_PERIPHS_SPICC>; - num-cs = <1>; -}; - -&spifc { - clocks = <&clkc CLKID_SPI>; -}; - -&uart_A { - clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; - clock-names = "xtal", "pclk", "baud"; -}; - -&uart_AO { - clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>; - clock-names = "xtal", "pclk", "baud"; -}; - -&uart_AO_B { - clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; - clock-names = "xtal", "pclk", "baud"; -}; - -&uart_B { - clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>; - clock-names = "xtal", "pclk", "baud"; -}; - -&uart_C { - clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>; - clock-names = "xtal", "pclk", "baud"; -}; - -&vpu { - compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; - power-domains = <&pwrc PWRC_GXBB_VPU_ID>; -}; - -&vdec { - compatible = "amlogic,gxbb-vdec", "amlogic,gx-vdec"; - clocks = <&clkc CLKID_DOS_PARSER>, - <&clkc CLKID_DOS>, - <&clkc CLKID_VDEC_1>, - <&clkc CLKID_VDEC_HEVC>; - clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc"; - resets = <&reset RESET_PARSER>; - reset-names = "esparser"; -};