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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/sysemu/cpu-timers.h | 10 ++++++++-- accel/tcg/icount-common.c | 16 +++++++++------- stubs/icount.c | 4 +++- system/vl.c | 3 +-- 4 files changed, 21 insertions(+), 12 deletions(-) diff --git a/include/sysemu/cpu-timers.h b/include/sysemu/cpu-timers.h index 2e786fe7fb..b70dc7692d 100644 --- a/include/sysemu/cpu-timers.h +++ b/include/sysemu/cpu-timers.h @@ -50,8 +50,14 @@ int64_t icount_get(void); */ int64_t icount_to_ns(int64_t icount); -/* configure the icount options, including "shift" */ -void icount_configure(QemuOpts *opts, Error **errp); +/** + * icount_configure: configure the icount options, including "shift" + * @opts: Options to parse + * @errp: pointer to a NULL-initialized error object + * + * Return: true on success, else false setting @errp with error + */ +bool icount_configure(QemuOpts *opts, Error **errp); /* used by tcg vcpu thread to calc icount budget */ int64_t icount_round(int64_t count); diff --git a/accel/tcg/icount-common.c b/accel/tcg/icount-common.c index ec57192be8..dc69d6a4c6 100644 --- a/accel/tcg/icount-common.c +++ b/accel/tcg/icount-common.c @@ -419,7 +419,7 @@ void icount_account_warp_timer(void) icount_warp_rt(); } -void icount_configure(QemuOpts *opts, Error **errp) +bool icount_configure(QemuOpts *opts, Error **errp) { const char *option = qemu_opt_get(opts, "shift"); bool sleep = qemu_opt_get_bool(opts, "sleep", true); @@ -429,27 +429,28 @@ void icount_configure(QemuOpts *opts, Error **errp) if (!option) { if (qemu_opt_get(opts, "align") != NULL) { error_setg(errp, "Please specify shift option when using align"); + return false; } - return; + return true; } if (align && !sleep) { error_setg(errp, "align=on and sleep=off are incompatible"); - return; + return false; } if (strcmp(option, "auto") != 0) { if (qemu_strtol(option, NULL, 0, &time_shift) < 0 || time_shift < 0 || time_shift > MAX_ICOUNT_SHIFT) { error_setg(errp, "icount: Invalid shift value"); - return; + return false; } } else if (icount_align_option) { error_setg(errp, "shift=auto and align=on are incompatible"); - return; + return false; } else if (!icount_sleep) { error_setg(errp, "shift=auto and sleep=off are incompatible"); - return; + return false; } icount_sleep = sleep; @@ -463,7 +464,7 @@ void icount_configure(QemuOpts *opts, Error **errp) if (time_shift >= 0) { timers_state.icount_time_shift = time_shift; icount_enable_precise(); - return; + return true; } icount_enable_adaptive(); @@ -491,6 +492,7 @@ void icount_configure(QemuOpts *opts, Error **errp) timer_mod(timers_state.icount_vm_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + NANOSECONDS_PER_SECOND / 10); + return true; } void icount_notify_exit(void) diff --git a/stubs/icount.c b/stubs/icount.c index 6df8c2bf7d..85c381a0ea 100644 --- a/stubs/icount.c +++ b/stubs/icount.c @@ -10,10 +10,12 @@ void icount_update(CPUState *cpu) { abort(); } -void icount_configure(QemuOpts *opts, Error **errp) +bool icount_configure(QemuOpts *opts, Error **errp) { /* signal error */ error_setg(errp, "cannot configure icount, TCG support not available"); + + return false; } int64_t icount_get_raw(void) { diff --git a/system/vl.c b/system/vl.c index 2bcd9efb9a..17234012d4 100644 --- a/system/vl.c +++ b/system/vl.c @@ -2270,8 +2270,7 @@ static void user_register_global_props(void) static int do_configure_icount(void *opaque, QemuOpts *opts, Error **errp) { - icount_configure(opts, errp); - return 0; + return !icount_configure(opts, errp); } static int accelerator_set_property(void *opaque, From patchwork Fri Dec 8 11:35:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 751610 Delivered-To: patch@linaro.org Received: by 2002:adf:a499:0:b0:333:3a04:f257 with SMTP id g25csp941327wrb; Fri, 8 Dec 2023 03:36:38 -0800 (PST) X-Google-Smtp-Source: AGHT+IGMnAMNkm8D5Prf08pNm0fWPBbfsY7UfVnB9p2ReLl/T9vVI/xTYn9JR1fw9oJ6b2wuDGFY X-Received: by 2002:ad4:530c:0:b0:67a:a721:784a with SMTP id y12-20020ad4530c000000b0067aa721784amr4044958qvr.111.1702035398034; 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[209.51.188.17]) by mx.google.com with ESMTPS id y11-20020ad445ab000000b0067a919a2a18si1958776qvu.560.2023.12.08.03.36.37 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 08 Dec 2023 03:36:38 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zlmfIsMM; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rBZ9B-000427-He; Fri, 08 Dec 2023 06:35:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rBZ98-0003xi-TF for qemu-devel@nongnu.org; Fri, 08 Dec 2023 06:35:56 -0500 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rBZ8z-0003ev-K9 for qemu-devel@nongnu.org; Fri, 08 Dec 2023 06:35:54 -0500 Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-332fd78fa9dso1811329f8f.3 for ; Fri, 08 Dec 2023 03:35:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702035344; x=1702640144; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=s3HTu7y4p69f2n52cu7XGIz5WrQJeOViDCPX2rbiUwY=; b=zlmfIsMMeXmmS8TZ5O+7xDFNSB4/0E7NKbYmLQ6umARlB2QHplo+fSsjngYPgE9whh zM3j9YQcVdMc/Ojwiyyw6zbCOdKkjBaMY49jfT0BJsPZJsBQ69sR/+vofi1+4OP8GViI +AX2ZEHVlQL2j2lCwwnNVCxKRMtjXr3fXCQj+tZ5gtNRfcD++KWXt4AIyP7LcPU81Q71 Hdx42tFQbNPJWCHYp1ovOD8rCh3e00BSizXBD+kLAs/4wEAHatIpirbcbv1JxI+/PSVU MLHY1PnkgzMMcICnT0b+KAaSdcbrEOuUvRcupYHS/W/CBIk7HvzpPHjAuzqtgDY78JF3 LQrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702035344; x=1702640144; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=s3HTu7y4p69f2n52cu7XGIz5WrQJeOViDCPX2rbiUwY=; b=TgcLShghgKt3TEQHMkPkNoRw62A9ypmeIFSnKKsg8yRcKb/v/v1l/K4lhSTQFvzsFV 23MPcLgYiYCfE7OWoGkdfMJCLiSh/bOFG2utTH6XB6zSQms09jbF9c/vfn6RPy0LqiRV KuuLEnLk9tBdClfiVqoXQ8xCcUNTf2sZyyCAcSWMpLq2nu8SJ9p8IMBvdOdGh8Rj3x3M mWbveDOVZgX57an2nimy+YR5oLynWv85EB1dLIWDMs6HSmS54imYo/D2+TiGjqmhS/Hj eE2Rh+GLilQXDHNFGAr9CinM85heMf8/RNLGnstQfICf7QsUUXK+5MLTG2LT19OVzxSq hLuw== X-Gm-Message-State: AOJu0Yx5D/sN9v7XMERykQfIg5ViNIrd5oZDFofd9vk1rM5OEOGz1rI+ CG1yFdtmC8FvNPjwTqRp4ROonYv5InAw69SEO1Y= X-Received: by 2002:a5d:4e8e:0:b0:333:3117:c475 with SMTP id e14-20020a5d4e8e000000b003333117c475mr1155627wru.262.1702035343902; Fri, 08 Dec 2023 03:35:43 -0800 (PST) Received: from m1x-phil.lan ([176.176.146.181]) by smtp.gmail.com with ESMTPSA id c15-20020adfe74f000000b0033335644478sm1822835wrn.114.2023.12.08.03.35.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 08 Dec 2023 03:35:43 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Stefan Hajnoczi , Peter Maydell , qemu-block@nongnu.org, Pavel Dovgalyuk , Fam Zheng , Richard Henderson , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 2/6] system/vl: Evaluate icount after accelerator options are parsed Date: Fri, 8 Dec 2023 12:35:24 +0100 Message-ID: <20231208113529.74067-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231208113529.74067-1-philmd@linaro.org> References: <20231208113529.74067-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We need to parse the accelerators first, to be able to check whether TCG is enabled or not. Then we can parse the -icount option. This allows removing the icount_configure() stub. Fixes: 7f8b6126e7 ("vl: move icount configuration earlier") Reported-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- stubs/icount.c | 8 -------- system/vl.c | 16 +++++++++------- 2 files changed, 9 insertions(+), 15 deletions(-) diff --git a/stubs/icount.c b/stubs/icount.c index 85c381a0ea..014ae5d8e4 100644 --- a/stubs/icount.c +++ b/stubs/icount.c @@ -1,5 +1,4 @@ #include "qemu/osdep.h" -#include "qapi/error.h" #include "sysemu/cpu-timers.h" /* icount - Instruction Counter API */ @@ -10,13 +9,6 @@ void icount_update(CPUState *cpu) { abort(); } -bool icount_configure(QemuOpts *opts, Error **errp) -{ - /* signal error */ - error_setg(errp, "cannot configure icount, TCG support not available"); - - return false; -} int64_t icount_get_raw(void) { abort(); diff --git a/system/vl.c b/system/vl.c index 17234012d4..af809331bb 100644 --- a/system/vl.c +++ b/system/vl.c @@ -2270,6 +2270,13 @@ static void user_register_global_props(void) static int do_configure_icount(void *opaque, QemuOpts *opts, Error **errp) { + if (!tcg_enabled()) { + error_setg(errp, "cannot configure icount, TCG support not available"); + error_append_hint(errp, "-icount is not allowed with" + " hardware virtualization\n"); + return 1; + } + return !icount_configure(opts, errp); } @@ -2339,9 +2346,6 @@ static void configure_accelerators(const char *progname) { bool init_failed = false; - qemu_opts_foreach(qemu_find_opts("icount"), - do_configure_icount, NULL, &error_fatal); - if (QTAILQ_EMPTY(&qemu_accel_opts.head)) { char **accel_list, **tmp; @@ -2401,10 +2405,8 @@ static void configure_accelerators(const char *progname) error_report("falling back to %s", current_accel_name()); } - if (icount_enabled() && !tcg_enabled()) { - error_report("-icount is not allowed with hardware virtualization"); - exit(1); - } + qemu_opts_foreach(qemu_find_opts("icount"), + do_configure_icount, NULL, &error_fatal); } static void qemu_validate_options(const QDict *machine_opts) From patchwork Fri Dec 8 11:35:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 751614 Delivered-To: patch@linaro.org Received: by 2002:adf:a499:0:b0:333:3a04:f257 with SMTP id g25csp941804wrb; Fri, 8 Dec 2023 03:38:09 -0800 (PST) X-Google-Smtp-Source: AGHT+IFsQcXfkVPJvfh/li2NpR1rrhsBMTSw/Z52MqvexrgydDWlgEX5MJBixz242ysGZnDmCR8x X-Received: by 2002:a05:620a:668f:b0:77d:97e9:3550 with SMTP id qh15-20020a05620a668f00b0077d97e93550mr2445903qkn.55.1702035488722; Fri, 08 Dec 2023 03:38:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702035488; cv=none; d=google.com; s=arc-20160816; b=Lf0ZCR6wS2idpDiOpPf0xZsXpSta8Vwq2iNWkpu4SDuLUyoSH3936wHu+0r0jkbzAd +8zzlTuq/AeVxHwICTpEn9PedWOLDcF5sxWbiBLCAmQ/xk3tL3cIZ3ewH48glUIynkEM EXxKwKfzfKrHr5HI817lYp86uJ3+7yxsvNBO9gQQXoDbxRqxAh6IDT/lFwpk4k/DeM24 u/IXj+SC9hOG+bHqC5esJHrhb3uySTpQFP2xegL9Q2s0L4sHLWlflDHEm7exDVaQwEGy MP0OK6W+Gz5XOCmx2X1Xd1/g8lQpecjegaTtxvvgnA6waDCKDLd8KG7xfW29iScFLoHy wNoA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=uzEnAxgAgPgAskKIL5lE29mKmqmzfiARuWbhtCikfuI=; fh=QdevGGL2LydCvB/btUcdJnXEA7h6h6ICE8REXL8PVZU=; b=BtHl8KjR7/edhTUCPvl3ssmSK+IpOKsrYM/E7ITx/aYEzSLH9GQm2YDDAp+M4CLc8K i3lA/sRPP+DBxblDBbd0/pHjauHo/B/ki52ljAH3NruW6c/HgT7Q9PuLCbt6uvRmZBml LPWKeMVicxq9LORIK62iGCzYJKq1FXPMAEZFN76kFUrL2E4luW5UMvNl6ouoNZva+l0P ii/PEQ9rBm8eP/j9P1NXsDTAaiXpTMhjDMD1Mh4wDNhqJDIB9kxdPh2zelb/JZY9ubRT YHP8OCjP5lHqHI8ntqUtiriaxPVZyhA+8kskkzSm5k1pF+zTg6j5j3o898/YCE6f+5Ul x7lQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FKIVQFC8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/sysemu/cpu-timers.h | 20 +++++++++++++------- accel/tcg/icount-common.c | 16 +++++++--------- stubs/icount.c | 2 +- system/cpu-timers.c | 2 +- target/arm/helper.c | 3 ++- 5 files changed, 24 insertions(+), 19 deletions(-) diff --git a/include/sysemu/cpu-timers.h b/include/sysemu/cpu-timers.h index b70dc7692d..3f05f29b10 100644 --- a/include/sysemu/cpu-timers.h +++ b/include/sysemu/cpu-timers.h @@ -17,18 +17,24 @@ void cpu_timers_init(void); /* icount - Instruction Counter API */ -/* - * icount enablement state: +/** + * ICountMode: icount enablement state: * - * 0 = Disabled - Do not count executed instructions. - * 1 = Enabled - Fixed conversion of insn to ns via "shift" option - * 2 = Enabled - Runtime adaptive algorithm to compute shift + * @ICOUNT_DISABLED: Disabled - Do not count executed instructions. + * @ICOUNT_PRECISE: Enabled - Fixed conversion of insn to ns via "shift" option + * @ICOUNT_ADAPTATIVE: Enabled - Runtime adaptive algorithm to compute shift */ +typedef enum { + ICOUNT_DISABLED = 0, + ICOUNT_PRECISE, + ICOUNT_ADAPTATIVE, +} ICountMode; + #ifdef CONFIG_TCG -extern int use_icount; +extern ICountMode use_icount; #define icount_enabled() (use_icount) #else -#define icount_enabled() 0 +#define icount_enabled() ICOUNT_DISABLED #endif /* diff --git a/accel/tcg/icount-common.c b/accel/tcg/icount-common.c index dc69d6a4c6..f0f8fc7f1c 100644 --- a/accel/tcg/icount-common.c +++ b/accel/tcg/icount-common.c @@ -49,21 +49,19 @@ static bool icount_sleep = true; /* Arbitrarily pick 1MIPS as the minimum allowable speed. */ #define MAX_ICOUNT_SHIFT 10 -/* - * 0 = Do not count executed instructions. - * 1 = Fixed conversion of insn to ns via "shift" option - * 2 = Runtime adaptive algorithm to compute shift - */ -int use_icount; +/* Do not count executed instructions */ +ICountMode use_icount = ICOUNT_DISABLED; static void icount_enable_precise(void) { - use_icount = 1; + /* Fixed conversion of insn to ns via "shift" option */ + use_icount = ICOUNT_PRECISE; } static void icount_enable_adaptive(void) { - use_icount = 2; + /* Runtime adaptive algorithm to compute shift */ + use_icount = ICOUNT_ADAPTATIVE; } /* @@ -256,7 +254,7 @@ static void icount_warp_rt(void) int64_t warp_delta; warp_delta = clock - timers_state.vm_clock_warp_start; - if (icount_enabled() == 2) { + if (icount_enabled() == ICOUNT_ADAPTATIVE) { /* * In adaptive mode, do not let QEMU_CLOCK_VIRTUAL run too far * ahead of real time (it might already be ahead so careful not diff --git a/stubs/icount.c b/stubs/icount.c index 014ae5d8e4..7055c13725 100644 --- a/stubs/icount.c +++ b/stubs/icount.c @@ -3,7 +3,7 @@ /* icount - Instruction Counter API */ -int use_icount; +ICountMode use_icount = ICOUNT_DISABLED; void icount_update(CPUState *cpu) { diff --git a/system/cpu-timers.c b/system/cpu-timers.c index 7452d97b67..6befb82e48 100644 --- a/system/cpu-timers.c +++ b/system/cpu-timers.c @@ -154,7 +154,7 @@ static bool adjust_timers_state_needed(void *opaque) static bool icount_shift_state_needed(void *opaque) { - return icount_enabled() == 2; + return icount_enabled() == ICOUNT_ADAPTATIVE; } /* diff --git a/target/arm/helper.c b/target/arm/helper.c index 2746d3fdac..adb0960bba 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -934,7 +934,8 @@ static int64_t cycles_ns_per(uint64_t cycles) static bool instructions_supported(CPUARMState *env) { - return icount_enabled() == 1; /* Precise instruction counting */ + /* Precise instruction counting */ + return icount_enabled() == ICOUNT_PRECISE; } static uint64_t instructions_get_count(CPUARMState *env) From patchwork Fri Dec 8 11:35:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 751615 Delivered-To: patch@linaro.org Received: by 2002:adf:a499:0:b0:333:3a04:f257 with SMTP id g25csp941835wrb; Fri, 8 Dec 2023 03:38:14 -0800 (PST) X-Google-Smtp-Source: AGHT+IFAK1y/QPoi27X+/a/X5/yZETvNrc+drHOOrVBwZojIZ03IaOSdB7hmATmWsSBlSpnv30qM X-Received: by 2002:a05:622a:1210:b0:425:889a:c2df with SMTP id y16-20020a05622a121000b00425889ac2dfmr3790933qtx.118.1702035493895; Fri, 08 Dec 2023 03:38:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702035493; cv=none; d=google.com; s=arc-20160816; b=MdPxtBJF/NzD/8bKKrqESUFWjstS8MkXk89xVnTn2lS/9as47cx3so5fOUGOUnX4UW bJky5/RnN7JYaNSwTAO6vIAiCxFGliXCnQCcgij3CsnUWVxEMrHMwN3XhhP5b4QW/Tv2 uO1IMMbxo4al8Qx+lv0QoEp0XHxM64+h+0tjjtjGJFZKxpup1qlyLD4WVKidz1VOrJei l4OP5j+5XDWVqQN/YF9hmjtCYVGgoyctdtHSM+jXOHqcf8Qft6RRE7uifl3wS/x6zHWk x/RFEUDoBb3gGDJsstHdc3JYIfO6yrlkN9bfNhmb+44nlaZD07r9LcHpApYgKxreizvn owBg== ARC-Message-Signature: i=1; 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For INST_RETIRED, the event is only registered and the bit enabled in the PMU Common Event Identification register when icount is enabled as ICOUNT_PRECISE. PMU events are TCG-only, hardware accelerators handle them directly. Unfortunately we register the events in non-TCG builds, leading to linking error such: ld: Undefined symbols: _icount_to_ns, referenced from: _instructions_ns_per in target_arm_helper.c.o clang: error: linker command failed with exit code 1 (use -v to see invocation) As a kludge, give a hint to the compiler by asserting the pm_event::get_count() and pm_event::ns_per_count() handler will only be called under this icount mode. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- As discussed in https://lore.kernel.org/qemu-devel/CAFEAcA-HVf8vWLzmdStEo2NrSKQdZV612rBjiaj-gLW4vXyvpA@mail.gmail.com/ better would be to restrict the PMU events to TCG, but this is out of the scope of this series. --- target/arm/helper.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index adb0960bba..333fd5f4bf 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -940,11 +940,13 @@ static bool instructions_supported(CPUARMState *env) static uint64_t instructions_get_count(CPUARMState *env) { + assert(icount_enabled() == ICOUNT_PRECISE); return (uint64_t)icount_get_raw(); } static int64_t instructions_ns_per(uint64_t icount) { + assert(icount_enabled() == ICOUNT_PRECISE); return icount_to_ns((int64_t)icount); } #endif From patchwork Fri Dec 8 11:35:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 751612 Delivered-To: patch@linaro.org Received: by 2002:adf:a499:0:b0:333:3a04:f257 with SMTP id g25csp941566wrb; Fri, 8 Dec 2023 03:37:27 -0800 (PST) X-Google-Smtp-Source: AGHT+IFeM0DDLEt0bhw4ohyLmWaHRa1PzexlK1SAUb+YVw6ZdUPC3Z7W86BGbaVo1ZPRgKvl+P3/ X-Received: by 2002:ac8:5b89:0:b0:417:95e7:a2f7 with SMTP id a9-20020ac85b89000000b0041795e7a2f7mr5736737qta.19.1702035447115; Fri, 08 Dec 2023 03:37:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702035447; cv=none; d=google.com; s=arc-20160816; b=Lt6nnIUMs/jeBvowGmcOCPEVAFgeyA2F+ftvYQ6Fyu+Si58mXSWTGMRdznQferQPms SSfdUZMqQM+YzBwEqvRK+YbregItgyh+B/Fz9pk21MEextUdqEXY3ZPkh2GExZBDJKAA 596Uf3VCigcfl7R4UBnB2aOfeYBgneJxSf4XcO2BETUNyiw0X3+hRRFR8mf0JagAV19u 2MyknqHSZPbNKVEuZQouX7sFQ5QJWHrT2MOGgS1qt7wy2FLWeIfcXY6rNlsf94E1j8iN IU3ebh6qh0notgDHcsP2JX3um3ilZpNnZfucCAFeKv/vaWfj98aJdI/b3e5x7qd8VY3U wz7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=VVurd634A6d7jfTmu56SsLNYdI1euektVunJFK5bAB4=; fh=QdevGGL2LydCvB/btUcdJnXEA7h6h6ICE8REXL8PVZU=; b=bh+hSHM1KOWFv1U+2dW2Ah8Zp3Umg6COo/LvV9X9MbEsspIwGO2Hr2uBHYKorg1jsf RU9eStGIFan9qsHzxwTPzUdYQmWk1DvovK54JPFFsmzsGVUGRkqcyT3OSNo4b/xPn/Pv egipX6bFxMC0kSmlC04XVroqZWVoX/y8Af1a4xbXGS+WxL3ya9GcQ1rbEwjB89/F/+Bj MP/l3TsnQsAzP+ZlThV6a05y/R/AA0JsSW7UAeES63ps+SqDH6LDzHVO70rYsV9suTLN ijeq6QvNB8KZCABsRU/A/lfLV1RAFx3dQDbWf7s6+nHgCs4fd3GQGOD3Zm3tL1WgbK2J YQdA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mETiaTtk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Fri, 08 Dec 2023 03:36:02 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Stefan Hajnoczi , Peter Maydell , qemu-block@nongnu.org, Pavel Dovgalyuk , Fam Zheng , Richard Henderson , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 5/6] util/async: Only call icount_notify_exit() if icount is enabled Date: Fri, 8 Dec 2023 12:35:27 +0100 Message-ID: <20231208113529.74067-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231208113529.74067-1-philmd@linaro.org> References: <20231208113529.74067-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- accel/tcg/icount-common.c | 4 +++- stubs/icount.c | 2 +- util/async.c | 16 +++++++++------- 3 files changed, 13 insertions(+), 9 deletions(-) diff --git a/accel/tcg/icount-common.c b/accel/tcg/icount-common.c index f0f8fc7f1c..a4a747d1dc 100644 --- a/accel/tcg/icount-common.c +++ b/accel/tcg/icount-common.c @@ -495,7 +495,9 @@ bool icount_configure(QemuOpts *opts, Error **errp) void icount_notify_exit(void) { - if (icount_enabled() && current_cpu) { + assert(icount_enabled()); + + if (current_cpu) { qemu_cpu_kick(current_cpu); qemu_clock_notify(QEMU_CLOCK_VIRTUAL); } diff --git a/stubs/icount.c b/stubs/icount.c index 7055c13725..b060b03a73 100644 --- a/stubs/icount.c +++ b/stubs/icount.c @@ -37,7 +37,7 @@ void icount_account_warp_timer(void) { abort(); } - void icount_notify_exit(void) { + abort(); } diff --git a/util/async.c b/util/async.c index 8f90ddc304..9007642c27 100644 --- a/util/async.c +++ b/util/async.c @@ -94,13 +94,15 @@ static void aio_bh_enqueue(QEMUBH *bh, unsigned new_flags) } aio_notify(ctx); - /* - * Workaround for record/replay. - * vCPU execution should be suspended when new BH is set. - * This is needed to avoid guest timeouts caused - * by the long cycles of the execution. - */ - icount_notify_exit(); + if (unlikely(icount_enabled())) { + /* + * Workaround for record/replay. + * vCPU execution should be suspended when new BH is set. + * This is needed to avoid guest timeouts caused + * by the long cycles of the execution. + */ + icount_notify_exit(); + } } /* Only called from aio_bh_poll() and aio_ctx_finalize() */ From patchwork Fri Dec 8 11:35:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 751611 Delivered-To: patch@linaro.org Received: by 2002:adf:a499:0:b0:333:3a04:f257 with SMTP id g25csp941510wrb; Fri, 8 Dec 2023 03:37:19 -0800 (PST) X-Google-Smtp-Source: AGHT+IH3UkCpqn1IujnukvR4NmyfuRXewpHn82O3/4Vpe4ORdQM4vi/cEqjHYSc4AVxpi+zT6gr9 X-Received: by 2002:ad4:55d2:0:b0:67a:ab22:73e4 with SMTP id bt18-20020ad455d2000000b0067aab2273e4mr3415090qvb.52.1702035438934; Fri, 08 Dec 2023 03:37:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702035438; cv=none; d=google.com; s=arc-20160816; b=LIwoWOz9sdwVtTho/S4GlwdBaj3UbfJegNAovQ6gZZogLvZSGL+kGTIzdlBwI+8pNg 0AsvRPyz5X6UiIghPxi2ZykytBUFvDgA6Juhj4CBBceiTLF6mebIL0BHlwau0hGEcpY6 5klrCMDVxL//aaoIy+xTsygh20CEH8rWRZwiq7gwNyP98/U+klPQ/tjxWqi7KB7JB4CL qtQi7STJl0iNKzSVqlu/BwbJAcPcZhVto558DoSddLxjjwik7zBT2nl8SxYORELgVdNE JLjqMD+8k+YLKUaI7crc/4qvUruNWY0tcj4Oj7WtgspPJZ/WK12mEESpiFYEeek7ai8X Mmog== ARC-Message-Signature: i=1; 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Fri, 08 Dec 2023 03:36:08 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Stefan Hajnoczi , Peter Maydell , qemu-block@nongnu.org, Pavel Dovgalyuk , Fam Zheng , Richard Henderson , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 6/6] sysemu/replay: Restrict icount to system emulation Date: Fri, 8 Dec 2023 12:35:28 +0100 Message-ID: <20231208113529.74067-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231208113529.74067-1-philmd@linaro.org> References: <20231208113529.74067-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/sysemu/cpu-timers.h | 2 +- include/sysemu/replay.h | 11 ++++++++--- stubs/icount.c | 19 ------------------- 3 files changed, 9 insertions(+), 23 deletions(-) diff --git a/include/sysemu/cpu-timers.h b/include/sysemu/cpu-timers.h index 3f05f29b10..d86738a378 100644 --- a/include/sysemu/cpu-timers.h +++ b/include/sysemu/cpu-timers.h @@ -30,7 +30,7 @@ typedef enum { ICOUNT_ADAPTATIVE, } ICountMode; -#ifdef CONFIG_TCG +#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) extern ICountMode use_icount; #define icount_enabled() (use_icount) #else diff --git a/include/sysemu/replay.h b/include/sysemu/replay.h index 08aae5869f..8102fa54f0 100644 --- a/include/sysemu/replay.h +++ b/include/sysemu/replay.h @@ -1,6 +1,3 @@ -#ifndef SYSEMU_REPLAY_H -#define SYSEMU_REPLAY_H - /* * QEMU replay (system interface) * @@ -11,6 +8,12 @@ * See the COPYING file in the top-level directory. * */ +#ifndef SYSEMU_REPLAY_H +#define SYSEMU_REPLAY_H + +#ifdef CONFIG_USER_ONLY +#error Cannot include this header from user emulation +#endif #include "exec/replay-core.h" #include "qapi/qapi-types-misc.h" @@ -79,12 +82,14 @@ int64_t replay_save_clock(ReplayClockKind kind, int64_t clock, int64_t replay_read_clock(ReplayClockKind kind, int64_t raw_icount); /*! Saves or reads the clock depending on the current replay mode. */ #define REPLAY_CLOCK(clock, value) \ + !icount_enabled() ? (value) : \ (replay_mode == REPLAY_MODE_PLAY \ ? replay_read_clock((clock), icount_get_raw()) \ : replay_mode == REPLAY_MODE_RECORD \ ? replay_save_clock((clock), (value), icount_get_raw()) \ : (value)) #define REPLAY_CLOCK_LOCKED(clock, value) \ + !icount_enabled() ? (value) : \ (replay_mode == REPLAY_MODE_PLAY \ ? replay_read_clock((clock), icount_get_raw_locked()) \ : replay_mode == REPLAY_MODE_RECORD \ diff --git a/stubs/icount.c b/stubs/icount.c index b060b03a73..9a29084ecc 100644 --- a/stubs/icount.c +++ b/stubs/icount.c @@ -5,30 +5,11 @@ ICountMode use_icount = ICOUNT_DISABLED; -void icount_update(CPUState *cpu) -{ - abort(); -} int64_t icount_get_raw(void) { abort(); return 0; } -int64_t icount_get(void) -{ - abort(); - return 0; -} -int64_t icount_to_ns(int64_t icount) -{ - abort(); - return 0; -} -int64_t icount_round(int64_t count) -{ - abort(); - return 0; -} void icount_start_warp_timer(void) { abort();