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[209.51.188.17]) by mx.google.com with ESMTPS id bt14-20020ac8690e000000b0042383d2deedsi36550qtb.614.2023.12.07.07.47.20 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 07 Dec 2023 07:47:20 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=w0RHE60I; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rBGZx-0000hg-Ty; Thu, 07 Dec 2023 10:46:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rBGZg-0000ew-U4 for qemu-devel@nongnu.org; Thu, 07 Dec 2023 10:46:08 -0500 Received: from mail-ed1-x52f.google.com ([2a00:1450:4864:20::52f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rBGZd-000290-IZ for qemu-devel@nongnu.org; Thu, 07 Dec 2023 10:46:04 -0500 Received: by mail-ed1-x52f.google.com with SMTP id 4fb4d7f45d1cf-54dccf89cfdso978018a12.0 for ; Thu, 07 Dec 2023 07:46:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1701963959; x=1702568759; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=GD2b69B4k+YDchTVBa/HFQBkt48CNiIjHc0JPprtaKQ=; b=w0RHE60IScxlQdqsLiw7R6unjeVl/ojfx7S8JR1Y/mCrBOEpsd4OM+Is8S5O/zP0Sy TccDQHlTch2Df7buvAi3K3klnWuA9xC869fG9AMCIx3EM08rDks/wGnqmrPSb1Ns760X 5ZNA0h10Z412AK/5kM0jZfHbRTpuwnVqrbcY2zdzqbR4GZ/qmsEHurRw0X7X3yLtiPx8 1/tENbX2VFVKwo8Hey7mIC+YMgWYM66Feow6AGiVXeTEL5Bx2N074/i52ZVqg2AG2+jU MkC3j1gMdGZmkFriHYAfhGq6NsITRLCIMNK8224Go9C3b58G7lrafYWbaKP0a89WA3Ai 4Lcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701963960; x=1702568760; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GD2b69B4k+YDchTVBa/HFQBkt48CNiIjHc0JPprtaKQ=; b=bO2R1uYI3tjPGiaGh5kMyxOxIuOjBtYAtEDln9gX6AshBWDwOpu8y29vOFhPz3slCE sBft/Lv00lpAvmsYiB1VjFLUjQy6H5NkovGkMFU3bbRpyw8D9sBWqsrztL+OwADLZObq MI7FDqs8YdjSdfj3trPB7rNeYLCp21Fruy1wItrU1QO8A5hjClIVq0DuwF8Smv5ZdCij 82LPyyXd787rp0bx0b5WDvuDFWhDUmd/hCPMDRXlLk6R3Oreo57/qppr8G84akmWegJ2 7ERZUY8l5YFne0moTrNf70BjucAlYMxGc983tKM5U3JBVyZSNbKPrb99srIP7OBEfvNq dYRw== X-Gm-Message-State: AOJu0Yy7+W9dTvD2E9oAPqzSOnyJlzhqymdQh0hg/HcA60oFjKSTI9vd CG4Ch9WJTWizXTfjrbDlhYiTd1Kd1nXli5FPYHw= X-Received: by 2002:a17:906:21a:b0:a1d:511c:5be6 with SMTP id 26-20020a170906021a00b00a1d511c5be6mr1786381ejd.76.1701963959621; Thu, 07 Dec 2023 07:45:59 -0800 (PST) Received: from m1x-phil.lan ([176.187.202.111]) by smtp.gmail.com with ESMTPSA id e3-20020a170906374300b00a1e2aa3d090sm961641ejc.206.2023.12.07.07.45.58 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 07 Dec 2023 07:45:59 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Pavel Dovgalyuk , Fam Zheng , Stefan Hajnoczi , Richard Henderson , qemu-block@nongnu.org, Paolo Bonzini , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v2 1/5] sysemu/cpu-timers: Introduce ICountMode enumerator Date: Thu, 7 Dec 2023 16:45:46 +0100 Message-ID: <20231207154550.65087-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231207154550.65087-1-philmd@linaro.org> References: <20231207154550.65087-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52f; envelope-from=philmd@linaro.org; helo=mail-ed1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Rather than having to lookup for what the 0, 1, 2, ... icount values are, use a enum definition. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/sysemu/cpu-timers.h | 20 +++++++++++++------- accel/tcg/icount-common.c | 16 +++++++--------- stubs/icount.c | 2 +- system/cpu-timers.c | 2 +- target/arm/helper.c | 3 ++- 5 files changed, 24 insertions(+), 19 deletions(-) diff --git a/include/sysemu/cpu-timers.h b/include/sysemu/cpu-timers.h index 2e786fe7fb..e909ffae47 100644 --- a/include/sysemu/cpu-timers.h +++ b/include/sysemu/cpu-timers.h @@ -17,18 +17,24 @@ void cpu_timers_init(void); /* icount - Instruction Counter API */ -/* - * icount enablement state: +/** + * ICountMode: icount enablement state: * - * 0 = Disabled - Do not count executed instructions. - * 1 = Enabled - Fixed conversion of insn to ns via "shift" option - * 2 = Enabled - Runtime adaptive algorithm to compute shift + * @ICOUNT_DISABLED: Disabled - Do not count executed instructions. + * @ICOUNT_PRECISE: Enabled - Fixed conversion of insn to ns via "shift" option + * @ICOUNT_ADAPTATIVE: Enabled - Runtime adaptive algorithm to compute shift */ +typedef enum { + ICOUNT_DISABLED = 0, + ICOUNT_PRECISE = 1, + ICOUNT_ADAPTATIVE = 2, +} ICountMode; + #ifdef CONFIG_TCG -extern int use_icount; +extern ICountMode use_icount; #define icount_enabled() (use_icount) #else -#define icount_enabled() 0 +#define icount_enabled() ICOUNT_DISABLED #endif /* diff --git a/accel/tcg/icount-common.c b/accel/tcg/icount-common.c index ec57192be8..067c93a9ae 100644 --- a/accel/tcg/icount-common.c +++ b/accel/tcg/icount-common.c @@ -49,21 +49,19 @@ static bool icount_sleep = true; /* Arbitrarily pick 1MIPS as the minimum allowable speed. */ #define MAX_ICOUNT_SHIFT 10 -/* - * 0 = Do not count executed instructions. - * 1 = Fixed conversion of insn to ns via "shift" option - * 2 = Runtime adaptive algorithm to compute shift - */ -int use_icount; +/* Do not count executed instructions */ +ICountMode use_icount = ICOUNT_DISABLED; static void icount_enable_precise(void) { - use_icount = 1; + /* Fixed conversion of insn to ns via "shift" option */ + use_icount = ICOUNT_PRECISE; } static void icount_enable_adaptive(void) { - use_icount = 2; + /* Runtime adaptive algorithm to compute shift */ + use_icount = ICOUNT_ADAPTATIVE; } /* @@ -256,7 +254,7 @@ static void icount_warp_rt(void) int64_t warp_delta; warp_delta = clock - timers_state.vm_clock_warp_start; - if (icount_enabled() == 2) { + if (icount_enabled() == ICOUNT_ADAPTATIVE) { /* * In adaptive mode, do not let QEMU_CLOCK_VIRTUAL run too far * ahead of real time (it might already be ahead so careful not diff --git a/stubs/icount.c b/stubs/icount.c index 6df8c2bf7d..f8e6a014b8 100644 --- a/stubs/icount.c +++ b/stubs/icount.c @@ -4,7 +4,7 @@ /* icount - Instruction Counter API */ -int use_icount; +ICountMode use_icount = ICOUNT_DISABLED; void icount_update(CPUState *cpu) { diff --git a/system/cpu-timers.c b/system/cpu-timers.c index 7452d97b67..6befb82e48 100644 --- a/system/cpu-timers.c +++ b/system/cpu-timers.c @@ -154,7 +154,7 @@ static bool adjust_timers_state_needed(void *opaque) static bool icount_shift_state_needed(void *opaque) { - return icount_enabled() == 2; + return icount_enabled() == ICOUNT_ADAPTATIVE; } /* diff --git a/target/arm/helper.c b/target/arm/helper.c index 2746d3fdac..adb0960bba 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -934,7 +934,8 @@ static int64_t cycles_ns_per(uint64_t cycles) static bool instructions_supported(CPUARMState *env) { - return icount_enabled() == 1; /* Precise instruction counting */ + /* Precise instruction counting */ + return icount_enabled() == ICOUNT_PRECISE; } static uint64_t instructions_get_count(CPUARMState *env) From patchwork Thu Dec 7 15:45:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 751075 Delivered-To: patch@linaro.org Received: by 2002:adf:a499:0:b0:333:3a04:f257 with SMTP id g25csp502298wrb; Thu, 7 Dec 2023 07:47:25 -0800 (PST) X-Google-Smtp-Source: AGHT+IGERzDuLa2ZlHy90KfQNmWC2lkso+Nqkv8Vmva8r0cMKjSkxZW5pcSGfPxrS36/KG8rKxdS X-Received: by 2002:a05:620a:4782:b0:77f:632:a6b9 with SMTP id dt2-20020a05620a478200b0077f0632a6b9mr1508841qkb.60.1701964045664; Thu, 07 Dec 2023 07:47:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701964045; cv=none; d=google.com; s=arc-20160816; b=wRbq7r+/G83mkHFuldpMIh/t9cE21ji5pMqGnSV5yZx6k8UJLDqVIg8iouHmIX8W0+ BPIlfouSwugrhUadTdLhc27Oqe/mHtSTpPVAEzh07PgP9EDTMT5PnDTxWOjJzWC97SOl /tcS2R6g45JnLH6myaVm3dk5P1ruvf8N/ihDvPLOSnnT8ckb6Th/JINjbvTlHKoogzxT vurMfidR2XaVsQnRFoQqbR+AI6yGQ7E+dxy3ZJ8qcW9v+vh/IguFqr+yfuaHWqbjFiiS RmRdXoqPgvnKBMhSL39EamE0uBAHG2t+Ip3Y6sYUKt44j4SR1YIQ5sphz0dlYA/S1trs DdAw== ARC-Message-Signature: i=1; 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[209.51.188.17]) by mx.google.com with ESMTPS id k8-20020a05620a414800b0077da5e176f4si1521196qko.693.2023.12.07.07.47.25 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 07 Dec 2023 07:47:25 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Oi9JjzOs; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rBGa2-0000m5-MG; Thu, 07 Dec 2023 10:46:26 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rBGZl-0000fo-UW for qemu-devel@nongnu.org; Thu, 07 Dec 2023 10:46:13 -0500 Received: from mail-lj1-x22d.google.com ([2a00:1450:4864:20::22d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rBGZk-00029g-9w for qemu-devel@nongnu.org; Thu, 07 Dec 2023 10:46:09 -0500 Received: by mail-lj1-x22d.google.com with SMTP id 38308e7fff4ca-2c9bd3ec4f6so11245181fa.2 for ; Thu, 07 Dec 2023 07:46:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1701963965; x=1702568765; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kHtbNbE33I2d0hjrmbCtkemMmPZQwimW4EDhg2VKvrs=; b=Oi9JjzOsES0KBiBWv3TCkSa9CbLU48Vr+amo1RFXZEO9ALxrx+OO2w1e3Y4f9eVfvP r40OvDTDi/8jyJ615cKRYXpjgpaXtB0QLn+gMwdgZ50rb+ZYEfXRTkpWYG69BbG11hlj Z5YzUlaevHvj+EyLKVkF4fEc8pBIdeoxZ5BwvC2yq9Pr1lhOR9WkbR1M6BPrsPmoYX0/ xh2KEPxnhcz9V3fk2ex/gFs/R74AUERDqjaLPoEjQd7/VS8W0UCk4LS8FdeHHz9MYqdo Do2ni5hDFlIaS1pWyHPoIE38ryryyM8KQyO7pDuGBF7xr6eHMXxdyZUdc9lXE/I1f7uJ pFfA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701963965; x=1702568765; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kHtbNbE33I2d0hjrmbCtkemMmPZQwimW4EDhg2VKvrs=; b=GlAw4naClmCLChDTdV0PgAgL8Rh6vuMOhDjzVIIClS1AmKDk+I5Znh/RY6JLMnggvY zV6eML/UBTqjdchjWZVvwkvnwo66Bod3cgRCCy5YOUGFkq3AN3vBS+IJwsHe4KhaAN0b lK0+oGnXlqsCp9ts2LpQ8F5wr70ZzVDOkA/ccavBxXDqwFiIDgDkZB3tK1igwMgNfatw mMOPq3PjSt1IMObrNQbPsbTflXol/Z15A1PP69rOuCJP5DrAZzLpBHNnMkzLuCPsE1aY vsOfmnmHXmN2viFsKctYtuLrKi2+bcER1BB050e8OvWa6zdoRHDRZ3Cpe6S4fekWCzBJ qg0A== X-Gm-Message-State: AOJu0Yz0+VGl1Lcs+qvzs8BE+DKQHJnesDY23v0mXDXB2jxR6NMencxu nk382vRIIsp3FEzWk1rYhmXoZ0J5hpVfELpHi1Q= X-Received: by 2002:a19:ad44:0:b0:50b:f84a:5398 with SMTP id s4-20020a19ad44000000b0050bf84a5398mr916528lfd.89.1701963965573; Thu, 07 Dec 2023 07:46:05 -0800 (PST) Received: from m1x-phil.lan ([176.187.202.111]) by smtp.gmail.com with ESMTPSA id e6-20020a1709067e0600b00a19afc16d23sm971415ejr.104.2023.12.07.07.46.04 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 07 Dec 2023 07:46:05 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Pavel Dovgalyuk , Fam Zheng , Stefan Hajnoczi , Richard Henderson , qemu-block@nongnu.org, Paolo Bonzini , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v2 2/5] target/arm: Ensure icount is enabled when emulating INST_RETIRED Date: Thu, 7 Dec 2023 16:45:47 +0100 Message-ID: <20231207154550.65087-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231207154550.65087-1-philmd@linaro.org> References: <20231207154550.65087-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22d; envelope-from=philmd@linaro.org; helo=mail-lj1-x22d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pmu_init() register its event checking the pm_event::supported() handler. For INST_RETIRED, the event is only registered and the bit enabled in the PMU Common Event Identification register when icount is enabled as ICOUNT_PRECISE. Assert the pm_event::get_count() and pm_event::ns_per_count() handler will only be called under this icount mode. Signed-off-by: Philippe Mathieu-Daudé --- target/arm/helper.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index adb0960bba..333fd5f4bf 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -940,11 +940,13 @@ static bool instructions_supported(CPUARMState *env) static uint64_t instructions_get_count(CPUARMState *env) { + assert(icount_enabled() == ICOUNT_PRECISE); return (uint64_t)icount_get_raw(); } static int64_t instructions_ns_per(uint64_t icount) { + assert(icount_enabled() == ICOUNT_PRECISE); return icount_to_ns((int64_t)icount); } #endif From patchwork Thu Dec 7 15:45:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 751077 Delivered-To: patch@linaro.org Received: by 2002:adf:a499:0:b0:333:3a04:f257 with SMTP id g25csp502989wrb; Thu, 7 Dec 2023 07:48:49 -0800 (PST) X-Google-Smtp-Source: AGHT+IGpzlJp0ENSBmJVPwbGSNaSn9yXAoj8dgAsYiq8VG35AQJOdqno5BLpSe65BhQTxRDb5yEX X-Received: by 2002:a05:6214:5809:b0:67a:c107:2f74 with SMTP id mk9-20020a056214580900b0067ac1072f74mr2834359qvb.8.1701964129671; Thu, 07 Dec 2023 07:48:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701964129; cv=none; d=google.com; s=arc-20160816; b=ggPWzanwnLbmBIak24+SCXDWKz42QYqUJgS5fyNmrCWhsON4/3kzA70ahyhByUhkyW ZkFs2a1tFBZgUFHrjR+isAur5QVndAvzy0OFAtdp+YaCzLxWtkk1nxidhQvTBiecQlLh AR0VnuNaOp8ifotne5NYPLJfv6seTI/CXZcM5EwxPnnFqvtN0JLzJA1Ty2o4gTNvX50l DpO2eCfpjPdIjNe/iOjqB/f6FDtAs9AGVDj7Rvxh8jIhsWuwayurOf34c4nbMG0TBOZR mNF95MkprfpIV/ogUC71Voko8i2U5KnEenzdzbs4WyOjZPa4PzKX8NN2EuI12DKCGqWc GzsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=pwehzbql2APDeG+wQ20PBY5aWPTjdNYBgHCWKgUCJ14=; fh=A8ftaDMzewcMA0xKw++MSYMuCBPymoWdeCEx+9KcU8w=; b=W0B/WSO7srUJqfGDNHkOQra+zbUcPdoqkySj7ZD+eyvtpXfZoESgqKWvgAZHxk++sO KNUUUeG+ENwE+QS8rqtG4IAa0rarcDUZz1+NHHMGJriA8Evin3wHEuUWJByBUFPfZ2aO q7qNX/PIH4Rt+VlWrM2OmO8IeMM0kXDssNjuA7MJJo46BFHCFqTYD9Cj/Ro8TxaEo7P9 IJgt4P3yPU6ziBOaZRfDSdoX9EGhOt5MQHlcbB6DHWCkIxyiyNX6W0eW4UKPbmR3yEO8 X642ylzRPullY72u1Z1gbm3C7os9UmpCxaPeWqygHRurqvY/9HXz0mlX7RAlX5BSPkcn p0Zw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mUX6v3vp; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Thu, 07 Dec 2023 07:46:11 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Pavel Dovgalyuk , Fam Zheng , Stefan Hajnoczi , Richard Henderson , qemu-block@nongnu.org, Paolo Bonzini , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v2 3/5] util/async: Only call icount_notify_exit() if icount is enabled Date: Thu, 7 Dec 2023 16:45:48 +0100 Message-ID: <20231207154550.65087-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231207154550.65087-1-philmd@linaro.org> References: <20231207154550.65087-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52e; envelope-from=philmd@linaro.org; helo=mail-ed1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- stubs/icount.c | 2 +- util/async.c | 16 +++++++++------- 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/stubs/icount.c b/stubs/icount.c index f8e6a014b8..a5202e2dd9 100644 --- a/stubs/icount.c +++ b/stubs/icount.c @@ -43,7 +43,7 @@ void icount_account_warp_timer(void) { abort(); } - void icount_notify_exit(void) { + abort(); } diff --git a/util/async.c b/util/async.c index 8f90ddc304..9007642c27 100644 --- a/util/async.c +++ b/util/async.c @@ -94,13 +94,15 @@ static void aio_bh_enqueue(QEMUBH *bh, unsigned new_flags) } aio_notify(ctx); - /* - * Workaround for record/replay. - * vCPU execution should be suspended when new BH is set. - * This is needed to avoid guest timeouts caused - * by the long cycles of the execution. - */ - icount_notify_exit(); + if (unlikely(icount_enabled())) { + /* + * Workaround for record/replay. + * vCPU execution should be suspended when new BH is set. + * This is needed to avoid guest timeouts caused + * by the long cycles of the execution. + */ + icount_notify_exit(); + } } /* Only called from aio_bh_poll() and aio_ctx_finalize() */ From patchwork Thu Dec 7 15:45:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 751076 Delivered-To: patch@linaro.org Received: by 2002:adf:a499:0:b0:333:3a04:f257 with SMTP id g25csp502872wrb; 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Thu, 07 Dec 2023 07:46:16 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Pavel Dovgalyuk , Fam Zheng , Stefan Hajnoczi , Richard Henderson , qemu-block@nongnu.org, Paolo Bonzini , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v2 4/5] system/vl: Restrict icount to TCG emulation Date: Thu, 7 Dec 2023 16:45:49 +0100 Message-ID: <20231207154550.65087-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231207154550.65087-1-philmd@linaro.org> References: <20231207154550.65087-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=philmd@linaro.org; helo=mail-ed1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- stubs/icount.c | 6 ------ system/vl.c | 6 +++++- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/stubs/icount.c b/stubs/icount.c index a5202e2dd9..b060b03a73 100644 --- a/stubs/icount.c +++ b/stubs/icount.c @@ -1,5 +1,4 @@ #include "qemu/osdep.h" -#include "qapi/error.h" #include "sysemu/cpu-timers.h" /* icount - Instruction Counter API */ @@ -10,11 +9,6 @@ void icount_update(CPUState *cpu) { abort(); } -void icount_configure(QemuOpts *opts, Error **errp) -{ - /* signal error */ - error_setg(errp, "cannot configure icount, TCG support not available"); -} int64_t icount_get_raw(void) { abort(); diff --git a/system/vl.c b/system/vl.c index 2bcd9efb9a..8c99c5f681 100644 --- a/system/vl.c +++ b/system/vl.c @@ -2270,7 +2270,11 @@ static void user_register_global_props(void) static int do_configure_icount(void *opaque, QemuOpts *opts, Error **errp) { - icount_configure(opts, errp); + if (tcg_enabled()) { + icount_configure(opts, errp); + } else { + error_setg(errp, "cannot configure icount, TCG support not available"); + } return 0; } From patchwork Thu Dec 7 15:45:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 751074 Delivered-To: patch@linaro.org Received: by 2002:adf:a499:0:b0:333:3a04:f257 with SMTP id g25csp502279wrb; Thu, 7 Dec 2023 07:47:23 -0800 (PST) X-Google-Smtp-Source: AGHT+IGMl/IetdgF7TpwTXFIZZlB4dRP8R27l2DoioAB9vK173F+Q2RiwvubgzxcH4EoFzVgcuBA X-Received: by 2002:a9d:6e98:0:b0:6d9:a1c5:7d7 with SMTP id a24-20020a9d6e98000000b006d9a1c507d7mr2780277otr.57.1701964043363; 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Thu, 07 Dec 2023 07:46:22 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Pavel Dovgalyuk , Fam Zheng , Stefan Hajnoczi , Richard Henderson , qemu-block@nongnu.org, Paolo Bonzini , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v2 5/5] sysemu/replay: Restrict icount to system emulation Date: Thu, 7 Dec 2023 16:45:50 +0100 Message-ID: <20231207154550.65087-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231207154550.65087-1-philmd@linaro.org> References: <20231207154550.65087-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- include/sysemu/cpu-timers.h | 2 +- include/sysemu/replay.h | 11 ++++++++--- stubs/icount.c | 19 ------------------- 3 files changed, 9 insertions(+), 23 deletions(-) diff --git a/include/sysemu/cpu-timers.h b/include/sysemu/cpu-timers.h index e909ffae47..25dfc76599 100644 --- a/include/sysemu/cpu-timers.h +++ b/include/sysemu/cpu-timers.h @@ -30,7 +30,7 @@ typedef enum { ICOUNT_ADAPTATIVE = 2, } ICountMode; -#ifdef CONFIG_TCG +#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) extern ICountMode use_icount; #define icount_enabled() (use_icount) #else diff --git a/include/sysemu/replay.h b/include/sysemu/replay.h index 08aae5869f..8102fa54f0 100644 --- a/include/sysemu/replay.h +++ b/include/sysemu/replay.h @@ -1,6 +1,3 @@ -#ifndef SYSEMU_REPLAY_H -#define SYSEMU_REPLAY_H - /* * QEMU replay (system interface) * @@ -11,6 +8,12 @@ * See the COPYING file in the top-level directory. * */ +#ifndef SYSEMU_REPLAY_H +#define SYSEMU_REPLAY_H + +#ifdef CONFIG_USER_ONLY +#error Cannot include this header from user emulation +#endif #include "exec/replay-core.h" #include "qapi/qapi-types-misc.h" @@ -79,12 +82,14 @@ int64_t replay_save_clock(ReplayClockKind kind, int64_t clock, int64_t replay_read_clock(ReplayClockKind kind, int64_t raw_icount); /*! Saves or reads the clock depending on the current replay mode. */ #define REPLAY_CLOCK(clock, value) \ + !icount_enabled() ? (value) : \ (replay_mode == REPLAY_MODE_PLAY \ ? replay_read_clock((clock), icount_get_raw()) \ : replay_mode == REPLAY_MODE_RECORD \ ? replay_save_clock((clock), (value), icount_get_raw()) \ : (value)) #define REPLAY_CLOCK_LOCKED(clock, value) \ + !icount_enabled() ? (value) : \ (replay_mode == REPLAY_MODE_PLAY \ ? replay_read_clock((clock), icount_get_raw_locked()) \ : replay_mode == REPLAY_MODE_RECORD \ diff --git a/stubs/icount.c b/stubs/icount.c index b060b03a73..9a29084ecc 100644 --- a/stubs/icount.c +++ b/stubs/icount.c @@ -5,30 +5,11 @@ ICountMode use_icount = ICOUNT_DISABLED; -void icount_update(CPUState *cpu) -{ - abort(); -} int64_t icount_get_raw(void) { abort(); return 0; } -int64_t icount_get(void) -{ - abort(); - return 0; -} -int64_t icount_to_ns(int64_t icount) -{ - abort(); - return 0; -} -int64_t icount_round(int64_t count) -{ - abort(); - return 0; -} void icount_start_warp_timer(void) { abort();