From patchwork Mon Dec 4 10:38:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 750358 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ZdIoO6he" Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C859EAC for ; Mon, 4 Dec 2023 02:38:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701686312; x=1733222312; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=g8JBvicfwDiK3ZwFe+4ka66Y2GSK0p5hbTrOQEoEDdo=; b=ZdIoO6heZPoyVfNBD1guUQYgayflYrUjj6eu/kYvKDz3Bvv/FphiZawW Yw6GR3LH+X2AXRhCnKJUAqIKY1AuxY5Ey0WAXdK0TvlFFS4yrlWNGvQrj 83V2N5+BaBVrFhDTQDp2N0Skem/nMFgbztGfynYO8xnj/pluuEkRhgIvp Qid8kS7CzuHo/JzvPnSC+U/j/hTXg8DoSwmhN5Xk4cZYC/H8jjucdZEPZ QoXq5+yK+ZTWwLM75AlGxfi0gdL2TAhoRs6hQjLXEiSkEp75hO4wTLFWl 8J3Pj8uyMo0K1OfGVGbKyCzsu4Gd8T6VDzpdGXUC2EFNSF7gv4P4OgZ09 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="424880764" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="424880764" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 02:38:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="763904016" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="763904016" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 04 Dec 2023 02:38:29 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id 5617C268; Mon, 4 Dec 2023 12:38:28 +0200 (EET) From: Mika Westerberg To: Yehezkel Bernat , Michael Jamet , Lukas Wunner , Andreas Noever Cc: linux-usb@vger.kernel.org, Gil Fine , Pengfei Xu , Dan Carpenter , Mika Westerberg Subject: [PATCH 01/11] thunderbolt: Unwind TMU configuration if tb_switch_set_tmu_mode_params() fails Date: Mon, 4 Dec 2023 12:38:18 +0200 Message-ID: <20231204103828.1635531-2-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> References: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Dan reported that the kernel test robot found an issue with the TMU code namely in tb_switch_tmu_change_mode() where we should actually go back to the previous mode in case of failure instead of just returning back the error. Fix this by unwinding the configuration as we do with the other error paths in this function. Reported-by: kernel test robot Reported-by: Dan Carpenter Closes: https://lore.kernel.org/r/202311030814.AXtCk7PO-lkp@intel.com/ Signed-off-by: Mika Westerberg --- drivers/thunderbolt/tmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thunderbolt/tmu.c b/drivers/thunderbolt/tmu.c index 11f2aec2a5d3..9a259c72e5a7 100644 --- a/drivers/thunderbolt/tmu.c +++ b/drivers/thunderbolt/tmu.c @@ -894,7 +894,7 @@ static int tb_switch_tmu_change_mode(struct tb_switch *sw) ret = tb_switch_set_tmu_mode_params(sw, sw->tmu.mode_request); if (ret) - return ret; + goto out; /* Program the new mode and the downstream router lane adapter */ switch (sw->tmu.mode_request) { From patchwork Mon Dec 4 10:38:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 750708 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="hsUEB7IE" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 712CEB9 for ; Mon, 4 Dec 2023 02:38:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701686313; x=1733222313; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zCrzdbuRai44mXVZLIKq7yNSksTeXxWhX20c3f6yTSc=; b=hsUEB7IEnMvs60xFXQaGNzJ3/Vu7vFVbM6I5CFQa3Z3x2AqQvjugioCU yQQy2G3AbE+Fbe+EEIG14JyyBJ32g46k0+EZ4AhaT6vP/EIbaf9B8AlK8 SNN6rZVB0jsy4D6LmH+GbTfWSsw6LbmXCbgasFE710gMoL9r1mexmwx9n p/HzC0KTauQYtvwmCkzMVzXjDvz/Q/K/S62YOtaRyRfeCK8Ju0zOvW3QO qaeMGR3lfvLR3YFFevF4XLn9529Ajgy8Xnbp8dA139mrmkfi+aRBB5KVz X24lfzspRsUDx74go1ueUYKwg0PdNXBfsaMRUjdiH6xCRVSOaTE5W/peY w==; X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="384116729" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="384116729" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 02:38:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="804861252" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="804861252" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga001.jf.intel.com with ESMTP; 04 Dec 2023 02:38:29 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id 5F209368; Mon, 4 Dec 2023 12:38:28 +0200 (EET) From: Mika Westerberg To: Yehezkel Bernat , Michael Jamet , Lukas Wunner , Andreas Noever Cc: linux-usb@vger.kernel.org, Gil Fine , Pengfei Xu , Dan Carpenter , Mika Westerberg Subject: [PATCH 02/11] thunderbolt: Handle lane bonding of Gen 4 XDomain links properly Date: Mon, 4 Dec 2023 12:38:19 +0200 Message-ID: <20231204103828.1635531-3-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> References: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Gil Fine Gen 4 links come up as bonded already so we are not supposed to initiate lane bonding on them. However, we should still update the port structures accordingly. Split these into their own functions to make it easier to follow. Signed-off-by: Gil Fine Signed-off-by: Mika Westerberg --- drivers/thunderbolt/tb.c | 2 -- drivers/thunderbolt/xdomain.c | 49 ++++++++++++++++++++++++++++++++++- 2 files changed, 48 insertions(+), 3 deletions(-) diff --git a/drivers/thunderbolt/tb.c b/drivers/thunderbolt/tb.c index fd49f86e0353..3dabc1ac9ab3 100644 --- a/drivers/thunderbolt/tb.c +++ b/drivers/thunderbolt/tb.c @@ -513,8 +513,6 @@ static void tb_port_unconfigure_xdomain(struct tb_port *port) usb4_port_unconfigure_xdomain(port); else tb_lc_unconfigure_xdomain(port); - - tb_port_enable(port->dual_link_port); } static void tb_scan_xdomain(struct tb_port *port) diff --git a/drivers/thunderbolt/xdomain.c b/drivers/thunderbolt/xdomain.c index 9803f0bbf20d..0a885ee5788d 100644 --- a/drivers/thunderbolt/xdomain.c +++ b/drivers/thunderbolt/xdomain.c @@ -1895,6 +1895,50 @@ struct device_type tb_xdomain_type = { }; EXPORT_SYMBOL_GPL(tb_xdomain_type); +static void tb_xdomain_link_init(struct tb_xdomain *xd, struct tb_port *down) +{ + if (!down->dual_link_port) + return; + + /* + * Gen 4 links come up already as bonded so only update the port + * structures here. + */ + if (tb_port_get_link_generation(down) >= 4) { + down->bonded = true; + down->dual_link_port->bonded = true; + } else { + xd->bonding_possible = true; + } +} + +static void tb_xdomain_link_exit(struct tb_xdomain *xd) +{ + struct tb_port *down = tb_xdomain_downstream_port(xd); + + if (!down->dual_link_port) + return; + + if (tb_port_get_link_generation(down) >= 4) { + down->bonded = false; + down->dual_link_port->bonded = false; + } else if (xd->link_width > TB_LINK_WIDTH_SINGLE) { + /* + * Just return port structures back to way they were and + * update credits. No need to update userspace because + * the XDomain is removed soon anyway. + */ + tb_port_lane_bonding_disable(down); + tb_port_update_credits(down); + } else if (down->dual_link_port) { + /* + * Re-enable the lane 1 adapter we disabled at the end + * of tb_xdomain_get_properties(). + */ + tb_port_enable(down->dual_link_port); + } +} + /** * tb_xdomain_alloc() - Allocate new XDomain object * @tb: Domain where the XDomain belongs @@ -1945,7 +1989,8 @@ struct tb_xdomain *tb_xdomain_alloc(struct tb *tb, struct device *parent, goto err_free_local_uuid; } else { xd->needs_uuid = true; - xd->bonding_possible = !!down->dual_link_port; + + tb_xdomain_link_init(xd, down); } device_initialize(&xd->dev); @@ -2014,6 +2059,8 @@ void tb_xdomain_remove(struct tb_xdomain *xd) device_for_each_child_reverse(&xd->dev, xd, unregister_service); + tb_xdomain_link_exit(xd); + /* * Undo runtime PM here explicitly because it is possible that * the XDomain was never added to the bus and thus device_del() From patchwork Mon Dec 4 10:38:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 750709 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="eiw5PYcT" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9EDA7BB for ; Mon, 4 Dec 2023 02:38:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701686313; x=1733222313; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RU3N8iuAomagZOqiT2yTYYpVSTyy9g+XgfW+GOXPsrc=; b=eiw5PYcTdL3RbvikS0BQiaJ4T+5pmJzKMM7fap6meRO6MGMjkVpH1z9+ YyRbMPRj43jk439M3EmyRt5251yRwsOMmreCndt6SHglSrLRqKjs29Dhg IydYX/R2uDrSFw18Eq2uQnsyBbb9NL7j5EAtgQ7CYFpWqNvqa/orC2St+ xNFgcoRzTMzLKXARqfh1o2+xIbJYUMec+EXES+QEHzsKg/PjC3mnrJivZ ylcP/VdbrAn+JN4yBVSmGiLSi9r1QJjQXYtrBctgvzJLiANmJB1n+8nR2 VU41TzBAuNcRejhLHX+XSilZPrP7rvYROogP3TLuxlEuArjj0lRf6t6JH A==; X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="384116737" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="384116737" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 02:38:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="804861257" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="804861257" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga001.jf.intel.com with ESMTP; 04 Dec 2023 02:38:29 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id 6D3C4881; Mon, 4 Dec 2023 12:38:28 +0200 (EET) From: Mika Westerberg To: Yehezkel Bernat , Michael Jamet , Lukas Wunner , Andreas Noever Cc: linux-usb@vger.kernel.org, Gil Fine , Pengfei Xu , Dan Carpenter , Mika Westerberg Subject: [PATCH 03/11] thunderbolt: Move width_name() helper to tb.h Date: Mon, 4 Dec 2023 12:38:20 +0200 Message-ID: <20231204103828.1635531-4-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> References: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Gil Fine We are going to use it in subsequent patches, so make it available outside of switch.c. Also, change the name to tb_width_name() to follow the naming conventions. Signed-off-by: Gil Fine Signed-off-by: Mika Westerberg --- drivers/thunderbolt/switch.c | 20 ++------------------ drivers/thunderbolt/tb.h | 16 ++++++++++++++++ 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/thunderbolt/switch.c b/drivers/thunderbolt/switch.c index 44e9b09de47a..dbab551ac7b3 100644 --- a/drivers/thunderbolt/switch.c +++ b/drivers/thunderbolt/switch.c @@ -941,22 +941,6 @@ int tb_port_get_link_generation(struct tb_port *port) } } -static const char *width_name(enum tb_link_width width) -{ - switch (width) { - case TB_LINK_WIDTH_SINGLE: - return "symmetric, single lane"; - case TB_LINK_WIDTH_DUAL: - return "symmetric, dual lanes"; - case TB_LINK_WIDTH_ASYM_TX: - return "asymmetric, 3 transmitters, 1 receiver"; - case TB_LINK_WIDTH_ASYM_RX: - return "asymmetric, 3 receivers, 1 transmitter"; - default: - return "unknown"; - } -} - /** * tb_port_get_link_width() - Get current link width * @port: Port to check (USB4 or CIO) @@ -2769,7 +2753,7 @@ static void tb_switch_link_init(struct tb_switch *sw) return; tb_sw_dbg(sw, "current link speed %u.0 Gb/s\n", sw->link_speed); - tb_sw_dbg(sw, "current link width %s\n", width_name(sw->link_width)); + tb_sw_dbg(sw, "current link width %s\n", tb_width_name(sw->link_width)); bonded = sw->link_width >= TB_LINK_WIDTH_DUAL; @@ -3029,7 +3013,7 @@ int tb_switch_set_link_width(struct tb_switch *sw, enum tb_link_width width) tb_switch_update_link_attributes(sw); - tb_sw_dbg(sw, "link width set to %s\n", width_name(width)); + tb_sw_dbg(sw, "link width set to %s\n", tb_width_name(width)); return ret; } diff --git a/drivers/thunderbolt/tb.h b/drivers/thunderbolt/tb.h index e299e53473ae..1760c21e5b12 100644 --- a/drivers/thunderbolt/tb.h +++ b/drivers/thunderbolt/tb.h @@ -568,6 +568,22 @@ static inline struct tb_port *tb_port_at(u64 route, struct tb_switch *sw) return &sw->ports[port]; } +static inline const char *tb_width_name(enum tb_link_width width) +{ + switch (width) { + case TB_LINK_WIDTH_SINGLE: + return "symmetric, single lane"; + case TB_LINK_WIDTH_DUAL: + return "symmetric, dual lanes"; + case TB_LINK_WIDTH_ASYM_TX: + return "asymmetric, 3 transmitters, 1 receiver"; + case TB_LINK_WIDTH_ASYM_RX: + return "asymmetric, 3 receivers, 1 transmitter"; + default: + return "unknown"; + } +} + /** * tb_port_has_remote() - Does the port have switch connected downstream * @port: Port to check From patchwork Mon Dec 4 10:38:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 750357 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="f2hA6uGi" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9E7FFC3 for ; Mon, 4 Dec 2023 02:38:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701686314; x=1733222314; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Kyk42/sYDXNIFXM27h5eHjUXg2sb3xQOMwTMoOLdphA=; b=f2hA6uGiappG7aaxpom5MdY/ez3ao8ypdZqQ+C/lGUjpid+rrTwLWlmu owfZPuBdYM9Z7ueoabERa/5y/IemeNQ8HFUXv6FPKQamNPZB/bXxdkZre syRlNUwZ3CLuwdIjZHe2Risxzr79MFOtny3jNw/u7UZPX4z4zpnxQ8HFq oMV+DY67aDBQf9iAtZ/FeLwjWUhrwYvt1EACqbGGvlH0a4XqXX9NqKZKp 348tQv5xHxrXKYyD49TiZw5DL/XUmNKVBv4HejAZrdDX/DVfVQjpdS4bn V/oioFB+LrP0Z7yrw4c9fu5PJrjYiGAzS5CxChDNT4pcrIM8CACrUWBal w==; X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="384116741" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="384116741" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 02:38:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="804861259" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="804861259" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga001.jf.intel.com with ESMTP; 04 Dec 2023 02:38:29 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id 7666B72F; Mon, 4 Dec 2023 12:38:28 +0200 (EET) From: Mika Westerberg To: Yehezkel Bernat , Michael Jamet , Lukas Wunner , Andreas Noever Cc: linux-usb@vger.kernel.org, Gil Fine , Pengfei Xu , Dan Carpenter , Mika Westerberg Subject: [PATCH 04/11] thunderbolt: Log XDomain link speed and width Date: Mon, 4 Dec 2023 12:38:21 +0200 Message-ID: <20231204103828.1635531-5-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> References: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Gil Fine In the same way we do for routers. This is useful for debugging purposes. Signed-off-by: Gil Fine Signed-off-by: Mika Westerberg --- drivers/thunderbolt/xdomain.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/thunderbolt/xdomain.c b/drivers/thunderbolt/xdomain.c index 0a885ee5788d..9495742913d5 100644 --- a/drivers/thunderbolt/xdomain.c +++ b/drivers/thunderbolt/xdomain.c @@ -1462,6 +1462,11 @@ static int tb_xdomain_get_properties(struct tb_xdomain *xd) tb_port_disable(port->dual_link_port); } + dev_dbg(&xd->dev, "current link speed %u.0 Gb/s\n", + xd->link_speed); + dev_dbg(&xd->dev, "current link width %s\n", + tb_width_name(xd->link_width)); + if (device_add(&xd->dev)) { dev_err(&xd->dev, "failed to add XDomain device\n"); return -ENODEV; From patchwork Mon Dec 4 10:38:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 750706 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="LfqQRos/" Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9510CD5 for ; Mon, 4 Dec 2023 02:38:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701686316; x=1733222316; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DT/pm8ru+9oUbnj07DS0gnaO6C5H5aRB4M2I4E9Loyo=; b=LfqQRos/d6KTZfm8hQoMtnwjyBYRLKlJoBZl32YnYAKc+lPv2D3e1zBb f2RYaDy4ulfHZY05DdXYa8uiIqQSxIiuEvwy/QW8zvcK+aaD4C911vS2y kALNBXCidsPnDEvMjZoggLRm6/2JABu5tuUP0SvF1N5fOuDH57JE3gzRg 0g79zMp1px/LOQOH5qSJPaI91jCqzftTwm9a7GRDh7dABLEu8qwBR5UO/ vTJUivlHqRPoKTc+4ESmUX0KQzrLAmAwaGVHDyfHDIRgkH9RCE3oAsZVH KNso6oov5GvlNCr2B4rWmaJGbCuBBX3PITFZC5KjVCXFLLyv9myoIhqhH A==; X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="424880782" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="424880782" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 02:38:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="763904028" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="763904028" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 04 Dec 2023 02:38:33 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id 80849A02; Mon, 4 Dec 2023 12:38:28 +0200 (EET) From: Mika Westerberg To: Yehezkel Bernat , Michael Jamet , Lukas Wunner , Andreas Noever Cc: linux-usb@vger.kernel.org, Gil Fine , Pengfei Xu , Dan Carpenter , Mika Westerberg Subject: [PATCH 05/11] thunderbolt: Transition link to asymmetric only when both sides support it Date: Mon, 4 Dec 2023 12:38:22 +0200 Message-ID: <20231204103828.1635531-6-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> References: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Gil Fine We can transition Gen 4 link to asymmetric only when both sides of the link support it in the required direction. For this reason make sure that the downstream adapter also supports asymmetric link before starting the transition. Signed-off-by: Gil Fine Signed-off-by: Mika Westerberg --- drivers/thunderbolt/tb.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/thunderbolt/tb.c b/drivers/thunderbolt/tb.c index 3dabc1ac9ab3..6c5e8ce95f8d 100644 --- a/drivers/thunderbolt/tb.c +++ b/drivers/thunderbolt/tb.c @@ -1104,8 +1104,9 @@ static int tb_configure_asym(struct tb *tb, struct tb_port *src_port, clx = tb_disable_clx(sw); tb_for_each_upstream_port_on_path(src_port, dst_port, up) { + struct tb_port *down = tb_switch_downstream_port(up->sw); + enum tb_link_width width_up, width_down; int consumed_up, consumed_down; - enum tb_link_width width; ret = tb_consumed_dp_bandwidth(tb, src_port, dst_port, up, &consumed_up, &consumed_down); @@ -1126,7 +1127,8 @@ static int tb_configure_asym(struct tb *tb, struct tb_port *src_port, if (consumed_down + requested_down < asym_threshold) continue; - width = TB_LINK_WIDTH_ASYM_RX; + width_up = TB_LINK_WIDTH_ASYM_RX; + width_down = TB_LINK_WIDTH_ASYM_TX; } else { /* Upstream, the opposite of above */ if (consumed_down + requested_down >= TB_ASYM_MIN) { @@ -1136,13 +1138,15 @@ static int tb_configure_asym(struct tb *tb, struct tb_port *src_port, if (consumed_up + requested_up < asym_threshold) continue; - width = TB_LINK_WIDTH_ASYM_TX; + width_up = TB_LINK_WIDTH_ASYM_TX; + width_down = TB_LINK_WIDTH_ASYM_RX; } - if (up->sw->link_width == width) + if (up->sw->link_width == width_up) continue; - if (!tb_port_width_supported(up, width)) + if (!tb_port_width_supported(up, width_up) || + !tb_port_width_supported(down, width_down)) continue; tb_sw_dbg(up->sw, "configuring asymmetric link\n"); @@ -1151,7 +1155,7 @@ static int tb_configure_asym(struct tb *tb, struct tb_port *src_port, * Here requested + consumed > threshold so we need to * transtion the link into asymmetric now. */ - ret = tb_switch_set_link_width(up->sw, width); + ret = tb_switch_set_link_width(up->sw, width_up); if (ret) { tb_sw_warn(up->sw, "failed to set link width\n"); break; From patchwork Mon Dec 4 10:38:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 750707 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Ore0313q" Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 19091AC for ; Mon, 4 Dec 2023 02:38:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701686316; x=1733222316; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=u2CpmHTc9iVk0QgHKtfDzsAW0+tULMdoxgY0PeI5IT0=; b=Ore0313qlHveeRM+I4G4yH+M3s82DhWQnQ02g5WxycpcDLi80QXDjDxy 0+6el5ACMkoJ4btTa4EaeNorzpXyruZLOj3a0k+W/5faYgW1FsDFvf+Ue rrE1jzQPNnkBQU5ojeKiqt49tgGN16/I68kD4mBB34iVpj1xteVp7dOxt hje/Bo+z+FXqgGp7n2vQlTGVHMJpgWNHd6m9oMNANwwoxPVop6Kl9kU15 Y8uCse30bZlPzT+T0JEu0i6OvbuzPeMwQyTNVuOCgVbhURQZJjZ+2J7Lt /4rBlundIMLD6nphm1LuP5j33vxOGC1tzkezZ7wCVN8TIH5hRFKanD0UH w==; X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="424880778" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="424880778" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 02:38:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="763904027" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="763904027" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 04 Dec 2023 02:38:33 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id 8F29EA5F; Mon, 4 Dec 2023 12:38:28 +0200 (EET) From: Mika Westerberg To: Yehezkel Bernat , Michael Jamet , Lukas Wunner , Andreas Noever Cc: linux-usb@vger.kernel.org, Gil Fine , Pengfei Xu , Dan Carpenter , Mika Westerberg Subject: [PATCH 06/11] thunderbolt: Disable CL states only when actually needed Date: Mon, 4 Dec 2023 12:38:23 +0200 Message-ID: <20231204103828.1635531-7-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> References: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 If there is not going to be an actual transition to asymmetric or symmetric, there is no point to disable and re-enable CL states either. So instead disable them only when we know that an actual transition is going to take place. Signed-off-by: Mika Westerberg --- drivers/thunderbolt/tb.c | 26 ++++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/drivers/thunderbolt/tb.c b/drivers/thunderbolt/tb.c index 6c5e8ce95f8d..1308f7872f97 100644 --- a/drivers/thunderbolt/tb.c +++ b/drivers/thunderbolt/tb.c @@ -1085,15 +1085,14 @@ static int tb_configure_asym(struct tb *tb, struct tb_port *src_port, struct tb_port *dst_port, int requested_up, int requested_down) { + bool clx = false, clx_disabled = false, downstream; struct tb_switch *sw; - bool clx, downstream; struct tb_port *up; int ret = 0; if (!asym_threshold) return 0; - /* Disable CL states before doing any transitions */ downstream = tb_port_path_direction_downstream(src_port, dst_port); /* Pick up router deepest in the hierarchy */ if (downstream) @@ -1101,8 +1100,6 @@ static int tb_configure_asym(struct tb *tb, struct tb_port *src_port, else sw = src_port->sw; - clx = tb_disable_clx(sw); - tb_for_each_upstream_port_on_path(src_port, dst_port, up) { struct tb_port *down = tb_switch_downstream_port(up->sw); enum tb_link_width width_up, width_down; @@ -1149,6 +1146,16 @@ static int tb_configure_asym(struct tb *tb, struct tb_port *src_port, !tb_port_width_supported(down, width_down)) continue; + /* + * Disable CL states before doing any transitions. We + * delayed it until now that we know there is a real + * transition taking place. + */ + if (!clx_disabled) { + clx = tb_disable_clx(sw); + clx_disabled = true; + } + tb_sw_dbg(up->sw, "configuring asymmetric link\n"); /* @@ -1185,15 +1192,14 @@ static int tb_configure_sym(struct tb *tb, struct tb_port *src_port, struct tb_port *dst_port, int requested_up, int requested_down) { + bool clx = false, clx_disabled = false, downstream; struct tb_switch *sw; - bool clx, downstream; struct tb_port *up; int ret = 0; if (!asym_threshold) return 0; - /* Disable CL states before doing any transitions */ downstream = tb_port_path_direction_downstream(src_port, dst_port); /* Pick up router deepest in the hierarchy */ if (downstream) @@ -1201,8 +1207,6 @@ static int tb_configure_sym(struct tb *tb, struct tb_port *src_port, else sw = src_port->sw; - clx = tb_disable_clx(sw); - tb_for_each_upstream_port_on_path(src_port, dst_port, up) { int consumed_up, consumed_down; @@ -1235,6 +1239,12 @@ static int tb_configure_sym(struct tb *tb, struct tb_port *src_port, if (up->sw->link_width == TB_LINK_WIDTH_DUAL) continue; + /* Disable CL states before doing any transitions */ + if (!clx_disabled) { + clx = tb_disable_clx(sw); + clx_disabled = true; + } + tb_sw_dbg(up->sw, "configuring symmetric link\n"); ret = tb_switch_set_link_width(up->sw, TB_LINK_WIDTH_DUAL); From patchwork Mon Dec 4 10:38:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 750356 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="XVQMUATK" Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BFCD985 for ; Mon, 4 Dec 2023 02:38:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701686315; x=1733222315; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=We+repeTYELCMPXneaTei3I37pzCdeg2zhJuDb/i/us=; b=XVQMUATKalfN+hfDTwq0eIyW1RYnnYt24i+s7Mpr3L+T+ftAeC6Yjb0n fibpLUw3f9QjzoQoghtdWIs54GZOBUfwKjjCc4wESA+FU44uwHgrk+pk8 HxHBZaLmI0jx+1JCrRLc5Yv16o6Xlh4eCjF73+JGzD5j5Ym9xGNNapUgi U8K13FYf5HlxQ7/31BKm2iBSziJk74RiEcXpwUrvZ3FIlqVbsXco7xfhM ByX84p8DPmRNiFxcE0IUNVQk7PQNYPVp+MtLeGPQPszz42CvZKXKchUUV scCTMXpIRGA1QZVoLktXUe3bYPh4rUGsndP6w3jqMaQA2Yfe1lmXQKlLg A==; X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="424880774" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="424880774" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 02:38:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="763904024" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="763904024" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 04 Dec 2023 02:38:33 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id A35CDA94; Mon, 4 Dec 2023 12:38:28 +0200 (EET) From: Mika Westerberg To: Yehezkel Bernat , Michael Jamet , Lukas Wunner , Andreas Noever Cc: linux-usb@vger.kernel.org, Gil Fine , Pengfei Xu , Dan Carpenter , Mika Westerberg Subject: [PATCH 07/11] thunderbolt: Use tb_dp_read_cap() to read DP_COMMON_CAP as well Date: Mon, 4 Dec 2023 12:38:24 +0200 Message-ID: <20231204103828.1635531-8-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> References: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 There is no point doing this separately as the register layout is the same. For this reason rename tb_dp_read_dprx() to tb_dp_wait_dprx() and call tb_dp_read_cap() instead. While there add debug log if the DPRX capability read times out. Signed-off-by: Mika Westerberg --- drivers/thunderbolt/tunnel.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/thunderbolt/tunnel.c b/drivers/thunderbolt/tunnel.c index 7534cd3a81f4..a46ae3f598c5 100644 --- a/drivers/thunderbolt/tunnel.c +++ b/drivers/thunderbolt/tunnel.c @@ -1067,8 +1067,7 @@ static int tb_dp_alloc_bandwidth(struct tb_tunnel *tunnel, int *alloc_up, return 0; } -static int tb_dp_read_dprx(struct tb_tunnel *tunnel, u32 *rate, u32 *lanes, - int timeout_msec) +static int tb_dp_wait_dprx(struct tb_tunnel *tunnel, int timeout_msec) { ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec); struct tb_port *in = tunnel->src_port; @@ -1087,15 +1086,13 @@ static int tb_dp_read_dprx(struct tb_tunnel *tunnel, u32 *rate, u32 *lanes, return ret; if (val & DP_COMMON_CAP_DPRX_DONE) { - *rate = tb_dp_cap_get_rate(val); - *lanes = tb_dp_cap_get_lanes(val); - tb_tunnel_dbg(tunnel, "DPRX read done\n"); return 0; } usleep_range(100, 150); } while (ktime_before(ktime_get(), timeout)); + tb_tunnel_dbg(tunnel, "DPRX read timeout\n"); return -ETIMEDOUT; } @@ -1110,6 +1107,7 @@ static int tb_dp_read_cap(struct tb_tunnel *tunnel, unsigned int cap, u32 *rate, switch (cap) { case DP_LOCAL_CAP: case DP_REMOTE_CAP: + case DP_COMMON_CAP: break; default: @@ -1182,7 +1180,7 @@ static int tb_dp_consumed_bandwidth(struct tb_tunnel *tunnel, int *consumed_up, * reduced one). Otherwise return the remote (possibly * reduced) caps. */ - ret = tb_dp_read_dprx(tunnel, &rate, &lanes, 150); + ret = tb_dp_wait_dprx(tunnel, 150); if (ret) { if (ret == -ETIMEDOUT) ret = tb_dp_read_cap(tunnel, DP_REMOTE_CAP, @@ -1190,6 +1188,9 @@ static int tb_dp_consumed_bandwidth(struct tb_tunnel *tunnel, int *consumed_up, if (ret) return ret; } + ret = tb_dp_read_cap(tunnel, DP_COMMON_CAP, &rate, &lanes); + if (ret) + return ret; } else if (sw->generation >= 2) { ret = tb_dp_read_cap(tunnel, DP_REMOTE_CAP, &rate, &lanes); if (ret) From patchwork Mon Dec 4 10:38:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 750354 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="YjOteVXV" Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27F89E6 for ; Mon, 4 Dec 2023 02:38:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701686317; x=1733222317; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=naIQkVDqBOFmYKcMnnwGT3WOCdW4ZZF8Y3zHbaDkIrE=; b=YjOteVXVvW9GRnJOjoteOGnC8Y46AmK1PpTYj7BaTQapR26YZjPbXlT3 OIdzO88UTf4vea25DnAZYygQGZ6RTlwFULtx1l+Q2oKsr6RwSNaKU8wzQ Saq7/9lcY3hwhNHw3A6fO9sBuq95PMZSF1RzSKedcPNDYw6hMput+oTLQ zWVKs9LAkBjJToVaagVK6kZH8E0+uaUintEQT2ABlozNP5MpPb79tqxSE ZxGhPAp8iBKMPwoptFCz8qBA/SnbwRpP+iP9SLuAnwoJfjyfOiT16vQxS pC4hziisSB5DRtjMXXcEwbPukyYEfsgYcayRNj1cLEUhqvrhzEcpcZpBb Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="424880791" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="424880791" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 02:38:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="763904032" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="763904032" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 04 Dec 2023 02:38:33 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id ACDB1A7D; Mon, 4 Dec 2023 12:38:28 +0200 (EET) From: Mika Westerberg To: Yehezkel Bernat , Michael Jamet , Lukas Wunner , Andreas Noever Cc: linux-usb@vger.kernel.org, Gil Fine , Pengfei Xu , Dan Carpenter , Mika Westerberg Subject: [PATCH 08/11] thunderbolt: Improve logging when DisplayPort resource is added due to hotplug Date: Mon, 4 Dec 2023 12:38:25 +0200 Message-ID: <20231204103828.1635531-9-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> References: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Gil Fine To allow us differentiate how DisplayPort resource is added to the DisplayPort resources list make the debug log to append "hotplug" when this was due to an actual hotplug. Signed-off-by: Gil Fine Signed-off-by: Mika Westerberg --- drivers/thunderbolt/tb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thunderbolt/tb.c b/drivers/thunderbolt/tb.c index 1308f7872f97..0a32e7ec4dc0 100644 --- a/drivers/thunderbolt/tb.c +++ b/drivers/thunderbolt/tb.c @@ -1913,7 +1913,7 @@ static void tb_dp_resource_available(struct tb *tb, struct tb_port *port) return; } - tb_port_dbg(port, "DP %s resource available\n", + tb_port_dbg(port, "DP %s resource available after hotplug\n", tb_port_is_dpin(port) ? "IN" : "OUT"); list_add_tail(&port->list, &tcm->dp_resources); From patchwork Mon Dec 4 10:38:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 750355 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Cnd0S1Ga" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3BC09CC for ; Mon, 4 Dec 2023 02:38:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701686316; x=1733222316; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=057mGHnVGGK8tKJutQgSFT1RqfxhyCB2cuy/qjbnvPI=; b=Cnd0S1GanBsqtfF8UObJE3wcsgSzpltFeupv4mnsBeDhYJEzjdv5NQk+ teTA+oVhM5wQZIXZAOnyZYIN+id4INAbFbukdSgk6H8WUKbvbmhs891DZ rY+ZemC9yV/+92bfHY2ALs8CwbqeKYcaHU2gMqCIuzjow5YtLSzhKGF7v m1cjI9ogSsLlyQ1nCnH/jmcUP+g7h6o8Lev/cs1oPCmwpNZ12rPBCEard Skcpx8B4+ARWqf2wPGy0M+o6OznMxWqQOoLGLkkQ81GsmVeQBrl/05zMW rzydkFwSeE//fB1xm89yWoB2RzSDDAK0fHXRvRtiH9OXdrfbUUXOvDObR w==; X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="384116748" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="384116748" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 02:38:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="804861278" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="804861278" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga001.jf.intel.com with ESMTP; 04 Dec 2023 02:38:33 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id BB5CAA9A; Mon, 4 Dec 2023 12:38:28 +0200 (EET) From: Mika Westerberg To: Yehezkel Bernat , Michael Jamet , Lukas Wunner , Andreas Noever Cc: linux-usb@vger.kernel.org, Gil Fine , Pengfei Xu , Dan Carpenter , Mika Westerberg Subject: [PATCH 09/11] thunderbolt: Make PCIe tunnel setup and teardown follow CM guide Date: Mon, 4 Dec 2023 12:38:26 +0200 Message-ID: <20231204103828.1635531-10-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> References: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Gil Fine The USB4 Connection Manager guide suggests that the PCIe paths are enabled from the upstream adapter to the downstream adapter and vice versa on disable so make the driver follows this sequence. Signed-off-by: Gil Fine Signed-off-by: Mika Westerberg --- drivers/thunderbolt/tunnel.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/thunderbolt/tunnel.c b/drivers/thunderbolt/tunnel.c index a46ae3f598c5..f0fde79b3b02 100644 --- a/drivers/thunderbolt/tunnel.c +++ b/drivers/thunderbolt/tunnel.c @@ -199,14 +199,21 @@ static int tb_pci_activate(struct tb_tunnel *tunnel, bool activate) return res; } - res = tb_pci_port_enable(tunnel->src_port, activate); + if (activate) + res = tb_pci_port_enable(tunnel->dst_port, activate); + else + res = tb_pci_port_enable(tunnel->src_port, activate); if (res) return res; - if (tb_port_is_pcie_up(tunnel->dst_port)) { - res = tb_pci_port_enable(tunnel->dst_port, activate); + + if (activate) { + res = tb_pci_port_enable(tunnel->src_port, activate); if (res) return res; + } else { + /* Downstream router could be unplugged */ + tb_pci_port_enable(tunnel->dst_port, activate); } return activate ? 0 : tb_pci_set_ext_encapsulation(tunnel, activate); From patchwork Mon Dec 4 10:38:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 750353 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="fMFQahKp" Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1294DDF for ; Mon, 4 Dec 2023 02:38:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701686317; x=1733222317; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JER1ZaMiU5C1NPyWlks3szx/4/+GqBAHpBzad4wCHtM=; b=fMFQahKpGMsctcM7FudI82mK33mox+pCNxnVHG6o6yESH5D0SR/i9k8p lLLV9LSSluKR73Or36PtxF9KHCbpPIa5PVq8/io8IQ1Q19Ll1VIoLWfXv 6O+FKcO9mM8IswCRLr5P9lQOxFac5n98Cdq/o4uvoUhE0NuUkEmu8cmMi W0C0hCUNsyip4xQ6bpeun67oLFQMVXlbuygZzvLAO4Y14CAolnuKxYQ8T ZKFKj6JiiZvjWJzGEjCNh83vsihrXwD6d6DYvgJeqoQDItxlLOoIhBwee Fmi8qcHtB8gCnteksDLfkmW762fEkCRamTDQEHY0HsBPbV9zlPokIa4Du w==; X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="424880786" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="424880786" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 02:38:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="763904030" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="763904030" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 04 Dec 2023 02:38:33 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id C0A2FA96; Mon, 4 Dec 2023 12:38:28 +0200 (EET) From: Mika Westerberg To: Yehezkel Bernat , Michael Jamet , Lukas Wunner , Andreas Noever Cc: linux-usb@vger.kernel.org, Gil Fine , Pengfei Xu , Dan Carpenter , Mika Westerberg Subject: [PATCH 10/11] thunderbolt: Disable PCIe extended encapsulation upon teardown properly Date: Mon, 4 Dec 2023 12:38:27 +0200 Message-ID: <20231204103828.1635531-11-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> References: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Gil Fine In case of PCIe tunnel teardown (including if caused by router unplug), PCIe extended encapsulation bit should be cleared in downstream and upstream routers accordingly. Signed-off-by: Gil Fine Signed-off-by: Mika Westerberg --- drivers/thunderbolt/tunnel.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/thunderbolt/tunnel.c b/drivers/thunderbolt/tunnel.c index f0fde79b3b02..96b238b06f9d 100644 --- a/drivers/thunderbolt/tunnel.c +++ b/drivers/thunderbolt/tunnel.c @@ -173,16 +173,28 @@ static int tb_pci_set_ext_encapsulation(struct tb_tunnel *tunnel, bool enable) int ret; /* Only supported of both routers are at least USB4 v2 */ - if (tb_port_get_link_generation(port) < 4) + if ((usb4_switch_version(tunnel->src_port->sw) < 2) || + (usb4_switch_version(tunnel->dst_port->sw) < 2)) + return 0; + + if (enable && tb_port_get_link_generation(port) < 4) return 0; ret = usb4_pci_port_set_ext_encapsulation(tunnel->src_port, enable); if (ret) return ret; + /* + * Downstream router could be unplugged so disable of encapsulation + * in upstream router is still possible. + */ ret = usb4_pci_port_set_ext_encapsulation(tunnel->dst_port, enable); - if (ret) - return ret; + if (ret) { + if (enable) + return ret; + if (ret != -ENODEV) + return ret; + } tb_tunnel_dbg(tunnel, "extended encapsulation %s\n", str_enabled_disabled(enable)); From patchwork Mon Dec 4 10:38:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 750705 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ROFavngc" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9002ABB for ; Mon, 4 Dec 2023 02:38:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701686317; x=1733222317; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VDn+uGC6AMja/Vhik6R9S/Tx5/K4hy5o8hpYBAzjNkg=; b=ROFavngcHzH143zV+WCLFdtM4FWqbvQnCXT6IhiPkhrvnPYXEQskaxzf hPWDKPQMPMeVnXT3oSa1BDKZ3BWF3eub2pJYJCrTcEdJbbIug66LlpbTA Lai1Wi27clUNN9+jfct6Tim5VJ2EJEcDXC6BDCtt8JdctxZNyuCA7Kxim JEpTRBa3QQaMVAQYWUiERv+NG31PZ2UVcpCesaEeikuWGvK5cWAN7HoVb W1WekwzdvCa/YTqu8sJ3Pn0KP/9Y2doe9uvudZqx3sxsUEcbHtM6hweyt YySYMWEsht9we0xX3BTTt2HIT9AO88aK7CwBgVuuedZn3ilkmpqMvrwYD Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="384116752" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="384116752" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 02:38:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10913"; a="804861282" X-IronPort-AV: E=Sophos;i="6.04,249,1695711600"; d="scan'208";a="804861282" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga001.jf.intel.com with ESMTP; 04 Dec 2023 02:38:33 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id D2857AC4; Mon, 4 Dec 2023 12:38:28 +0200 (EET) From: Mika Westerberg To: Yehezkel Bernat , Michael Jamet , Lukas Wunner , Andreas Noever Cc: linux-usb@vger.kernel.org, Gil Fine , Pengfei Xu , Dan Carpenter , Mika Westerberg Subject: [PATCH 11/11] thunderbolt: Add support for Intel Lunar Lake Date: Mon, 4 Dec 2023 12:38:28 +0200 Message-ID: <20231204103828.1635531-12-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> References: <20231204103828.1635531-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Intel Lunar Lake has similar integrated Thunderbolt/USB4 controller as Intel Meteor Lake with some small differences in the host router (it has 3 DP IN adapters for instance). Add the Intel Lunar Lake PCI IDs to the driver list of supported devices. Tested-by: Pengfei Xu Signed-off-by: Mika Westerberg --- drivers/thunderbolt/nhi.c | 4 ++++ drivers/thunderbolt/nhi.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/drivers/thunderbolt/nhi.c b/drivers/thunderbolt/nhi.c index 4b7bec74e89f..fb4f46e51753 100644 --- a/drivers/thunderbolt/nhi.c +++ b/drivers/thunderbolt/nhi.c @@ -1517,6 +1517,10 @@ static struct pci_device_id nhi_ids[] = { .driver_data = (kernel_ulong_t)&icl_nhi_ops }, { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MTL_P_NHI1), .driver_data = (kernel_ulong_t)&icl_nhi_ops }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_LNL_NHI0), + .driver_data = (kernel_ulong_t)&icl_nhi_ops }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_LNL_NHI1), + .driver_data = (kernel_ulong_t)&icl_nhi_ops }, { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_80G_NHI) }, { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_40G_NHI) }, diff --git a/drivers/thunderbolt/nhi.h b/drivers/thunderbolt/nhi.h index 0f029ce75882..7a07c7c1a9c2 100644 --- a/drivers/thunderbolt/nhi.h +++ b/drivers/thunderbolt/nhi.h @@ -90,6 +90,8 @@ extern const struct tb_nhi_ops icl_nhi_ops; #define PCI_DEVICE_ID_INTEL_TGL_H_NHI1 0x9a21 #define PCI_DEVICE_ID_INTEL_RPL_NHI0 0xa73e #define PCI_DEVICE_ID_INTEL_RPL_NHI1 0xa76d +#define PCI_DEVICE_ID_INTEL_LNL_NHI0 0xa833 +#define PCI_DEVICE_ID_INTEL_LNL_NHI1 0xa834 #define PCI_CLASS_SERIAL_USB_USB4 0x0c0340