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Wysocki" , Hans de Goede , Shyam Sundar S K , "open list:PCI SUBSYSTEM" , "open list:X86 PLATFORM DRIVERS" , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , "Lukas Wunner" , Kai-Heng Feng , , , Mario Limonciello , "Rafael J. Wysocki" Subject: [PATCH v2 1/4] PCI: Make d3cold_allowed sysfs attribute read only Date: Sat, 2 Dec 2023 22:10:43 -0600 Message-ID: <20231203041046.38655-2-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231203041046.38655-1-mario.limonciello@amd.com> References: <20231203041046.38655-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E8:EE_|IA1PR12MB6601:EE_ X-MS-Office365-Filtering-Correlation-Id: aceb8e0e-9f1f-402c-19b0-08dbf48f376a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: WWNPyM9+Y6P+LXaWhbYpiXQL0y/X9RaevI6rjZnhxaqvmZ6aZnu1ur4Suoor0bNdFFFAb6onAlgqGIzqZDNfoYa7eMZxTUpGdWRtSQBwvecPWEIOQz72hbCvnENgePVK7tLCgr4W/t+d8SkHyuQ4J88lVg1iyDzjs39e1A42t2cpdG82LOC4PrBH0ucVxQu5fE7EFXLqdZK9v1zGJRl6sjTHkUyN5Dkyibr9ouYQpN8sR9uiz4FKPsACHCfxQCU5mvpJoQODJXWqUy/nGvkMaPlNkFC6hHspIM6NBYTiQ5h/1i+TntjMbQUyBVy5h6iLl1uXbKgsOukw9YgFTCtuzUIeS/yePbN0UeOW6zcdkU6nL8ZSPQ/jKdu6bd/jEpiAoFK99BSxzaw6aJxWX8zC/vhljaztz8+44Nws+j0B3TzafAVu4zDQ+Qu/4XrFnLZMxsyVVS/aRnSi4axw9NQGFqxSr1E//F5nTAq5L/1o2BnRAF39sxWOI2bU+7LuSVSE9DFNctyX+W6dxoUZLSlQTY2pUjCPyftwkqEGNIRdCUx0heMi3Eaqupka7g/X8EOfce4ZN2E9YH6zir98EPn8iRJpWPFsLRPJwHU9rDkReJrdtVXO+vUANWsHeRlpxBAERA0qRsIL6NdxAR94XvLiL6nVQDzH6vCnO0fvcLV0Q+n6rvOMazzDbxM/FEg4D0I5rUz6MqSjD/jl45Wrg710jyb4rmBRcuFoBR2ZJEXLygETq9XGwCjjdjVWfvdl3ddCYmMUfeC/axt5ayB9rmz8azilfwG2/e3BBeeIxcthya45C/FaW3rWtFNnxV9IWzUEc1fJuxDzyOWzlQwdgvFn8g== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(136003)(396003)(39860400002)(346002)(376002)(230922051799003)(230273577357003)(230173577357003)(186009)(64100799003)(451199024)(82310400011)(1800799012)(36840700001)(46966006)(40470700004)(5660300002)(40460700003)(44832011)(7416002)(86362001)(4326008)(8676002)(8936002)(2906002)(41300700001)(36756003)(2616005)(40480700001)(1076003)(356005)(81166007)(82740400003)(426003)(83380400001)(26005)(16526019)(336012)(966005)(478600001)(7696005)(6666004)(47076005)(36860700001)(316002)(54906003)(6916009)(70206006)(70586007)(36900700001)(309714004); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Dec 2023 06:06:54.8851 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: aceb8e0e-9f1f-402c-19b0-08dbf48f376a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E8.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6601 X-Spam-Level: * Before kernel 3.6 D3cold was considered "opt-in" for PCIe devices. Userspace was able to opt PCIe devices into d3cold support by using the `d3cold_allowed` sysfs attribute. The policy changed to default to enabled with commit 4f9c1397e2e8 ("PCI/PM: Enable D3/D3cold by default for most devices"). The sysfs file remains however and can potentially allow userspace to prevent the SoC from getting into the deepest sleep state on modern systems. For debugging purposes `pcie_port_pm=` can be used to control whether a PCI port will go into D3cold and runtime PM can be turned off by `/sys/bus/pci/devices/*/power/control` on PCI end points. Change the sysfs attribute to a noop that ignores the input when written and shows a warning. Simplify the internal kernel logic to drop `d3cold_allowed`. Link: https://lore.kernel.org/linux-pci/20230918132424.GA11357@wunner.de/ Acked-by: "Rafael J. Wysocki" Signed-off-by: Mario Limonciello --- Documentation/ABI/testing/sysfs-bus-pci | 4 ++-- drivers/pci/pci-acpi.c | 2 +- drivers/pci/pci-sysfs.c | 14 ++------------ drivers/pci/pci.c | 3 +-- include/linux/pci.h | 1 - 5 files changed, 6 insertions(+), 18 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-bus-pci b/Documentation/ABI/testing/sysfs-bus-pci index ecf47559f495..b5db141dfee6 100644 --- a/Documentation/ABI/testing/sysfs-bus-pci +++ b/Documentation/ABI/testing/sysfs-bus-pci @@ -283,8 +283,8 @@ Description: device will never be put into D3Cold state. If it is set, the device may be put into D3Cold state if other requirements are satisfied too. Reading this attribute will show the current - value of d3cold_allowed bit. Writing this attribute will set - the value of d3cold_allowed bit. + value of no_d3cold bit. + Writing to this attribute is deprecated and will do nothing. What: /sys/bus/pci/devices/.../sriov_totalvfs Date: November 2012 diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index 004575091596..cf108259aef6 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -911,7 +911,7 @@ pci_power_t acpi_pci_choose_state(struct pci_dev *pdev) { int acpi_state, d_max; - if (pdev->no_d3cold || !pdev->d3cold_allowed) + if (pdev->no_d3cold) d_max = ACPI_STATE_D3_HOT; else d_max = ACPI_STATE_D3_COLD; diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index 2321fdfefd7d..084301729120 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -522,17 +522,7 @@ static ssize_t d3cold_allowed_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct pci_dev *pdev = to_pci_dev(dev); - unsigned long val; - - if (kstrtoul(buf, 0, &val) < 0) - return -EINVAL; - - pdev->d3cold_allowed = !!val; - pci_bridge_d3_update(pdev); - - pm_runtime_resume(dev); - + dev_warn_once(dev, "pci: writing to d3cold_allowed is deprecated\n"); return count; } @@ -540,7 +530,7 @@ static ssize_t d3cold_allowed_show(struct device *dev, struct device_attribute *attr, char *buf) { struct pci_dev *pdev = to_pci_dev(dev); - return sysfs_emit(buf, "%u\n", pdev->d3cold_allowed); + return sysfs_emit(buf, "%u\n", !pdev->no_d3cold); } static DEVICE_ATTR_RW(d3cold_allowed); #endif diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 55bc3576a985..72505794cc72 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -3069,7 +3069,7 @@ static int pci_dev_check_d3cold(struct pci_dev *dev, void *data) bool *d3cold_ok = data; if (/* The device needs to be allowed to go D3cold ... */ - dev->no_d3cold || !dev->d3cold_allowed || + dev->no_d3cold || /* ... and if it is wakeup capable to do so from D3cold. */ (device_may_wakeup(&dev->dev) && @@ -3206,7 +3206,6 @@ void pci_pm_init(struct pci_dev *dev) dev->d3hot_delay = PCI_PM_D3HOT_WAIT; dev->d3cold_delay = PCI_PM_D3COLD_WAIT; dev->bridge_d3 = pci_bridge_d3_possible(dev); - dev->d3cold_allowed = true; dev->d1_support = false; dev->d2_support = false; diff --git a/include/linux/pci.h b/include/linux/pci.h index 60ca768bc867..2f4f6013c61a 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -376,7 +376,6 @@ struct pci_dev { unsigned int no_d1d2:1; /* D1 and D2 are forbidden */ unsigned int no_d3cold:1; /* D3cold is forbidden */ unsigned int bridge_d3:1; /* Allow D3 for bridge */ - unsigned int d3cold_allowed:1; /* D3cold is allowed by user */ unsigned int mmio_always_on:1; /* Disallow turning off io/mem decoding during BAR sizing */ unsigned int wakeup_prepared:1; From patchwork Sun Dec 3 04:10:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 750956 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="WpVtBx6h" Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2052.outbound.protection.outlook.com [40.107.243.52]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 35D6BE6; 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Mon, 4 Dec 2023 06:06:56 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by MWH0EPF000989E8.mail.protection.outlook.com (10.167.241.135) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7068.20 via Frontend Transport; Mon, 4 Dec 2023 06:06:56 +0000 Received: from AUS-P9-MLIMONCI.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Mon, 4 Dec 2023 00:06:19 -0600 From: Mario Limonciello To: Bjorn Helgaas CC: "Rafael J . Wysocki" , Hans de Goede , Shyam Sundar S K , "open list:PCI SUBSYSTEM" , "open list:X86 PLATFORM DRIVERS" , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , "Lukas Wunner" , Kai-Heng Feng , , , Mario Limonciello Subject: [PATCH v2 2/4] PCI: Refresh root ports in pci_bridge_d3_update() Date: Sat, 2 Dec 2023 22:10:44 -0600 Message-ID: <20231203041046.38655-3-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231203041046.38655-1-mario.limonciello@amd.com> References: <20231203041046.38655-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E8:EE_|SN7PR12MB6689:EE_ X-MS-Office365-Filtering-Correlation-Id: 0243b0c5-e59b-4722-369c-08dbf48f384a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: IYmBJmvMWaLgQDn+DCrXee+yavy3yJxXK6giTP4TGrldBdMbmENMFcu93XxnLBNwj4JRZiLqjs9vG59deZRz0tCAd/Hw2hyogktYNaKFI4hkKAjnMfcusk1pZIElBA7C0su5idY2ntti+EQpnUvchJP05cdW1jmT1sBf6aSZZDIi6Cnr+KIWRyBxdvlAabWK3HcXQzjHWrGIcliTGMmLpacQ1az1CvKZiNeQWMU9w+61si7sAe+M1UXOtevw701LPtae/W+gR3Bsq/+BVa++gijt0UBO0GZ+bK/G88tU3Uzx6ATMYPYkF24J4j31SgbG4Y7sbE3wx2whvdOGkq7lgSo9F6s+wF5STs3QWkaft8yGmIl/j+JWfoEsDVdfgijCcBgGvyPvykEmN38B7u7t87mDQwUSGtNwzLnIbCs6QRcR4FPb9GMr9R5mFOAiudxxU0kfCgS8O7/2ATrdgI11+NKVd+wWbKUfghG0JQSi9r57qLdDegXve1DbbLmRy7jCGHDa3Rf4fV52xjywU8XDcI9w2kJgDHqPWqXdc0Nr+FRLtoOafMHR6oEx0PPTKVQElmWndao7YW0h33KpDVLLWAKSYgTmBdYzWZsCoUrBYJyv5Q2NWwqyj0eLJeSA2rgau16Sm7+HKNDmTkcp7nvVFpApPQ7p8Q2J0MjWrKGooSwWbw3Nol1U2oWvOO8k1D2SXsSRNlhMa89UyG/PPHTABbJCy751hA9G7VOg+b6HcyLRqe9trEf3foNHfhIbvHSrP4TUOxzps7300qHTt6bxyg== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(136003)(376002)(396003)(346002)(39860400002)(230922051799003)(64100799003)(451199024)(82310400011)(1800799012)(186009)(40470700004)(36840700001)(46966006)(40460700003)(54906003)(6916009)(316002)(8936002)(86362001)(44832011)(8676002)(4326008)(70206006)(478600001)(70586007)(41300700001)(36756003)(2906002)(5660300002)(7416002)(36860700001)(81166007)(356005)(47076005)(2616005)(1076003)(7696005)(26005)(6666004)(83380400001)(82740400003)(16526019)(426003)(336012)(40480700001)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Dec 2023 06:06:56.3539 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0243b0c5-e59b-4722-369c-08dbf48f384a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E8.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB6689 X-Spam-Level: * If pci_d3cold_enable() or pci_d3cold_disable() is called on a root port it is ignored because there is no upstream bridge. If called on a root port, use `no_d3cold` variable to decide policy and also immediately refresh whether D3 is possible. Signed-off-by: Mario Limonciello --- drivers/pci/pci.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 72505794cc72..3d4aaecda457 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -3023,6 +3023,9 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge) if (pci_bridge_d3_disable) return false; + if (bridge->no_d3cold) + return false; + /* * Hotplug ports handled by firmware in System Management Mode * may not be put into D3 by the OS (Thunderbolt on non-Macs). @@ -3098,7 +3101,11 @@ void pci_bridge_d3_update(struct pci_dev *dev) bool d3cold_ok = true; bridge = pci_upstream_bridge(dev); - if (!bridge || !pci_bridge_d3_possible(bridge)) + if (!bridge) { + dev->bridge_d3 = pci_bridge_d3_possible(dev); + return; + } + if (!pci_bridge_d3_possible(bridge)) return; /* From patchwork Sun Dec 3 04:10:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 750955 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="R0NULRZ7" Received: from NAM11-DM6-obe.outbound.protection.outlook.com (mail-dm6nam11on2058.outbound.protection.outlook.com [40.107.223.58]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1FD7F9D; Sun, 3 Dec 2023 22:07:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=CZhbgJ2AT0tVmZou03nfjSA8KU9AV8tHQ7n76DbqTZxy8Twu+3njPR0iGpYNKRvc3itWorEme10snRIpgd6F69bvHrTdAmNhl2adJyaIKYopZU01eAyPRB/4tlOVzDopGFyAJK+l0e/LA+9iQ/1Mv8pibMjd3ZC9FahqtCmizSmKVHiq8em6czx9dowS1dwDm7CnA1NpXQPSkvtdglRUFThMa/1zMl869Wb3c2sP4ArjGfF3d47csZIo43FUA2IVdbxDBJjUfQulgcukW5EPqbbQhD5LkFpxQp3HdmAuOWybIzS847lVbnoOZ4eF39b1UiXXJ6Wq8bv9KqHM0ZP1xQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=aMjSSbupzvoxjDig1dmQa569JQeqhDQqP3CXEyZFiSA=; b=KG1MYCpWr0xTKMnTMAyYZLbQeWxJK4IDwb6opm4woKvbjDn9+O0F+OJ7bgV2OVcexHP4LOHXRhCtkKbLqKgBr4ik/MLkNYW1SGZHbyKeQ3frkPCeA1iK9Ruekiek+RvBIZOaThSdg0nrrH7tqE0SqSZGkwY1w447dzGNT06NEzLdoHOqQnwID1J6AzUQ4GGD++goXbmZ4VDI0yVUp+aQL/PY2kV/zJM8j46OFynaxMbZ8MWZlPY+7696zXLVyxxiJGOr0y0dmfGBI7h4vb+CUThpIH1MDNDi9sRneJBVEGxMdoysw2FoL76Zli8OHr+1jMQQdP5/KsAJ8uLVEljI5A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=google.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=aMjSSbupzvoxjDig1dmQa569JQeqhDQqP3CXEyZFiSA=; b=R0NULRZ7pv682EsnQswNpva74VDv9nVuuio+vdSa2S9UmyL8AxqN4b4+x2znKBBPRUA4H4fqiL9gI203U9WjJvaEl2wvE7IsbG3/UmBOjvHHXOm9wbwTN/I8fxt4/w4zaQuWsyZeUdAcxWVsxxEdv8eZREghMOtMoLvm9whV+mw= Received: from SJ0PR03CA0347.namprd03.prod.outlook.com (2603:10b6:a03:39c::22) by IA0PR12MB7697.namprd12.prod.outlook.com (2603:10b6:208:433::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7046.33; Mon, 4 Dec 2023 06:06:59 +0000 Received: from MWH0EPF000989E8.namprd02.prod.outlook.com (2603:10b6:a03:39c:cafe::83) by SJ0PR03CA0347.outlook.office365.com (2603:10b6:a03:39c::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7046.33 via Frontend Transport; Mon, 4 Dec 2023 06:06:59 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by MWH0EPF000989E8.mail.protection.outlook.com (10.167.241.135) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7068.20 via Frontend Transport; Mon, 4 Dec 2023 06:06:58 +0000 Received: from AUS-P9-MLIMONCI.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Mon, 4 Dec 2023 00:06:20 -0600 From: Mario Limonciello To: Bjorn Helgaas CC: "Rafael J . Wysocki" , Hans de Goede , Shyam Sundar S K , "open list:PCI SUBSYSTEM" , "open list:X86 PLATFORM DRIVERS" , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , "Lukas Wunner" , Kai-Heng Feng , , , Mario Limonciello , "Rafael J. Wysocki" Subject: [PATCH v2 3/4] ACPI: x86: s2idle: Export symbol for fetching constraints for module use Date: Sat, 2 Dec 2023 22:10:45 -0600 Message-ID: <20231203041046.38655-4-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231203041046.38655-1-mario.limonciello@amd.com> References: <20231203041046.38655-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E8:EE_|IA0PR12MB7697:EE_ X-MS-Office365-Filtering-Correlation-Id: 2e724774-8ed4-464e-10d3-08dbf48f39ca X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: FmWIkH+7/Nrg5GD3LFThSYml4shtbgmYo2ppzg488KQDnUCcwUdfyAwNiReOg6WYzes8OHBTz1Rcd57m+tZdrpemGd6JlMrwn6xGODg41LycpuWanIyUZkvybjZsC5pHyQdmjA7tyZ0my1ZuV8wu1t3LYI8t+kpsGqlyg599Xzl2IQ2gRRYLB/BeTyMSWP4MI9Q0aiPqYKxaL4LInnnK3XC6GUfXgD29+sT135dlKNo4mh93py5PpXPUahMq8m6qdQrtJ1gHg0/G9vGNX/irkSsYzviWY4Tkjc0I4BrMIWr/XWeaNdXzYLoZg2UUEHJsRAH2TauN88wgwu/Lo4Cu+749s6K75tnAGHDeCiSj39iK0T36igobcM7zVwapDhmTC6BV+m0Gt6Ex49bdcQBPsuGi9h/XjEbCsPSJIHO9CztFTRx7ozMpBFBBwuHQ6eyGKjnDEaxqrPzjXK0FHWBBdLzLAWfzS/llIqRbNUX/ZzCkYTfYK3Y9vEWQFH6Kq0O+HIPipC8uFDH49gtmfn2xi8gjmLgDW54PDTSjbPqDlKII1gQbNgmDNSu8/fLQ/KF2fwlY9UxUcsM6sgSjTT8D0HHAqMgwKesd/dvoAjfKQkO7EDTI6IQKDstGAAVgUPs+2geLMfP0p27Xd/4RRgs/DhafZQMOug3pbUnhOqpDQ2rbJYzzyIusnSuAJDqXCMIig+Y3G+eiyQOP0mSsIe/s5li6MuKyn5sDmUeLfaq7ULb/BVjMcd/MMRpgESaqdYdswiqy1ckyO+4vFPfgtoEeYQ== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(136003)(39860400002)(346002)(396003)(376002)(230922051799003)(1800799012)(64100799003)(82310400011)(186009)(451199024)(40470700004)(46966006)(36840700001)(54906003)(6916009)(70586007)(70206006)(4326008)(8676002)(8936002)(316002)(478600001)(40460700003)(6666004)(7416002)(4744005)(5660300002)(36756003)(41300700001)(2906002)(86362001)(44832011)(40480700001)(81166007)(47076005)(356005)(82740400003)(426003)(83380400001)(16526019)(2616005)(26005)(336012)(1076003)(36860700001)(7696005)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Dec 2023 06:06:58.8695 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2e724774-8ed4-464e-10d3-08dbf48f39ca X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E8.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7697 X-Spam-Level: * The amd-pmc driver will be fetching constraints to make decisions at suspend time. This driver can be compiled as a module, so export the symbol for when it is a module. Acked-by: "Rafael J. Wysocki" Signed-off-by: Mario Limonciello --- drivers/acpi/x86/s2idle.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/acpi/x86/s2idle.c b/drivers/acpi/x86/s2idle.c index 7d64e655f1b8..427d5a8fb694 100644 --- a/drivers/acpi/x86/s2idle.c +++ b/drivers/acpi/x86/s2idle.c @@ -322,6 +322,7 @@ int acpi_get_lps0_constraint(struct acpi_device *adev) return ACPI_STATE_UNKNOWN; } +EXPORT_SYMBOL_GPL(acpi_get_lps0_constraint); static void lpi_check_constraints(void) { From patchwork Sun Dec 3 04:10:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 750322 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="xxG+SriG" Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2057.outbound.protection.outlook.com [40.107.93.57]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 09207E6; Sun, 3 Dec 2023 22:07:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=m/de6TZGB9jyie/pxPtoPowzeHuvY3LD9C4tnx7ofsSqMIpyWVe1WLd2GPodAlmUUWneeGBr6bFQKZXSyTHuwL21UmBMX4C1cYyOQ7oImGp0fk2KIHHK+OM6/UhgwkQUiL0fT4nuoMK5O8zPipHTkylAGiH9+kDpY4N12ieeHo4eCNlmCpZHEto5ntIF+xVf2CCm9rZsxAWfo20q2GCpVhZiG1Y0xKKzHKTSoMiDgeMvwMwtJYkSu8fmrvppPqoHHMjt/JcSORHelfXQWB2HMM/qy9sSWLIfVMMACoulwiMzrRJyLg++o7luZufqp8WSovOU5+RrlTo9i4vOYeC+jg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=ORNQsfZuZZssD0ZhCAI+ij3YAGOBeTBp0bf4Eaf2o1A=; b=GPt6yGM3/MyOtVjwDcrdsGURStCmxESENhl2+uEf381H3fwyngtNKRAHtcunip1Djs4zhTPPDjH8yfjdm3vglborr18h7vaiX7nW5uPOPNxccXdZnJi0Rhn3LqnlODqVnYz95XA2OSfF79mwTt/v558qhhpkOZTIph4jp7XRR6A0cB9fTYgzXixe6FqGpkTjDTp84nBm0N/z5bK9LIYBBcQB/TrdDMJpswLQHQCSGN/Rv4GB7X3RyCCx+ZeSK8cnfGBM+z3BpsIzch2dphokcMBPToV7TOLJ995wfCz4aeq1FcGrJaHPMZzw1/OjjEVzxZWiCjba2GahdQ+SKFjPkA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=google.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ORNQsfZuZZssD0ZhCAI+ij3YAGOBeTBp0bf4Eaf2o1A=; b=xxG+SriGXDjQFSeVh52B7h0rLkCOW3x9vl5TQGbSevRV86bZejgcBt+jZ72mtKXY1cpthxbqusaMKR+krYKQnMWjtFMOLHVulF9OJg4gi2iAG6xL50oL/7AfJSDCrYAyOFIE7eW8UIKO3RmXVqrW2pb4gAH6sw35CbDP7V0jEys= Received: from MW4PR03CA0165.namprd03.prod.outlook.com (2603:10b6:303:8d::20) by CH2PR12MB4922.namprd12.prod.outlook.com (2603:10b6:610:65::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7046.33; Mon, 4 Dec 2023 06:07:02 +0000 Received: from MWH0EPF000989E9.namprd02.prod.outlook.com (2603:10b6:303:8d:cafe::6e) by MW4PR03CA0165.outlook.office365.com (2603:10b6:303:8d::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7046.33 via Frontend Transport; Mon, 4 Dec 2023 06:07:01 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by MWH0EPF000989E9.mail.protection.outlook.com (10.167.241.136) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7068.20 via Frontend Transport; Mon, 4 Dec 2023 06:07:01 +0000 Received: from AUS-P9-MLIMONCI.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Mon, 4 Dec 2023 00:06:55 -0600 From: Mario Limonciello To: Bjorn Helgaas CC: "Rafael J . Wysocki" , Hans de Goede , Shyam Sundar S K , "open list:PCI SUBSYSTEM" , "open list:X86 PLATFORM DRIVERS" , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , "Lukas Wunner" , Kai-Heng Feng , , , Mario Limonciello Subject: [PATCH v2 4/4] platform/x86/amd: pmc: Add support for using constraints to decide D3 policy Date: Sat, 2 Dec 2023 22:10:46 -0600 Message-ID: <20231203041046.38655-5-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231203041046.38655-1-mario.limonciello@amd.com> References: <20231203041046.38655-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E9:EE_|CH2PR12MB4922:EE_ X-MS-Office365-Filtering-Correlation-Id: 73cd6dd2-4037-4cb3-b594-08dbf48f3b84 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 6ZEswAeWATwsMTTgSnDiTHdD5nRnCQNh+Jx/Kb6XII6RJBF2niIuEb+tpViSpjkBlnPD3pSuppxonGigd2+IWVYrgGY18fUpbv9dUwOW5WbK1ha7hdSkX6UjgK48oh2yPqzU5g+02v3Yb8ZFqFtYrD7TevPz+E7vp2Xy5FX0e6MLrsNuW/FsWxwrj//nDPLKiH0OvxQTfCAcno+cb1tW4UXXwGEhU3n0dnNulhQVfd08BXxTbgFUGNFrG/8nf1kbgDILfOuECFPsh/MshnjqH1hCjIoAcigwaeapFlPQejy+Txoe95PYrmjALHCV820lsv32bT+lWEPW1AiTbH53TjKo3uT2+1kEHlZfIwtHuSndrnbm+y7+Bq8DDwlEwsLSvyUHeL4ZikhQYOI3WelhwStADreD74cAOzZKtPl+0HV+VF3fo9B1jWYW5YN7NYFVqil3seVYbCWLGu0FS6pi1xpgxov8TPpgXoBQ4XT8kG2hZrUT9j5862EycF9yur71ovlt1R5GjZcsW+U5Ny/edHTxzO+nETMzs+tCe7qakqfgFSWNCnLWdbcFbvaLT/f+m8sh03etE7mc8r+/fFUxfTcPd2Rdk006Uu1vtS/LD8Uygqp3a2jQMOXCcSCmzI+uAlVRex1MQucCsBSJ+8byGmgutkQov36h9BCypPR9VlhGgnUrcBNRqoCP+qokax9S0T1UbvaV4u3RXkD9OgOQx2EYUbutUc4oeZMNXRM0ugYTsIpc0DgM0R7jrpYM/CQR X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(39860400002)(136003)(396003)(376002)(346002)(230922051799003)(451199024)(186009)(64100799003)(82310400011)(1800799012)(36840700001)(40470700004)(46966006)(70206006)(70586007)(316002)(6916009)(54906003)(6666004)(40460700003)(966005)(478600001)(5660300002)(7416002)(41300700001)(36756003)(2906002)(4326008)(8676002)(8936002)(44832011)(86362001)(83380400001)(2616005)(36860700001)(47076005)(81166007)(356005)(426003)(336012)(26005)(16526019)(82740400003)(1076003)(40480700001)(7696005)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Dec 2023 06:07:01.6923 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 73cd6dd2-4037-4cb3-b594-08dbf48f3b84 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4922 X-Spam-Level: * The default kernel policy will allow modern machines to effectively put all PCIe bridges into PCI D3. This policy doesn't match what Windows uses. In Windows the driver stack includes a "Power Engine Plugin" (uPEP driver) to decide the policy for integrated devices using PEP device constraints. Device constraints are expressed as a number in the _DSM of the PNP0D80 device and exported by the kernel in acpi_get_lps0_constraint(). Add support for SoCs to use constraints on Linux as well for deciding target state for integrated PCI bridges. Disable existing production SoCs by default with this change. Link: https://learn.microsoft.com/en-us/windows-hardware/design/device-experiences/platform-design-for-modern-standby#low-power-core-silicon-cpu-soc-dram Acked-by: Hans de Goede Signed-off-by: Mario Limonciello --- drivers/platform/x86/amd/pmc/pmc.c | 57 ++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/drivers/platform/x86/amd/pmc/pmc.c b/drivers/platform/x86/amd/pmc/pmc.c index c3104714b480..9aa6cf4fabf1 100644 --- a/drivers/platform/x86/amd/pmc/pmc.c +++ b/drivers/platform/x86/amd/pmc/pmc.c @@ -793,6 +793,61 @@ static int amd_pmc_czn_wa_irq1(struct amd_pmc_dev *pdev) return 0; } +static inline void amd_pmc_apply_constraint(struct pci_dev *pci_dev, bool apply) +{ + if (apply) + pci_d3cold_disable(pci_dev); + else + pci_d3cold_enable(pci_dev); +} + +/* + * Constraints are specified in the ACPI LPS0 device and specify what the + * platform intended for devices that are internal to the SoC. + * + * If a constraint is present and >= to ACPI_STATE_D3, then enable D3. + * If a constraint is not present or < ACPI_STATE_D3, then disable D3. + */ +static void amd_pmc_check_constraints(struct amd_pmc_dev *pdev, bool apply) +{ + struct pci_dev *pci_dev = NULL; + struct acpi_device *adev; + int constraint; + + switch (pdev->cpu_id) { + case AMD_CPU_ID_RV: + case AMD_CPU_ID_RN: + case AMD_CPU_ID_YC: + case AMD_CPU_ID_CB: + case AMD_CPU_ID_PS: + case AMD_CPU_ID_SP: + return; + default: + break; + } + + while ((pci_dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev))) { + adev = ACPI_COMPANION(&pci_dev->dev); + if (!adev) + continue; + constraint = acpi_get_lps0_constraint(adev); + dev_dbg(&pci_dev->dev, "constraint is %d\n", constraint); + + switch (constraint) { + case ACPI_STATE_UNKNOWN: + case ACPI_STATE_D0: + case ACPI_STATE_D1: + case ACPI_STATE_D2: + amd_pmc_apply_constraint(pci_dev, apply); + continue; + /* use the logic pci_bridge_d3_possible() to decide */ + case ACPI_STATE_D3: + default: + continue; + } + } +} + static int amd_pmc_verify_czn_rtc(struct amd_pmc_dev *pdev, u32 *arg) { struct rtc_device *rtc_device; @@ -1099,6 +1154,7 @@ static int amd_pmc_probe(struct platform_device *pdev) amd_pmc_quirks_init(dev); } + amd_pmc_check_constraints(dev, TRUE); amd_pmc_dbgfs_register(dev); pm_report_max_hw_sleep(U64_MAX); return 0; @@ -1114,6 +1170,7 @@ static void amd_pmc_remove(struct platform_device *pdev) if (IS_ENABLED(CONFIG_SUSPEND)) acpi_unregister_lps0_dev(&amd_pmc_s2idle_dev_ops); + amd_pmc_check_constraints(dev, FALSE); amd_pmc_dbgfs_unregister(dev); pci_dev_put(dev->rdev); mutex_destroy(&dev->lock);