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[85.214.62.61]) by mx.google.com with ESMTPS id jn13-20020a170903050d00b001cfb52101fesi1837787plb.214.2023.11.30.12.14.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Nov 2023 12:14:18 -0800 (PST) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) client-ip=85.214.62.61; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QGMBQ+Oa; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D690387688; Thu, 30 Nov 2023 21:13:59 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="QGMBQ+Oa"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 4DC948765B; Thu, 30 Nov 2023 21:13:58 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-oo1-xc2c.google.com (mail-oo1-xc2c.google.com [IPv6:2607:f8b0:4864:20::c2c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 1466587626 for ; Thu, 30 Nov 2023 21:13:55 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=semen.protsenko@linaro.org Received: by mail-oo1-xc2c.google.com with SMTP id 006d021491bc7-58d12b53293so800898eaf.0 for ; Thu, 30 Nov 2023 12:13:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1701375233; x=1701980033; darn=lists.denx.de; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JwiKhfGYzd+YXYdJvZ0z4sS7kSl3wVtFL9OhV858Pdk=; b=QGMBQ+Oavfgocsy9YpXAhdOGlABejrGLeNBJs2Z1+rQRdAnCp06be2HAsqiRVlYTQK bQY3XWlocP9WllvBVFN3hlSdAxO+grJEY10IGMdjHGzBPMs+Zsz2AdiK9+RAAOmIQqPR yIVWAOdFYuZChO6vGQyCKVxTuybSoWt9CXTCB1DxVXHqM1P0MpYbgpjxFEqsD2bbHuah X3ZblkgD/mDLx36PkFY/DB1ih8YbDDb1uKN/s9aSJiSceF1+Aw9+pw+dLa/s1l3H1stX B5SY4cBS0A4+1ztnaR7AWK+/Q9W7liPkGuVwxpts5cvEGwBrrfD2fPQGIhbzsf3lgapX d+wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701375233; x=1701980033; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JwiKhfGYzd+YXYdJvZ0z4sS7kSl3wVtFL9OhV858Pdk=; b=l/Br+rkd7I8Q3/6DmrjoDP67y+s7yIw41rC5uQSNde/8r27mu8dgvADGWnYPuSEkqL g+km5kMnqu1ZoS2UMuAdD9Da+LC7LWDS2bsUqL5vTdyjRXyGROnLEEhWJMRJLIMFeXo2 E5CrJcaiDcra+4vv4CSrnOXlG6avFvJxuN/Zc75nsEuq5MCUYJohiFSZH5vWOnEp2spV OONP45KTgWafykYSGTEJ7WoMN7WKJScEhj5ailJAMURtdIUg8qIAzkLrI7ceM7mV9twG prXaUBlMeT/ZQnwdoUkY+TQb8/gJC8LZ4re8VXzfp5glswnhM7rciHZyLEYPv/MnOJY+ 9Xbg== X-Gm-Message-State: AOJu0Yw08GZvpDXlxvIRBnUvYKVC+tOzHCJsNJ3xC+bzcHYX882sEgze Zi4k9BJs6VCEq1oaQWxg/Cnrkg== X-Received: by 2002:a05:6820:1623:b0:58d:981e:bc5c with SMTP id bb35-20020a056820162300b0058d981ebc5cmr813454oob.7.1701375233701; Thu, 30 Nov 2023 12:13:53 -0800 (PST) Received: from localhost ([136.62.192.75]) by smtp.gmail.com with ESMTPSA id eg7-20020a0568200b8700b005879d3aa1bfsm284406oob.5.2023.11.30.12.13.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Nov 2023 12:13:53 -0800 (PST) From: Sam Protsenko To: Minkyu Kang , Tom Rini Cc: Andre Przywara , Simon Glass , u-boot@lists.denx.de Subject: [PATCH 1/7] pinctrl: exynos: Improve coding style Date: Thu, 30 Nov 2023 14:13:46 -0600 Message-Id: <20231130201352.6379-2-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231130201352.6379-1-semen.protsenko@linaro.org> References: <20231130201352.6379-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Style commit, no functional change. Signed-off-by: Sam Protsenko --- drivers/pinctrl/exynos/pinctrl-exynos.c | 3 ++- drivers/pinctrl/exynos/pinctrl-exynos.h | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/exynos/pinctrl-exynos.c b/drivers/pinctrl/exynos/pinctrl-exynos.c index 898185479ba3..995a3a0ee5fd 100644 --- a/drivers/pinctrl/exynos/pinctrl-exynos.c +++ b/drivers/pinctrl/exynos/pinctrl-exynos.c @@ -57,7 +57,8 @@ static unsigned long pin_to_bank_base(struct udevice *dev, const char *pin_name, /* lookup the pin bank data using the pin bank name */ while (true) { - const struct samsung_pin_ctrl *pin_ctrl = &pin_ctrl_array[pin_ctrl_idx]; + const struct samsung_pin_ctrl *pin_ctrl = + &pin_ctrl_array[pin_ctrl_idx]; nr_banks = pin_ctrl->nr_banks; if (!nr_banks) diff --git a/drivers/pinctrl/exynos/pinctrl-exynos.h b/drivers/pinctrl/exynos/pinctrl-exynos.h index cbc5174b48cb..6b19f196bc3a 100644 --- a/drivers/pinctrl/exynos/pinctrl-exynos.h +++ b/drivers/pinctrl/exynos/pinctrl-exynos.h @@ -27,7 +27,7 @@ struct samsung_pin_bank_data { #define EXYNOS_PIN_BANK(pins, reg, id) \ { \ - .offset = reg, \ + .offset = reg, \ .nr_pins = pins, \ .name = id \ } From patchwork Thu Nov 30 20:13:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 748505 Delivered-To: patch@linaro.org Received: by 2002:adf:e9c2:0:b0:32d:baff:b0ca with SMTP id l2csp1099360wrn; Thu, 30 Nov 2023 12:14:32 -0800 (PST) X-Google-Smtp-Source: AGHT+IFptlWlvstQJjrCc0hMIxHZ/KWxICQ7oElZOTgBUzTDudTPQUtP9LcijwegwseGO05/X9WW X-Received: by 2002:aa7:98dd:0:b0:6cd:e189:c0f4 with SMTP id e29-20020aa798dd000000b006cde189c0f4mr4537014pfm.12.1701375272563; Thu, 30 Nov 2023 12:14:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701375272; cv=none; d=google.com; s=arc-20160816; b=l7vOHsX8d/NydoffG5OFX+WvBYERb42xFMuSpwsJZNfqNVuRPYmTsjfLdc+JCj5Xo+ XXCDmztFTg+d7N8wJeoFKXf/hnIy1ZDJdWf3iGEc3wIuF5TpWrNk3/u/CrvG29/dn2ZD sDtzw6ptYqhNElexUDhevYm/gbibgnHxitFbFYWbW0Zc3Srcq3/H6iOTq9B07w6JP/Ni DBFS7pL4bMBR0U6SkqbBJZ4NayltUsQjnulDlTh4CSBqMEx+56aSvWDFIynT6AmGLm4k Ib4DBV8LxJBEIg1DK9v64TINC3pZcAoRMFjXx9fKXOQG3LJtxbwGDIfXAScEpA1lkXvo 6lxQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=24twM8Gopj8Bt8YRkSH7X4CY1ye6W4+acyuqiKl0gnE=; fh=249O9ROWnprHO+UayzBfuXR6OIgDvHdlAHTtO8OnZEM=; b=slE/HQUK3nTSG6vOWTfN0rcArGu4dmBunu7vWLjFPrNds9KFc9gotPrlmd8Ti1VVNY /qcjUq8fHZSjD9Fz9GTMObiiwaMw5Awh4CokgxGl0VHpIf2sJlJ8yL8kjYwvHuEs0eD9 fzmt0keJBtpXueQUY9Ke7VhQlnE1ZWHFYC3Q7UAOvOmKkZHls2BbfG9GrJ0MDWxx4NY+ 3454pIDlKJBGcLY6hHOUdsMEcYXNM2+NDfatQpPSTY6a6sH81JghVAthUV91StUSshSx fjIma7hU882BjATaaSohPLLG8yw518ILg/XQgLo5EH9K2SDU4JrPKdA0w69viwPs52w6 w0fA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PoejjSav; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Extract it into a separate function first, as a refactoring commit. No functional change. Signed-off-by: Sam Protsenko --- drivers/pinctrl/exynos/pinctrl-exynos.c | 27 ++++++++++++++++--------- 1 file changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/pinctrl/exynos/pinctrl-exynos.c b/drivers/pinctrl/exynos/pinctrl-exynos.c index 995a3a0ee5fd..2d194ba0a4b5 100644 --- a/drivers/pinctrl/exynos/pinctrl-exynos.c +++ b/drivers/pinctrl/exynos/pinctrl-exynos.c @@ -34,6 +34,22 @@ void exynos_pinctrl_setup_peri(struct exynos_pinctrl_config_data *conf, } } +static void parse_pin(const char *pin_name, u32 *pin, char *bank_name) +{ + u32 idx = 0; + + /* + * The format of the pin name is -. + * Example: gpa0-4 (gpa0 is the bank_name name and 4 is the pin number. + */ + while (pin_name[idx] != '-') { + bank_name[idx] = pin_name[idx]; + idx++; + } + bank_name[idx] = '\0'; + *pin = pin_name[++idx] - '0'; +} + /* given a pin-name, return the address of pin config registers */ static unsigned long pin_to_bank_base(struct udevice *dev, const char *pin_name, u32 *pin) @@ -44,16 +60,7 @@ static unsigned long pin_to_bank_base(struct udevice *dev, const char *pin_name, u32 nr_banks, pin_ctrl_idx = 0, idx = 0, bank_base; char bank[10]; - /* - * The format of the pin name is -. - * Example: gpa0-4 (gpa0 is the bank name and 4 is the pin number. - */ - while (pin_name[idx] != '-') { - bank[idx] = pin_name[idx]; - idx++; - } - bank[idx] = '\0'; - *pin = pin_name[++idx] - '0'; + parse_pin(pin_name, pin, bank); /* lookup the pin bank data using the pin bank name */ while (true) { From patchwork Thu Nov 30 20:13:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 748506 Delivered-To: patch@linaro.org Received: by 2002:adf:e9c2:0:b0:32d:baff:b0ca with SMTP id l2csp1099469wrn; Thu, 30 Nov 2023 12:14:46 -0800 (PST) X-Google-Smtp-Source: AGHT+IHMRiW1NN2qpiPZMe+9bLRKY5WkeVexC8Nc8sSDYp8WVdyQ7gdp1LTBYzzlrGycq9ihBzKg X-Received: by 2002:a17:90b:1c8a:b0:281:5550:ce3d with SMTP id oo10-20020a17090b1c8a00b002815550ce3dmr23483083pjb.31.1701375285981; Thu, 30 Nov 2023 12:14:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701375285; cv=none; d=google.com; s=arc-20160816; b=aHqAbwB1I2VwkGOTDxeJUkFNpYsv2FIAU2tOGpOGht4mhBXtheNM8OoUT45/kc00lG yqrEHp/9tlmTpcIL5JLm5pKR1rW+ATcsllZ60+0VXEXpkegXt7fSNOHCB8qM+G/p1v4z x96Xp8PKLIK4Jk3YwfiHWPA9SNUVQs/tn07qAsm5+s0EGuT8MEKp3C7m6OJi7Aj9fLIf cFZwGocqlpt/hkjvRKQv5ixJTFQ+lHhHKwg/hpp2TgSIW146+P0Gn+w/YQwhgJxO6cnM dYyFNmEGf+KVBq10mjtQ2/+PAeTzfPrkGuDBiKQT5lb9KD/FzJ0e5JMzgo6+hOwrauOc 2ITg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=1dQ+OJ+v+4GaZBrUVXfZxpg4MaQ0769sAE8M5OwE8rI=; fh=249O9ROWnprHO+UayzBfuXR6OIgDvHdlAHTtO8OnZEM=; b=izItwmiNKXy7gOXWcU0/1yn1KqZWHLNxwkDOmEKczK5ll/lM1E6wUIOqtWIkcjf6WN haDtS+o9C175tfiOuXKknSuGWcCIqZ6pqDRKCn0j/XY5sB8o98HvP198K76Uk4NI8u1v mUvFnOiSnVppNGceEBG8VMRn1ATm33RyyP9tggT65+CjtwRYHWhbEnCFrAA5WR1oVqic uDsKajU7TBpdOsPBM6ZfNuiccOFZOY9zXpg+laeH/7S9sUpF3d4ozKBH2EGmeFM8y+S1 TeVnD17nQmCGm3jFFvhFdXqEX77HnzFV6hni+XPMB83M12M585L81RHcVXYZc5DT7do/ vCkg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=akJOvQpM; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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This in turn leads to the extraction of parse_pin(), so the caller has to use it before calling get_bank(). No functional change. This is a refactoring commit which prepares pinctrl driver code for handling different sizes of register fields, which will be added next. Signed-off-by: Sam Protsenko --- drivers/pinctrl/exynos/pinctrl-exynos.c | 27 +++++++++++++------------ 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/drivers/pinctrl/exynos/pinctrl-exynos.c b/drivers/pinctrl/exynos/pinctrl-exynos.c index 2d194ba0a4b5..d908927135b6 100644 --- a/drivers/pinctrl/exynos/pinctrl-exynos.c +++ b/drivers/pinctrl/exynos/pinctrl-exynos.c @@ -50,17 +50,14 @@ static void parse_pin(const char *pin_name, u32 *pin, char *bank_name) *pin = pin_name[++idx] - '0'; } -/* given a pin-name, return the address of pin config registers */ -static unsigned long pin_to_bank_base(struct udevice *dev, const char *pin_name, - u32 *pin) +/* given a bank name, find out the pin bank structure */ +static const struct samsung_pin_bank_data *get_bank(struct udevice *dev, + const char *bank_name) { struct exynos_pinctrl_priv *priv = dev_get_priv(dev); const struct samsung_pin_ctrl *pin_ctrl_array = priv->pin_ctrl; const struct samsung_pin_bank_data *bank_data; - u32 nr_banks, pin_ctrl_idx = 0, idx = 0, bank_base; - char bank[10]; - - parse_pin(pin_name, pin, bank); + u32 nr_banks, pin_ctrl_idx = 0, idx = 0; /* lookup the pin bank data using the pin bank name */ while (true) { @@ -75,15 +72,13 @@ static unsigned long pin_to_bank_base(struct udevice *dev, const char *pin_name, for (idx = 0; idx < nr_banks; idx++) { debug("pinctrl[%d] bank_data[%d] name is: %s\n", pin_ctrl_idx, idx, bank_data[idx].name); - if (!strcmp(bank, bank_data[idx].name)) { - bank_base = priv->base + bank_data[idx].offset; - break; - } + if (!strcmp(bank_name, bank_data[idx].name)) + return &bank_data[idx]; } pin_ctrl_idx++; } - return bank_base; + return NULL; } /** @@ -93,6 +88,7 @@ static unsigned long pin_to_bank_base(struct udevice *dev, const char *pin_name, */ int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config) { + struct exynos_pinctrl_priv *priv = dev_get_priv(dev); const void *fdt = gd->fdt_blob; int node = dev_of_offset(config); unsigned int count, idx, pin_num; @@ -113,10 +109,15 @@ int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config) pindrv = fdtdec_get_int(fdt, node, "samsung,pin-drv", -1); for (idx = 0; idx < count; idx++) { + const struct samsung_pin_bank_data *bank; + char bank_name[10]; + name = fdt_stringlist_get(fdt, node, "samsung,pins", idx, NULL); if (!name) continue; - reg = pin_to_bank_base(dev, name, &pin_num); + parse_pin(name, &pin_num, bank_name); + bank = get_bank(dev, bank_name); + reg = priv->base + bank->offset; if (pinfunc != -1) { value = readl(reg + PIN_CON); From patchwork Thu Nov 30 20:13:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 748507 Delivered-To: patch@linaro.org Received: by 2002:adf:e9c2:0:b0:32d:baff:b0ca with SMTP id l2csp1099558wrn; Thu, 30 Nov 2023 12:14:59 -0800 (PST) X-Google-Smtp-Source: AGHT+IHX8T9QuqIb/U6zjV+nvm2EtZh7mKnTzXv/BuM2Kn7pit7YYVrRzFTCe3xCtYle41d2hjoW X-Received: by 2002:a17:902:d5cb:b0:1cf:5629:a0c6 with SMTP id g11-20020a170902d5cb00b001cf5629a0c6mr19825015plh.13.1701375299015; Thu, 30 Nov 2023 12:14:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701375298; cv=none; d=google.com; s=arc-20160816; b=dMy79dfFFGMK8UQThb7xenrcB/3jbuQ92vHnnC5ywn5nCmRBYiygZmKtwAo0bpisdB 9Bu3Z5oj3PgSJ7tzQfMQcwlDFwfboAGNWrZ0oTHSNEGSeDTAwclB/aHkt1w0JQFCB3pP z2VURm8RqI1mTGw7Nxb9Y2Y3fuORoDntBTrPw6FaEqQuPU25ftbk8ySvCZc5u3bQorr/ 9wGHowZuuI4YjsANHz9IM3ItObh9qLzAoQYahO5FpP2ufRssRsukYasZXHV/NZWagBSG MLhYm8fHjwicqAU9HgsZPehgw5rZAYKkLXbyFJff8BX28V51LXiPTQnxVy49iQK/YlbU toYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=kvk1SlQL6OnKuY6/TY15o9HNW/wvtBYCQKSY7DZLrhs=; fh=249O9ROWnprHO+UayzBfuXR6OIgDvHdlAHTtO8OnZEM=; b=btxIw46mmq7cA0eDrAxuhPTmtcXpItziBq7zNkkQ1SGbMZTHIcCgWwWKeT+H2vvgBa 1k4FbqXT/xKlk+eApKe62Qs6wAALsNEM0p4aDVeVgRhprvfzw8QhyBAD4c0tCKcmM/y5 yW3bgYGyr2EkJuM1f+SCnTdTD1DAZnbxs6oSza2cKiCcdjqEh07ZlDNIxXNG6nbJXW5T DsWHXdC1P7cGuBrgQvd9gTg+/Dzg4lNBqznql/pdfY7oWnC1YOch2rQF8Rg9WlXBSVqv f/fnsoH+wRaY5fewAA9bfVnY18QIEKzwJTFf8IyECo3jnB8scue9bBgWRYLJWD/4hczh W6zA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tlm8eNwv; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Instead provide a way for pinctrl drivers to specify different pin bank register offsets and widths. This in turn makes it possible to add support for new SoCs that have registers with offset/width values different than generic ones already available in pinctrl-exynos driver. Offset constants (now unused in pinctrl-exynos.c) are moved to pinctrl-exynos7420 driver, which is the single user of those constants. The design of this patch follows Linux kernel pinctrl-exynos driver design, in terms of added data structures and types. This patch doesn't add support for any new SoCs and shouldn't introduce any functional changes. Signed-off-by: Sam Protsenko --- drivers/pinctrl/exynos/pinctrl-exynos.c | 42 ++++++++++++++------- drivers/pinctrl/exynos/pinctrl-exynos.h | 34 +++++++++++++++-- drivers/pinctrl/exynos/pinctrl-exynos7420.c | 2 + 3 files changed, 61 insertions(+), 17 deletions(-) diff --git a/drivers/pinctrl/exynos/pinctrl-exynos.c b/drivers/pinctrl/exynos/pinctrl-exynos.c index d908927135b6..9a51653be864 100644 --- a/drivers/pinctrl/exynos/pinctrl-exynos.c +++ b/drivers/pinctrl/exynos/pinctrl-exynos.c @@ -15,6 +15,12 @@ DECLARE_GLOBAL_DATA_PTR; +/* CON, DAT, PUD, DRV */ +const struct samsung_pin_bank_type bank_type_alive = { + .fld_width = { 4, 1, 2, 2, }, + .reg_offset = { 0x00, 0x04, 0x08, 0x0c, }, +}; + /** * exynos_pinctrl_setup_peri: setup pinctrl for a peripheral. * conf: soc specific pin configuration data array @@ -81,6 +87,22 @@ static const struct samsung_pin_bank_data *get_bank(struct udevice *dev, return NULL; } +static void exynos_pinctrl_set_pincfg(unsigned long reg_base, u32 pin_num, + u32 val, enum pincfg_type pincfg, + const struct samsung_pin_bank_type *type) +{ + u32 width = type->fld_width[pincfg]; + u32 reg_offset = type->reg_offset[pincfg]; + u32 mask = (1 << width) - 1; + u32 shift = pin_num * width; + u32 data; + + data = readl(reg_base + reg_offset); + data &= ~(mask << shift); + data |= val << shift; + writel(data, reg_base + reg_offset); +} + /** * exynos_pinctrl_set_state: configure a pin state. * dev: the pinctrl device to be configured. @@ -93,7 +115,7 @@ int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config) int node = dev_of_offset(config); unsigned int count, idx, pin_num; unsigned int pinfunc, pinpud, pindrv; - unsigned long reg, value; + unsigned long reg; const char *name; /* @@ -120,24 +142,18 @@ int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config) reg = priv->base + bank->offset; if (pinfunc != -1) { - value = readl(reg + PIN_CON); - value &= ~(0xf << (pin_num << 2)); - value |= (pinfunc << (pin_num << 2)); - writel(value, reg + PIN_CON); + exynos_pinctrl_set_pincfg(reg, pin_num, pinfunc, + PINCFG_TYPE_FUNC, bank->type); } if (pinpud != -1) { - value = readl(reg + PIN_PUD); - value &= ~(0x3 << (pin_num << 1)); - value |= (pinpud << (pin_num << 1)); - writel(value, reg + PIN_PUD); + exynos_pinctrl_set_pincfg(reg, pin_num, pinpud, + PINCFG_TYPE_PUD, bank->type); } if (pindrv != -1) { - value = readl(reg + PIN_DRV); - value &= ~(0x3 << (pin_num << 1)); - value |= (pindrv << (pin_num << 1)); - writel(value, reg + PIN_DRV); + exynos_pinctrl_set_pincfg(reg, pin_num, pindrv, + PINCFG_TYPE_DRV, bank->type); } } diff --git a/drivers/pinctrl/exynos/pinctrl-exynos.h b/drivers/pinctrl/exynos/pinctrl-exynos.h index 6b19f196bc3a..743bb5573091 100644 --- a/drivers/pinctrl/exynos/pinctrl-exynos.h +++ b/drivers/pinctrl/exynos/pinctrl-exynos.h @@ -8,25 +8,51 @@ #ifndef __PINCTRL_EXYNOS_H_ #define __PINCTRL_EXYNOS_H_ -#define PIN_CON 0x00 /* Offset of pin function register */ -#define PIN_DAT 0x04 /* Offset of pin data register */ -#define PIN_PUD 0x08 /* Offset of pin pull up/down config register */ -#define PIN_DRV 0x0C /* Offset of pin drive strength register */ +/** + * enum pincfg_type - possible pin configuration types supported. + * @PINCFG_TYPE_FUNC: Function configuration. + * @PINCFG_TYPE_DAT: Pin value configuration. + * @PINCFG_TYPE_PUD: Pull up/down configuration. + * @PINCFG_TYPE_DRV: Drive strength configuration. + */ +enum pincfg_type { + PINCFG_TYPE_FUNC, + PINCFG_TYPE_DAT, + PINCFG_TYPE_PUD, + PINCFG_TYPE_DRV, + + PINCFG_TYPE_NUM +}; + +/** + * struct samsung_pin_bank_type: pin bank type description + * @fld_width: widths of configuration bitfields (0 if unavailable) + * @reg_offset: offsets of configuration registers (don't care of width is 0) + */ +struct samsung_pin_bank_type { + u8 fld_width[PINCFG_TYPE_NUM]; + u8 reg_offset[PINCFG_TYPE_NUM]; +}; /** * struct samsung_pin_bank_data: represent a controller pin-bank data. + * @type: type of the bank (register offsets and bitfield widths) * @offset: starting offset of the pin-bank registers. * @nr_pins: number of pins included in this bank. * @name: name to be prefixed for each pin in this pin bank. */ struct samsung_pin_bank_data { + const struct samsung_pin_bank_type *type; u32 offset; u8 nr_pins; const char *name; }; +extern const struct samsung_pin_bank_type bank_type_alive; + #define EXYNOS_PIN_BANK(pins, reg, id) \ { \ + .type = &bank_type_alive, \ .offset = reg, \ .nr_pins = pins, \ .name = id \ diff --git a/drivers/pinctrl/exynos/pinctrl-exynos7420.c b/drivers/pinctrl/exynos/pinctrl-exynos7420.c index 07870b7f51a5..77d510d8f600 100644 --- a/drivers/pinctrl/exynos/pinctrl-exynos7420.c +++ b/drivers/pinctrl/exynos/pinctrl-exynos7420.c @@ -16,6 +16,8 @@ #include "pinctrl-exynos.h" #define GPD1_OFFSET 0xc0 +#define PIN_CON 0x00 /* Offset of pin function register */ +#define PIN_PUD 0x08 /* Offset of pin pull up/down config register */ static struct exynos_pinctrl_config_data serial2_conf[] = { { From patchwork Thu Nov 30 20:13:50 2023 Content-Type: text/plain; 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Get rid of that code duplication by extracting the corresponding data knowledge into an actual data structure (array), and then just iterating over it. No functional change, it's a refactoring commit. Signed-off-by: Sam Protsenko --- drivers/pinctrl/exynos/pinctrl-exynos.c | 35 ++++++++++++++----------- 1 file changed, 19 insertions(+), 16 deletions(-) diff --git a/drivers/pinctrl/exynos/pinctrl-exynos.c b/drivers/pinctrl/exynos/pinctrl-exynos.c index 9a51653be864..e79ce5113d84 100644 --- a/drivers/pinctrl/exynos/pinctrl-exynos.c +++ b/drivers/pinctrl/exynos/pinctrl-exynos.c @@ -21,6 +21,13 @@ const struct samsung_pin_bank_type bank_type_alive = { .reg_offset = { 0x00, 0x04, 0x08, 0x0c, }, }; +static const char * const exynos_pinctrl_props[PINCFG_TYPE_NUM] = { + [PINCFG_TYPE_FUNC] = "samsung,pin-function", + [PINCFG_TYPE_DAT] = "samsung,pin-val", + [PINCFG_TYPE_PUD] = "samsung,pin-pud", + [PINCFG_TYPE_DRV] = "samsung,pin-drv", +}; + /** * exynos_pinctrl_setup_peri: setup pinctrl for a peripheral. * conf: soc specific pin configuration data array @@ -114,7 +121,7 @@ int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config) const void *fdt = gd->fdt_blob; int node = dev_of_offset(config); unsigned int count, idx, pin_num; - unsigned int pinfunc, pinpud, pindrv; + unsigned int pinvals[PINCFG_TYPE_NUM]; unsigned long reg; const char *name; @@ -126,13 +133,16 @@ int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config) if (count <= 0) return -EINVAL; - pinfunc = fdtdec_get_int(fdt, node, "samsung,pin-function", -1); - pinpud = fdtdec_get_int(fdt, node, "samsung,pin-pud", -1); - pindrv = fdtdec_get_int(fdt, node, "samsung,pin-drv", -1); + for (idx = 0; idx < PINCFG_TYPE_NUM; ++idx) { + pinvals[idx] = fdtdec_get_int(fdt, node, + exynos_pinctrl_props[idx], -1); + } + pinvals[PINCFG_TYPE_DAT] = -1; /* ignore GPIO data register */ for (idx = 0; idx < count; idx++) { const struct samsung_pin_bank_data *bank; char bank_name[10]; + int pincfg; name = fdt_stringlist_get(fdt, node, "samsung,pins", idx, NULL); if (!name) @@ -141,19 +151,12 @@ int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config) bank = get_bank(dev, bank_name); reg = priv->base + bank->offset; - if (pinfunc != -1) { - exynos_pinctrl_set_pincfg(reg, pin_num, pinfunc, - PINCFG_TYPE_FUNC, bank->type); - } - - if (pinpud != -1) { - exynos_pinctrl_set_pincfg(reg, pin_num, pinpud, - PINCFG_TYPE_PUD, bank->type); - } + for (pincfg = 0; pincfg < PINCFG_TYPE_NUM; ++pincfg) { + unsigned int val = pinvals[pincfg]; - if (pindrv != -1) { - exynos_pinctrl_set_pincfg(reg, pin_num, pindrv, - PINCFG_TYPE_DRV, bank->type); + if (val != -1) + exynos_pinctrl_set_pincfg(reg, pin_num, val, + pincfg, bank->type); } } From patchwork Thu Nov 30 20:13:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 748509 Delivered-To: patch@linaro.org Received: by 2002:adf:e9c2:0:b0:32d:baff:b0ca with SMTP id l2csp1099809wrn; Thu, 30 Nov 2023 12:15:27 -0800 (PST) X-Google-Smtp-Source: AGHT+IE4KKwGwNFUOdNMdiRo0Vz1qgiXpxE0OjcDq/nPRkKG7/77Tum4GdKAhWRELaXVN56f57Fj X-Received: by 2002:a05:6a20:1611:b0:181:bc16:48dd with SMTP id l17-20020a056a20161100b00181bc1648ddmr22777979pzj.47.1701375326875; Thu, 30 Nov 2023 12:15:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701375326; cv=none; d=google.com; s=arc-20160816; b=bm5/2I6oeCSSC48nDwaai86wHXw0piVKip7RYWOkrVVo8iWXik5iThmmybIjq6CS+1 2LFjPJ60K39KgMMtfBtDeycLAhEu1z1fi0KDDk4Z/CsRhYcSyFumK8B7a4BfmgiaZ56J MdSB+J1AHLznl2dWU8z+XnJ9H6MTpnKVVYuGRg71tKF6GL+YP+bbpNpYFbgv4SVUJIWk PNQb9PDuCrSt6KyGC/cXTYbbRkXRO8hsldu8RsoJZbC0Q62JuQgBxHc3fRTAOVHdZ/p9 71s5m5k6n3a3NCPxt6kP/txFZZMC7Tnd1dRl8ErdJK63bv/daBokV/izm059G8DrDqb0 VndQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ZGo3AxZObaWz6+b2adD14ayircumvMyk4o/xEJcx/1A=; fh=249O9ROWnprHO+UayzBfuXR6OIgDvHdlAHTtO8OnZEM=; b=y7Ach4X1C9z0DWN0pW4Y+buQoybFzl+Deg5yjboGntqy1Hz4jmMYZJuoCa3u5JbfVD 004PFHNIDeYexR/bjubXQYX/DVcMqbE3c+SwMOapGv4ddu0Qp5GAemNQ6QQeRxyZkjm4 /L32u/c4rvpcheSujWpcAtDiYJzD96y2kxuZiGePpiZOfNhH5AQexlOUIvyJ7COtYsKJ jy0wfKi9MD4j2XUKatsQEWaPVXOcCJKqJehFbggNDNutrZBSyHM1qHAo1EPCAlBcK5Hc osTdgXK4zTekV79F9KEAsJKASq0knQwBKIwHgj5bBPcnlUMLLTTy5NxrueWUp2rjale+ Wk2A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ididmm5Q; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Style commit, no functional change. Signed-off-by: Sam Protsenko --- drivers/pinctrl/exynos/pinctrl-exynos.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/exynos/pinctrl-exynos.c b/drivers/pinctrl/exynos/pinctrl-exynos.c index e79ce5113d84..b6af3befbf9b 100644 --- a/drivers/pinctrl/exynos/pinctrl-exynos.c +++ b/drivers/pinctrl/exynos/pinctrl-exynos.c @@ -120,10 +120,8 @@ int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config) struct exynos_pinctrl_priv *priv = dev_get_priv(dev); const void *fdt = gd->fdt_blob; int node = dev_of_offset(config); - unsigned int count, idx, pin_num; + unsigned int count, idx; unsigned int pinvals[PINCFG_TYPE_NUM]; - unsigned long reg; - const char *name; /* * refer to the following document for the pinctrl bindings @@ -141,7 +139,10 @@ int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config) for (idx = 0; idx < count; idx++) { const struct samsung_pin_bank_data *bank; + unsigned int pin_num; char bank_name[10]; + unsigned long reg; + const char *name; int pincfg; name = fdt_stringlist_get(fdt, node, "samsung,pins", idx, NULL); From patchwork Thu Nov 30 20:13:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 748510 Delivered-To: patch@linaro.org Received: by 2002:adf:e9c2:0:b0:32d:baff:b0ca with SMTP id l2csp1099941wrn; Thu, 30 Nov 2023 12:15:41 -0800 (PST) X-Google-Smtp-Source: AGHT+IGWLFIRWjm482I9+yGIQFHqiuo7h2XDS4EGSiuaWf8tP5/9QifXd5pJs2UVEtSfiuVlwr+J X-Received: by 2002:a17:903:1207:b0:1cc:5cbf:50d2 with SMTP id l7-20020a170903120700b001cc5cbf50d2mr26596088plh.59.1701375340943; Thu, 30 Nov 2023 12:15:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701375340; cv=none; d=google.com; s=arc-20160816; b=LsLOASamQ2dfRznvyxeq8jTa64Adyq28XoVMHb4TiFw5RxcHq/rI1K8y+XHdFbhVa8 3iGg9uaLQCr3cKUqBbZaDO9hNKWZSriiUIq71sjGO9fgyzhmIOcJ7tEOlP7aFzKBK+nM 7cIeLkVMyHqiwxGCm9lEzxAvSY8ENglane32vUXvlzSk09yggZVZpAPHB4CGAQD3mNPw dY/yzjm7qH52yBAIzEGB4vJhUZfvpX3RCQl0969HyxUGlLoJEOT2iTl/NRzYhJ7CRObp 9jxoBBBSDTxFIwOPzMo92RxewcH7QMJm/3cABhHTOHPtb6Qr3iMYN1KXGSba4S2FoD1p bLLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=uz7g8RyqOHqcuJRD1Ca00DNs6X4nhUazkR8kMGsHWm4=; fh=249O9ROWnprHO+UayzBfuXR6OIgDvHdlAHTtO8OnZEM=; b=Sgr1CojHGVvNKHmfE8JavqU0S9MDYV1SG2gZA4pCSvd2t9OnSAZE0GoRWiSo/7ss8f bukAcn7/LY+E9+ds2bPAy+Ki26vw88g2BYqwulmkChNDfFNyvz7cRsIk+OVmS+jFGpVS LuX3c1O+q9W8fgfngpN2xj77z1jkeRoJ2DZ9qthC9Rm/+a6gIv1f8dlpKj/8bGdgCYcR LJ7DzIgkObNs+soiOg5OcTkJvQXqoeuF0PJbGIwWKqPxkRXcI2dEFIJgfD8vU7drtx4f FzHSEWf41fH1m89H9xYSW4AzBJ4XJKgSLxZO6N4r0UKj/dS9Sfx0+j1tnUom+Wmm/TU0 Yg3A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XGHSQ7q3; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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It fixes checkpatch warnings like this: WARNING: Use the livetree API (dev_read_...) #54: FILE: drivers/pinctrl/exynos/pinctrl-exynos.c:137: pinvals[idx] = fdtdec_get_int(fdt, node, and also makes it possible to avoid using the global data pointer in the driver. No functional change. Signed-off-by: Sam Protsenko --- drivers/pinctrl/exynos/pinctrl-exynos.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/drivers/pinctrl/exynos/pinctrl-exynos.c b/drivers/pinctrl/exynos/pinctrl-exynos.c index b6af3befbf9b..8a045cdf7aa8 100644 --- a/drivers/pinctrl/exynos/pinctrl-exynos.c +++ b/drivers/pinctrl/exynos/pinctrl-exynos.c @@ -9,12 +9,9 @@ #include #include #include -#include #include #include "pinctrl-exynos.h" -DECLARE_GLOBAL_DATA_PTR; - /* CON, DAT, PUD, DRV */ const struct samsung_pin_bank_type bank_type_alive = { .fld_width = { 4, 1, 2, 2, }, @@ -118,8 +115,6 @@ static void exynos_pinctrl_set_pincfg(unsigned long reg_base, u32 pin_num, int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config) { struct exynos_pinctrl_priv *priv = dev_get_priv(dev); - const void *fdt = gd->fdt_blob; - int node = dev_of_offset(config); unsigned int count, idx; unsigned int pinvals[PINCFG_TYPE_NUM]; @@ -127,13 +122,13 @@ int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config) * refer to the following document for the pinctrl bindings * linux/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt */ - count = fdt_stringlist_count(fdt, node, "samsung,pins"); + count = dev_read_string_count(config, "samsung,pins"); if (count <= 0) return -EINVAL; for (idx = 0; idx < PINCFG_TYPE_NUM; ++idx) { - pinvals[idx] = fdtdec_get_int(fdt, node, - exynos_pinctrl_props[idx], -1); + pinvals[idx] = dev_read_u32_default(config, + exynos_pinctrl_props[idx], -1); } pinvals[PINCFG_TYPE_DAT] = -1; /* ignore GPIO data register */ @@ -142,12 +137,13 @@ int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config) unsigned int pin_num; char bank_name[10]; unsigned long reg; - const char *name; - int pincfg; + const char *name = NULL; + int pincfg, err; - name = fdt_stringlist_get(fdt, node, "samsung,pins", idx, NULL); - if (!name) + err = dev_read_string_index(config, "samsung,pins", idx, &name); + if (err || !name) continue; + parse_pin(name, &pin_num, bank_name); bank = get_bank(dev, bank_name); reg = priv->base + bank->offset;