From patchwork Tue Aug 20 21:07:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171842 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp71660ily; Tue, 20 Aug 2019 14:09:19 -0700 (PDT) X-Google-Smtp-Source: APXvYqy5t/vGTvJXkIoPdyAGWJoHnX2FYo0PSYvo3DL4DwfFrKLEr7qSt8Cl/LqQOSa0Wp2sRE4b X-Received: by 2002:a50:f708:: with SMTP id g8mr33166434edn.128.1566335358956; Tue, 20 Aug 2019 14:09:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566335358; cv=none; d=google.com; s=arc-20160816; b=lSm5iIVrO9KMC1BjXQ+m1wiQvGFRsLw5yPcGY4/m9tureLtXzYBUcj1uGMAITy4fCR aX9oC/bb9Kh1Dxz4Nz+KnNJSYYHDEX7CS7juyAXMhPbW0Rv9Ru6G7xDEDtUSw3l//5Lx yPO2sZmTHxd6CbfRIwGFkXNMwFl2OaTEJvEbv30Onxq3cQOhfZ4kfmpUGbROEW7SBLfm PgClhi8jEDgZ8Nihbi9IKBZAo3pwH5rWGGrGqOpEaNcM+lp2s3EHzCCTM7FgsIIu4O/y beOYtO1wR8V9dvKdxCLSro1/vc5HOC8c8jIY/v+pM1o997yZfVC1CSb7W8mf1QE+Nvrk iCKA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=PJKLZgNrZeIfcl9mOVKPSZ1nJWOZ0cTu6OQj4DvwKc4=; b=romMoAuRyx311iXzWZdfF9iX3FmX4WpB9NzESDgmuXKlbdSnx4S57tEspI00iAczJd bSf289VJThZOSsYIjdsxIpW3/5RO1WV5/emz6aCPi2cg9fFuot2N6cT7ccaLYWzGzjOX J1ETtIvziLEgqW4dBhhf3jVlhSEttig4Ne6pe0oVgC5MpWMnSXosSnBxyQupMG5FADfS GlSAo25Yuy7ws8lB4AbBMwihAApEhuLoNHvnCmADiddyjeicxeR9cEzrILutfnXrX99V 43bup5fYKp0+NdpD9PE7v+E9gA2nTC91qgvXQ+w1PFZ6adfL33InKmPrL4mXe+C6BjIs Ghlw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=A7LQhaTU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id h28si7459483ede.359.2019.08.20.14.09.18 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:09:18 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=A7LQhaTU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41488 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BNV-0000Ft-PD for patch@linaro.org; Tue, 20 Aug 2019 17:09:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53638) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BLj-0000By-6a for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BLh-0008KU-OS for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:27 -0400 Received: from mail-pg1-x541.google.com ([2607:f8b0:4864:20::541]:43111) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BLh-0008Jq-Iy for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:25 -0400 Received: by mail-pg1-x541.google.com with SMTP id k3so2413pgb.10 for ; Tue, 20 Aug 2019 14:07:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=PJKLZgNrZeIfcl9mOVKPSZ1nJWOZ0cTu6OQj4DvwKc4=; b=A7LQhaTU8/N1jJ0gTMGQyzcaGPoEKpqeBGDEAgjZCDrGRxOYkbgUD2pIInVMHoNAg7 rZqfPky8OALWBMvvm752Gqp52J+TBaxhI1DoRrc8Z3SP/3gMXqBwFcfLJpqjfPQ1MftZ CRJTs7H8Axs2nBwoisdZyXWhWlSwPGYF01fEIklPs2sPXh9HAgueXhwlXO/8x+RP4Qb9 kkEh84w3afJIuwlyfvB6UKrIsfpZRw2hzmb6p4GgDCnMEfiW65kByBCuY8WwTaFFoNU0 S9x4sRVlfIqUnSKa3O3aGODCRG4NDU/7MVmHYJGwV1xNGUglPSnobXCw3k1udJjI+efp WUuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=PJKLZgNrZeIfcl9mOVKPSZ1nJWOZ0cTu6OQj4DvwKc4=; b=tJZgUchX8o2Hd7Ei4wlCKSGohEH0OunDThTrQIlqAp1K90tsXxA5kYGrnmDrhRxUIK KBGiqJRunNhqijhNZAevdK4zk9oiLybPtWHC8Z0E6Y0MOm0PCa1VY0jLQdAkkfuwz39G YbIjfQaiCgU4GKen4urhFe0mWeUqnGXdbwyERrC5rLernzFpMsvpVVEbCaNVjp3Xt3mE GuNl6lmEpWjZtJOYL2l7G/GgJ3wD3Ju/csLqSXndXYcTFOjeWD2OkfXPmipeCQuS1Sos 2tGATszzN/Y5MmeFEjBtawhoxsNVvOmtZ4JTgRw0B3u0ajeRWXC/Xhq+01V7dTGlAWs7 Glaw== X-Gm-Message-State: APjAAAU7lS6fah+6zMWu+GCvuFh35soSW+OYk0bassl/j2/Nnx97yIMz VMoRJ67E8ZOLTJMAse6FUgdmffL5lZQ= X-Received: by 2002:a63:6a4a:: with SMTP id f71mr11071610pgc.409.1566335244166; Tue, 20 Aug 2019 14:07:24 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:23 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:04 -0700 Message-Id: <20190820210720.18976-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 Subject: [Qemu-devel] [PATCH v5 01/17] target/arm: Split out rebuild_hflags_common X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Create a function to compute the values of the TBFLAG_ANY bits that will be cached. For now, the env->hflags variable is not used, and the results are fed back to cpu_get_tb_cpu_state. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 29 ++++++++++++++++++----------- target/arm/helper.c | 26 +++++++++++++++++++------- 2 files changed, 37 insertions(+), 18 deletions(-) -- 2.17.1 Reviewed-by: Alex Bennée diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 0981303170..3dc52c032b 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -231,6 +231,9 @@ typedef struct CPUARMState { uint32_t pstate; uint32_t aarch64; /* 1 if CPU is in aarch64 state; inverse of PSTATE.nRW */ + /* Cached TBFLAGS state. See below for which bits are included. */ + uint32_t hflags; + /* Frequently accessed CPSR bits are stored separately for efficiency. This contains all the other bits. Use cpsr_{read,write} to access the whole CPSR. */ @@ -3136,15 +3139,18 @@ typedef ARMCPU ArchCPU; #include "exec/cpu-all.h" -/* Bit usage in the TB flags field: bit 31 indicates whether we are +/* + * Bit usage in the TB flags field: bit 31 indicates whether we are * in 32 or 64 bit mode. The meaning of the other bits depends on that. * We put flags which are shared between 32 and 64 bit mode at the top * of the word, and flags which apply to only one mode at the bottom. + * + * Unless otherwise noted, these bits are cached in env->hflags. */ FIELD(TBFLAG_ANY, AARCH64_STATE, 31, 1) FIELD(TBFLAG_ANY, MMUIDX, 28, 3) FIELD(TBFLAG_ANY, SS_ACTIVE, 27, 1) -FIELD(TBFLAG_ANY, PSTATE_SS, 26, 1) +FIELD(TBFLAG_ANY, PSTATE_SS, 26, 1) /* Not cached. */ /* Target EL if we take a floating-point-disabled exception */ FIELD(TBFLAG_ANY, FPEXC_EL, 24, 2) FIELD(TBFLAG_ANY, BE_DATA, 23, 1) @@ -3155,13 +3161,14 @@ FIELD(TBFLAG_ANY, BE_DATA, 23, 1) FIELD(TBFLAG_ANY, DEBUG_TARGET_EL, 21, 2) /* Bit usage when in AArch32 state: */ -FIELD(TBFLAG_A32, THUMB, 0, 1) -FIELD(TBFLAG_A32, VECLEN, 1, 3) -FIELD(TBFLAG_A32, VECSTRIDE, 4, 2) +FIELD(TBFLAG_A32, THUMB, 0, 1) /* Not cached. */ +FIELD(TBFLAG_A32, VECLEN, 1, 3) /* Not cached. */ +FIELD(TBFLAG_A32, VECSTRIDE, 4, 2) /* Not cached. */ /* * We store the bottom two bits of the CPAR as TB flags and handle * checks on the other bits at runtime. This shares the same bits as * VECSTRIDE, which is OK as no XScale CPU has VFP. + * Not cached, because VECLEN+VECSTRIDE are not cached. */ FIELD(TBFLAG_A32, XSCALE_CPAR, 4, 2) /* @@ -3170,15 +3177,15 @@ FIELD(TBFLAG_A32, XSCALE_CPAR, 4, 2) * the same thing as the current security state of the processor! */ FIELD(TBFLAG_A32, NS, 6, 1) -FIELD(TBFLAG_A32, VFPEN, 7, 1) -FIELD(TBFLAG_A32, CONDEXEC, 8, 8) +FIELD(TBFLAG_A32, VFPEN, 7, 1) /* Not cached. */ +FIELD(TBFLAG_A32, CONDEXEC, 8, 8) /* Not cached. */ FIELD(TBFLAG_A32, SCTLR_B, 16, 1) /* For M profile only, set if FPCCR.LSPACT is set */ -FIELD(TBFLAG_A32, LSPACT, 18, 1) +FIELD(TBFLAG_A32, LSPACT, 18, 1) /* Not cached. */ /* For M profile only, set if we must create a new FP context */ -FIELD(TBFLAG_A32, NEW_FP_CTXT_NEEDED, 19, 1) +FIELD(TBFLAG_A32, NEW_FP_CTXT_NEEDED, 19, 1) /* Not cached. */ /* For M profile only, set if FPCCR.S does not match current security state */ -FIELD(TBFLAG_A32, FPCCR_S_WRONG, 20, 1) +FIELD(TBFLAG_A32, FPCCR_S_WRONG, 20, 1) /* Not cached. */ /* For M profile only, Handler (ie not Thread) mode */ FIELD(TBFLAG_A32, HANDLER, 21, 1) /* For M profile only, whether we should generate stack-limit checks */ @@ -3190,7 +3197,7 @@ FIELD(TBFLAG_A64, SVEEXC_EL, 2, 2) FIELD(TBFLAG_A64, ZCR_LEN, 4, 4) FIELD(TBFLAG_A64, PAUTH_ACTIVE, 8, 1) FIELD(TBFLAG_A64, BT, 9, 1) -FIELD(TBFLAG_A64, BTYPE, 10, 2) +FIELD(TBFLAG_A64, BTYPE, 10, 2) /* Not cached. */ FIELD(TBFLAG_A64, TBID, 12, 2) static inline bool bswap_code(bool sctlr_b) diff --git a/target/arm/helper.c b/target/arm/helper.c index 7e0d5398ab..f2c6419369 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11016,6 +11016,22 @@ ARMMMUIdx arm_stage1_mmu_idx(CPUARMState *env) } #endif +static uint32_t rebuild_hflags_common(CPUARMState *env, int fp_el, + ARMMMUIdx mmu_idx, uint32_t flags) +{ + flags = FIELD_DP32(flags, TBFLAG_ANY, FPEXC_EL, fp_el); + flags = FIELD_DP32(flags, TBFLAG_ANY, MMUIDX, + arm_to_core_mmu_idx(mmu_idx)); + + if (arm_cpu_data_is_big_endian(env)) { + flags = FIELD_DP32(flags, TBFLAG_ANY, BE_DATA, 1); + } + if (arm_singlestep_active(env)) { + flags = FIELD_DP32(flags, TBFLAG_ANY, SS_ACTIVE, 1); + } + return flags; +} + void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, target_ulong *cs_base, uint32_t *pflags) { @@ -11107,7 +11123,7 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, } } - flags = FIELD_DP32(flags, TBFLAG_ANY, MMUIDX, arm_to_core_mmu_idx(mmu_idx)); + flags = rebuild_hflags_common(env, fp_el, mmu_idx, flags); /* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine * states defined in the ARM ARM for software singlestep: @@ -11115,9 +11131,9 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, * 0 x Inactive (the TB flag for SS is always 0) * 1 0 Active-pending * 1 1 Active-not-pending + * SS_ACTIVE is set in hflags; PSTATE_SS is computed every TB. */ - if (arm_singlestep_active(env)) { - flags = FIELD_DP32(flags, TBFLAG_ANY, SS_ACTIVE, 1); + if (FIELD_EX32(flags, TBFLAG_ANY, SS_ACTIVE)) { if (is_a64(env)) { if (env->pstate & PSTATE_SS) { flags = FIELD_DP32(flags, TBFLAG_ANY, PSTATE_SS, 1); @@ -11128,10 +11144,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, } } } - if (arm_cpu_data_is_big_endian(env)) { - flags = FIELD_DP32(flags, TBFLAG_ANY, BE_DATA, 1); - } - flags = FIELD_DP32(flags, TBFLAG_ANY, FPEXC_EL, fp_el); if (arm_v7m_is_handler_mode(env)) { flags = FIELD_DP32(flags, TBFLAG_A32, HANDLER, 1); From patchwork Tue Aug 20 21:07:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171849 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp79300ily; Tue, 20 Aug 2019 14:16:55 -0700 (PDT) X-Google-Smtp-Source: APXvYqw+ZO01s3NOw2ikHKvwC7N+/Hh8LhM2WYj4kR26r4sy3N2x2vjaNMbdIQ10Eu6xrPxq6EKb X-Received: by 2002:ac8:7290:: with SMTP id v16mr27880210qto.11.1566335815269; Tue, 20 Aug 2019 14:16:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566335815; cv=none; d=google.com; s=arc-20160816; b=VbvteP5QUNNaPQ31ODgOr59sRu5g7Ysf23sSxMEgfditu2qJ3v94N2nEWuXNzhEcoz vBJATAq5uMAtQ6NyHpipfZBG68IsLcVuyE69osYaOk4mKTKwryE/cl/Ch5h+wPsPCv+h jtJeuK2d6i0zpwptNc2abcRIbIyUHdqYXCbOVsB5A0jfnr0NCdV5cDhFGynesGTCHE9v c4auYDi9k7SYF00zaRFdMmYqJ6SxZui7UpZ6JqLVh9Y4STHXSn3ukKz4TmJLc+Z3o1u4 q/rnPuLQLtdb1pxHYsQuoP1YlLoIpjyvnmKp724JGtUAoE/UEkBllXr/Nwn2ULIbPXGB 8crA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=2a32Mx4gC1OivU2H0L4/pxSm6z4s7e5vqER4g0XWBWE=; b=1GmUiGbsdsfFWvr1X4uhkB+ZXakg0r9DGucF5AazXxZaj8A4ZcmXuJ1Odt861F0k43 eZ9/U60xmBtlEaHZoJGaAO5UufDjNcJpOHAGzd6CztXxU11dLB+O9ZwbDBupo8v/CFOP A1lriFZzmv+tm4QhbIxheWKiSYgZAUEqvD34rXQrUDU2tNADZlEljsklcT7So8V8ZvrY GCbveookQvFcQmN48X/11EsKsjI/RtkSOQWussD+8ZT+937H0a1TBn3GcAl/ChERVdKo 61AVPoIBF+C33++S8oN6eosAGbU7KRexsk8+NXXNGYkKv1UrdQcAFQBnoJO9RroH5n/V OF7A== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=t4+CpH7W; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id m45si12049624qtm.385.2019.08.20.14.16.55 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:16:55 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=t4+CpH7W; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41786 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BUs-00082T-7Y for patch@linaro.org; Tue, 20 Aug 2019 17:16:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53666) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BLk-0000EM-Oi for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BLj-0008MC-AL for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:28 -0400 Received: from mail-pg1-x543.google.com ([2607:f8b0:4864:20::543]:39431) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BLj-0008LF-4e for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:27 -0400 Received: by mail-pg1-x543.google.com with SMTP id u17so13432pgi.6 for ; Tue, 20 Aug 2019 14:07:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2a32Mx4gC1OivU2H0L4/pxSm6z4s7e5vqER4g0XWBWE=; b=t4+CpH7WoO1dpaFtXxZANjvR5GIyBQhRXlcRqDOe68NTVxSVzNUYX6lb1xMam3RFy5 MKPTNUGdrYPcNGbeR+AK7caD7kT3/5EDhg5gIPnVxc7r+xcBmfnTaoFs3uM0tEcWBQxZ N9N9zRsklrw9kQB7IxHR21/Fvn6uhH10cVuEMhBtgSR2J9n+nPrNMYo47eHyq+9jECXx jZmeb5okvneBbIk0ud0fjL1U5Rrl11z5Z6WQGK597gqmlX6rDiD+DUqMLTl9b7KIQpzc GibmOpEyz4fAI3AYuP8O3Z6wTVFRE29Ihp9iUBK/BQRGy1e6W9CMRrBDs4YfU2DazTnd v+pg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2a32Mx4gC1OivU2H0L4/pxSm6z4s7e5vqER4g0XWBWE=; b=T/m59ccQSvwqDnmE4gZlVH4YeYJxIhtK2Opqn/A9A16XzgoRBnAgGyJerork/5+3LL zmzfhcf56tJRcDAm/Z+i+uH9Ts76rygwseXVe34IciX6s0WgVEtRoCiQ3/rkG21UeQ6u oLUPDgx4B4Gj8/mr8okIIAtnCL3RaOaDDI6wt6l5b+StplfcfE57rwfld5i76JAKA2Rh +VIytsVJQvi2itYCGjl3tGCBykuIm/xUB06EDOSchaLgbE9Rf8SJsxDHJ96WNpJ/zXR+ CpynTvyi0QymP80A4yx8VPgfm+uvEhlYxOduRSRvH9JlG4kpmw1093lrnjnvY9vDEhBH yUuw== X-Gm-Message-State: APjAAAU56a3sajvheSkkTxios70mfsHFO21Wfkk3RwSFQHvyuwgkSlt8 udgYTO9EpBHpf/axZkN6keC8iltFXXQ= X-Received: by 2002:a63:4e05:: with SMTP id c5mr6304272pgb.396.1566335245652; Tue, 20 Aug 2019 14:07:25 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:24 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:05 -0700 Message-Id: <20190820210720.18976-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 Subject: [Qemu-devel] [PATCH v5 02/17] target/arm: Split out rebuild_hflags_a64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Create a function to compute the values of the TBFLAG_A64 bits that will be cached. For now, the env->hflags variable is not used, and the results are fed back to cpu_get_tb_cpu_state. Signed-off-by: Richard Henderson --- target/arm/helper.c | 131 +++++++++++++++++++++++--------------------- 1 file changed, 69 insertions(+), 62 deletions(-) -- 2.17.1 diff --git a/target/arm/helper.c b/target/arm/helper.c index f2c6419369..02cb43cf58 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11032,6 +11032,71 @@ static uint32_t rebuild_hflags_common(CPUARMState *env, int fp_el, return flags; } +static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el, + ARMMMUIdx mmu_idx) +{ + ARMMMUIdx stage1 = stage_1_mmu_idx(mmu_idx); + ARMVAParameters p0 = aa64_va_parameters_both(env, 0, stage1); + uint32_t flags = 0; + uint64_t sctlr; + int tbii, tbid; + + flags = FIELD_DP32(flags, TBFLAG_ANY, AARCH64_STATE, 1); + + /* FIXME: ARMv8.1-VHE S2 translation regime. */ + if (regime_el(env, stage1) < 2) { + ARMVAParameters p1 = aa64_va_parameters_both(env, -1, stage1); + tbid = (p1.tbi << 1) | p0.tbi; + tbii = tbid & ~((p1.tbid << 1) | p0.tbid); + } else { + tbid = p0.tbi; + tbii = tbid & !p0.tbid; + } + + flags = FIELD_DP32(flags, TBFLAG_A64, TBII, tbii); + flags = FIELD_DP32(flags, TBFLAG_A64, TBID, tbid); + + if (cpu_isar_feature(aa64_sve, env_archcpu(env))) { + int sve_el = sve_exception_el(env, el); + uint32_t zcr_len; + + /* + * If SVE is disabled, but FP is enabled, + * then the effective len is 0. + */ + if (sve_el != 0 && fp_el == 0) { + zcr_len = 0; + } else { + zcr_len = sve_zcr_len_for_el(env, el); + } + flags = FIELD_DP32(flags, TBFLAG_A64, SVEEXC_EL, sve_el); + flags = FIELD_DP32(flags, TBFLAG_A64, ZCR_LEN, zcr_len); + } + + sctlr = arm_sctlr(env, el); + + if (cpu_isar_feature(aa64_pauth, env_archcpu(env))) { + /* + * In order to save space in flags, we record only whether + * pauth is "inactive", meaning all insns are implemented as + * a nop, or "active" when some action must be performed. + * The decision of which action to take is left to a helper. + */ + if (sctlr & (SCTLR_EnIA | SCTLR_EnIB | SCTLR_EnDA | SCTLR_EnDB)) { + flags = FIELD_DP32(flags, TBFLAG_A64, PAUTH_ACTIVE, 1); + } + } + + if (cpu_isar_feature(aa64_bti, env_archcpu(env))) { + /* Note that SCTLR_EL[23].BT == SCTLR_BT1. */ + if (sctlr & (el == 0 ? SCTLR_BT0 : SCTLR_BT1)) { + flags = FIELD_DP32(flags, TBFLAG_A64, BT, 1); + } + } + + return rebuild_hflags_common(env, fp_el, mmu_idx, flags); +} + void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, target_ulong *cs_base, uint32_t *pflags) { @@ -11041,67 +11106,9 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, uint32_t flags = 0; if (is_a64(env)) { - ARMCPU *cpu = env_archcpu(env); - uint64_t sctlr; - *pc = env->pc; - flags = FIELD_DP32(flags, TBFLAG_ANY, AARCH64_STATE, 1); - - /* Get control bits for tagged addresses. */ - { - ARMMMUIdx stage1 = stage_1_mmu_idx(mmu_idx); - ARMVAParameters p0 = aa64_va_parameters_both(env, 0, stage1); - int tbii, tbid; - - /* FIXME: ARMv8.1-VHE S2 translation regime. */ - if (regime_el(env, stage1) < 2) { - ARMVAParameters p1 = aa64_va_parameters_both(env, -1, stage1); - tbid = (p1.tbi << 1) | p0.tbi; - tbii = tbid & ~((p1.tbid << 1) | p0.tbid); - } else { - tbid = p0.tbi; - tbii = tbid & !p0.tbid; - } - - flags = FIELD_DP32(flags, TBFLAG_A64, TBII, tbii); - flags = FIELD_DP32(flags, TBFLAG_A64, TBID, tbid); - } - - if (cpu_isar_feature(aa64_sve, cpu)) { - int sve_el = sve_exception_el(env, current_el); - uint32_t zcr_len; - - /* If SVE is disabled, but FP is enabled, - * then the effective len is 0. - */ - if (sve_el != 0 && fp_el == 0) { - zcr_len = 0; - } else { - zcr_len = sve_zcr_len_for_el(env, current_el); - } - flags = FIELD_DP32(flags, TBFLAG_A64, SVEEXC_EL, sve_el); - flags = FIELD_DP32(flags, TBFLAG_A64, ZCR_LEN, zcr_len); - } - - sctlr = arm_sctlr(env, current_el); - - if (cpu_isar_feature(aa64_pauth, cpu)) { - /* - * In order to save space in flags, we record only whether - * pauth is "inactive", meaning all insns are implemented as - * a nop, or "active" when some action must be performed. - * The decision of which action to take is left to a helper. - */ - if (sctlr & (SCTLR_EnIA | SCTLR_EnIB | SCTLR_EnDA | SCTLR_EnDB)) { - flags = FIELD_DP32(flags, TBFLAG_A64, PAUTH_ACTIVE, 1); - } - } - - if (cpu_isar_feature(aa64_bti, cpu)) { - /* Note that SCTLR_EL[23].BT == SCTLR_BT1. */ - if (sctlr & (current_el == 0 ? SCTLR_BT0 : SCTLR_BT1)) { - flags = FIELD_DP32(flags, TBFLAG_A64, BT, 1); - } + flags = rebuild_hflags_a64(env, current_el, fp_el, mmu_idx); + if (cpu_isar_feature(aa64_bti, env_archcpu(env))) { flags = FIELD_DP32(flags, TBFLAG_A64, BTYPE, env->btype); } } else { @@ -11121,9 +11128,9 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, flags = FIELD_DP32(flags, TBFLAG_A32, XSCALE_CPAR, env->cp15.c15_cpar); } - } - flags = rebuild_hflags_common(env, fp_el, mmu_idx, flags); + flags = rebuild_hflags_common(env, fp_el, mmu_idx, flags); + } /* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine * states defined in the ARM ARM for software singlestep: From patchwork Tue Aug 20 21:07:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171852 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp86607ily; Tue, 20 Aug 2019 14:24:29 -0700 (PDT) X-Google-Smtp-Source: APXvYqx0k0x6bbqCRkXCsu43VcnotjhBdRhHLkjpY0sV+4pCq89tweUnL8TGeNjLbLAv00fhjFK2 X-Received: by 2002:aa7:c542:: with SMTP id s2mr33563105edr.164.1566336269399; Tue, 20 Aug 2019 14:24:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566336269; cv=none; d=google.com; s=arc-20160816; b=sIV3jHPUEBovCy4GdZknF8U6LKUidXtzcAL8Qx12QqdLVv69bUiYZBhdbV6DA0yK18 vN0lgZBwUH6eLwb6x4wITwWPsKIRocvtFXTJ6s854t0n5WrH+lERqK1Fh2k4+Odrt1Dk /w3nnkJbS5BOeE3aRZstdzOsKJfHIGnyYMR5z22oGt7Ugq5C5mck9gAxoB0s5Xa54QH0 f3C+uieDuBiAyRTuJYPrE2K6UsYdKFygyUDzrRjtgmjZaeUTJ+O5UyfLn/zMwTyCt5uM tg3tLU5ysLCW6B/lT+UjxhJz6rJcUfz796YTiQ3bwZ69Y78/9d9RbpMI7YYWI8VceORk ddog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=ukkPGAVjpyiRXhgCeNuw1onp0A6uGMb4+O/vZ/cyj7c=; b=LzcuXlQZ2i5OfeplzXfeZJrZusasfX3dCl/mdQEcq9iNmxv2hyAma0aOVhLm5559IN dK7pY50LxDjacBUtglcnzWhA3rc0/oO55vKwGe3bYg3j27U93R7eij9uAOZCAgAeirSL OlKAkuYkHxIM7h0WJMk97HwXPrwQfHSxgDimBb2F1GRfdXxUx0MrvH9QPBytFYNxGYJx ElWl4bWcSwhf3pO2P2c6WY3JrVQk04BoCFa/UncKoztyXJL3LPFXC5MG1hnqwEmO5Mwj wEHKPrX/9bI2zWECN77JuZPlBUzRbpKsliE8hqXIYmtCldXDP3TOEH0KsHi6IG5NxZlD UlSg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="yuQlPjz/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id b29si10809334edc.265.2019.08.20.14.24.29 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:24:29 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="yuQlPjz/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41880 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BcB-0004tu-NU for patch@linaro.org; Tue, 20 Aug 2019 17:24:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53687) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BLl-0000GH-QJ for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BLk-0008Ni-MK for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:29 -0400 Received: from mail-pg1-x542.google.com ([2607:f8b0:4864:20::542]:43112) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BLk-0008Mr-F4 for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:28 -0400 Received: by mail-pg1-x542.google.com with SMTP id k3so2472pgb.10 for ; Tue, 20 Aug 2019 14:07:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ukkPGAVjpyiRXhgCeNuw1onp0A6uGMb4+O/vZ/cyj7c=; b=yuQlPjz/D/iLzbeS7LqBhzuxH/9up4FNXsZo2ec1o5fwM9roaHw/umNMOJ4DFxl+tJ OR+TzqhIZQ6rO7+qt0nsk/YePEoFe5HVsmg+EIgaJvbUUcAg6+5RQCdsZtzB7KV2B4p7 tAaJzzX2AISMUzau2vNSAlFlIAlibstjoq73MljAjUfBSTAr6mltZhvUnGu+mEgBbGzg 6IxHGqtpAO5WrzSse/UOfUxQRIY6KQsCvTwnifsuJTOH6Zo6gRXnf0aMzsdiB9ig2Y36 T9o/tUVCFq29I8/8p1hy+2ECG0wY4ff7WR+ItYvQYv8j236RCimt4sLbwHkfZbQNADui cL7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ukkPGAVjpyiRXhgCeNuw1onp0A6uGMb4+O/vZ/cyj7c=; b=eA/+taZnResoMtHyWT/iOC5s+TAGD6wrmZBsU9C19fbgFddnTPHCLRuIqff9CCHtnS uvHTrLld0IjgxcZxDUdRdzGwA98n1nxbJYWpLHnpj0NDMvViW9J3SkRdQn4ShBnYibLa 917jvQkKZTEgu29jcYojdX5mbg4wuUxT2TEeuuVtwZ9HN8QVxKn2RjaGsb7uChTO7Mk2 mwakfBHapsGHg2sV0I7uLNw7FB+fPXOUDAs5rOKhTfwXwMvFNVkkaLllvioJAnPGywaY B2OD6NmydWk6PPYPDH3IHFSB0z89xVRuaqae2LL1K5YparhioerKI10L1DXRGuUXk8c8 1skQ== X-Gm-Message-State: APjAAAWnNDDNnEtLTRMORtBRpm8OqP5m0MIDv/y9hcojony/zczliMM0 3UZlLwG3NmiRKpRDIF8MTUIWz2tBqfA= X-Received: by 2002:a65:6284:: with SMTP id f4mr27188420pgv.416.1566335247021; Tue, 20 Aug 2019 14:07:27 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:26 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:06 -0700 Message-Id: <20190820210720.18976-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::542 Subject: [Qemu-devel] [PATCH v5 03/17] target/arm: Split out rebuild_hflags_common_32 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Create a function to compute the values of the TBFLAG_A32 bits that will be cached, and are used by all profiles. Signed-off-by: Richard Henderson --- target/arm/helper.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/target/arm/helper.c b/target/arm/helper.c index 02cb43cf58..1844c13a19 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11032,6 +11032,15 @@ static uint32_t rebuild_hflags_common(CPUARMState *env, int fp_el, return flags; } +static uint32_t rebuild_hflags_common_32(CPUARMState *env, int fp_el, + ARMMMUIdx mmu_idx, uint32_t flags) +{ + flags = FIELD_DP32(flags, TBFLAG_A32, SCTLR_B, arm_sctlr_b(env)); + flags = FIELD_DP32(flags, TBFLAG_A32, NS, !access_secure_reg(env)); + + return rebuild_hflags_common(env, fp_el, mmu_idx, flags); +} + static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el, ARMMMUIdx mmu_idx) { @@ -11103,7 +11112,7 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, ARMMMUIdx mmu_idx = arm_mmu_idx(env); int current_el = arm_current_el(env); int fp_el = fp_exception_el(env, current_el); - uint32_t flags = 0; + uint32_t flags; if (is_a64(env)) { *pc = env->pc; @@ -11113,12 +11122,11 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, } } else { *pc = env->regs[15]; + flags = rebuild_hflags_common_32(env, fp_el, mmu_idx, 0); flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb); flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, env->vfp.vec_len); flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, env->vfp.vec_stride); flags = FIELD_DP32(flags, TBFLAG_A32, CONDEXEC, env->condexec_bits); - flags = FIELD_DP32(flags, TBFLAG_A32, SCTLR_B, arm_sctlr_b(env)); - flags = FIELD_DP32(flags, TBFLAG_A32, NS, !access_secure_reg(env)); if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30) || arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) { flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1); @@ -11128,8 +11136,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, flags = FIELD_DP32(flags, TBFLAG_A32, XSCALE_CPAR, env->cp15.c15_cpar); } - - flags = rebuild_hflags_common(env, fp_el, mmu_idx, flags); } /* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine From patchwork Tue Aug 20 21:07:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171841 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp70876ily; Tue, 20 Aug 2019 14:08:31 -0700 (PDT) X-Google-Smtp-Source: APXvYqyqcQzFA4bzMRcKWcCp5lGwaN7mUxO9NgDu5hQJiaYFpCB4bHX5JM2IXkrRHIq59hQgKVk2 X-Received: by 2002:ad4:430f:: with SMTP id c15mr15668636qvs.25.1566335311387; Tue, 20 Aug 2019 14:08:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566335311; cv=none; d=google.com; s=arc-20160816; b=cRzTOT+ihlBC/p+3uKgHYqzOVBUih7b1TspNiA3olOJWILqYjX8/EovuKWMYJi3ifM Fmhu/iHYTVMmsSvx8AD+vUjHmerobwrMz9ZoRUKuGLf+o8UygaS2uKqiru3Yrr8I6AKt oRwwpi8mmtigRzLLvcx5fTw5gLHXubh/nK2N8u+XRZfnazwwVkKGSXjmXty4prdmqi5n rjvt0WE+++5pJu8zIxr+m5oOXoeOdHUgjsEuQ5oZvcyC5i/Tnpm0RJxSrg4HE7cnTHRH Pl77QWxREqL2QNa7VIM7eFxedUvoVu7G5Hag8qy6aezva9uyjyz2TDRmKn8xzov/wlNd PTLQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=OwNfnh1sHVV11pbivoEAA9XWKfCqVu4eJ/dxTMaKEyM=; b=fSkcB5kDuGVzTOmOKGXOJn5+/UccrDGz8494dPBbaR76FMHQZZDYdWFLZmsIv8UKI9 1itpLFWA1pCIRc/AEpn927b4vHpr2v/cSvJJpZNEcc/04k6+aY7KA4z2T77zkJQIqr0j Y6I8vA3aIsPHEyWzKRsJyaYBwICPazMNP/gyfmjnNDZ3JjW592V+atcElymx72T4c7Ao rrx4F6w/u/WOV4UT2MQM8+qJyQ0GF/9VfdhozHFZ+w5mSlA+a/9tcB+j32ZsJjVL4pa4 9L3J3asgqufwCTetLyu8Pycs4h3pD0+8L/oiraMie/ACz8wUqKl+dBzwGQkM27r6hKru fdYg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=xu4zyEif; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id s21si11246445qke.168.2019.08.20.14.08.31 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:08:31 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=xu4zyEif; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41672 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BMk-0000kD-Cv for patch@linaro.org; Tue, 20 Aug 2019 17:08:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53750) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BLr-0000Gb-3f for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BLn-0008QA-KY for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:33 -0400 Received: from mail-pf1-x442.google.com ([2607:f8b0:4864:20::442]:37077) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BLl-0008OD-P1 for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:30 -0400 Received: by mail-pf1-x442.google.com with SMTP id 129so4112882pfa.4 for ; Tue, 20 Aug 2019 14:07:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=OwNfnh1sHVV11pbivoEAA9XWKfCqVu4eJ/dxTMaKEyM=; b=xu4zyEifir0nm0LpEl9CD5PgFX+yVrYbk7X+Huxu/l06wzEnNL8f1n1YLevlfTRQcD aakMzoIyTEM+Wiz++lYMu1tLfrBxsu9EJS+o7E2kuJdVodZryfhq9l29sUNG1xawpPLg C6XIuL8M1xnWwYRa9icITpEZmuH6wsdLmwZvoZSilZwSJcBqSEYr726HjAxrQjx29WZp C1ojDx8JC4dy+Dl6Xrb1QE413/bbwWEhgUHxQtiqN/+jlmmToYUp8e4SPj294OPxpGWF S6+5sRS5cleHeqDDK6dB2r81EnGbVC6Q5VY+7X5h+cZpka2jbGSTMl6PLN/ycC6u3H2B bAwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=OwNfnh1sHVV11pbivoEAA9XWKfCqVu4eJ/dxTMaKEyM=; b=g1HRgLUGLhVVQA5vNZgxss/QWjGahZVF55p6CXkldUqFnCIkIFJJN4RBOiZaObzJ3a GQ8RQSfK74MwiQu2gTHkLgOr0HrTb+xf6lJNTi911CdzBOXMJogfFIGrWF7J1SpY9hJU C0UPQy6vWUudmrwJoquPrgM4v1o4nF59BYgi7JiwtVNFFjnVNhfHmKgFJcgzZVnhYcN5 SDQF4Q+o65tKtzeg7ba69St5YAbRrbLzuEX4h070lXiVgdGPb3WQTTRPx0vk4dhcsCLq +PTvDCJ+Q+wHjKayVQEG3ta7v3fIXnQAfnIEeRxbiJNX3slRAjXZBgGPJZgmBEK67ew1 C5Hg== X-Gm-Message-State: APjAAAXs1sQ5z5gJaaSCRdBTUA+hhJdd/z2JTNmCDBU0A2iuEyH7Q2Y/ C2FBVodSUpTrp7xzqfVbTMx6xk5bhWA= X-Received: by 2002:a63:dc4f:: with SMTP id f15mr26768692pgj.227.1566335248245; Tue, 20 Aug 2019 14:07:28 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:27 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:07 -0700 Message-Id: <20190820210720.18976-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::442 Subject: [Qemu-devel] [PATCH v5 04/17] target/arm: Split arm_cpu_data_is_big_endian X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Set TBFLAG_ANY.BE_DATA in rebuild_hflags_common_32 and rebuild_hflags_a64 instead of rebuild_hflags_common, where we do not need to re-test is_a64() nor re-compute the various inputs. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 49 +++++++++++++++++++++++++++------------------ target/arm/helper.c | 16 +++++++++++---- 2 files changed, 42 insertions(+), 23 deletions(-) -- 2.17.1 diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 3dc52c032b..5dec4d3b3a 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3104,33 +3104,44 @@ static inline uint64_t arm_sctlr(CPUARMState *env, int el) } } +static inline bool arm_cpu_data_is_big_endian_a32(CPUARMState *env, + bool sctlr_b) +{ +#ifdef CONFIG_USER_ONLY + /* + * In system mode, BE32 is modelled in line with the + * architecture (as word-invariant big-endianness), where loads + * and stores are done little endian but from addresses which + * are adjusted by XORing with the appropriate constant. So the + * endianness to use for the raw data access is not affected by + * SCTLR.B. + * In user mode, however, we model BE32 as byte-invariant + * big-endianness (because user-only code cannot tell the + * difference), and so we need to use a data access endianness + * that depends on SCTLR.B. + */ + if (sctlr_b) { + return true; + } +#endif + /* In 32bit endianness is determined by looking at CPSR's E bit */ + return env->uncached_cpsr & CPSR_E; +} + +static inline bool arm_cpu_data_is_big_endian_a64(int el, uint64_t sctlr) +{ + return sctlr & (el ? SCTLR_EE : SCTLR_E0E); +} /* Return true if the processor is in big-endian mode. */ static inline bool arm_cpu_data_is_big_endian(CPUARMState *env) { - /* In 32bit endianness is determined by looking at CPSR's E bit */ if (!is_a64(env)) { - return -#ifdef CONFIG_USER_ONLY - /* In system mode, BE32 is modelled in line with the - * architecture (as word-invariant big-endianness), where loads - * and stores are done little endian but from addresses which - * are adjusted by XORing with the appropriate constant. So the - * endianness to use for the raw data access is not affected by - * SCTLR.B. - * In user mode, however, we model BE32 as byte-invariant - * big-endianness (because user-only code cannot tell the - * difference), and so we need to use a data access endianness - * that depends on SCTLR.B. - */ - arm_sctlr_b(env) || -#endif - ((env->uncached_cpsr & CPSR_E) ? 1 : 0); + return arm_cpu_data_is_big_endian_a32(env, arm_sctlr_b(env)); } else { int cur_el = arm_current_el(env); uint64_t sctlr = arm_sctlr(env, cur_el); - - return (sctlr & (cur_el ? SCTLR_EE : SCTLR_E0E)) != 0; + return arm_cpu_data_is_big_endian_a64(cur_el, sctlr); } } diff --git a/target/arm/helper.c b/target/arm/helper.c index 1844c13a19..6570d7e195 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11023,9 +11023,6 @@ static uint32_t rebuild_hflags_common(CPUARMState *env, int fp_el, flags = FIELD_DP32(flags, TBFLAG_ANY, MMUIDX, arm_to_core_mmu_idx(mmu_idx)); - if (arm_cpu_data_is_big_endian(env)) { - flags = FIELD_DP32(flags, TBFLAG_ANY, BE_DATA, 1); - } if (arm_singlestep_active(env)) { flags = FIELD_DP32(flags, TBFLAG_ANY, SS_ACTIVE, 1); } @@ -11035,7 +11032,14 @@ static uint32_t rebuild_hflags_common(CPUARMState *env, int fp_el, static uint32_t rebuild_hflags_common_32(CPUARMState *env, int fp_el, ARMMMUIdx mmu_idx, uint32_t flags) { - flags = FIELD_DP32(flags, TBFLAG_A32, SCTLR_B, arm_sctlr_b(env)); + bool sctlr_b = arm_sctlr_b(env); + + if (sctlr_b) { + flags = FIELD_DP32(flags, TBFLAG_A32, SCTLR_B, 1); + } + if (arm_cpu_data_is_big_endian_a32(env, sctlr_b)) { + flags = FIELD_DP32(flags, TBFLAG_ANY, BE_DATA, 1); + } flags = FIELD_DP32(flags, TBFLAG_A32, NS, !access_secure_reg(env)); return rebuild_hflags_common(env, fp_el, mmu_idx, flags); @@ -11084,6 +11088,10 @@ static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el, sctlr = arm_sctlr(env, el); + if (arm_cpu_data_is_big_endian_a64(el, sctlr)) { + flags = FIELD_DP32(flags, TBFLAG_ANY, BE_DATA, 1); + } + if (cpu_isar_feature(aa64_pauth, env_archcpu(env))) { /* * In order to save space in flags, we record only whether From patchwork Tue Aug 20 21:07:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171845 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp75227ily; Tue, 20 Aug 2019 14:12:41 -0700 (PDT) X-Google-Smtp-Source: APXvYqzzax04QgCl1bPw+aNod2GFZaIjVvYZRBAkKoRnqrbcBdsB80BEGtiPSKUfMcnBFpOBx4uO X-Received: by 2002:ac8:4247:: with SMTP id r7mr28371388qtm.219.1566335561504; Tue, 20 Aug 2019 14:12:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566335561; cv=none; d=google.com; s=arc-20160816; b=mH553MkI8LNgcgHcHX4nCbxlR/gRxoTcSV+U894/0me5t6QiJ9f5/ENFN4dvkK/Iq7 aBXaDLgit2OOTQJdHN7RANfyPbThvitnE6xElsvSVfnnUTDBviW467b4BwboepV1LWGt Yl8ewUAlWZHd80Wet55nKN6vYDUC3MKFobKlofCXQRzDZYtod0/bEc08vg0iVhbOcpGN Avh30ZTtixAaPNZlw6GDlMsYvsSqzlD+RfAGDolRqP+WZK2gxxl9N751PHWHAXrSb2qc YEhidHyr2POp0raKuOi36OvdTaLj0GYgzH+iPhzeb3/hbPLdPQUZU0pW7eKvYy9x7u0q kYfQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=q1Zy0h8c3J4D30AFqGiFYUkCGaChDdqpfUNuVmWLPgM=; b=PkC3wiGayFLVFuzP1hMCPTWGwnwOyrHYS28eqsXzGqy9UtDIunm0+HZRX6fWSM07Su hxjVykw6R9Om6qCh4Cc7tS+42trWyNe9kx9DVjMe+J4gQQugyuSYgS2J+JcpZso8lTjh DKgkUrY73TjyDE5G5JN3vFXhwpjkyAMauDNx0W+eXdaqoCuYc/Bwv27q1KiTRx+Kw0vO 1OuDcTM6pjbmcj068yjnMz8vG1XIVFB3BpH1H5neItuEPZ5Yf8ySKlqGlz/IENKYIrNo 7SCyTe46G2xsPGQpomaUAcDBpG+tj3GgP/vSDnfqD8wAueh69X6yfYDiKGbGOzfLr57X uakQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=jN7XTRkf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id n36si11776182qtf.171.2019.08.20.14.12.41 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:12:41 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=jN7XTRkf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41743 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BQl-0004xc-R0 for patch@linaro.org; Tue, 20 Aug 2019 17:12:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53757) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BLs-0000Gu-U6 for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BLo-0008Qn-9V for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:33 -0400 Received: from mail-pg1-x543.google.com ([2607:f8b0:4864:20::543]:42817) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BLn-0008PO-Le for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:32 -0400 Received: by mail-pg1-x543.google.com with SMTP id p3so5139pgb.9 for ; Tue, 20 Aug 2019 14:07:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=q1Zy0h8c3J4D30AFqGiFYUkCGaChDdqpfUNuVmWLPgM=; b=jN7XTRkfRBVPUpHW/tfohU5SfFaGZUq6eh1Dz11xAiHA3EZLmzD3JG1tVdp9kNpY4s 7iYxabCwzS5xw2bAdWowKbwPiCcCjGK83zfTzBkP3g1rBQm2DW32ZJUm7eH0kb9a55+H HBglPPUKviN8JBvv2O/Nh2hE5/GLSIO26zocAdsm1YeSiQ1K0xODeodUpjVL0dfW+YtO Zv9+XZsBa2KWnZASn1BMq7G8ooDAvpMqRWMdTNStrvTWkxKh+2YglH1dioxBfLscYCgF E1w2+lG2Jdbh8l5rj8NLX9/SdXaGTKp9okMsfyp6UVoRAXZZeqRhIEf2RloiEkI0bS24 n5lw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=q1Zy0h8c3J4D30AFqGiFYUkCGaChDdqpfUNuVmWLPgM=; b=UMECAMIYujVfePngteoTfSby5embpuqQ/gw+mnOSs5wYs9CBlc6zf44tDPAy0PJOnF gOStEujpZcp+4CvTxQnbGjL4SYYKg+DLKVmg1sNdcwc/kU/+tSfeOc05wbz5t0fr23Yf HiQw233Rtr50XsfAUhKZsHukTWLY352HdjLdENt2lGq0x0buG9Qw9+ofap0Gx9yKoaph uTUBLb4hk86z2GxOBeHPA15mHgTCgqifIwtuUJ8E2dlr8O497ygJ2nMc0qDYusjxWATv 9S1ZMs1+TxVIqBrH2wjXfdEw02fbsfOEO4U8EvVgCp4yTAaDNxGB66Ub+tCPZuRKkdrz N1KQ== X-Gm-Message-State: APjAAAXjGw96SjcnSmzUSLrxWzlR5k4Jco+yEdqeMLrfdz9L+3jkIgEQ RkP5Kxje2ILvC7DG7rfoumBhmg15ZP0= X-Received: by 2002:a63:d84e:: with SMTP id k14mr26449715pgj.234.1566335249619; Tue, 20 Aug 2019 14:07:29 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:28 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:08 -0700 Message-Id: <20190820210720.18976-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 Subject: [Qemu-devel] [PATCH v5 05/17] target/arm: Split out rebuild_hflags_m32 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Create a function to compute the values of the TBFLAG_A32 bits that will be cached, and are used by M-profile. Signed-off-by: Richard Henderson --- target/arm/helper.c | 45 ++++++++++++++++++++++++++++++--------------- 1 file changed, 30 insertions(+), 15 deletions(-) -- 2.17.1 diff --git a/target/arm/helper.c b/target/arm/helper.c index 6570d7e195..c36ec6c530 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11045,6 +11045,29 @@ static uint32_t rebuild_hflags_common_32(CPUARMState *env, int fp_el, return rebuild_hflags_common(env, fp_el, mmu_idx, flags); } +static uint32_t rebuild_hflags_m32(CPUARMState *env, int fp_el, + ARMMMUIdx mmu_idx) +{ + uint32_t flags = 0; + + if (arm_v7m_is_handler_mode(env)) { + flags = FIELD_DP32(flags, TBFLAG_A32, HANDLER, 1); + } + + /* + * v8M always applies stack limit checks unless CCR.STKOFHFNMIGN + * is suppressing them because the requested execution priority + * is less than 0. + */ + if (arm_feature(env, ARM_FEATURE_V8) && + !((mmu_idx & ARM_MMU_IDX_M_NEGPRI) && + (env->v7m.ccr[env->v7m.secure] & R_V7M_CCR_STKOFHFNMIGN_MASK))) { + flags = FIELD_DP32(flags, TBFLAG_A32, STACKCHECK, 1); + } + + return rebuild_hflags_common_32(env, fp_el, mmu_idx, flags); +} + static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el, ARMMMUIdx mmu_idx) { @@ -11130,7 +11153,13 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, } } else { *pc = env->regs[15]; - flags = rebuild_hflags_common_32(env, fp_el, mmu_idx, 0); + + if (arm_feature(env, ARM_FEATURE_M)) { + flags = rebuild_hflags_m32(env, fp_el, mmu_idx); + } else { + flags = rebuild_hflags_common_32(env, fp_el, mmu_idx, 0); + } + flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb); flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, env->vfp.vec_len); flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, env->vfp.vec_stride); @@ -11166,20 +11195,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, } } - if (arm_v7m_is_handler_mode(env)) { - flags = FIELD_DP32(flags, TBFLAG_A32, HANDLER, 1); - } - - /* v8M always applies stack limit checks unless CCR.STKOFHFNMIGN is - * suppressing them because the requested execution priority is less than 0. - */ - if (arm_feature(env, ARM_FEATURE_V8) && - arm_feature(env, ARM_FEATURE_M) && - !((mmu_idx & ARM_MMU_IDX_M_NEGPRI) && - (env->v7m.ccr[env->v7m.secure] & R_V7M_CCR_STKOFHFNMIGN_MASK))) { - flags = FIELD_DP32(flags, TBFLAG_A32, STACKCHECK, 1); - } - if (arm_feature(env, ARM_FEATURE_M_SECURITY) && FIELD_EX32(env->v7m.fpccr[M_REG_S], V7M_FPCCR, S) != env->v7m.secure) { flags = FIELD_DP32(flags, TBFLAG_A32, FPCCR_S_WRONG, 1); From patchwork Tue Aug 20 21:07:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171843 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp71959ily; Tue, 20 Aug 2019 14:09:36 -0700 (PDT) X-Google-Smtp-Source: APXvYqxeSR2W1F27i1pvVva3YbWiYF2ujvUpxE4dXFMMSEFu/VtvOHUaJWXESJ1F8Km/ctqJKNFl X-Received: by 2002:a50:ac1a:: with SMTP id v26mr33297860edc.131.1566335376413; Tue, 20 Aug 2019 14:09:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566335376; cv=none; d=google.com; s=arc-20160816; b=EXMsZrfZosZrDW/bQOZh7FKDiLo7gpGWRs6wH0v5S/P5StuDyo7FBZdA7G8R4lPsyv aNTb0IHv9aB8SMeBSVef70YV8S6GenxkZEAgpQ3xYQjWjLJRZeMZxU08e7dBLODirEIC 3Moi8tCc/MWeZlhIufyRq7/94ZyZK0wnsStz7Zas3YXesQhWKfY+DrXIh+WPq5xol/N8 J/igOYESXb5rLGzAXdcb50+CWWD/zFgZSKaR0+sCbIdgCu3IwTjQyOQI03phY4Jqr+FY tKquMX/nirS50j9d902reaRkhAaRuxOpO7ajwIlxTElLl+d0AqHwdwAQNx3Q6w8epmvD 2kAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=r/bKo1YTStbBd/rtX39D2f5QjfmcgbSrKEypch2w1iU=; b=T+/W7Hjs+IseOUFvJPoaI5r2HCqBmzKa7Krsu+XBkAKE6VNIamHfB+KPalI5X3sEyz qDcduxjdc4slZI8P9wYr9fwH5h5NHh0LfHXV0WVMuk+B8FT/zXjrcsCSffwHlFkhvW5L NQOoZotF2XxYlhdGdn9kUwpFaIaGY4pI/J9BDPwIPuit8hsvvW/JVHVloOge+dTP63pU I9a6Hff/agNsPilNJ9QfQKpjVN+H7ltXrRtXRCm1VuLsAk4IiLI/ty+dZZVrs+RIxPNo c/Zv4f2U4dhXGI0Hi/2FTGSTjfogkI7Dn1/rWM+hm0jiWT/Xz7oBDSv4eUjg9G1Ml5RT 6aQA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=MwMvL065; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id n13si11875961edd.270.2019.08.20.14.09.36 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:09:36 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=MwMvL065; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41678 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BNm-0000m9-T9 for patch@linaro.org; Tue, 20 Aug 2019 17:09:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53771) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BLu-0000HN-Dz for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BLo-0008RG-FN for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:34 -0400 Received: from mail-pg1-x543.google.com ([2607:f8b0:4864:20::543]:41614) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BLo-0008QK-7y for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:32 -0400 Received: by mail-pg1-x543.google.com with SMTP id x15so7966pgg.8 for ; Tue, 20 Aug 2019 14:07:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=r/bKo1YTStbBd/rtX39D2f5QjfmcgbSrKEypch2w1iU=; b=MwMvL065tlfvdjjDqKyLBVU/P9AS4Vc7lmZ+qu6HxLO2CeKSY8rm5cCO17YmZkixD6 BQCbO43t+PKdg98tLYha0d5U1QLfO9SCplClFqsUuELFeKwQFhM1exYdRKYJyPlMMp5D wVuu2QEHgygK+CznZ7Jog/xUx2nDC6y/1pwHP0WkwKPVlNQaMxs2aDENQ+Vtk5ju0sVE hxlu2gRRsYG038M7hbMnU/G3jicQ22Cc9Su80kDuaMGmAl7DrRikVs1QDd02VpUijiPa 2nNmGRMS+AH9PrpD688Hz8MsZcdSW/Hv42PoSQRGOJBo3KBIajWW6lIqNipwgoPQ24EY ojiA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=r/bKo1YTStbBd/rtX39D2f5QjfmcgbSrKEypch2w1iU=; b=nHD7NeciYteFD9Yn+T0BWpbpTnBmmY9rlTmsaTXOHPT9DS0mYc4gc29wceDCJd6jo9 uX13HzMLEQKoDaYGcUT24XIRMrLOpR/QA6VKlYs3gI7NtM5EnLTuFK8YgWqVh4GXTDpZ /L5RPr6FUnvkR8RdOVsHJg6nz1E4NlJ1JYY39nFRTI5PVq/LPiAJQ3yBopcQXe9p5pvt ehmR6P6jGWzfRZ7pRD46byFyFRgym6t40GyAbKIKHc+zKotvKcTW9BBiFUfvissMsZn5 eR3ba/ZpwlRTS3X3vm2aNyCwih6gXJQNZpwi33G8vtjFIk1iXIcLFxR5Bt9LsV8AbyiM pI/Q== X-Gm-Message-State: APjAAAXAqmMlcxcqqMSsXN53ihsH9/JRuCQXLU0VlK48GBxd8fbnuw+U jhJDisOi1txqN+GN9GyU33BV35jvzPA= X-Received: by 2002:a65:6713:: with SMTP id u19mr24824761pgf.403.1566335250867; Tue, 20 Aug 2019 14:07:30 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:09 -0700 Message-Id: <20190820210720.18976-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 Subject: [Qemu-devel] [PATCH v5 06/17] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Hoist the computation of some TBFLAG_A32 bits that only apply to M-profile under a single test for ARM_FEATURE_M. Signed-off-by: Richard Henderson --- target/arm/helper.c | 49 +++++++++++++++++++++------------------------ 1 file changed, 23 insertions(+), 26 deletions(-) -- 2.17.1 diff --git a/target/arm/helper.c b/target/arm/helper.c index c36ec6c530..570f2dcc98 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11156,6 +11156,29 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, if (arm_feature(env, ARM_FEATURE_M)) { flags = rebuild_hflags_m32(env, fp_el, mmu_idx); + + if (arm_feature(env, ARM_FEATURE_M_SECURITY) && + FIELD_EX32(env->v7m.fpccr[M_REG_S], V7M_FPCCR, S) + != env->v7m.secure) { + flags = FIELD_DP32(flags, TBFLAG_A32, FPCCR_S_WRONG, 1); + } + + if ((env->v7m.fpccr[env->v7m.secure] & R_V7M_FPCCR_ASPEN_MASK) && + (!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK) || + (env->v7m.secure && + !(env->v7m.control[M_REG_S] & R_V7M_CONTROL_SFPA_MASK)))) { + /* + * ASPEN is set, but FPCA/SFPA indicate that there is no + * active FP context; we must create a new FP context before + * executing any FP insn. + */ + flags = FIELD_DP32(flags, TBFLAG_A32, NEW_FP_CTXT_NEEDED, 1); + } + + bool is_secure = env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_S_MASK; + if (env->v7m.fpccr[is_secure] & R_V7M_FPCCR_LSPACT_MASK) { + flags = FIELD_DP32(flags, TBFLAG_A32, LSPACT, 1); + } } else { flags = rebuild_hflags_common_32(env, fp_el, mmu_idx, 0); } @@ -11195,32 +11218,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, } } - if (arm_feature(env, ARM_FEATURE_M_SECURITY) && - FIELD_EX32(env->v7m.fpccr[M_REG_S], V7M_FPCCR, S) != env->v7m.secure) { - flags = FIELD_DP32(flags, TBFLAG_A32, FPCCR_S_WRONG, 1); - } - - if (arm_feature(env, ARM_FEATURE_M) && - (env->v7m.fpccr[env->v7m.secure] & R_V7M_FPCCR_ASPEN_MASK) && - (!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK) || - (env->v7m.secure && - !(env->v7m.control[M_REG_S] & R_V7M_CONTROL_SFPA_MASK)))) { - /* - * ASPEN is set, but FPCA/SFPA indicate that there is no active - * FP context; we must create a new FP context before executing - * any FP insn. - */ - flags = FIELD_DP32(flags, TBFLAG_A32, NEW_FP_CTXT_NEEDED, 1); - } - - if (arm_feature(env, ARM_FEATURE_M)) { - bool is_secure = env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_S_MASK; - - if (env->v7m.fpccr[is_secure] & R_V7M_FPCCR_LSPACT_MASK) { - flags = FIELD_DP32(flags, TBFLAG_A32, LSPACT, 1); - } - } - if (!arm_feature(env, ARM_FEATURE_M)) { int target_el = arm_debug_target_el(env); From patchwork Tue Aug 20 21:07:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171847 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp76771ily; Tue, 20 Aug 2019 14:14:19 -0700 (PDT) X-Google-Smtp-Source: APXvYqzO9WBr+TsZbU8BLJYMM0Zj/MsaOeGzWIGibOjn8Pe6P0hogmmyrX8HzbilgNxr9LC/ccAE X-Received: by 2002:a05:620a:15ce:: with SMTP id o14mr28906510qkm.30.1566335659750; Tue, 20 Aug 2019 14:14:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566335659; cv=none; d=google.com; s=arc-20160816; b=UWJ3DMhbAZmPAxgNzpJfJTMuFqaV4m01LF3RJ9KgRDQnzBAxJg8IkOqk1oLFS/Q6yr MlQkGaqz/7TRXmBYdzkwUElyLlLsYx6y8AbG8GnTV36vLRNSFxkV39Yv1IMnx67C6vgO yrjyywFryg8MvZaYQfbcMcoTESYNpYHsJJQwVN9ESPdQWEuRBWcrnPahQjza4gUEVLKq fZxj75nTck46Fht+LgJpbPUFMqjwLK25Ij7UVsHYls8FgGtr9xzv8fac0BVAiCzvtU1p lMTtOlQDDCMjV0nyrxvw8wg/TWFL6irOLLTl/4dA6+4yULmXMJdtE6NXz9uYmj3O88o4 ueQw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=BCJyROCPXXds3VscyTQOsfgCkthhXaXdTk16P2hR/Vo=; b=heWODhOek5tqZP4Pa/q9/uwyr5JYKvJz9pfRmWvrsae9xKS+baYASBJSs27ufj34tW aebDIeGZbg5oFQ4ZhJCMFoMI/m42AePADKx/yE1DCiQsFlKTFazkvSsu5Wtm3W1dAHRX xM8G7Kdt+VUK+TCcYuJIKEdG9Yew/bcHiAX3DXVNIvfd9i79UKOVOHhNdrFSZ9XYWetD CvlIBa4D2l8rxDdZTv3DmRD5grphYR3CRFMtR2c70OvtOBxQlbDK6TT7BRTIQY4lvU56 P/fTp9Iri1GdQi7/rlrjNatHpMVWc3Dd7pMcSaF/jeoSYbQBjo1rzps6MYiSWHuwvkYL 3THA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=nVA35vd2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 25si12314822qvo.149.2019.08.20.14.14.19 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:14:19 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=nVA35vd2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41750 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BSM-0005Nd-Pa for patch@linaro.org; Tue, 20 Aug 2019 17:14:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53793) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BLx-0000HU-3x for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BLv-000063-Jw for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:40 -0400 Received: from mail-pf1-x444.google.com ([2607:f8b0:4864:20::444]:36693) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BLr-0008Rd-2G for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:37 -0400 Received: by mail-pf1-x444.google.com with SMTP id w2so4120434pfi.3 for ; Tue, 20 Aug 2019 14:07:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=BCJyROCPXXds3VscyTQOsfgCkthhXaXdTk16P2hR/Vo=; b=nVA35vd2h5vDvoHeJUg6C0bzkg9xx5apXeaTCcUv4dEgn4Mv8V/Nv2Ash21AaDYtyb Rd762GqBbfbX5QVFI3nl5GbrrXCIbwiLzOztLAtU3dBDdsi51Xsui02Ny1C93avNZi50 c8JzQVqdhxoRXRaMynxID9Vaj2MOUnKngKX86eZppIOqkDPlJ40OxjtTHaxofTuzfY2J t7MFqu5BWAiH+O/kV1HMSIh2A3NuproLtIXAYiR1xciBjskgQejeSuCBi2YZPV1ZNEF3 AaVaXGu32mLLWRH+VEcdgYJYyemy7U7RRO1a1Bh2A9zltB6X+abnncIfP+Qa7SHuy/4e xh9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=BCJyROCPXXds3VscyTQOsfgCkthhXaXdTk16P2hR/Vo=; b=SVyftuuuLSmXX7i7dg8Iv/YxHZXmVkbMCJWfZJAS822QYb5yrN6VmBDQSyzFA+BhBp PYvehNnXpUVs4WPjfcz5Wj5h3nB7tnnbAeCFXKI8yCW+hsz8Anjsok10qwoxkbK+g9yD 7PP61K9H+KcInjQhpQ47NnzrEGcV6ZAn+3YmXD08yzvOoiFiHgGqE2QfaecJJ04SnOeS +3hHuo7w5s3B/3v3Mxsle2j24kdreBw6nbMO7XvmVxbkhObWyXHF+fooknuwcn1pfyMD 2CVPOKO7n8LOo74Wkh0Co4NsBEUknEps6tLdMRz1FumGKELv4BjWMdT/1bfFXtSQPkE6 iXQw== X-Gm-Message-State: APjAAAUdGF5E2CMXREBV0UOTnGgelVTveSXE8OMeGzsEIpAbg1j/9OP8 7dS+hAQpplsKGRZAZz74cC9Kmtt2XBk= X-Received: by 2002:a17:90a:234e:: with SMTP id f72mr1885339pje.121.1566335252070; Tue, 20 Aug 2019 14:07:32 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:31 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:10 -0700 Message-Id: <20190820210720.18976-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::444 Subject: [Qemu-devel] [PATCH v5 07/17] target/arm: Split out rebuild_hflags_a32 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Currently a trivial wrapper for rebuild_hflags_common_32. Signed-off-by: Richard Henderson --- target/arm/helper.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/target/arm/helper.c b/target/arm/helper.c index 570f2dcc98..0fea62dc12 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11068,6 +11068,12 @@ static uint32_t rebuild_hflags_m32(CPUARMState *env, int fp_el, return rebuild_hflags_common_32(env, fp_el, mmu_idx, flags); } +static uint32_t rebuild_hflags_a32(CPUARMState *env, int fp_el, + ARMMMUIdx mmu_idx) +{ + return rebuild_hflags_common_32(env, fp_el, mmu_idx, 0); +} + static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el, ARMMMUIdx mmu_idx) { @@ -11180,7 +11186,7 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, flags = FIELD_DP32(flags, TBFLAG_A32, LSPACT, 1); } } else { - flags = rebuild_hflags_common_32(env, fp_el, mmu_idx, 0); + flags = rebuild_hflags_a32(env, fp_el, mmu_idx); } flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb); From patchwork Tue Aug 20 21:07:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171856 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp90608ily; Tue, 20 Aug 2019 14:29:11 -0700 (PDT) X-Google-Smtp-Source: APXvYqwlxvPERYwQAzoVOI1YN0AUmvaW/iSQgamuUUAKMfcjWgRrqe9SU0l5/REuE6SSDQ98kfPn X-Received: by 2002:ae9:c206:: with SMTP id j6mr27542515qkg.14.1566336551168; Tue, 20 Aug 2019 14:29:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566336551; cv=none; d=google.com; s=arc-20160816; b=Kf2WQ2iQR9OvVkdIY9BuUP3ctAG7bSBHxVDN6s+/hu2oEYyRScOdUjgednDmsNiHQq hS1d3TaShC41xp2VTxyVk0fUZVh5Oy7nyF9VgazZb2aBSYIyuEvhqurCupX1n9Z0BJKR dpFLS8+GMiaPj6ylsLbJKLNtHalT21JtuPTmkpd+kq+PJ6iQP2MiGgUj/fKlfGIGZHQ5 hBi9zOwPmUcqSdF03zVogNmhp9FbeysQu3d8+iFLgtsikx8xeVNqrKO4Q2WPPW47uNRf CV/vtnaXXt849O7Wz6ecCXVCQzWeIoP4Qm8pkEjKMAHeTcPs/PwFkQnnVxHOt3MwqLTg 2WKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=yxbpJRWxck0uWFUl/a/sUY0K0yqQ+42Z+aDE0x2Cf9o=; b=NTYMnIMDgkPGSYz5sYZdrbaifuVSg56+X94gwNoabQUsm+LJrhKCRyAyD7B3gxzSwg zf7oPPFlftGOVxA0gIUX1BRQNh8Di7g5PdDe9RdVwfqTdaCSdVVDd7U1kdZ4CsyMVNUv l7XTV7AcKN1jX7OMdgq9nGaiKE25nYyipga3vqcNm7PW0xOJaKfh4k6Kp/rGwIxF/8NL nOUnj2Ed8zYYIVsJJAf/q62xgKQ0RPkH23yoakgfXkwnBjCGSu16IiGN31l3bmpT66At u7WjR6+8HcfIhTO7yBZcZ23xlTaCPKboT3UWqU9kxCZ2TYI9uO3+xWgw3jcYVeU4Pvje XYLA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=eij0cmVB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id x38si8859912qtk.117.2019.08.20.14.29.11 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:29:11 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=eij0cmVB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41982 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0Bgk-0001rx-DQ for patch@linaro.org; Tue, 20 Aug 2019 17:29:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53901) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BM0-0000JP-L4 for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BLz-00009u-90 for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:44 -0400 Received: from mail-pg1-x544.google.com ([2607:f8b0:4864:20::544]:40082) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BLz-0008T8-04 for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:43 -0400 Received: by mail-pg1-x544.google.com with SMTP id w10so10801pgj.7 for ; Tue, 20 Aug 2019 14:07:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=yxbpJRWxck0uWFUl/a/sUY0K0yqQ+42Z+aDE0x2Cf9o=; b=eij0cmVBA9PsJOVyV7dPQAbrVthpOec9elcRG0WGQNG8pWWE6SJDrp5R164UbPGBH7 XBYuLshgkBzAWQTHj1e5neird9jVbxxyyU2BdsOIZbvLXY/GTNhZAQFDRuGAhzxv7tsd 6DBdMuQemWY5NirBMv1fWd+5CJJWBcIfkYWFjnkGqfr1HnOxT+dQ+kC6DmS6dOhRXOzm C5AaTtzaIBqN0zjS+UJM5q4nBe7dh50Jnph2RhDxUFaUTIOp8uXE8qPi6yeRgQzonJoG bCIMR6hT0Aq6pqOCjAuXB/EKPkuifO5Zbp5x2FYg0Vt7NKLcw+gNzFVSSPk3OM0gBrmE QtEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=yxbpJRWxck0uWFUl/a/sUY0K0yqQ+42Z+aDE0x2Cf9o=; b=ZnuZcOIf4lYJfzUQG2LQ9y5Qz/pJJJiaNJDClD+X/T8FkrhTti74vvGI4RrEHblgAr 6p2kXPDyqbfIFsSfNvU+Y9VU2tHywAQgx4GRE6LU98n7Pb+9vwxv3XN6KswtGDGj7IrZ 3TIjy6TaQQFMJDhTAeGkADZ1ESE02asAMctr/YiLTORq1YsnOMY0fTFpVOc3X4f1IWR+ pgW3T3UoN0NfWfBkmg/BNzDL1WQHouLruLfgqhXao3tnXm/B7tSLoTfhdQAavmrG5SpJ Ciz78rIz1/BaxMrASSJaot4SVCCr5tfWkhAVE+Q24ny7ab3ui72M+t6gryNK8J6Uar3S Ckeg== X-Gm-Message-State: APjAAAWceFCZwbHdu36QEWPMO+kNsSS0iYO0i+bVvJJh6IE85CDGRva1 WqlXfcbhwdECFpRIFCDeE/PFMz/vOHI= X-Received: by 2002:aa7:92d2:: with SMTP id k18mr32011830pfa.153.1566335253852; Tue, 20 Aug 2019 14:07:33 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:32 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:11 -0700 Message-Id: <20190820210720.18976-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::544 Subject: [Qemu-devel] [PATCH v5 08/17] target/arm: Split out rebuild_hflags_aprofile X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Create a function to compute the values of the TBFLAG_ANY bits that will be cached, and are used by A-profile. Signed-off-by: Richard Henderson --- target/arm/helper.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) -- 2.17.1 diff --git a/target/arm/helper.c b/target/arm/helper.c index 0fea62dc12..fc071f95db 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11068,18 +11068,28 @@ static uint32_t rebuild_hflags_m32(CPUARMState *env, int fp_el, return rebuild_hflags_common_32(env, fp_el, mmu_idx, flags); } +static uint32_t rebuild_hflags_aprofile(CPUARMState *env) +{ + int flags = 0; + + flags = FIELD_DP32(flags, TBFLAG_ANY, DEBUG_TARGET_EL, + arm_debug_target_el(env)); + return flags; +} + static uint32_t rebuild_hflags_a32(CPUARMState *env, int fp_el, ARMMMUIdx mmu_idx) { - return rebuild_hflags_common_32(env, fp_el, mmu_idx, 0); + uint32_t flags = rebuild_hflags_aprofile(env); + return rebuild_hflags_common_32(env, fp_el, mmu_idx, flags); } static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el, ARMMMUIdx mmu_idx) { + uint32_t flags = rebuild_hflags_aprofile(env); ARMMMUIdx stage1 = stage_1_mmu_idx(mmu_idx); ARMVAParameters p0 = aa64_va_parameters_both(env, 0, stage1); - uint32_t flags = 0; uint64_t sctlr; int tbii, tbid; @@ -11224,12 +11234,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, } } - if (!arm_feature(env, ARM_FEATURE_M)) { - int target_el = arm_debug_target_el(env); - - flags = FIELD_DP32(flags, TBFLAG_ANY, DEBUG_TARGET_EL, target_el); - } - *pflags = flags; *cs_base = 0; } From patchwork Tue Aug 20 21:07:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171848 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp79271ily; Tue, 20 Aug 2019 14:16:53 -0700 (PDT) X-Google-Smtp-Source: APXvYqz8LDXNZGE9vr84iBsLMUpjSa+LePqpdryDOOKBD5BLQcl+/q191UYg1Gjy3bRTBYRNpWR6 X-Received: by 2002:ac8:794e:: with SMTP id r14mr28004817qtt.279.1566335813871; Tue, 20 Aug 2019 14:16:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566335813; cv=none; d=google.com; s=arc-20160816; b=XCE1IzOyO/Pj66rfoLh/QNVbEuQKw27YZiTDcL0pJ/jYqeUTpRIc67711a5SThau/5 mGKWuzXSXsuqDJX+cRnCrAo8y4kPSiZU0fPIKX34sMtChI6jFOcOZiZUlw4L53Fj2eEg kYKdhgo3SB19yCAc4s8MABWQ6q24/qhHl9Et7MKlBTlGy/waMF754QqgOa1cS+F8IdfA DvvBNqR/uZCoX1D7u67+4l6/HyQommTSKgCFMZa6tCIL+VS3PB6C8DnOXFnOAEAllK+T 0FyBTe1WTSrbUPhxnrkHiaBP/+btSpJr9s7BSxANcnTbOq4o8MROaS3JucL9na7C5Kyp C5VQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=cAE3egBYYhx3Un5p/9eiXe7aY/AvfKY8XXQvwdeHeks=; b=wWgSg5r1e8yH3os2HpVadg+3am4VYoFlVjU9YZltw3rtN1GgFCdlz0P2HOBPvEE7I8 IMi1JhwNj0pACwwtYWkfARjSHiMynYSzUiRCMwxZryVBaodzPzwur56YKXXLJAx6LiOw h4djUSaGtqyCt1ojgui+uvUAglAdOWnesvwkySDdy+ePkV7kS2HBWA+3OZBszXwgDVNP wMGBd1GnxtU1Buxyaqa5L+Esso6EBGsFsDm9U8502fSfX20LEE5Aqiha/ADRxhL9EJKZ j89RgscoIIeH+aI79VWbW5VoyN2BdS2VJEwftqZL4+OCZ1GmFZQi9eiXNnZhIPKQ4ltn CApQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=IMDWHWGk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d141si11846440qkb.60.2019.08.20.14.16.53 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:16:53 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=IMDWHWGk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41804 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BUq-0000lP-Kb for patch@linaro.org; Tue, 20 Aug 2019 17:16:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53872) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BLz-0000JH-UP for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BLy-00008u-Sn for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:43 -0400 Received: from mail-pg1-x542.google.com ([2607:f8b0:4864:20::542]:39431) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BLx-0008U9-0f for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:42 -0400 Received: by mail-pg1-x542.google.com with SMTP id u17so13592pgi.6 for ; Tue, 20 Aug 2019 14:07:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=cAE3egBYYhx3Un5p/9eiXe7aY/AvfKY8XXQvwdeHeks=; b=IMDWHWGkACnr3xshcVwyGWECtPIROaDZSeLtMBPd/2joZErI37Z+YX+nJzN2E6BnW2 8KKu39ETpX71aPkEAbCpD33AS0UkhGSzmr3wJh+lIyRSDdvWnWWzvFdQF0+eqKSI02WV OqG/rjEUVbJP3Dd/C4E4l/931bmvxsZed7SHtwqWVTTLCz0OYz3AN0kUn7TSq57jFsH8 zaK/ij2cq91GNzsAu5jKi5c0JTpYHRE7YI9iHbTAjgfsOHYeeZW4jmw6daIpk5BjkoK8 IwuN9BcvL6wS7gUJCdWt7f/DZg0eTeMOpKnuJgZDOguBqLvkgHYh1/rruenfHExEuYEe N8qQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cAE3egBYYhx3Un5p/9eiXe7aY/AvfKY8XXQvwdeHeks=; b=UN51y8+5wHFHVtIrZ7RchjXDjFb1QD73LLkGRgEl49zZ6eycJqGR2N9lAr3/GOtZtZ XS1r2BIJCBaqLqOKGDtD6Yv6oeoETWrFIfQkIt/eWTqB4sSxKbrCdkdnXZ4qaVaX8uxl /6jgww8VihsuzdCJPBT9GEHVYL7fngZ7QJEKvJL6iYYVMnEQLNwjwlt/lSNArbWM+B0F 1LE0OIgqMgoFoAGZ1r/lFm71x++Ri0Re7EVuFAFlqsKVodA3usrKswp7MkAS+n33i8+x PiRlgQ5qU0/alZ12k8q3UR96X39Yknkk48Ab4otLdxT/wljldExKAJgFRDiDDpP2OXtO UIWg== X-Gm-Message-State: APjAAAV9bnN0isnkGZ+qq/M9KHTyy+OtrzSIuAJG321jO2j4LHTmlx/s cK/XGzgs6JrJw9Sb1oIXs0nzINu39VE= X-Received: by 2002:a62:be04:: with SMTP id l4mr30995464pff.77.1566335255019; Tue, 20 Aug 2019 14:07:35 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:34 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:12 -0700 Message-Id: <20190820210720.18976-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::542 Subject: [Qemu-devel] [PATCH v5 09/17] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We do not need to compute any of these values for M-profile. Further, XSCALE_CPAR overlaps VECSTRIDE so obviously the two sets must be mutually exclusive. Signed-off-by: Richard Henderson --- target/arm/helper.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) -- 2.17.1 diff --git a/target/arm/helper.c b/target/arm/helper.c index fc071f95db..3889b9295a 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11197,21 +11197,28 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, } } else { flags = rebuild_hflags_a32(env, fp_el, mmu_idx); + + /* + * Note that XSCALE_CPAR shares bits with VECSTRIDE. + * Note that VECLEN+VECSTRIDE are RES0 for M-profile. + */ + if (arm_feature(env, ARM_FEATURE_XSCALE)) { + flags = FIELD_DP32(flags, TBFLAG_A32, + XSCALE_CPAR, env->cp15.c15_cpar); + } else { + flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, + env->vfp.vec_len); + flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, + env->vfp.vec_stride); + } } flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb); - flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, env->vfp.vec_len); - flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, env->vfp.vec_stride); flags = FIELD_DP32(flags, TBFLAG_A32, CONDEXEC, env->condexec_bits); if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30) || arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) { flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1); } - /* Note that XSCALE_CPAR shares bits with VECSTRIDE */ - if (arm_feature(env, ARM_FEATURE_XSCALE)) { - flags = FIELD_DP32(flags, TBFLAG_A32, - XSCALE_CPAR, env->cp15.c15_cpar); - } } /* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine From patchwork Tue Aug 20 21:07:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171846 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp75996ily; Tue, 20 Aug 2019 14:13:29 -0700 (PDT) X-Google-Smtp-Source: APXvYqzWQsuJBON10hD9Y4CUoDklNWzApE0X4LEzmoZ8/wQZCyLCh5ZlBu0tO7LVrv+Rv1FvT+wM X-Received: by 2002:a0c:94aa:: with SMTP id j39mr11750069qvj.24.1566335609820; Tue, 20 Aug 2019 14:13:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566335609; cv=none; d=google.com; s=arc-20160816; b=KamtlaQvsrQRiS9AQQoUE5slLCEn7B+UkjgYOQSO8WQETa0tzuIiHByXqNpwIf5itu bd/Rfu48n5W326CVAtGLeZcTv3L827QgEvFxxhE8qWUsX4bu//siuqvyUx/LnCbRTSNL veBbklRqsKiVLuBSKCS8xwlmxSbik9pZMcaaKOOpdVJ+2tuTlH3hRq5SMxDe5SBiL6SY FmU5Mgwf+RWoU3GfYA/m4JrfrG0yhy/NnIhd6lldqOyENgt9urIMs/3jQX/g5iDWpKoa 27w87AfZmbxMCzYurB+hXDVZuinBTCJgT2ajf6g0Dza7z/qEuvinob9xBd05YtRegd0b F+oA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=+UTATQdJP366blpEIT1qjPbjVC5kfEMHdA4PBzrTe/4=; b=XUew/kJbYPc0kXxE5OduCqWPCoSMnWyusxGErz9cGCEEbt8moD4KxCfnUHHSt2wira Ti0EgFaYLdzRGOpRiuF+sr+ipH2kE6nmblenKsY1v1m5S7zqqXpgbjb92FfZUdN2LsmT pEN1cy5qEoZzRpP3umkSs23PoraQl0o3IPxkcg2Vo6nVLYPdjTRSBHrv01E8+x4yWKfh rKtzPnR0+jkmZ7lr/Wxos/lvnPyhbX40RBGCE/rPdRRzmLLkQMs4BuuKKgwgj70gL/Gr 6qMg2uINK48697H5DOPUYr0cKlFXomIrPqaSeXJqiy2s6DovYFTh3o1MfkS9Z3v7nOLG rLRA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=dZd0p26a; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id p43si12069953qve.83.2019.08.20.14.13.29 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:13:29 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=dZd0p26a; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41762 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BRY-0006IX-UG for patch@linaro.org; Tue, 20 Aug 2019 17:13:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53902) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BM0-0000JQ-LZ for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BLz-0000AC-9l for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:44 -0400 Received: from mail-pg1-x541.google.com ([2607:f8b0:4864:20::541]:35627) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BLz-0008Vv-0r for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:43 -0400 Received: by mail-pg1-x541.google.com with SMTP id n4so24215pgv.2 for ; Tue, 20 Aug 2019 14:07:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+UTATQdJP366blpEIT1qjPbjVC5kfEMHdA4PBzrTe/4=; b=dZd0p26aPDnKIpfWcl4MFBr6FX/sKYvncmZi2JgsTDMkrRfV4NEXQJYSR8PFBsGnQB FSNeCOVE70BLpODW+UpoVTVA4HfP77YyC9jhZk1WiIx1m94Rrlg9zHg+phPdS/0NCBKp y7ogiBN5y2iVD4ot9W4Obh0IEfHAaGTSW8JB3j+mI9Tqi304SmzosXyP5MU3qvsbuP6l mJEFlFUb6mV6qI8bCe5SHgOPDXeQanW2l50jlIBiZbWylvOtosfAkiXfP7hbDd/cv+yT MbUoIGE1BqieAFEWKiPY5+q7uPCJv/b71XjoM9gegW+CcnUWrQgjxA4LWTZ+Jb7w2f5N Z9PQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+UTATQdJP366blpEIT1qjPbjVC5kfEMHdA4PBzrTe/4=; b=pTbogCMM7l399b0nEOMIMxMxRnlr5AXyU/0gyuSv364e9p7rOHM3miugdl87+Tb/eh zENEnIGSEWQj50MRMk0QqrGw1LhPnjMSVHuYavAe7WjgUGtIy/1Rk6YCwgB6RVqezlW9 AA5GjprE0uk3bFmUE6vVs9zu4itcgXVJBlPU7853UdYuRkg5MdAknrlcWD21Q/mrIJU2 Sm2KDtDUzYtEtx61XZSNrrDpXJp3NZnTXsqoPuFnSSIsaXwiQthae3xrFZG+UTjxWuuy xTlCgNxaOPp0DT+7fsUcEkhI+DfFf6z0nDZSPWbEyXfm+HdMV8CknmP0tv+i83z0sg5l TwHg== X-Gm-Message-State: APjAAAWy3GFx26L3GGcWSbD0l9KFHxQAtxS1Qjrv68jY4W4rz7vC5Q0e laADqCf8Vjn/riniYJwqiXjdCbYKEvY= X-Received: by 2002:aa7:91d3:: with SMTP id z19mr31940123pfa.135.1566335256425; Tue, 20 Aug 2019 14:07:36 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:13 -0700 Message-Id: <20190820210720.18976-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 Subject: [Qemu-devel] [PATCH v5 10/17] target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Hoist the variable load for PSTATE into the existing test vs is_a64. Signed-off-by: Richard Henderson --- target/arm/helper.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) -- 2.17.1 diff --git a/target/arm/helper.c b/target/arm/helper.c index 3889b9295a..c01b3027e0 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11159,7 +11159,7 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, ARMMMUIdx mmu_idx = arm_mmu_idx(env); int current_el = arm_current_el(env); int fp_el = fp_exception_el(env, current_el); - uint32_t flags; + uint32_t flags, pstate_for_ss; if (is_a64(env)) { *pc = env->pc; @@ -11167,6 +11167,7 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, if (cpu_isar_feature(aa64_bti, env_archcpu(env))) { flags = FIELD_DP32(flags, TBFLAG_A64, BTYPE, env->btype); } + pstate_for_ss = env->pstate; } else { *pc = env->regs[15]; @@ -11219,9 +11220,11 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, || arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) { flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1); } + pstate_for_ss = env->uncached_cpsr; } - /* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine + /* + * The SS_ACTIVE and PSTATE_SS bits correspond to the state machine * states defined in the ARM ARM for software singlestep: * SS_ACTIVE PSTATE.SS State * 0 x Inactive (the TB flag for SS is always 0) @@ -11229,16 +11232,9 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, * 1 1 Active-not-pending * SS_ACTIVE is set in hflags; PSTATE_SS is computed every TB. */ - if (FIELD_EX32(flags, TBFLAG_ANY, SS_ACTIVE)) { - if (is_a64(env)) { - if (env->pstate & PSTATE_SS) { - flags = FIELD_DP32(flags, TBFLAG_ANY, PSTATE_SS, 1); - } - } else { - if (env->uncached_cpsr & PSTATE_SS) { - flags = FIELD_DP32(flags, TBFLAG_ANY, PSTATE_SS, 1); - } - } + if (FIELD_EX32(flags, TBFLAG_ANY, SS_ACTIVE) && + (pstate_for_ss & PSTATE_SS)) { + flags = FIELD_DP32(flags, TBFLAG_ANY, PSTATE_SS, 1); } *pflags = flags; From patchwork Tue Aug 20 21:07:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171854 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp87380ily; Tue, 20 Aug 2019 14:25:21 -0700 (PDT) X-Google-Smtp-Source: APXvYqxNtqheZi3TAshx0tjlXk+cdULO+Ej/Hb/4EpfjVG3pkXSpcOCLSDakG78x8NNHcoBsib18 X-Received: by 2002:ac8:f99:: with SMTP id b25mr27545772qtk.142.1566336321902; Tue, 20 Aug 2019 14:25:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566336321; cv=none; d=google.com; s=arc-20160816; b=zIRBOMqHb/bsIgpbfzuT1M6D7eGqggqe41Oom2bO8HKN+ZdQGwPnfDAA7SFqzmyvr8 Q3D3TwAf3yBz8JJsc9Qyo8a8oflDxJxYEKEvp2w0cmmPmYZbci37DN/GZcDOG9osfvok mOHJr2oxMF5+Hk3vG10qDTQxgG03wus2xrVcMMzEO6nwzGNtXeYoCe29tUExiypcX4Ms Im+JaSxGyhUkDSrTZfZz8s83PFIhGL2i0FhBE6J8TzhOPZZNT5snPzTFRIjfNJ3HKR8r //mw0v1Yxq/BFLmIYlgloyN2N0xRD1IZY+cNlhgKSFFXp7EttGLcE6bhPxKmJo1GbDAB JYWw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=FHxf39f9EoVCKpDokykyrgpGnuR6CjljeSMS+5E9ias=; b=jwq/jVEOMGitcd0L0XJNnfIAkJU+LOAU2lrDz4m4sjoWhctM+bRnP57xDmQ2Fdwqcj 9t9XWDfgOARbKcTcozmJCX3kRKqwbN5SoImBynhokb5f3TtaXHNSlIbpB9zBwGrNci98 bxPhBHsr5/iEVgtz+d71C2ia1LJn00dGl6gMjnbsyMpG+nxPov0k0z4uqJMeg8G+9Nns veH5nJgqgrjw/wG6j3VicmXVIs6yUQ70Zxrqy8VgFx50sXY3DsbHKw0HeldYtgD3cbkd S9RxrH33ekwb8z7tyMtf9qx+hDWMB+vCXvjzJCgZ8N2Npw/vjCA+HNxchUru9ZvuYNty J+AQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ICbOrNaD; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id w31si11603689qvf.189.2019.08.20.14.25.21 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:25:21 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ICbOrNaD; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41894 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0Bd2-0005pt-SC for patch@linaro.org; Tue, 20 Aug 2019 17:25:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53900) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BM0-0000JO-LW for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BLz-00009V-2t for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:44 -0400 Received: from mail-pl1-x643.google.com ([2607:f8b0:4864:20::643]:33043) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BLy-00004v-RR for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:42 -0400 Received: by mail-pl1-x643.google.com with SMTP id go14so102361plb.0 for ; Tue, 20 Aug 2019 14:07:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FHxf39f9EoVCKpDokykyrgpGnuR6CjljeSMS+5E9ias=; b=ICbOrNaDt2XVIh8mtctgSKfF1yPyYPsg9op+wUvUHXksN2R+lz7GQ1qj48sXakswp9 64egc4h11YNPC1y7HBKBA131D9Glbfoqjkz/1NmIIRO2owoV1WdO4E7GjdkmJ239+TN/ tyyZepO/zJe5+DHfMxsdWMnoeYdWcmgjUdF9kqZQijzh6F+mJGFOLKbFbm++sHn8S5HT jH571+WRQHEmn/coS+ODQMxBpBz1NiAiRGaVer9PCPIjW2T4PURBWlXbgqQm4fgc/kxf B7PkyrpTeMUa0IHgW35Bq5/cNCPSdlrT7ILSNY3T1Gqbennq7v/Khxc8NDIMmgcK6cP3 RcDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FHxf39f9EoVCKpDokykyrgpGnuR6CjljeSMS+5E9ias=; b=HRuTLB+tdBJ3aBoUsIEheCW3ueMv2qOy/kKZ+1dVV1sM2yQU42AIdi7EzlK6dSjlAD 6V8AxE90cQsb7tEqSAvGg8ONY4+Q1yn3tLBEA0nmWdnushnijtJx81azehpldU6cEQqA jM89LAvaF1sEj6sU8eA13IJgPPi5ADRNVu/wUuc6fJxb0Jn6WtIlwjO1vUBg7sOxtWr3 9MaFuHmeRrIxumtVLzrWlMOnnHcyCgdiHsNfUnzuMosRZRbxVOT50Y240IjP6fwlOibP DmxqCAJnKLVknH40XRBzxb2htTVau8o96fenA1n1u1w5nxAXogIFz5aGKjQEVaIyKDip xRtw== X-Gm-Message-State: APjAAAXv7aeFSde6KJHfikcW6JG70uwmZF4cS2iOyHlbPv9LXM7T20KN 0a1zn4On+syCZy0uTx5MEBIl2a/0WwE= X-Received: by 2002:a17:902:ba81:: with SMTP id k1mr31554714pls.213.1566335257564; Tue, 20 Aug 2019 14:07:37 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:36 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:14 -0700 Message-Id: <20190820210720.18976-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::643 Subject: [Qemu-devel] [PATCH v5 11/17] target/arm: Hoist computation of TBFLAG_A32.VFPEN X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There are 3 conditions that each enable this flag. M-profile always enables; A-profile with EL1 as AA64 always enables. Both of these conditions can easily be cached. The final condition relies on the FPEXC register which we are not prepared to cache. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 2 +- target/arm/helper.c | 14 ++++++++++---- 2 files changed, 11 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 5dec4d3b3a..9606222942 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3188,7 +3188,7 @@ FIELD(TBFLAG_A32, XSCALE_CPAR, 4, 2) * the same thing as the current security state of the processor! */ FIELD(TBFLAG_A32, NS, 6, 1) -FIELD(TBFLAG_A32, VFPEN, 7, 1) /* Not cached. */ +FIELD(TBFLAG_A32, VFPEN, 7, 1) /* Partially cached, minus FPEXC. */ FIELD(TBFLAG_A32, CONDEXEC, 8, 8) /* Not cached. */ FIELD(TBFLAG_A32, SCTLR_B, 16, 1) /* For M profile only, set if FPCCR.LSPACT is set */ diff --git a/target/arm/helper.c b/target/arm/helper.c index c01b3027e0..b905d61898 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11050,6 +11050,9 @@ static uint32_t rebuild_hflags_m32(CPUARMState *env, int fp_el, { uint32_t flags = 0; + /* v8M always enables the fpu. */ + flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1); + if (arm_v7m_is_handler_mode(env)) { flags = FIELD_DP32(flags, TBFLAG_A32, HANDLER, 1); } @@ -11081,6 +11084,10 @@ static uint32_t rebuild_hflags_a32(CPUARMState *env, int fp_el, ARMMMUIdx mmu_idx) { uint32_t flags = rebuild_hflags_aprofile(env); + + if (arm_el_is_aa64(env, 1)) { + flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1); + } return rebuild_hflags_common_32(env, fp_el, mmu_idx, flags); } @@ -11212,14 +11219,13 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, env->vfp.vec_stride); } + if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30)) { + flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1); + } } flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb); flags = FIELD_DP32(flags, TBFLAG_A32, CONDEXEC, env->condexec_bits); - if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30) - || arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) { - flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1); - } pstate_for_ss = env->uncached_cpsr; } From patchwork Tue Aug 20 21:07:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171858 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp94542ily; Tue, 20 Aug 2019 14:33:09 -0700 (PDT) X-Google-Smtp-Source: APXvYqzErDPDN9MJD9/4G7jr07H4PXminvrXJhC9G0XNyBy4iMbsxfDaOVStgUexU7UnfdJlmLvp X-Received: by 2002:a37:445:: with SMTP id 66mr27276223qke.156.1566336789217; Tue, 20 Aug 2019 14:33:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566336789; cv=none; d=google.com; s=arc-20160816; b=LDKjC9Pfp9ut5fj0XTbuYnLzI3me2Jf50eTipHdjK1/bkLOAEKzTcv6K2sMmXuN3oI ZNrTXCnSCbgSW+zILm4JcBKatRduhmChFsrmtgI2ya7iIcE6JJAaaABco/hr9WtA1cil mNGlKfrWM4/5Qrnq2d/1L+Gr0+7zO7SUmmTRJFhFGByET02iCRodiOVCydHhPhbpvnHn gdScHFtOXbKCGlcLPTGund7mrG1PUPdRQzVxHEIzw+hYxkGz0Pq0Sjl5qt7BOuf6MD8E HMQfllLQCJCSei6PMuHHsJjJjI+QSdamVLjfGdRtUUFoJG+wEH5c96UGlxBGdf1Me92z iBxQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=8b+r+7+wrJNiKK+el1m+NNiACbtE+S7w+cGIQmCdH8g=; b=CssorUKPrBHUHs2I+x6RSQrTmqCenp9rv1mvOTbA10MwkykJu6QfN7wSOL/IVQk+Us VNAkW6tQzXsXFQehQMiDlXULhTn8GaiEX789pov/cr10iSavpjWXnLC9A0U80MOBgNsS DM7NhsNztjlM8Gdy/ZdX4qspFQF/I8oD/qtXGUnJ2JlzQ77+3K2SVcKpC0UZqVGsFJx6 HT0YBUe+xNKKr4rmCu5RQ3/AVcQkjTnWZ0zn1rUhLqG2duzg37KHH3RyYaZAb4SohHTP 6v24RfjbY74RiSXaR3ipyeEt1xNai633PiIWUdbS2vtU/FlFsZGORHZELvNRYq4ZKBrC TfMQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=srraqAe9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id s7si11303151qkc.12.2019.08.20.14.33.09 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:33:09 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=srraqAe9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:42030 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0Bka-0005G4-K2 for patch@linaro.org; Tue, 20 Aug 2019 17:33:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53915) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BM0-0000JR-OX for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BLz-0000A0-8l for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:44 -0400 Received: from mail-pf1-x441.google.com ([2607:f8b0:4864:20::441]:42838) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BLy-00005t-Vk for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:43 -0400 Received: by mail-pf1-x441.google.com with SMTP id i30so4112082pfk.9 for ; Tue, 20 Aug 2019 14:07:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=8b+r+7+wrJNiKK+el1m+NNiACbtE+S7w+cGIQmCdH8g=; b=srraqAe90z7WTNHwfkHfQkfGqnTVgX31c7VXOoaffni+fDLjsAZQ1G25thp+51wEwv EmEjuk4m7ZhknJE0TtV+5+RuyK9gA8IFRioNHsjPRR+p0uuGtQYrn2Cho3ff7e3THz3R 6q9hx4CcC0WgMusZjgwkuEtq1E9E5mAjknbq0Pp5hVZs/pfDoJdvYGr30vHn9frBbroX x4k9LKbUmxmGybX7/7Fe5ZTl/AFlFtHOTP9y8SsQ2WZB1L6xi+eLUR3ai0i6o5FTACG8 bhDIx3Wmr2AaYFfkXI6k56s3V8YbIRUl+HSVpEzMTnDuvDPB9QdUdfk0DMiTBJGeFE99 DN1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8b+r+7+wrJNiKK+el1m+NNiACbtE+S7w+cGIQmCdH8g=; b=XyaHkGxOpO6kp+DIPoMINNqGIWYXwDSFrN8GDiraS7xQ88mLQ73puMU+WaY+khYczt kM/XgbgdmKyoXWVQ+jdat5k0q3k0ElhXlVf3+xRn+MlyvX8y3ZYqo4FDxEgP2Sixnj2V wJ/tanDPlI83pWyJy08qGXuQwVd4tepoNBpCh5OIWm1eGkhxd1DrRkFNZZBB46Mp3fe9 dw6VXsXRhmXF0vtqh8AadVHHkJ3/9K92ATa5uo304TERLctJ2mdxmhLg0KDx7yWQHOVu cYtpLzhUc8Y0uq3YSTlXk4oQOkRJkOOqpL7vnhPz4njJ+GYJAL3Q9sgfR/HTt9RQAnjh e2cg== X-Gm-Message-State: APjAAAWM5xiKCjfXC77QOIIxHP4bT0fV401ArqwExZQxulV+y2RRL8mW snXKZ9FtkfgNQRfPUDXTGYzYZsfFBf4= X-Received: by 2002:aa7:842f:: with SMTP id q15mr31988912pfn.250.1566335258741; Tue, 20 Aug 2019 14:07:38 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:38 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:15 -0700 Message-Id: <20190820210720.18976-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::441 Subject: [Qemu-devel] [PATCH v5 12/17] target/arm: Add arm_rebuild_hflags X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This function assumes nothing about the current state of the cpu, and writes the computed value to env->hflags. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 6 ++++++ target/arm/helper.c | 30 ++++++++++++++++++++++-------- 2 files changed, 28 insertions(+), 8 deletions(-) -- 2.17.1 diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 9606222942..602c879395 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3293,6 +3293,12 @@ void arm_register_pre_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook, void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook, void *opaque); +/** + * arm_rebuild_hflags: + * Rebuild the cached TBFLAGS for arbitrary changed processor state. + */ +void arm_rebuild_hflags(CPUARMState *env); + /** * aa32_vfp_dreg: * Return a pointer to the Dn register within env in 32-bit mode. diff --git a/target/arm/helper.c b/target/arm/helper.c index b905d61898..83ae33dae5 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11160,17 +11160,35 @@ static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el, return rebuild_hflags_common(env, fp_el, mmu_idx, flags); } +static uint32_t rebuild_hflags_internal(CPUARMState *env) +{ + int el = arm_current_el(env); + int fp_el = fp_exception_el(env, el); + ARMMMUIdx mmu_idx = arm_mmu_idx(env); + + if (is_a64(env)) { + return rebuild_hflags_a64(env, el, fp_el, mmu_idx); + } else if (arm_feature(env, ARM_FEATURE_M)) { + return rebuild_hflags_m32(env, fp_el, mmu_idx); + } else { + return rebuild_hflags_a32(env, fp_el, mmu_idx); + } +} + +void arm_rebuild_hflags(CPUARMState *env) +{ + env->hflags = rebuild_hflags_internal(env); +} + void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, target_ulong *cs_base, uint32_t *pflags) { - ARMMMUIdx mmu_idx = arm_mmu_idx(env); - int current_el = arm_current_el(env); - int fp_el = fp_exception_el(env, current_el); uint32_t flags, pstate_for_ss; + flags = rebuild_hflags_internal(env); + if (is_a64(env)) { *pc = env->pc; - flags = rebuild_hflags_a64(env, current_el, fp_el, mmu_idx); if (cpu_isar_feature(aa64_bti, env_archcpu(env))) { flags = FIELD_DP32(flags, TBFLAG_A64, BTYPE, env->btype); } @@ -11179,8 +11197,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, *pc = env->regs[15]; if (arm_feature(env, ARM_FEATURE_M)) { - flags = rebuild_hflags_m32(env, fp_el, mmu_idx); - if (arm_feature(env, ARM_FEATURE_M_SECURITY) && FIELD_EX32(env->v7m.fpccr[M_REG_S], V7M_FPCCR, S) != env->v7m.secure) { @@ -11204,8 +11220,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, flags = FIELD_DP32(flags, TBFLAG_A32, LSPACT, 1); } } else { - flags = rebuild_hflags_a32(env, fp_el, mmu_idx); - /* * Note that XSCALE_CPAR shares bits with VECSTRIDE. * Note that VECLEN+VECSTRIDE are RES0 for M-profile. From patchwork Tue Aug 20 21:07:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171853 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp86708ily; Tue, 20 Aug 2019 14:24:36 -0700 (PDT) X-Google-Smtp-Source: APXvYqyMKKh4QQ4J265ZvHruhi8V24GTXOgrzDT+3qWAvQOqK+c/Imu664vRdOThee9O0TxZoxnc X-Received: by 2002:a37:a58f:: with SMTP id o137mr28481796qke.84.1566336276065; Tue, 20 Aug 2019 14:24:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566336276; cv=none; d=google.com; s=arc-20160816; b=hnrhZBzMwUdgDxxDdmwqsy5DoT5aMIX5e4YXZyp7auCQ4phdD0KJ49reyB/cZz5pHE H8qtL84auUxentouZK8KONhVlsKu+ZMlN0Eb33S4P5y3daaLwG1FWWL7B4fwUTqmmOwM cdhdph6hi3lxlL7PY/f6G9jcIEVnO6auC6Mvr813tWqYYK/K4OuGQqEh6SEQQvw3MyJ5 nTAezFXyjE0ufXwR43vpFr/i1oHsIdH2g2zduHhOLNN5Q4hrXtS8c8iIGyuELIUwsWgl Oz1tfMPhQPkO2ndjegjptv1YveHllTGgCu/K4L+YW+eDDFs2q87OMHOwyjnuqpdSoGFP cLlw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=nSUrF1uk3AduHW47FcRxNvtOuMuTx2/7SA2elwSehDg=; b=n1f7GDRUZ0os1RB6scQc7qB/Kqa1zDiJ1+m+qIvUupLP3cMnqD98eOtFlMESWyNZWe CYlOX5oHPFocGQF2n2ncL48abbvcWECSFCz0BEfu8hiXtqJ2sQ4GYgAzj/Wy+3Pe1WpB EZ/2jj3NT2Kjs4nEZicqCfb9DyzbufTjyQvsaJAN1gl9qAnS5Bt2bMZtKlHQoh3lJlQC MHfdctfNE8rhIN/k7EQs7PkG8p9VIFnTWDT3TkK03YIWQJQ2ut2iYbj1yRcZZzrzfFQA 3bjwX//bGzLuZUrAJMPz0qrrp3IeUk9KwkDXuLq33cGzEYm914rH5Len+vTfdIfy4/9p w/OQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=dTNR3oOr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id v141si11664679qkb.240.2019.08.20.14.24.35 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:24:35 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=dTNR3oOr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41912 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BcJ-0006TU-2o for patch@linaro.org; Tue, 20 Aug 2019 17:24:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53899) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BM0-0000JN-Ko for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BLz-00009r-8U for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:44 -0400 Received: from mail-pl1-x644.google.com ([2607:f8b0:4864:20::644]:33044) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BLz-00006w-1f for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:43 -0400 Received: by mail-pl1-x644.google.com with SMTP id go14so102403plb.0 for ; Tue, 20 Aug 2019 14:07:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=nSUrF1uk3AduHW47FcRxNvtOuMuTx2/7SA2elwSehDg=; b=dTNR3oOr2NCBTwzIGc5R3Mdlzd4W9hzQ87v9G5kYcaGHqMVco+8liB/2+EAgpmBhyB 6yorMPpZ8qF/8JbQ+jfn4zX0pHVof6G+HmrlgZNim+qbw0Aotp/nhcbu+6PLxbP6K2n9 zYFFNSlVQdzn5Yu2uZKZqrIWNs3H2Z2KisD7dQtTE7G2YSwNQVpSgBliI97dXhNWRG90 7j1dmL5slesU/eHbO3Ddu2jFPdqTqwoK3y1/B9YOlB/TU9F2JcuUwy7URET6K6ZcPET7 ffd/NddUYcCEjisNLIUZbw4mX6jcFe3qK/hQND8S5kvQReznHxDvyOP98Z6YEYLLpDGw sZgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=nSUrF1uk3AduHW47FcRxNvtOuMuTx2/7SA2elwSehDg=; b=MD9hrxswy234v4847ChPhomm/NeTNQpdYUNOlBmlOoHD000G/MiM3CEHYIBrIJ6Xjd Az+iqy7gtybSGOaMOBznbhyv+upS5l04mR6w0Ojbsv/vIVrafED6oWRZ1CHza+66cdz8 0Z6c6zAJzjbuEIFsRgg3oXzrcfg2c3nVRHbZx5piaKVSeMl9/6RcRJyqCwz+rdqHOhVi wtsnKKg3DxPjhJSyPWrVg5JMPeI/Eod9Z7h6FpD8A+DWTFH54UZrJFQ/8HgbaAGdrrEq tUwbhdnsW239OILF0MJA33lF1UW+O6WsN8E/wfzYj1gj+xXZaa14CJatZnom1iC/B65o e9MQ== X-Gm-Message-State: APjAAAVnerMH2RC3zsKbo5nxO1TefIuxATzeBf2stYJxFK0pN+pBpdWR VGRxENc41M2NAVmb6/hdwUeXLYWavdk= X-Received: by 2002:a17:902:5a04:: with SMTP id q4mr30699862pli.280.1566335259913; Tue, 20 Aug 2019 14:07:39 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:16 -0700 Message-Id: <20190820210720.18976-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::644 Subject: [Qemu-devel] [PATCH v5 13/17] target/arm: Split out arm_mmu_idx_el X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Avoid calling arm_current_el() twice. Signed-off-by: Richard Henderson --- target/arm/internals.h | 9 +++++++++ target/arm/helper.c | 12 +++++++----- 2 files changed, 16 insertions(+), 5 deletions(-) -- 2.17.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/target/arm/internals.h b/target/arm/internals.h index 232d963875..f5313dd3d4 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -949,6 +949,15 @@ void arm_cpu_update_virq(ARMCPU *cpu); */ void arm_cpu_update_vfiq(ARMCPU *cpu); +/** + * arm_mmu_idx_el: + * @env: The cpu environment + * @el: The EL to use. + * + * Return the full ARMMMUIdx for the translation regime for EL. + */ +ARMMMUIdx arm_mmu_idx_el(CPUARMState *env, int el); + /** * arm_mmu_idx: * @env: The cpu environment diff --git a/target/arm/helper.c b/target/arm/helper.c index 83ae33dae5..19bdb9b9d6 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -10988,15 +10988,12 @@ ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate) } #endif -ARMMMUIdx arm_mmu_idx(CPUARMState *env) +ARMMMUIdx arm_mmu_idx_el(CPUARMState *env, int el) { - int el; - if (arm_feature(env, ARM_FEATURE_M)) { return arm_v7m_mmu_idx_for_secstate(env, env->v7m.secure); } - el = arm_current_el(env); if (el < 2 && arm_is_secure_below_el3(env)) { return ARMMMUIdx_S1SE0 + el; } else { @@ -11004,6 +11001,11 @@ ARMMMUIdx arm_mmu_idx(CPUARMState *env) } } +ARMMMUIdx arm_mmu_idx(CPUARMState *env) +{ + return arm_mmu_idx_el(env, arm_current_el(env)); +} + int cpu_mmu_index(CPUARMState *env, bool ifetch) { return arm_to_core_mmu_idx(arm_mmu_idx(env)); @@ -11164,7 +11166,7 @@ static uint32_t rebuild_hflags_internal(CPUARMState *env) { int el = arm_current_el(env); int fp_el = fp_exception_el(env, el); - ARMMMUIdx mmu_idx = arm_mmu_idx(env); + ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, el); if (is_a64(env)) { return rebuild_hflags_a64(env, el, fp_el, mmu_idx); From patchwork Tue Aug 20 21:07:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171855 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp89919ily; Tue, 20 Aug 2019 14:28:26 -0700 (PDT) X-Google-Smtp-Source: APXvYqyaAgGjtiiD9fG+rqBX/Y87oybDqD9Fo7JhkcRjPpQXEOwjjPpMXttpFY9N3H4bYHCbTqc5 X-Received: by 2002:a37:2cc3:: with SMTP id s186mr27510095qkh.133.1566336506103; Tue, 20 Aug 2019 14:28:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566336506; cv=none; d=google.com; s=arc-20160816; b=DDqrzOX7rSf6y3shhS8ElbIikXtjBuh0GGNhzBkLzNohgfC42d5ZY1szv59jEToBx5 O+0uWTeSMS+H8zbYe9cQQVHba1fRIsRerXtZvuWxf26G3Q/sTXFyzvboIXc8BdXBnQ8K Ir3BvIA/qFslYEbinrQcWDkO9R5NB9FswKNmYpDmrRIEeKDgPlkiP5o7MGjVIbFun7em CR74fVPnDC1uzQGbxfj20481ZJOjI2qnD69X8sznlSFvuVeQfxTUkCzEfdeT2jBQezP7 o25HfHg+4B+Op81Zy86vB+1hCbmdkUFcic8YLDBkih7r22h803WRW6s+O3knGVnxFYNS bWwQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=bdJW10ZyVTM5Zc/CPE9B8BqW0sLbaJccOlvi6TIDC8k=; b=ZfHUhGQkg3UKL3Ri7rwBD56uiex5zpxgOw9MM+XdPZUijGr3wC9YfpEOjsKur76hpc E/cUzzi+U9YGYLeFAx37f2g20qdvvr1zKp7cvHhushcNPI8Oonx0On9n5vxNyer1ZZFu 2ecCRwuTEJCmivQvVhxywZtu5rNWPeC30XOgutxTe4I1ED8O/XY6spX+4JWbbIZcv/ju OHAKejk0AqR9/+S1KcEbF8pt7hefkz26rn/Uj9whAfWUddyazHn0BA7oRXt1iD1GaWsg 1+C7QQQ0rWiLkwKbiB1IdhUGRo4drRNkne5CntrB37r/HRIaPX6oZ8KVTaxTYH3zQy3y Y0iA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=rnC4h8aE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id q22si12175945qtc.105.2019.08.20.14.28.26 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:28:26 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=rnC4h8aE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41976 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0Bg0-0001gZ-Uv for patch@linaro.org; Tue, 20 Aug 2019 17:28:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53938) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BM1-0000Je-5o for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BLz-0000AZ-CF for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:45 -0400 Received: from mail-pl1-x641.google.com ([2607:f8b0:4864:20::641]:38874) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BLz-00008A-0S for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:43 -0400 Received: by mail-pl1-x641.google.com with SMTP id m12so92443plt.5 for ; Tue, 20 Aug 2019 14:07:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bdJW10ZyVTM5Zc/CPE9B8BqW0sLbaJccOlvi6TIDC8k=; b=rnC4h8aEmYQxndmLKvZxqqh0jLXDwHQja/q6YbWGpszBe2d/evuhQa6WFKat0TVKi8 X4xpnm72b3eCdNe8zQa+RQAttemLmDjJqvXcXIZJ9V/ZKeL6nhugFiE7vbMJQIOX3xYu KA+hAvXSnwJe3fq1pB0g9zfiN2NDYZpkh/l6DJ3WGYUJIuaxkvmauPH9i3FjPC7OgMBG cQbvHqzoURlLu0u9O6Mki/w9+I+cku5dztq8i6q45zRxRubqhNrsnYRWMEJ/IOSC3GxQ Y02lIokDSN4CzP6SQypX0WlpwxpB54pTHWSRTHU+1cKmVxn1tTAWXq1WhLooAFN6VB/i T9CQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bdJW10ZyVTM5Zc/CPE9B8BqW0sLbaJccOlvi6TIDC8k=; b=qEOBmmNuJqLlWiprpZpeXbgVZkPHZnh1u341Vw54sI/UZKtVmZN4Utd7udCZi3Fs5Z c4bpB/0gATlDJASsxxhnrU3Kx+5OHcLMPnrkYwRcd+0ngYNzbj+uZEi3Whj7JXIcsIl7 4IWLB/YUgmtxsOe7sb0l2EB+ENUrBjuJizgRKAAa6bD7Van32FhR++L7wcuUVO09N53X uohZullvmLYkZWoNukecJve0YH/Qe6A9nRNrhRkxRZ9yV2b9sZ5QA8LmnxUrYGvxeJEm 0elekE3bEeJ10eH0w8732n7AhIEvlkXZ9t/9rO3kGQiGlRIM4kAlTSIPaImTh6HWCaQx NHsg== X-Gm-Message-State: APjAAAXdOb96HDt7Ro1JKqI0bWx+Ijo6Daku25oU8rxPJOgBLKCrjTDe 742EITON1mGNIa/uliSH2UwlBLfG90w= X-Received: by 2002:a17:902:b905:: with SMTP id bf5mr28175471plb.342.1566335261331; Tue, 20 Aug 2019 14:07:41 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:17 -0700 Message-Id: <20190820210720.18976-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::641 Subject: [Qemu-devel] [PATCH v5 14/17] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" By performing this store early, we avoid having to save and restore the register holding the address around any function calls. Signed-off-by: Richard Henderson --- target/arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/target/arm/helper.c b/target/arm/helper.c index 19bdb9b9d6..7a94495788 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11187,6 +11187,7 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, { uint32_t flags, pstate_for_ss; + *cs_base = 0; flags = rebuild_hflags_internal(env); if (is_a64(env)) { @@ -11260,7 +11261,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, } *pflags = flags; - *cs_base = 0; } #ifdef TARGET_AARCH64 From patchwork Tue Aug 20 21:07:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171850 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp80410ily; Tue, 20 Aug 2019 14:18:03 -0700 (PDT) X-Google-Smtp-Source: APXvYqxuLvmi0C5Pu9hkI4S+1bOXuDhTiK2BqvNCoMkvzYMUnY8yljyON+rl+zDw7K7nwt7jfdL9 X-Received: by 2002:a37:bd44:: with SMTP id n65mr25478772qkf.286.1566335883221; Tue, 20 Aug 2019 14:18:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566335883; cv=none; d=google.com; s=arc-20160816; b=M6kbXptWYchqpijcqemtgFADpD9kMu54O6SoADFWpyMfiQgDGB+JgoPZBZQh8wXEMS TzQoiuH4OUgWQXLjaJ79fFiXXAUicx3d8hXfD2ka1gAwHwlhy7P7xzEVPf7j9Iv/6n+t 7xCbPuZv2HRuBhnuaNel4ghxyw3r7SA7E2kHu0K+yFSk2uzn90BRpX3ZcSxM+SUl5xva p8xW5FyGzMo17JO1xqphjHChXsZeqANEmZPEP3w76SoaA1kmOlyAeSGbek5xhvgXFZUo xTx4/RQQJMh6Z3tsF6QTDyb2t7eM7CjSDpnO3XkUDr85rYKG9u7xh1ZtgMhhSyhLXD25 nn4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=e9JxmSYIPzvjXwg6KhVgyDZPyIfxwEg/5iC1Ikkx2MA=; b=lf+4Qz6fZY2y1otaJIvZLrRdkWyqDB6+gT2qk1uWyP61hFvy92XD4La4ClkpTn+UAh iGPGq0sELOrcBTC80Xd2mXrJ/adoBaAnODU7Dz6aKROxXwHNadxOjkCNP/kL0X1WIM9u yeAKmnHmS7NsFRJGjOi4mQAAnI1JtjzNCDnx5oS2cHvhdkPfSW0MK/Vp17WPDv0Il/7j HyyK89keClOkz5iPkkwAIJzuASrkKUHwAWbWboHyH8owxi7YPPB5wMTgIEqqH32d+nWn 8GdQcUSGVqVepXm16dBf4wB2FdV1vcUKD7dRU3VoFLliHoazXSmLIVnHjUZLCy9VSqDO xSqA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="ZFHXAqr/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d6si11171748qke.335.2019.08.20.14.18.03 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:18:03 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="ZFHXAqr/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41824 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BVx-0001ob-Vh for patch@linaro.org; Tue, 20 Aug 2019 17:18:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53990) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BM2-0000L3-4C for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BM0-0000CW-OJ for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:45 -0400 Received: from mail-pg1-x544.google.com ([2607:f8b0:4864:20::544]:40083) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BM0-0000Al-IQ for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:44 -0400 Received: by mail-pg1-x544.google.com with SMTP id w10so10984pgj.7 for ; Tue, 20 Aug 2019 14:07:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=e9JxmSYIPzvjXwg6KhVgyDZPyIfxwEg/5iC1Ikkx2MA=; b=ZFHXAqr/U/RJlJBk7dhCErP99x5UtAihlIOgjkNAdm5yabz+MR/jDv1f/N4S8qaaCP axi8d6vxlffOqlgOPSJhhzztY7N3QyOHsXKrR+zq1SxOOKSJhct9SmyfSbYqc29RJkLE bOVeenlI0UvRR2wvshtneYqfC5zEBqfetSJ6ZZ1b1ZtNg27GqjqIa9KOkb3zdUDo6+Hd umhulWmTjBMqUGd+Pts4/2qzWEGZigrrccZiN1nsijEiODqhMkX4RfoI6/nY1BzArXrl lV6IC3IMbtDxzejgRf9vbgnCisBwgaVdc6EVEdVsGdtEBmszF10snEKbogkFOkw6ASJ1 c+Nw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=e9JxmSYIPzvjXwg6KhVgyDZPyIfxwEg/5iC1Ikkx2MA=; b=TDQl2DESnfQ/7E7gnqFMu/i5wjNb61+OZL2pkQOxjdoz2fOpf3JbgoOYsPBitJvFgy tNzVzLN/GDkMej/1cYHWG2jV08yOmvpetWQqwXV1HQBC2nMLYDfNWtAu4Ej1kVK3pHF5 9h6VkQ+ZD9R3q+UJlFs+wfB1cKCdRAJys4YgbO4H/NAPCq35CnWnyFuAoNo7H0shCuQm HM+JbH2+0n/euxEk2F+0GEj8fXnOe4uJOfUlPimbe3ElaAGLUWeGqx9ONDLLed17Z2w7 5nlKT/FLE0hqjBrw0tl/xidkIzTLJ5W7IvSdd0Px2nQhEHOHDkTzqwUnCt32ecnLKxkt 8xvw== X-Gm-Message-State: APjAAAX0HpaeumX1K45z3tGlWqIgNFge+ii3Y4aaqeK7SJw9PRqFfPMw x37qr+j6xESduHTwKK0mtuiK2i73qas= X-Received: by 2002:a63:5648:: with SMTP id g8mr25942057pgm.81.1566335262751; Tue, 20 Aug 2019 14:07:42 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:42 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:18 -0700 Message-Id: <20190820210720.18976-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::544 Subject: [Qemu-devel] [PATCH v5 15/17] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This functions are given the mode and el state of the cpu and writes the computed value to env->hflags. Signed-off-by: Richard Henderson --- target/arm/helper.h | 4 ++++ target/arm/helper.c | 24 ++++++++++++++++++++++++ 2 files changed, 28 insertions(+) -- 2.17.1 diff --git a/target/arm/helper.h b/target/arm/helper.h index 1fb2cb5a77..3d4ec267a2 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -90,6 +90,10 @@ DEF_HELPER_4(msr_banked, void, env, i32, i32, i32) DEF_HELPER_2(get_user_reg, i32, env, i32) DEF_HELPER_3(set_user_reg, void, env, i32, i32) +DEF_HELPER_FLAGS_2(rebuild_hflags_m32, TCG_CALL_NO_RWG, void, env, int) +DEF_HELPER_FLAGS_2(rebuild_hflags_a32, TCG_CALL_NO_RWG, void, env, int) +DEF_HELPER_FLAGS_2(rebuild_hflags_a64, TCG_CALL_NO_RWG, void, env, int) + DEF_HELPER_1(vfp_get_fpscr, i32, env) DEF_HELPER_2(vfp_set_fpscr, void, env, i32) diff --git a/target/arm/helper.c b/target/arm/helper.c index 7a94495788..53a7bd796b 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11182,6 +11182,30 @@ void arm_rebuild_hflags(CPUARMState *env) env->hflags = rebuild_hflags_internal(env); } +void HELPER(rebuild_hflags_m32)(CPUARMState *env, int el) +{ + int fp_el = fp_exception_el(env, el); + ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, el); + + env->hflags = rebuild_hflags_m32(env, fp_el, mmu_idx); +} + +void HELPER(rebuild_hflags_a32)(CPUARMState *env, int el) +{ + int fp_el = fp_exception_el(env, el); + ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, el); + + env->hflags = rebuild_hflags_a32(env, fp_el, mmu_idx); +} + +void HELPER(rebuild_hflags_a64)(CPUARMState *env, int el) +{ + int fp_el = fp_exception_el(env, el); + ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, el); + + env->hflags = rebuild_hflags_a64(env, el, fp_el, mmu_idx); +} + void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, target_ulong *cs_base, uint32_t *pflags) { From patchwork Tue Aug 20 21:07:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171851 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp84629ily; Tue, 20 Aug 2019 14:22:22 -0700 (PDT) X-Google-Smtp-Source: APXvYqx4Arm7EzumUpn96uvuXydSyon4TIqWmEss9eg2w3Lj8lYtV++3gp+vG9LHE/uPlUP0jyT/ X-Received: by 2002:a0c:e483:: with SMTP id n3mr16125585qvl.234.1566336141983; Tue, 20 Aug 2019 14:22:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566336141; cv=none; d=google.com; s=arc-20160816; b=VoCVsopbbf8UbrrhKBRwvzt5nwtHzcAux3Q5tBRoWmYTImsjJ2l7eF4WiC+zKDcPT4 GOQCmQUvgEvTdAR/sC7cGEuFaM3z1CX0SXKiH+T8dnoJd/gY2Hcrgbbev7xH+InN8UEQ vwnqtIxO5x4Ml+7hz+pgG9rS4TJGP6+nwTzzHTpy2UWNhFbJAhyBwswXEjg3+87D0ovJ PZ6J9g0BTuq8AkbK10bB+mknCnNq0WAVCJaHRmXZ5KeiIg3rXnyBTAV2N2Llj+hL+XUF dZGxcGIjr0V3x+LjREKEkxbXHsMcwaEFwWT1sSr325VbhRfZr2kYT0TDqnoRFG4R3c/L wNWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=ImRJTwPFmMGzpCtfWM5MPA1kMhadsmFmyH6aw6AENWA=; b=N5+gzcanpX6AUT53wezm0Id8U+gnL9zhy+Zf4Wvz/NBe8FE34btRSWdYjCi4hJiLr8 YH/wKmxAcpcvJLPWjTuX9i5uVqTPg7StgoQTU1QqKY0Dpp6pWIPn8WpR6+OMGG6q+9GJ 6uyn4YJS5JalzItRp3BbMpIolpTq3iIWdGEflU/iqchFeKFn0j9qNoaH3xx02RzItrtL 299YfJDWhbmcIu8E7z0FSRu5EjjVUZ1rsD6RgTyobGI9FwKJ2Tk/EsKSUU+RCQMnBDpi AJiY5/cPPnIbwhQEllwNxMkaaO0dG0hOThHiHolwPwcQUhoghA00e6PLcakZOj4FfB3S Pr3g== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=snn9cfGj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id k5si11284098qkb.66.2019.08.20.14.22.21 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:22:21 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=snn9cfGj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41862 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0Ba7-0003P7-4T for patch@linaro.org; Tue, 20 Aug 2019 17:22:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54037) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BM3-0000Ni-Ck for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BM1-0000E1-Ln for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:47 -0400 Received: from mail-pg1-x542.google.com ([2607:f8b0:4864:20::542]:42817) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BM1-0000Cl-ET for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:45 -0400 Received: by mail-pg1-x542.google.com with SMTP id p3so5404pgb.9 for ; Tue, 20 Aug 2019 14:07:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ImRJTwPFmMGzpCtfWM5MPA1kMhadsmFmyH6aw6AENWA=; b=snn9cfGjRBuC3kSQDv3NO4N+6ERHZjm22fqYbFRSjNBITKJbt53y3Ue8gstQKJIzNi oeFZuPeqmWCs6RGFs4cOYAli3EWZU1jjw0Y8wsYvNbdjwtienxJ9FJ77tZkeA+ezyZTN R8iI7S79EQxJTEMUfeFtbOCMqvMIViT4as3YHH8SEtjMwsF1qiJj7OWnMb+v+va6GgeV RdbWkopcpdG8+0VbnI71gqEY8Bi6MFrMgmPDCF7/w5gMkSwEIjGbC5yvOvB2Ro/uXtWe tdDTDY4YWMuT/okcto3j1JAMW8aMjY5VqaNm6acjeo2ozhEXLCsgIzf7THC9HwY/7AHb HXcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ImRJTwPFmMGzpCtfWM5MPA1kMhadsmFmyH6aw6AENWA=; b=AkIGAdGFXOFiFutJKIsu2PO9PAiRT4LVw24LHnfl120QOw+hlGeERjuLayHWUIXXU4 SiFyjdyG9rTuRMUEE2a9vAH3FNIAImeCvb5GUhKF4QJ2J2jLVbCqE+WgkwtV7lBhtPMX shn5DF0nZr3leItERTA66W855e0N1/wDteMqslLfmE5/RciR8VOzSUlty/2gWOX/9m3g /FieA7k1EG4mx/w9bUyoXMO8M9lBJQlTKW1APGz2wiJgOzEorP0Tlq9JQ3fllX7UlxjT 3XHqFU+biQiPa4mkh/DZcTyUlEDbiufLq2SSsp9OfaIVqq0t3PYZOBsOYLdZDxWIbzUr uDIA== X-Gm-Message-State: APjAAAWVkOo6QLsPy0C5zDcOoBY/nL2Fb4fjAfXRkUlhi/ExFZSexq7P f0bs7o/aapwVZR7wy8lTMvQB6xgEZoI= X-Received: by 2002:a62:1808:: with SMTP id 8mr32241561pfy.177.1566335264072; Tue, 20 Aug 2019 14:07:44 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:19 -0700 Message-Id: <20190820210720.18976-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::542 Subject: [Qemu-devel] [PATCH v5 16/17] target/arm: Rebuild hflags at EL changes and MSR writes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Now setting, but not relying upon, env->hflags. Signed-off-by: Richard Henderson --- linux-user/syscall.c | 1 + target/arm/cpu.c | 1 + target/arm/helper-a64.c | 3 +++ target/arm/helper.c | 2 ++ target/arm/machine.c | 1 + target/arm/op_helper.c | 1 + target/arm/translate-a64.c | 6 +++++- target/arm/translate.c | 18 ++++++++++++++++-- 8 files changed, 30 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 8b41a03901..be01c33759 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -9980,6 +9980,7 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1, aarch64_sve_narrow_vq(env, vq); } env->vfp.zcr_el[1] = vq - 1; + arm_rebuild_hflags(env); ret = vq * 16; } return ret; diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 2399c14471..d043e75166 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -406,6 +406,7 @@ static void arm_cpu_reset(CPUState *s) hw_breakpoint_update_all(cpu); hw_watchpoint_update_all(cpu); + arm_rebuild_hflags(env); } bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt_request) diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index bca80bdc38..b4cd680fc4 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -1025,6 +1025,7 @@ void HELPER(exception_return)(CPUARMState *env, uint64_t new_pc) } else { env->regs[15] = new_pc & ~0x3; } + helper_rebuild_hflags_a32(env, new_el); qemu_log_mask(CPU_LOG_INT, "Exception return from AArch64 EL%d to " "AArch32 EL%d PC 0x%" PRIx32 "\n", cur_el, new_el, env->regs[15]); @@ -1036,10 +1037,12 @@ void HELPER(exception_return)(CPUARMState *env, uint64_t new_pc) } aarch64_restore_sp(env, new_el); env->pc = new_pc; + helper_rebuild_hflags_a64(env, new_el); qemu_log_mask(CPU_LOG_INT, "Exception return from AArch64 EL%d to " "AArch64 EL%d PC 0x%" PRIx64 "\n", cur_el, new_el, env->pc); } + /* * Note that cur_el can never be 0. If new_el is 0, then * el0_a64 is return_to_aa64, else el0_a64 is ignored. diff --git a/target/arm/helper.c b/target/arm/helper.c index 53a7bd796b..d1bf71a260 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -7908,6 +7908,7 @@ static void take_aarch32_exception(CPUARMState *env, int new_mode, env->regs[14] = env->regs[15] + offset; } env->regs[15] = newpc; + arm_rebuild_hflags(env); } static void arm_cpu_do_interrupt_aarch32_hyp(CPUState *cs) @@ -8255,6 +8256,7 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs) pstate_write(env, PSTATE_DAIF | new_mode); env->aarch64 = 1; aarch64_restore_sp(env, new_el); + helper_rebuild_hflags_a64(env, new_el); env->pc = addr; diff --git a/target/arm/machine.c b/target/arm/machine.c index 5c36707a7c..eb28b2381b 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -756,6 +756,7 @@ static int cpu_post_load(void *opaque, int version_id) if (!kvm_enabled()) { pmu_op_finish(&cpu->env); } + arm_rebuild_hflags(&cpu->env); return 0; } diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index 0fd4bd0238..ccc2cecb46 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -404,6 +404,7 @@ void HELPER(cpsr_write_eret)(CPUARMState *env, uint32_t val) * state. Do the masking now. */ env->regs[15] &= (env->thumb ? ~1 : ~3); + arm_rebuild_hflags(env); qemu_mutex_lock_iothread(); arm_call_el_change_hook(env_archcpu(env)); diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index fc3e5f5c38..4412c60383 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -1777,11 +1777,15 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread, /* I/O operations must end the TB here (whether read or write) */ gen_io_end(); s->base.is_jmp = DISAS_UPDATE; - } else if (!isread && !(ri->type & ARM_CP_SUPPRESS_TB_END)) { + } + if (!isread && !(ri->type & ARM_CP_SUPPRESS_TB_END)) { /* We default to ending the TB on a coprocessor register write, * but allow this to be suppressed by the register definition * (usually only necessary to work around guest bugs). */ + TCGv_i32 tcg_el = tcg_const_i32(s->current_el); + gen_helper_rebuild_hflags_a64(cpu_env, tcg_el); + tcg_temp_free_i32(tcg_el); s->base.is_jmp = DISAS_UPDATE; } } diff --git a/target/arm/translate.c b/target/arm/translate.c index d948757131..2f7beca065 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7130,6 +7130,8 @@ static int disas_coproc_insn(DisasContext *s, uint32_t insn) ri = get_arm_cp_reginfo(s->cp_regs, ENCODE_CP_REG(cpnum, is64, s->ns, crn, crm, opc1, opc2)); if (ri) { + bool need_exit_tb; + /* Check access permissions */ if (!cp_access_ok(s->current_el, ri, isread)) { return 1; @@ -7301,15 +7303,27 @@ static int disas_coproc_insn(DisasContext *s, uint32_t insn) } } + need_exit_tb = false; if ((tb_cflags(s->base.tb) & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) { /* I/O operations must end the TB here (whether read or write) */ gen_io_end(); - gen_lookup_tb(s); - } else if (!isread && !(ri->type & ARM_CP_SUPPRESS_TB_END)) { + need_exit_tb = true; + } + if (!isread && !(ri->type & ARM_CP_SUPPRESS_TB_END)) { /* We default to ending the TB on a coprocessor register write, * but allow this to be suppressed by the register definition * (usually only necessary to work around guest bugs). */ + TCGv_i32 tcg_el = tcg_const_i32(s->current_el); + if (arm_dc_feature(s, ARM_FEATURE_M)) { + gen_helper_rebuild_hflags_m32(cpu_env, tcg_el); + } else { + gen_helper_rebuild_hflags_a32(cpu_env, tcg_el); + } + tcg_temp_free_i32(tcg_el); + need_exit_tb = true; + } + if (need_exit_tb) { gen_lookup_tb(s); } From patchwork Tue Aug 20 21:07:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 171857 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp90867ily; Tue, 20 Aug 2019 14:29:27 -0700 (PDT) X-Google-Smtp-Source: APXvYqx+jlsJJ+MglQGUr9IKkXQBMurKpkrD1mzfzBXVJVC95KywMULsne73cLcIlN9xFUDj64HL X-Received: by 2002:ac8:295d:: with SMTP id z29mr28572272qtz.168.1566336567508; Tue, 20 Aug 2019 14:29:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566336567; cv=none; d=google.com; s=arc-20160816; b=TftfGViGa5ifXjz35qXcS2V+a1l41anhoKJmQFjM9XIceBxKsXSBv14Iqv+GZb0IFA qdabPEH59iMbfaaBHnA73ZiEOZRKhEtURhX/xW6roYnre/8Qe+Wa/AkGQ0/H6+mQB1h9 1Ec0+sVAnXKhaX1xP5R3SbcUV23JbT7PV1kHFDE0xazHNKqDC1dXJ+whVT77gji9CQeU l7hDuZmZ8gasHYIdKHhHbinzGQzlxMlMO7NabAELgmh7Hcs2Zm5c1d2RJF1GPOH6eKaU ny8Z1ueOfNsBrNMoltzIZk8TcS6nulBafmBxiiVa9lu5ZOxQEBGd6alhBlpF9nZvS/Oj 0SbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=uEuMTFJPriSi6tDBht/B2C/M+eVLAfQCMhLFMcHsiGA=; b=aDrsThwI1HL1awNJOGNirYGQzN0QFo7FlVINydm4bqHJy8s2dL7anHzb8Kt0DkQq+8 DRU+Z8EtCrjrDT1U46zvOOF3cpk/DrXqtWI5oTM+BIc8PR0ya+5VTvuoRgFfkj5atjIz poXiXcgfcioAWZ7B9MSResM0ULxMGSGl1hEK6rLMvVDrdhvgyvQxp6g9kR0qFwBGSLgJ MGnq8NpNc7hObh7vNDrlO1ijqvoJSRhvPHTvpZze64UWQ68sgJLflwAlwPvT7taVExLR tP4ChJWTN9Ug3+JCm5ZFuX1QmlN+ciC9Gp48A/XR1jzx6v6DRJ4yP/N/XV89JZg1WgZm SITQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=seU9CvbP; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id e24si11673846qkl.56.2019.08.20.14.29.27 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:29:27 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=seU9CvbP; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41990 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0Bh0-0002PF-Od for patch@linaro.org; Tue, 20 Aug 2019 17:29:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54042) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0BM3-0000OP-U8 for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0BM2-0000F8-LV for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:47 -0400 Received: from mail-pf1-x444.google.com ([2607:f8b0:4864:20::444]:42841) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i0BM2-0000EZ-Fl for qemu-devel@nongnu.org; Tue, 20 Aug 2019 17:07:46 -0400 Received: by mail-pf1-x444.google.com with SMTP id i30so4112262pfk.9 for ; Tue, 20 Aug 2019 14:07:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=uEuMTFJPriSi6tDBht/B2C/M+eVLAfQCMhLFMcHsiGA=; b=seU9CvbPFWQC6HXFlU4qGeJJOEoKi3ivDF7hxy/kTPUlSwz+PanrBNm6RCvT2te+He wa1zY3vZI5hIVXtpr6XAieAWB9ejmxhi0ayDvZUBPOEtkJmHwikSRoYmoWc5OIl5hE/Q ROJJcZMaeAA8itUVPGVM1WCJMVPDTZO7iV75WtgXXH1crLSa3jjYdDwnKZfDrqzcxMly enPgJj8H+6XE4Gg2E/GpJfVbeXi4pz+dlWG/cQes34VEXWyKEla5nwEuh4soR9H20m5M JAvs0kHCIzAFCOUyXoVdvF/e8lCbnl6ZTnYo6sp/H3SK39N8jIhjT2PgGfSO/IumBJ43 U0Vw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uEuMTFJPriSi6tDBht/B2C/M+eVLAfQCMhLFMcHsiGA=; b=iW9vEkIrym/vOs42ZFJ1sdoxcWEUDWJME4DMI4Px2/jB5aiuZo05Jc56gW3qFqP+v8 zktbnWygKej5S4oTo/65SEtU5dOuey1sgs7XGCodyGwg+IJtdu6py/uibqHYw4zN0Rxz K5QatHNh1hJYDsGRk/1ATp61aY3jXS99w1nyp+dhQ5hkFAcPwkI2sdoyraQpGsZnpmpE E0vtO8s4GIA8emmDW2ckjMyZv8QSjgQ/mOnzZN3Xqg0SedR1KHrPLDnu30/TomHPCoEi hYCvCSgyVPCiXY3uIResKqb754wfXn//1ASnpgjgqehVhQKwifcriAqxPhDfD6auKHVQ Zkbw== X-Gm-Message-State: APjAAAU/Y8zNvPWswuGJET0Rlw7m23C19DRoaDnk6uEFGoRSYLiaa9Dq Ud9niCDLth0U6FjDnOcZ65BLQsuLujs= X-Received: by 2002:aa7:95b8:: with SMTP id a24mr31913578pfk.103.1566335265240; Tue, 20 Aug 2019 14:07:45 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id k22sm21690743pfk.157.2019.08.20.14.07.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 14:07:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Aug 2019 14:07:20 -0700 Message-Id: <20190820210720.18976-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820210720.18976-1-richard.henderson@linaro.org> References: <20190820210720.18976-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::444 Subject: [Qemu-devel] [PATCH v5 17/17] target/arm: Rely on hflags correct in cpu_get_tb_cpu_state X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This is the payoff. >From perf record -g data of ubuntu 18 boot and shutdown: BEFORE: - 23.02% 2.82% qemu-system-aar [.] helper_lookup_tb_ptr - 20.22% helper_lookup_tb_ptr + 10.05% tb_htable_lookup - 9.13% cpu_get_tb_cpu_state 3.20% aa64_va_parameters_both 0.55% fp_exception_el - 11.66% 4.74% qemu-system-aar [.] cpu_get_tb_cpu_state - 6.96% cpu_get_tb_cpu_state 3.63% aa64_va_parameters_both 0.60% fp_exception_el 0.53% sve_exception_el AFTER: - 16.40% 3.40% qemu-system-aar [.] helper_lookup_tb_ptr - 13.03% helper_lookup_tb_ptr + 11.19% tb_htable_lookup 0.55% cpu_get_tb_cpu_state 0.98% 0.71% qemu-system-aar [.] cpu_get_tb_cpu_state 0.87% 0.24% qemu-system-aar [.] rebuild_hflags_a64 Before, helper_lookup_tb_ptr is the second hottest function in the application, consuming almost a quarter of the runtime. Within the entire execution, cpu_get_tb_cpu_state consumes about 12%. After, helper_lookup_tb_ptr has dropped to the fourth hottest function, with consumption dropping to a sixth of the runtime. Within the entire execution, cpu_get_tb_cpu_state has dropped below 1%, and the supporting function to rebuild hflags also consumes about 1%. Assertions are retained for --enable-debug-tcg. Tested-by: Alex Bennée Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- v2: Retain asserts for future debugging. --- target/arm/helper.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/target/arm/helper.c b/target/arm/helper.c index d1bf71a260..5e4f996882 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11211,12 +11211,15 @@ void HELPER(rebuild_hflags_a64)(CPUARMState *env, int el) void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, target_ulong *cs_base, uint32_t *pflags) { - uint32_t flags, pstate_for_ss; + uint32_t flags = env->hflags; + uint32_t pstate_for_ss; *cs_base = 0; - flags = rebuild_hflags_internal(env); +#ifdef CONFIG_TCG_DEBUG + assert(flags == rebuild_hflags_internal(env)); +#endif - if (is_a64(env)) { + if (FIELD_EX32(flags, TBFLAG_ANY, AARCH64_STATE)) { *pc = env->pc; if (cpu_isar_feature(aa64_bti, env_archcpu(env))) { flags = FIELD_DP32(flags, TBFLAG_A64, BTYPE, env->btype);