From patchwork Tue Aug 20 17:23:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 171819 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp4722160ily; Tue, 20 Aug 2019 10:25:22 -0700 (PDT) X-Google-Smtp-Source: APXvYqxpyT31jXPRbW2OG69aNRh4uUsbUpz1AGwWmKHiIQ1TvzUMdgIQuswOk6zH7mW2IxtN5r7/ X-Received: by 2002:a65:6547:: with SMTP id a7mr25344363pgw.65.1566321921957; Tue, 20 Aug 2019 10:25:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566321921; cv=none; d=google.com; s=arc-20160816; b=xY1jZUSOB8EnAkjYj4z7X4ulN4X8X9fNfjhTtq5nwuk37l5lb4Lje+zcNbveK/NXsi /PXzArPisLbR7hqTKH38BvMpcYBj1uhC5iz9UaFSV9pmI5g8k6Axfm7N8uJvsF+uWAJ9 0ZULvZ7ctlKWlLkOiqTCMfX5MLKL4lsWQ9GE8NQ76RtIJrzTMXRFXy7WHq0+ecKaGqoI MwlhyRIcJ7u/QtZ8cB1tK9TmZ0y5WUeAuio0UmgN7nF05pSVQzpyKWDXnVwESWYuOrs4 MaH3sW0EcvFIRuorc1lLqac0LkrPYCrYN2ox8aKsHiRbF98nMyNSUr053GbxEBqeBWku mRuQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7lqPZzzpia4QV+4l85gc32yRfmKZUSmddwqx/pxAGNM=; b=ajjnRCes3mdybpXBz6dfu21QbL9ZFa8vQnt/XMc6SIzguO19h5x9Xub34J+/m1MUto UK3BE8tcl6RUAa8/U7s2aFwQg4R9lBjASIoBiwhqtU0hUMa5ryr8I6AUA7Kj1tETd6Wc H3EDzTYb5Tvt33HU1fdHx15zB+LQQlebizXDnLj9SKMF1FTJJ44gGuzwXaavaXhbv8e0 AVqfxeNa600u0MCvrarQ++v6bjJya51Dzz4u0BOXy1gFTeqxo3EsWY4T7mHqTVp0+jdz AA/85HWwcTVE6lvOUibmUeTAUweGaUqtcVWkrZD5sIU323TZfDP7E0MrWpQ2zGpmzQmn pFHw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=iLdJuw12; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j7si13590539pfi.10.2019.08.20.10.25.21; Tue, 20 Aug 2019 10:25:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=iLdJuw12; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726717AbfHTRZV (ORCPT + 8 others); Tue, 20 Aug 2019 13:25:21 -0400 Received: from mail.kernel.org ([198.145.29.99]:48316 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725971AbfHTRZV (ORCPT ); Tue, 20 Aug 2019 13:25:21 -0400 Received: from localhost.localdomain (unknown [106.201.62.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id DFA3222DBF; Tue, 20 Aug 2019 17:25:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1566321919; bh=gXSZ/fqd5CTag+RRh0rCK34JRh7/8j4nAIOTT3PtJS4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iLdJuw12HmFgHPqU1fgJTsWgNWL1Ql06sFGSKe/xWV2sMF5QpM2JFeo+2rgX3j9as ENGxRh1KJAub8ZHjJZYdmq3BEn+jopaoUJMW/m0LYZGG+RNpAwpPV703ZMt8K0nwYB cmTWIBNlHISRmuj+rwp8vuX3EnimR6IvcIRIYBsY= From: Vinod Koul To: Andy Gross Cc: linux-arm-msm@vger.kernel.org, Bjorn Andersson , Vinod Koul , Rob Herring , Mark Rutland , Stephen Boyd , Sibi Sankar , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/8] arm64: dts: qcom: sm8150: Add base dts file Date: Tue, 20 Aug 2019 22:53:43 +0530 Message-Id: <20190820172351.24145-2-vkoul@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190820172351.24145-1-vkoul@kernel.org> References: <20190820172351.24145-1-vkoul@kernel.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This add base DTS file with cpu, psci, firmware, clock node tlmm and spmi and enables boot to console Signed-off-by: Vinod Koul --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 307 +++++++++++++++++++++++++++ 1 file changed, 307 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sm8150.dtsi -- 2.20.1 diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi new file mode 100644 index 000000000000..ba5a9f6332c1 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -0,0 +1,307 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. + * Copyright (c) 2019, Linaro Limited + */ + +#include +#include +#include + +/ { + interrupt-parent = <&intc>; + + #address-cells = <2>; + #size-cells = <2>; + + chosen { }; + + clocks { + xo_board: xo-board { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <38400000>; + clock-output-names = "xo_board"; + }; + + sleep_clk: sleep-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32764>; + clock-output-names = "sleep_clk"; + }; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "qcom,kryo485"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + L3_0: l3-cache { + compatible = "cache"; + }; + }; + }; + + CPU1: cpu@100 { + device_type = "cpu"; + compatible = "qcom,kryo485"; + reg = <0x0 0x100>; + enable-method = "psci"; + next-level-cache = <&L2_100>; + L2_100: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + + }; + + CPU2: cpu@200 { + device_type = "cpu"; + compatible = "qcom,kryo485"; + reg = <0x0 0x200>; + enable-method = "psci"; + next-level-cache = <&L2_200>; + L2_200: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU3: cpu@300 { + device_type = "cpu"; + compatible = "qcom,kryo485"; + reg = <0x0 0x300>; + enable-method = "psci"; + next-level-cache = <&L2_300>; + L2_300: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU4: cpu@400 { + device_type = "cpu"; + compatible = "qcom,kryo485"; + reg = <0x0 0x400>; + enable-method = "psci"; + next-level-cache = <&L2_400>; + L2_400: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU5: cpu@500 { + device_type = "cpu"; + compatible = "qcom,kryo485"; + reg = <0x0 0x500>; + enable-method = "psci"; + next-level-cache = <&L2_500>; + L2_500: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU6: cpu@600 { + device_type = "cpu"; + compatible = "qcom,kryo485"; + reg = <0x0 0x600>; + enable-method = "psci"; + next-level-cache = <&L2_600>; + L2_600: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + + CPU7: cpu@700 { + device_type = "cpu"; + compatible = "qcom,kryo485"; + reg = <0x0 0x700>; + enable-method = "psci"; + next-level-cache = <&L2_700>; + L2_700: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + }; + }; + }; + + firmware { + scm: scm { + compatible = "qcom,scm-sm8150", "qcom,scm"; + #reset-cells = <1>; + }; + }; + + memory@80000000 { + device_type = "memory"; + /* We expect the bootloader to fill in the size */ + reg = <0x0 0x80000000 0x0 0x0>; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + soc: soc@0 { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x0 0xffffffff>; + compatible = "simple-bus"; + + gcc: clock-controller@100000 { + compatible = "qcom,gcc-sm8150"; + reg = <0x00100000 0x1f0000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clock-names = "bi_tcxo", + "sleep_clk"; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&sleep_clk>; + }; + + qupv3_id_1: geniqup@ac0000 { + compatible = "qcom,geni-se-qup"; + reg = <0x00ac0000 0x6000>; + clock-names = "m-ahb", "s-ahb"; + clocks = <&gcc 123>, + <&gcc 124>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + status = "disabled"; + + uart2: serial@a90000 { + compatible = "qcom,geni-debug-uart"; + reg = <0x00a90000 0x4000>; + clock-names = "se"; + clocks = <&gcc 105>; + interrupts = ; + status = "disabled"; + }; + }; + + tlmm: pinctrl@3100000 { + compatible = "qcom,sm8150-pinctrl"; + reg = <0x03100000 0x300000>, + <0x03500000 0x300000>, + <0x03900000 0x300000>, + <0x03d00000 0x300000>; + reg-names = "west", "east", "north", "south"; + interrupts = ; + gpio-ranges = <&tlmm 0 0 175>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + intc: interrupt-controller@17a00000 { + compatible = "arm,gic-v3"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x17a00000 0x10000>, /* GICD */ + <0x17a60000 0x100000>; /* GICR * 8 */ + interrupts = ; + }; + + timer@17c20000 { + #address-cells = <1>; + #size-cells = <1>; + ranges; + compatible = "arm,armv7-timer-mem"; + reg = <0x17c20000 0x1000>; + clock-frequency = <19200000>; + + frame@17c21000{ + frame-number = <0>; + interrupts = , + ; + reg = <0x17c21000 0x1000>, + <0x17c22000 0x1000>; + }; + + frame@17c23000 { + frame-number = <1>; + interrupts = ; + reg = <0x17c23000 0x1000>; + status = "disabled"; + }; + + frame@17c25000 { + frame-number = <2>; + interrupts = ; + reg = <0x17c25000 0x1000>; + status = "disabled"; + }; + + frame@17c27000 { + frame-number = <3>; + interrupts = ; + reg = <0x17c26000 0x1000>; + status = "disabled"; + }; + + frame@17c29000 { + frame-number = <4>; + interrupts = ; + reg = <0x17c29000 0x1000>; + status = "disabled"; + }; + + frame@17c2b000 { + frame-number = <5>; + interrupts = ; + reg = <0x17c2b000 0x1000>; + status = "disabled"; + }; + + frame@17c2d000 { + frame-number = <6>; + interrupts = ; + reg = <0x17c2d000 0x1000>; + status = "disabled"; + }; + }; + + spmi_bus: spmi@c440000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x0c440000 0x0001100>, + <0x0c600000 0x2000000>, + <0x0e600000 0x0100000>, + <0x0e700000 0x00a0000>, + <0x0c40a000 0x0026000>; + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; + interrupt-names = "periph_irq"; + interrupts = ; + qcom,ee = <0>; + qcom,channel = <0>; + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + cell-index = <0>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; +}; From patchwork Tue Aug 20 17:23:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 171821 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp4722360ily; Tue, 20 Aug 2019 10:25:30 -0700 (PDT) X-Google-Smtp-Source: APXvYqy590RsLTkBWiNKMEZZnTD0BPuQCSRL6wf5tMrKHoLCGeI/Prh0CGOSQPc1iGN6IiKjwQF7 X-Received: by 2002:a65:6216:: with SMTP id d22mr23858593pgv.404.1566321930409; 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[209.132.180.67]) by mx.google.com with ESMTP id w17si12585824plp.404.2019.08.20.10.25.30; Tue, 20 Aug 2019 10:25:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=mlpGYbKg; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730541AbfHTRZ3 (ORCPT + 8 others); Tue, 20 Aug 2019 13:25:29 -0400 Received: from mail.kernel.org ([198.145.29.99]:48484 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730473AbfHTRZ2 (ORCPT ); Tue, 20 Aug 2019 13:25:28 -0400 Received: from localhost.localdomain (unknown [106.201.62.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id DF51222DD3; Tue, 20 Aug 2019 17:25:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1566321927; bh=3Kr7FEvwlf9S+mmB31zEV63IF8XzGkPhu+d71HxLXro=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mlpGYbKgMSGD1ez2ivcxt1qerIJvMMgc0NvQdHTvAznj4N4Ioqt0oM9XobcnSQPsF nVjLVnZenuLF7R8HmMDMO6V7RDr4wShTJMMQJL0kXDp6cHJ+6uRW4n0QwxcSuMe43V 4snQP5uexyyjiPRzVXXZj5QYUQ204rbSIC1rid3o= From: Vinod Koul To: Andy Gross Cc: linux-arm-msm@vger.kernel.org, Bjorn Andersson , Vinod Koul , Rob Herring , Mark Rutland , Stephen Boyd , Sibi Sankar , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/8] arm64: dts: qcom: pm8150b: Add base dts file Date: Tue, 20 Aug 2019 22:53:45 +0530 Message-Id: <20190820172351.24145-4-vkoul@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190820172351.24145-1-vkoul@kernel.org> References: <20190820172351.24145-1-vkoul@kernel.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org PMIC pm8150b is a slave pmic and this adds base DTS file for pm8150b with power-on, adc, and gpio nodes Signed-off-by: Vinod Koul --- arch/arm64/boot/dts/qcom/pm8150b.dtsi | 86 +++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm8150b.dtsi -- 2.20.1 diff --git a/arch/arm64/boot/dts/qcom/pm8150b.dtsi b/arch/arm64/boot/dts/qcom/pm8150b.dtsi new file mode 100644 index 000000000000..322379d5c31f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pm8150b.dtsi @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. + * Copyright (c) 2019, Linaro Limited + */ + +#include +#include +#include + +&spmi_bus { + pmic@2 { + compatible = "qcom,pm8150b", "qcom,spmi-pmic"; + reg = <0x2 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + power-on@800 { + compatible = "qcom,pm8916-pon"; + reg = <0x0800>; + + status = "disabled"; + }; + + adc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + + status = "disabled"; + + ref-gnd@0 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "ref_gnd"; + }; + + vref-1p25@1 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "vref_1p25"; + }; + + die-temp@6 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "die_temp"; + }; + + chg-temp@9 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "chg_temp"; + }; + }; + + pm8150b_gpios: gpio@c000 { + compatible = "qcom,pm8150b-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <0x2 0xc0 0x0 IRQ_TYPE_NONE>, + <0x2 0xc1 0x0 IRQ_TYPE_NONE>, + <0x2 0xc2 0x0 IRQ_TYPE_NONE>, + <0x2 0xc3 0x0 IRQ_TYPE_NONE>, + <0x2 0xc4 0x0 IRQ_TYPE_NONE>, + <0x2 0xc5 0x0 IRQ_TYPE_NONE>, + <0x2 0xc6 0x0 IRQ_TYPE_NONE>, + <0x2 0xc7 0x0 IRQ_TYPE_NONE>, + <0x2 0xc8 0x0 IRQ_TYPE_NONE>, + <0x2 0xc9 0x0 IRQ_TYPE_NONE>, + <0x2 0xca 0x0 IRQ_TYPE_NONE>, + <0x2 0xcb 0x0 IRQ_TYPE_NONE>; + }; + }; + + pmic@3 { + compatible = "qcom,pm8150b", "qcom,spmi-pmic"; + reg = <0x3 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; From patchwork Tue Aug 20 17:23:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 171825 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp4722703ily; Tue, 20 Aug 2019 10:25:46 -0700 (PDT) X-Google-Smtp-Source: APXvYqwgv9a5AsZGjz5TEvOs8Cv3tadS+RIQdxDqiVkk+FFhmLnlbInX3Cbl0ORLh/7cMLkgsD+Y X-Received: by 2002:a63:1f1b:: with SMTP id f27mr25409176pgf.233.1566321946401; Tue, 20 Aug 2019 10:25:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566321946; cv=none; d=google.com; s=arc-20160816; b=JYe4GQFiesN0hl9D3681bPJoq9QThPptPAPziNJUMp9B2Zk7ki2lvg0RJylwRjdpE4 LEAtgz2pcW/hPHHexCes3VxiGaZSN5DR0+u0yQjxRneXgzrNoCu8wWwastSGk9i22G4U Kvsyoa5CUAi5kpXomZmfqaKzuRvtLW8obZ6pPmtOKtjB6GT2q2r+tXe8AJKF0Yu8mGMs 5amybcVSzPXUwr6QxsaeepjF35FMScyCheJ5+EhpUYPdEDDdBbqSPRsgUW8DCxJ1/nZv Fctxg+mQcVdKZNVv9AOwO5kF1BlPuKbxMBDtNfQGZSN0TE3iKVYEzZu5IUAygMvkOFCW PB+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=61EBO9/4U4kK1lAAadd9KsbQzMPf+WU7/DLGVLFEQNU=; b=yEFifA68To2EI6eepOatNMYKou2BRyuQI0ELJjMjgtfljbSMGUsWgHdlyM1R4rTWmJ 3k1AzzPBPTcw2kYMzz4EHpblTYyWse3nOvDp042NTcUhjiaDB6em/K6QFqp0nkkNs7wG sBy4PqcXqhdQjc/BO8bkL7vfou8gVOj0Zt40U1sEAR7PA76Qed/W8KTo9GejDgWSmOWK PKr/NRDFvppaXUq6n8Ixy0Q948TlS4gCi0WJyhG05uPPmUEMku6IVwgMITXZNS1x3/l4 2WY61PkVTJsHS10Q77Dan61p7j4hgdJkp/RshvnoOY3W6QCt1tZR7Y+lbDqVfK97FGcq rUzg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="OY/tMIT5"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ck9si12859317plb.141.2019.08.20.10.25.46; Tue, 20 Aug 2019 10:25:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="OY/tMIT5"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730650AbfHTRZp (ORCPT + 8 others); Tue, 20 Aug 2019 13:25:45 -0400 Received: from mail.kernel.org ([198.145.29.99]:48778 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730562AbfHTRZo (ORCPT ); Tue, 20 Aug 2019 13:25:44 -0400 Received: from localhost.localdomain (unknown [106.201.62.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C47FE22DD3; Tue, 20 Aug 2019 17:25:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1566321944; bh=fVGwsJnJTm2imi6kxTcc2ByTO+0x8vOgQJiy0XtV+xY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OY/tMIT5l1gn8ObNTYv42OSWjAB5X/tBNRbrs/YU2Q9raBr2i6mH3LdvFTJODOGJj wguf1k7E3GtGzp4EhiwvhWmwHGwvf/OFgtib71Ko4TV/ubSX8yf0BFELNRUeM4Mk06 BdfMsXwXLvuYFGAv8aUYWmWCBi5i2hCT7MV34APE= From: Vinod Koul To: Andy Gross Cc: linux-arm-msm@vger.kernel.org, Bjorn Andersson , Vinod Koul , Rob Herring , Mark Rutland , Stephen Boyd , Sibi Sankar , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 6/8] arm64: dts: qcom: sm8150-mtp: Add regulators Date: Tue, 20 Aug 2019 22:53:49 +0530 Message-Id: <20190820172351.24145-8-vkoul@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190820172351.24145-1-vkoul@kernel.org> References: <20190820172351.24145-1-vkoul@kernel.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the regulators found in the mtp platform. This platform consists of pmic PM8150, PM8150L and PM8009. Signed-off-by: Vinod Koul --- arch/arm64/boot/dts/qcom/sm8150-mtp.dts | 327 ++++++++++++++++++++++++ 1 file changed, 327 insertions(+) -- 2.20.1 diff --git a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts index 6f5777f530ae..340d57cc62bf 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8150-mtp.dts @@ -6,6 +6,7 @@ /dts-v1/; +#include #include "sm8150.dtsi" #include "pm8150.dtsi" #include "pm8150b.dtsi" @@ -22,6 +23,332 @@ chosen { stdout-path = "serial0:115200n8"; }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + }; + + /* + * Apparently RPMh does not provide support for PM8150 S4 because it + * is always-on; model it as a fixed regulator. + */ + vreg_s4a_1p8: pm8150-s4 { + compatible = "regulator-fixed"; + regulator-name = "vreg_s4a_1p8"; + + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-always-on; + regulator-boot-on; + + vin-supply = <&vph_pwr>; + }; +}; + +&apps_rsc { + pm8150-rpmh-regulators { + compatible = "qcom,pm8150-rpmh-regulators"; + qcom,pmic-id = "a"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s3-supply = <&vph_pwr>; + vdd-s4-supply = <&vph_pwr>; + vdd-s5-supply = <&vph_pwr>; + vdd-s6-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-s8-supply = <&vph_pwr>; + vdd-s9-supply = <&vph_pwr>; + vdd-s10-supply = <&vph_pwr>; + + vdd-l1-l8-l11-supply = <&vreg_s6a_0p9>; + vdd-l2-l10-supply = <&vreg_bob>; + vdd-l3-l4-l5-l18-supply = <&vreg_s6a_0p9>; + vdd-l6-l9-supply = <&vreg_s8c_1p3>; + vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p0>; + vdd-l13-l16-l17-supply = <&vreg_bob>; + + vreg_s5a_2p0: smps5 { + regulator-min-microvolt = <1904000>; + regulator-max-microvolt = <2000000>; + }; + + vreg_s6a_0p9: smps6 { + regulator-min-microvolt = <920000>; + regulator-max-microvolt = <1128000>; + }; + + vdda_wcss_pll: + vreg_l1a_0p75: ldo1 { + regulator-min-microvolt = <752000>; + regulator-max-microvolt = <752000>; + regulator-initial-mode = ; + }; + + vdd_pdphy: + vdda_usb_hs_3p1: + vreg_l2a_3p1: ldo2 { + regulator-min-microvolt = <3072000>; + regulator-max-microvolt = <3072000>; + regulator-initial-mode = ; + }; + + vreg_l3a_0p8: ldo3 { + regulator-min-microvolt = <480000>; + regulator-max-microvolt = <932000>; + regulator-initial-mode = ; + }; + + vdd_usb_hs_core: + vdda_csi_0_0p9: + vdda_csi_1_0p9: + vdda_csi_2_0p9: + vdda_csi_3_0p9: + vdda_dsi_0_0p9: + vdda_dsi_1_0p9: + vdda_dsi_0_pll_0p9: + vdda_dsi_1_pll_0p9: + vdda_pcie_1ln_core: + vdda_pcie_2ln_core: + vdda_pll_hv_cc_ebi01: + vdda_pll_hv_cc_ebi23: + vdda_qrefs_0p875_5: + vdda_sp_sensor: + vdda_ufs_2ln_core_1: + vdda_ufs_2ln_core_2: + vdda_usb_ss_dp_core_1: + vdda_usb_ss_dp_core_2: + vdda_qlink_lv: + vdda_qlink_lv_ck: + vreg_l5a_0p875: ldo5 { + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + regulator-initial-mode = ; + }; + + vreg_l6a_1p2: ldo6 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + }; + + vreg_l7a_1p8: ldo7 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vddpx_10: + vreg_l9a_1p2: ldo9 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + }; + + + vreg_l10a_2p5: ldo10 { + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + + vreg_l11a_0p8: ldo11 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vdd_qfprom: + vdd_qfprom_sp: + vdda_apc_cs_1p8: + vdda_gfx_cs_1p8: + vdda_usb_hs_1p8: + vdda_qrefs_vref_1p8: + vddpx_10_a: + vreg_l12a_1p8: ldo12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l13a_2p7: ldo13 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2704000>; + regulator-initial-mode = ; + }; + + vreg_l14a_1p8: ldo14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1880000>; + regulator-initial-mode = ; + }; + + vreg_l15a_1p7: ldo15 { + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <1704000>; + regulator-initial-mode = ; + }; + + vreg_l16a_2p7: ldo16 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + + vreg_l17a_3p0: ldo17 { + regulator-min-microvolt = <2856000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + }; + }; + + pm8150l-rpmh-regulators { + compatible = "qcom,pm8150l-rpmh-regulators"; + qcom,pmic-id = "c"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s3-supply = <&vph_pwr>; + vdd-s4-supply = <&vph_pwr>; + vdd-s5-supply = <&vph_pwr>; + vdd-s6-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-s8-supply = <&vph_pwr>; + + vdd-l1-l8-supply = <&vreg_s4a_1p8>; + vdd-l2-l3-supply = <&vreg_s8c_1p3>; + vdd-l4-l5-l6-supply = <&vreg_bob>; + vdd-l7-l11-supply = <&vreg_bob>; + vdd-l9-l10-supply = <&vreg_bob>; + + vdd-bob-supply = <&vph_pwr>; + vdd-flash-supply = <&vreg_bob>; + vdd-rgb-supply = <&vreg_bob>; + + vreg_bob: bob { + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <4000000>; + regulator-initial-mode = ; + regulator-allow-bypass; + }; + + vreg_s8c_1p3: smps8 { + regulator-min-microvolt = <1352000>; + regulator-max-microvolt = <1352000>; + }; + + vreg_l1c_1p8: ldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vdda_wcss_adcdac_1: + vdda_wcss_adcdac_22: + vreg_l2c_1p3: ldo2 { + regulator-min-microvolt = <1304000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vdda_hv_ebi0: + vdda_hv_ebi1: + vdda_hv_ebi2: + vdda_hv_ebi3: + vdda_hv_refgen0: + vdda_qlink_hv_ck: + vreg_l3c_1p2: ldo3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + }; + + vddpx_5: + vreg_l4c_1p8: ldo4 { + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = ; + }; + + vddpx_6: + vreg_l5c_1p8: ldo5 { + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = ; + }; + + vddpx_2: + vreg_l6c_2p9: ldo6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + + vreg_l7c_3p0: ldo7 { + regulator-min-microvolt = <2856000>; + regulator-max-microvolt = <3104000>; + regulator-initial-mode = ; + }; + + vreg_l8c_1p8: ldo8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l9c_2p9: ldo9 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + + + vreg_l10c_3p3: ldo10 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3312000>; + regulator-initial-mode = ; + }; + + vreg_l11c_3p3: ldo11 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3312000>; + regulator-initial-mode = ; + }; + }; + + pm8009-rpmh-regulators { + compatible = "qcom,pm8009-rpmh-regulators"; + qcom,pmic-id = "f"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vreg_bob>; + + vdd-l2-supply = <&vreg_s8c_1p3>; + vdd-l5-l6-supply = <&vreg_bob>; + + vreg_l2f_1p2: ldo2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + }; + + vreg_l5f_2p85: ldo5 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-initial-mode = ; + }; + + vreg_l6f_2p85: ldo6 { + regulator-initial-mode = ; + regulator-min-microvolt = <2856000>; + regulator-max-microvolt = <2856000>; + }; + }; + }; &qupv3_id_1 { From patchwork Tue Aug 20 17:23:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 171827 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp4722844ily; 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[209.132.180.67]) by mx.google.com with ESMTP id 12si12590413pgu.469.2019.08.20.10.25.53; Tue, 20 Aug 2019 10:25:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=UH+hRYux; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730685AbfHTRZx (ORCPT + 8 others); Tue, 20 Aug 2019 13:25:53 -0400 Received: from mail.kernel.org ([198.145.29.99]:48956 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730638AbfHTRZx (ORCPT ); Tue, 20 Aug 2019 13:25:53 -0400 Received: from localhost.localdomain (unknown [106.201.62.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id BEC4E22DD6; Tue, 20 Aug 2019 17:25:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1566321952; bh=SxyONdR/tM8eQiXxR1+O2jh66XLn8xoBHmSLNiEyJoU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UH+hRYuxA/8xHKRYzDhDM/7FW60RBTQIcUJ2AScBxRu22Ysq1iHx42YqT6mmVuWfK UM9IQzU32ImfYlEjZcKLMKUFgjSm0TKf0PJS6uT54OtVZ23otlEunbao3py/G81fyu sEQEpuzGjxrsVhQlV9FYZnhxCgHkSeT91AeHPO0w= From: Vinod Koul To: Andy Gross Cc: linux-arm-msm@vger.kernel.org, Bjorn Andersson , Vinod Koul , Rob Herring , Mark Rutland , Stephen Boyd , Sibi Sankar , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 8/8] arm64: dts: qcom: sm8150: Add apps shared nodes Date: Tue, 20 Aug 2019 22:53:51 +0530 Message-Id: <20190820172351.24145-10-vkoul@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190820172351.24145-1-vkoul@kernel.org> References: <20190820172351.24145-1-vkoul@kernel.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add hwlock, pmu, smem, tcsr_mutex_regs, apss_shared mailbox, apps_rsc including the rpmhcc child nodes to the SM8150 DTSI Co-developed-by: Sibi Sankar Signed-off-by: Sibi Sankar Signed-off-by: Vinod Koul --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 63 ++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) -- 2.20.1 diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 3bed04d60dea..781905e9977a 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -144,12 +144,23 @@ }; }; + tcsr_mutex: hwlock { + compatible = "qcom,tcsr-mutex"; + syscon = <&tcsr_mutex_regs 0 0x1000>; + #hwlock-cells = <1>; + }; + memory@80000000 { device_type = "memory"; /* We expect the bootloader to fill in the size */ reg = <0x0 0x80000000 0x0 0x0>; }; + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = ; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; @@ -266,6 +277,12 @@ }; }; + smem { + compatible = "qcom,smem"; + memory-region = <&smem_mem>; + hwlocks = <&tcsr_mutex 3>; + }; + soc: soc@0 { #address-cells = <1>; #size-cells = <1>; @@ -305,6 +322,11 @@ }; }; + tcsr_mutex_regs: syscon@1f40000 { + compatible = "syscon"; + reg = <0x01f40000 0x40000>; + }; + tlmm: pinctrl@3100000 { compatible = "qcom,sm8150-pinctrl"; reg = <0x03100000 0x300000>, @@ -320,6 +342,16 @@ #interrupt-cells = <2>; }; + aoss_qmp: power-controller@c300000 { + compatible = "qcom,sm8150-aoss-qmp"; + reg = <0x0c300000 0x100000>; + interrupts = ; + mboxes = <&apss_shared 0>; + + #clock-cells = <0>; + #power-domain-cells = <1>; + }; + intc: interrupt-controller@17a00000 { compatible = "arm,gic-v3"; interrupt-controller; @@ -329,6 +361,12 @@ interrupts = ; }; + apss_shared: mailbox@17c00000 { + compatible = "qcom,sm8150-apss-shared"; + reg = <0x17c00000 0x1000>; + #mbox-cells = <1>; + }; + timer@17c20000 { #address-cells = <1>; #size-cells = <1>; @@ -388,6 +426,31 @@ }; }; + apps_rsc: rsc@18200000 { + label = "apps_rsc"; + compatible = "qcom,rpmh-rsc"; + reg = <0x18200000 0x10000>, + <0x18210000 0x10000>, + <0x18220000 0x10000>; + reg-names = "drv-0", "drv-1", "drv-2"; + interrupts = , + , + ; + qcom,tcs-offset = <0xd00>; + qcom,drv-id = <2>; + qcom,tcs-config = , + , + , + ; + + rpmhcc: clock-controller { + compatible = "qcom,sm8150-rpmh-clk"; + #clock-cells = <1>; + clock-names = "xo"; + clocks = <&xo_board>; + }; + }; + spmi_bus: spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x0c440000 0x0001100>,