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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SN1PEPF000252A4.mail.protection.outlook.com (10.167.242.11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7002.20 via Frontend Transport; Fri, 17 Nov 2023 08:10:13 +0000 Received: from jatayu.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.32; Fri, 17 Nov 2023 02:10:10 -0600 From: Shyam Sundar S K To: , , , , , CC: , , , , "Shyam Sundar S K" Subject: [PATCH v5 02/17] platform/x86/amd/pmf: Add support for PMF-TA interaction Date: Fri, 17 Nov 2023 13:37:32 +0530 Message-ID: <20231117080747.3643990-3-Shyam-sundar.S-k@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231117080747.3643990-1-Shyam-sundar.S-k@amd.com> References: <20231117080747.3643990-1-Shyam-sundar.S-k@amd.com> Precedence: bulk X-Mailing-List: linux-input@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000252A4:EE_|DM4PR12MB7693:EE_ X-MS-Office365-Filtering-Correlation-Id: 2cc3463d-11b6-47b5-c63a-08dbe744a02a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2023 08:10:13.3538 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2cc3463d-11b6-47b5-c63a-08dbe744a02a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000252A4.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB7693 PMF TA (Trusted Application) loads via the TEE environment into the AMD ASP. PMF-TA supports two commands: 1) Init: Initialize the TA with the PMF Smart PC policy binary and start the policy engine. A policy is a combination of inputs and outputs, where; - the inputs are the changing dynamics of the system like the user behaviour, system heuristics etc. - the outputs, which are the actions to be set on the system which lead to better power management and enhanced user experience. PMF driver acts as a central manager in this case to supply the inputs required to the TA (either by getting the information from the other kernel subsystems or from userland) 2) Enact: Enact the output actions from the TA. The action could be applying a new thermal limit to boost/throttle the power limits or change system behavior. Reviewed-by: Mario Limonciello Signed-off-by: Shyam Sundar S K --- drivers/platform/x86/amd/pmf/pmf.h | 10 +++ drivers/platform/x86/amd/pmf/tee-if.c | 97 ++++++++++++++++++++++++++- 2 files changed, 106 insertions(+), 1 deletion(-) diff --git a/drivers/platform/x86/amd/pmf/pmf.h b/drivers/platform/x86/amd/pmf/pmf.h index bd40458937ba..a24e34e42032 100644 --- a/drivers/platform/x86/amd/pmf/pmf.h +++ b/drivers/platform/x86/amd/pmf/pmf.h @@ -59,6 +59,9 @@ #define ARG_NONE 0 #define AVG_SAMPLE_SIZE 3 +/* TA macros */ +#define PMF_TA_IF_VERSION_MAJOR 1 + /* AMD PMF BIOS interfaces */ struct apmf_verify_interface { u16 size; @@ -184,6 +187,7 @@ struct amd_pmf_dev { struct tee_shm *fw_shm_pool; u32 session_id; void *shbuf; + struct delayed_work pb_work; bool smart_pc_enabled; }; @@ -395,6 +399,12 @@ struct apmf_dyn_slider_output { struct apmf_cnqf_power_set ps[APMF_CNQF_MAX]; } __packed; +/* Command ids for TA communication */ +enum ta_pmf_command { + TA_PMF_COMMAND_POLICY_BUILDER_INITIALIZE, + TA_PMF_COMMAND_POLICY_BUILDER_ENACT_POLICIES, +}; + struct ta_pmf_shared_memory { int command_id; int resp_id; diff --git a/drivers/platform/x86/amd/pmf/tee-if.c b/drivers/platform/x86/amd/pmf/tee-if.c index 6ec8c3726624..4036f435f1e2 100644 --- a/drivers/platform/x86/amd/pmf/tee-if.c +++ b/drivers/platform/x86/amd/pmf/tee-if.c @@ -13,9 +13,96 @@ #include "pmf.h" #define MAX_TEE_PARAM 4 + +/* Policy binary actions sampling frequency (in ms) */ +static int pb_actions_ms = MSEC_PER_SEC; +#ifdef CONFIG_AMD_PMF_DEBUG +module_param(pb_actions_ms, int, 0644); +MODULE_PARM_DESC(pb_actions_ms, "Policy binary actions sampling frequency (default = 1000ms)"); +#endif + static const uuid_t amd_pmf_ta_uuid = UUID_INIT(0x6fd93b77, 0x3fb8, 0x524d, 0xb1, 0x2d, 0xc5, 0x29, 0xb1, 0x3d, 0x85, 0x43); +static void amd_pmf_prepare_args(struct amd_pmf_dev *dev, int cmd, + struct tee_ioctl_invoke_arg *arg, + struct tee_param *param) +{ + memset(arg, 0, sizeof(*arg)); + memset(param, 0, MAX_TEE_PARAM * sizeof(*param)); + + arg->func = cmd; + arg->session = dev->session_id; + arg->num_params = MAX_TEE_PARAM; + + /* Fill invoke cmd params */ + param[0].u.memref.size = sizeof(struct ta_pmf_shared_memory); + param[0].attr = TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INOUT; + param[0].u.memref.shm = dev->fw_shm_pool; + param[0].u.memref.shm_offs = 0; +} + +static int amd_pmf_invoke_cmd_enact(struct amd_pmf_dev *dev) +{ + struct ta_pmf_shared_memory *ta_sm = NULL; + struct tee_param param[MAX_TEE_PARAM]; + struct tee_ioctl_invoke_arg arg; + int ret = 0; + + if (!dev->tee_ctx) + return -ENODEV; + + ta_sm = dev->shbuf; + memset(ta_sm, 0, sizeof(*ta_sm)); + ta_sm->command_id = TA_PMF_COMMAND_POLICY_BUILDER_ENACT_POLICIES; + ta_sm->if_version = PMF_TA_IF_VERSION_MAJOR; + + amd_pmf_prepare_args(dev, TA_PMF_COMMAND_POLICY_BUILDER_ENACT_POLICIES, &arg, param); + + ret = tee_client_invoke_func(dev->tee_ctx, &arg, param); + if (ret < 0 || arg.ret != 0) { + dev_err(dev->dev, "TEE enact cmd failed. err: %x, ret:%d\n", arg.ret, ret); + return ret; + } + + return 0; +} + +static int amd_pmf_invoke_cmd_init(struct amd_pmf_dev *dev) +{ + struct ta_pmf_shared_memory *ta_sm = NULL; + struct tee_param param[MAX_TEE_PARAM]; + struct tee_ioctl_invoke_arg arg; + int ret = 0; + + if (!dev->tee_ctx) { + dev_err(dev->dev, "Failed to get TEE context\n"); + return -ENODEV; + } + + ta_sm = dev->shbuf; + ta_sm->command_id = TA_PMF_COMMAND_POLICY_BUILDER_INITIALIZE; + ta_sm->if_version = PMF_TA_IF_VERSION_MAJOR; + + amd_pmf_prepare_args(dev, TA_PMF_COMMAND_POLICY_BUILDER_INITIALIZE, &arg, param); + + ret = tee_client_invoke_func(dev->tee_ctx, &arg, param); + if (ret < 0 || arg.ret != 0) { + dev_err(dev->dev, "Failed to invoke TEE init cmd. err: %x, ret:%d\n", arg.ret, ret); + return ret; + } + + return ta_sm->pmf_result; +} + +static void amd_pmf_invoke_cmd(struct work_struct *work) +{ + struct amd_pmf_dev *dev = container_of(work, struct amd_pmf_dev, pb_work.work); + + amd_pmf_invoke_cmd_enact(dev); + schedule_delayed_work(&dev->pb_work, msecs_to_jiffies(pb_actions_ms)); +} + static int amd_pmf_amdtee_ta_match(struct tee_ioctl_version_data *ver, const void *data) { return ver->impl_id == TEE_IMPL_ID_AMDTEE; @@ -96,10 +183,18 @@ static void amd_pmf_tee_deinit(struct amd_pmf_dev *dev) int amd_pmf_init_smart_pc(struct amd_pmf_dev *dev) { - return amd_pmf_tee_init(dev); + int ret; + + ret = amd_pmf_tee_init(dev); + if (ret) + return ret; + + INIT_DELAYED_WORK(&dev->pb_work, amd_pmf_invoke_cmd); + return 0; } void amd_pmf_deinit_smart_pc(struct amd_pmf_dev *dev) { + cancel_delayed_work_sync(&dev->pb_work); amd_pmf_tee_deinit(dev); } From patchwork Fri Nov 17 08:07:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shyam Sundar S K X-Patchwork-Id: 744795 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="b7HovqTJ" Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2078.outbound.protection.outlook.com [40.107.93.78]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF1BBA8; Fri, 17 Nov 2023 00:10:22 -0800 (PST) ARC-Seal: i=1; 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Fri, 17 Nov 2023 08:10:17 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000EE3D.mail.protection.outlook.com (10.167.242.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7002.20 via Frontend Transport; Fri, 17 Nov 2023 08:10:17 +0000 Received: from jatayu.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.32; Fri, 17 Nov 2023 02:10:13 -0600 From: Shyam Sundar S K To: , , , , , CC: , , , , "Shyam Sundar S K" Subject: [PATCH v5 03/17] platform/x86/amd/pmf: Change return type of amd_pmf_set_dram_addr() Date: Fri, 17 Nov 2023 13:37:33 +0530 Message-ID: <20231117080747.3643990-4-Shyam-sundar.S-k@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231117080747.3643990-1-Shyam-sundar.S-k@amd.com> References: <20231117080747.3643990-1-Shyam-sundar.S-k@amd.com> Precedence: bulk X-Mailing-List: linux-input@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE3D:EE_|LV2PR12MB5774:EE_ X-MS-Office365-Filtering-Correlation-Id: fabd11af-5b18-4b26-8fcc-08dbe744a28d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2023 08:10:17.2942 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fabd11af-5b18-4b26-8fcc-08dbe744a28d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3D.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5774 In the current code, the metrics table information was required only for auto-mode or CnQF at a given time. Hence keeping the return type of amd_pmf_set_dram_addr() as static made sense. But with the addition of Smart PC builder feature, the metrics table information has to be shared by the Smart PC also and this feature resides outside of core.c. To make amd_pmf_set_dram_addr() visible outside of core.c make it as a non-static function and move the allocation of memory for metrics table from amd_pmf_init_metrics_table() to amd_pmf_set_dram_addr() as amd_pmf_set_dram_addr() is the common function to set the DRAM address. Add a suspend handler that can free up the allocated memory for getting the metrics table information. Reviewed-by: Mario Limonciello Signed-off-by: Shyam Sundar S K --- drivers/platform/x86/amd/pmf/core.c | 42 ++++++++++++++++++++++------- drivers/platform/x86/amd/pmf/pmf.h | 1 + 2 files changed, 34 insertions(+), 9 deletions(-) diff --git a/drivers/platform/x86/amd/pmf/core.c b/drivers/platform/x86/amd/pmf/core.c index ec92d1cc0dac..f50b7ec9a625 100644 --- a/drivers/platform/x86/amd/pmf/core.c +++ b/drivers/platform/x86/amd/pmf/core.c @@ -251,29 +251,35 @@ static const struct pci_device_id pmf_pci_ids[] = { { } }; -static void amd_pmf_set_dram_addr(struct amd_pmf_dev *dev) +int amd_pmf_set_dram_addr(struct amd_pmf_dev *dev) { u64 phys_addr; u32 hi, low; + /* Get Metrics Table Address */ + dev->buf = kzalloc(sizeof(dev->m_table), GFP_KERNEL); + if (!dev->buf) + return -ENOMEM; + phys_addr = virt_to_phys(dev->buf); hi = phys_addr >> 32; low = phys_addr & GENMASK(31, 0); amd_pmf_send_cmd(dev, SET_DRAM_ADDR_HIGH, 0, hi, NULL); amd_pmf_send_cmd(dev, SET_DRAM_ADDR_LOW, 0, low, NULL); + + return 0; } int amd_pmf_init_metrics_table(struct amd_pmf_dev *dev) { - /* Get Metrics Table Address */ - dev->buf = kzalloc(sizeof(dev->m_table), GFP_KERNEL); - if (!dev->buf) - return -ENOMEM; + int ret; INIT_DELAYED_WORK(&dev->work_buffer, amd_pmf_get_metrics); - amd_pmf_set_dram_addr(dev); + ret = amd_pmf_set_dram_addr(dev); + if (ret) + return ret; /* * Start collecting the metrics data after a small delay @@ -284,17 +290,35 @@ int amd_pmf_init_metrics_table(struct amd_pmf_dev *dev) return 0; } +static int amd_pmf_suspend_handler(struct device *dev) +{ + struct amd_pmf_dev *pdev = dev_get_drvdata(dev); + + /* + * Free the buffer allocated for storing the metrics table + * information, as will have to allocate it freshly after + * resume. + */ + kfree(pdev->buf); + + return 0; +} + static int amd_pmf_resume_handler(struct device *dev) { struct amd_pmf_dev *pdev = dev_get_drvdata(dev); + int ret; - if (pdev->buf) - amd_pmf_set_dram_addr(pdev); + if (pdev->buf) { + ret = amd_pmf_set_dram_addr(pdev); + if (ret) + return ret; + } return 0; } -static DEFINE_SIMPLE_DEV_PM_OPS(amd_pmf_pm, NULL, amd_pmf_resume_handler); +static DEFINE_SIMPLE_DEV_PM_OPS(amd_pmf_pm, amd_pmf_suspend_handler, amd_pmf_resume_handler); static void amd_pmf_init_features(struct amd_pmf_dev *dev) { diff --git a/drivers/platform/x86/amd/pmf/pmf.h b/drivers/platform/x86/amd/pmf/pmf.h index a24e34e42032..6a0e4c446dd3 100644 --- a/drivers/platform/x86/amd/pmf/pmf.h +++ b/drivers/platform/x86/amd/pmf/pmf.h @@ -421,6 +421,7 @@ int amd_pmf_init_metrics_table(struct amd_pmf_dev *dev); int amd_pmf_get_power_source(void); int apmf_install_handler(struct amd_pmf_dev *pmf_dev); int apmf_os_power_slider_update(struct amd_pmf_dev *dev, u8 flag); +int amd_pmf_set_dram_addr(struct amd_pmf_dev *dev); /* SPS Layer */ int amd_pmf_get_pprof_modes(struct amd_pmf_dev *pmf); From patchwork Fri Nov 17 08:07:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shyam Sundar S K X-Patchwork-Id: 744794 Authentication-Results: smtp.subspace.kernel.org; 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Fri, 17 Nov 2023 02:10:19 -0600 From: Shyam Sundar S K To: , , , , , CC: , , , , "Shyam Sundar S K" Subject: [PATCH v5 05/17] platform/x86/amd/pmf: change amd_pmf_init_features() call sequence Date: Fri, 17 Nov 2023 13:37:35 +0530 Message-ID: <20231117080747.3643990-6-Shyam-sundar.S-k@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231117080747.3643990-1-Shyam-sundar.S-k@amd.com> References: <20231117080747.3643990-1-Shyam-sundar.S-k@amd.com> Precedence: bulk X-Mailing-List: linux-input@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000252A0:EE_|PH7PR12MB8153:EE_ X-MS-Office365-Filtering-Correlation-Id: bfc60d09-83dd-4f60-c839-08dbe744bb27 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 2rsvrdhjBJLBiJbo8u4m33580d+eECPSTLbQWLM97e2gl7r2heOukAEbJ3xFkPPasV0a1hw3RCir4Qahiieg8N+aHxjWAA/L+E99WO+2VI3TE+/tj/3ou7avveb9M7Sks6WCbZPyU4sR7PVdblXhG5ELUBNxKkggG4X0eze2MjI2omtkOjJaqZKJEggoX+hRRNLDu8ORr6gSLwo/cD6wrD1ZwVppyfkNNVgUeuHLPwpuKetRXgKC/hTTavl87ffQnpnRTvzwCaXhjXBv6cT2IlreOzYYLVvqOdzwDIKcS3jTEHpGw29fMaZZhkTZwVQ9+2gIhe2jpu+LCYETgjSnw7RbR+7KRO0SLJBCgkuZBoGWZejrec1CqC8v7SgDSPA1A4dmo5Ygf8B3jNfTvQA+puDgPIgpg04HWJSdL8qfZH9KQN/McZW9zJiJbNZ/zBNOZZfYMdVLwJJdes8mygrA4+AksiQx8h6rFKCYdB7S2yvReo8y1A70quN2JlDih8Z6fcuiApZB2XX9FecCFHTtoH9keID/aaHQknJ6o1nh8IkX/hiG5FyRUuztCdoEzGzL16Iw5V7bjG6xmzai8hs0OSnAZN6QntppZXWesL9qKhRQyiu55+10rE5gXCKUpkSRgh/cme1gXsviRIYotShgCmmep4u2DL1j29M+nI3V0D6mdKFWwNBGlcDv+hPc96QKJ21Am9kT6GUtqeTqPVhWDiYScHGp6kED/vUDfkSYNRK2nu4Vn0SSOThPw7C+aw16QpaQKfsCmz2u9UqwxiUjtg== X-Forefront-Antispam-Report: CIP:165.204.84.17; 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In the current code structure, amd_pmf_dbgfs_register() is called after amd_pmf_init_features(). This will not help when the Smart PC builder feature has to be assoicated to the parent directory. Hence change the order of amd_pmf_dbgfs_register() and call it before amd_pmf_init_features() so that when the Smart PC init happens, it has the parent debugfs directory to get itself hooked. Reviewed-by: Mario Limonciello Signed-off-by: Shyam Sundar S K --- drivers/platform/x86/amd/pmf/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/platform/x86/amd/pmf/core.c b/drivers/platform/x86/amd/pmf/core.c index c8f6ec4c2e2c..4b8156033fa6 100644 --- a/drivers/platform/x86/amd/pmf/core.c +++ b/drivers/platform/x86/amd/pmf/core.c @@ -442,9 +442,9 @@ static int amd_pmf_probe(struct platform_device *pdev) apmf_acpi_init(dev); platform_set_drvdata(pdev, dev); + amd_pmf_dbgfs_register(dev); amd_pmf_init_features(dev); apmf_install_handler(dev); - amd_pmf_dbgfs_register(dev); dev_info(dev->dev, "registered PMF device successfully\n"); From patchwork Fri Nov 17 08:07:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shyam Sundar S K X-Patchwork-Id: 744793 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="oKMrVHeO" Received: from NAM02-SN1-obe.outbound.protection.outlook.com (mail-sn1nam02on2086.outbound.protection.outlook.com [40.107.96.86]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4FCD3D5D; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2023 08:11:04.0077 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 27f980cf-4666-44b1-f03a-08dbe744be5b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000252A0.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6326 PMF driver sends changing inputs from each subystem to TA for evaluating the conditions in the policy binary. Add initial support of plumbing in the PMF driver for Smart PC to get information from other subsystems in the kernel. Signed-off-by: Shyam Sundar S K --- drivers/platform/x86/amd/pmf/Makefile | 2 +- drivers/platform/x86/amd/pmf/pmf.h | 18 ++++ drivers/platform/x86/amd/pmf/spc.c | 120 ++++++++++++++++++++++++++ drivers/platform/x86/amd/pmf/tee-if.c | 3 + 4 files changed, 142 insertions(+), 1 deletion(-) create mode 100644 drivers/platform/x86/amd/pmf/spc.c diff --git a/drivers/platform/x86/amd/pmf/Makefile b/drivers/platform/x86/amd/pmf/Makefile index d2746ee7369f..6b26e48ce8ad 100644 --- a/drivers/platform/x86/amd/pmf/Makefile +++ b/drivers/platform/x86/amd/pmf/Makefile @@ -7,4 +7,4 @@ obj-$(CONFIG_AMD_PMF) += amd-pmf.o amd-pmf-objs := core.o acpi.o sps.o \ auto-mode.o cnqf.o \ - tee-if.o + tee-if.o spc.o diff --git a/drivers/platform/x86/amd/pmf/pmf.h b/drivers/platform/x86/amd/pmf/pmf.h index 092be501d4d3..a4a73b845c09 100644 --- a/drivers/platform/x86/amd/pmf/pmf.h +++ b/drivers/platform/x86/amd/pmf/pmf.h @@ -150,6 +150,21 @@ struct smu_pmf_metrics { u16 infra_gfx_maxfreq; /* in MHz */ u16 skin_temp; /* in centi-Celsius */ u16 device_state; + u16 curtemp; /* in centi-Celsius */ + u16 filter_alpha_value; + u16 avg_gfx_clkfrequency; + u16 avg_fclk_frequency; + u16 avg_gfx_activity; + u16 avg_socclk_frequency; + u16 avg_vclk_frequency; + u16 avg_vcn_activity; + u16 avg_dram_reads; + u16 avg_dram_writes; + u16 avg_socket_power; + u16 avg_core_power[2]; + u16 avg_core_c0residency[16]; + u16 spare1; + u32 metrics_counter; } __packed; enum amd_stt_skin_temp { @@ -601,4 +616,7 @@ extern const struct attribute_group cnqf_feature_attribute_group; int amd_pmf_init_smart_pc(struct amd_pmf_dev *dev); void amd_pmf_deinit_smart_pc(struct amd_pmf_dev *dev); int apmf_check_smart_pc(struct amd_pmf_dev *pmf_dev); + +/* Smart PC - TA interfaces */ +void amd_pmf_populate_ta_inputs(struct amd_pmf_dev *dev, struct ta_pmf_enact_table *in); #endif /* PMF_H */ diff --git a/drivers/platform/x86/amd/pmf/spc.c b/drivers/platform/x86/amd/pmf/spc.c new file mode 100644 index 000000000000..bd5061fdfdbe --- /dev/null +++ b/drivers/platform/x86/amd/pmf/spc.c @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * AMD Platform Management Framework Driver - Smart PC Capabilities + * + * Copyright (c) 2023, Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Authors: Shyam Sundar S K + * Patil Rajesh Reddy + */ + +#include +#include +#include +#include "pmf.h" + +static void amd_pmf_get_smu_info(struct amd_pmf_dev *dev, struct ta_pmf_enact_table *in) +{ + u16 max, avg = 0; + int i; + + memset(dev->buf, 0, sizeof(dev->m_table)); + amd_pmf_send_cmd(dev, SET_TRANSFER_TABLE, 0, 7, NULL); + memcpy(&dev->m_table, dev->buf, sizeof(dev->m_table)); + + in->ev_info.socket_power = dev->m_table.apu_power + dev->m_table.dgpu_power; + in->ev_info.skin_temperature = dev->m_table.skin_temp; + + /* Get the avg and max C0 residency of all the cores */ + max = dev->m_table.avg_core_c0residency[0]; + for (i = 0; i < ARRAY_SIZE(dev->m_table.avg_core_c0residency); i++) { + avg += dev->m_table.avg_core_c0residency[i]; + if (dev->m_table.avg_core_c0residency[i] > max) + max = dev->m_table.avg_core_c0residency[i]; + } + + avg = DIV_ROUND_CLOSEST(avg, ARRAY_SIZE(dev->m_table.avg_core_c0residency)); + in->ev_info.avg_c0residency = avg; + in->ev_info.max_c0residency = max; + in->ev_info.gfx_busy = dev->m_table.avg_gfx_activity; +} + +static const char * const pmf_battery_supply_name[] = { + "BATT", + "BAT0", +}; + +static int amd_pmf_get_battery_prop(enum power_supply_property prop) +{ + union power_supply_propval value; + struct power_supply *psy; + int i, ret; + + for (i = 0; i < ARRAY_SIZE(pmf_battery_supply_name); i++) { + psy = power_supply_get_by_name(pmf_battery_supply_name[i]); + if (!psy) + continue; + + ret = power_supply_get_property(psy, prop, &value); + if (ret) { + power_supply_put(psy); + return ret; + } + } + + return value.intval; +} + +static int amd_pmf_get_battery_info(struct amd_pmf_dev *dev, struct ta_pmf_enact_table *in) +{ + int val; + + val = amd_pmf_get_battery_prop(POWER_SUPPLY_PROP_PRESENT); + if (val >= 0 && val != 1) + return -ENODEV; + + in->ev_info.bat_percentage = amd_pmf_get_battery_prop(POWER_SUPPLY_PROP_CAPACITY); + /* all values in mWh metrics */ + in->ev_info.bat_design = amd_pmf_get_battery_prop(POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN) / + MILLIWATT_PER_WATT; + in->ev_info.full_charge_capacity = amd_pmf_get_battery_prop(POWER_SUPPLY_PROP_ENERGY_FULL) / + MILLIWATT_PER_WATT; + in->ev_info.drain_rate = amd_pmf_get_battery_prop(POWER_SUPPLY_PROP_POWER_NOW) / + MILLIWATT_PER_WATT; + + return 0; +} + +static int amd_pmf_get_slider_info(struct amd_pmf_dev *dev, struct ta_pmf_enact_table *in) +{ + int val; + + switch (dev->current_profile) { + case PLATFORM_PROFILE_PERFORMANCE: + val = TA_BEST_PERFORMANCE; + break; + case PLATFORM_PROFILE_BALANCED: + val = TA_BETTER_PERFORMANCE; + break; + case PLATFORM_PROFILE_LOW_POWER: + val = TA_BEST_BATTERY; + break; + default: + dev_err(dev->dev, "Unknown Platform Profile.\n"); + return -EOPNOTSUPP; + } + in->ev_info.power_slider = val; + + return 0; +} + +void amd_pmf_populate_ta_inputs(struct amd_pmf_dev *dev, struct ta_pmf_enact_table *in) +{ + /* TA side lid open is 1 and close is 0, hence the ! here */ + in->ev_info.lid_state = !acpi_lid_open(); + in->ev_info.power_source = amd_pmf_get_power_source(); + amd_pmf_get_smu_info(dev, in); + amd_pmf_get_battery_info(dev, in); + amd_pmf_get_slider_info(dev, in); +} diff --git a/drivers/platform/x86/amd/pmf/tee-if.c b/drivers/platform/x86/amd/pmf/tee-if.c index 468f3797a848..e3f17852d532 100644 --- a/drivers/platform/x86/amd/pmf/tee-if.c +++ b/drivers/platform/x86/amd/pmf/tee-if.c @@ -113,6 +113,7 @@ static int amd_pmf_invoke_cmd_enact(struct amd_pmf_dev *dev) { struct ta_pmf_shared_memory *ta_sm = NULL; struct ta_pmf_enact_result *out = NULL; + struct ta_pmf_enact_table *in = NULL; struct tee_param param[MAX_TEE_PARAM]; struct tee_ioctl_invoke_arg arg; int ret = 0; @@ -123,11 +124,13 @@ static int amd_pmf_invoke_cmd_enact(struct amd_pmf_dev *dev) memset(dev->shbuf, 0, dev->policy_sz); ta_sm = dev->shbuf; out = &ta_sm->pmf_output.policy_apply_table; + in = &ta_sm->pmf_input.enact_table; memset(ta_sm, 0, sizeof(*ta_sm)); ta_sm->command_id = TA_PMF_COMMAND_POLICY_BUILDER_ENACT_POLICIES; ta_sm->if_version = PMF_TA_IF_VERSION_MAJOR; + amd_pmf_populate_ta_inputs(dev, in); amd_pmf_prepare_args(dev, TA_PMF_COMMAND_POLICY_BUILDER_ENACT_POLICIES, &arg, param); ret = tee_client_invoke_func(dev->tee_ctx, &arg, param); From patchwork Fri Nov 17 08:07:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shyam Sundar S K X-Patchwork-Id: 744792 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="zG0SGvuE" Received: from NAM04-BN8-obe.outbound.protection.outlook.com (mail-bn8nam04on2083.outbound.protection.outlook.com [40.107.100.83]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 21A60D52; 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Fri, 17 Nov 2023 08:11:11 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SN1PEPF0002529E.mail.protection.outlook.com (10.167.242.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7002.20 via Frontend Transport; Fri, 17 Nov 2023 08:11:11 +0000 Received: from jatayu.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.32; Fri, 17 Nov 2023 02:11:08 -0600 From: Shyam Sundar S K To: , , , , , CC: , , , , "Shyam Sundar S K" Subject: [PATCH v5 09/17] platform/x86/amd/pmf: Make source_as_str() as non-static Date: Fri, 17 Nov 2023 13:37:39 +0530 Message-ID: <20231117080747.3643990-10-Shyam-sundar.S-k@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231117080747.3643990-1-Shyam-sundar.S-k@amd.com> References: <20231117080747.3643990-1-Shyam-sundar.S-k@amd.com> Precedence: bulk X-Mailing-List: linux-input@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002529E:EE_|LV2PR12MB5776:EE_ X-MS-Office365-Filtering-Correlation-Id: 3d366912-01bf-4f18-575e-08dbe744c301 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2023 08:11:11.7869 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3d366912-01bf-4f18-575e-08dbe744c301 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002529E.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5776 Add amd_pmf prefix to source_as_str() function, so that the function name does not look generic. As this is a helper function make it as non-static so that it can be reused across multiple PMF features. Signed-off-by: Shyam Sundar S K --- drivers/platform/x86/amd/pmf/pmf.h | 1 + drivers/platform/x86/amd/pmf/sps.c | 5 +++-- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/platform/x86/amd/pmf/pmf.h b/drivers/platform/x86/amd/pmf/pmf.h index fb9ce2593236..216a9f795436 100644 --- a/drivers/platform/x86/amd/pmf/pmf.h +++ b/drivers/platform/x86/amd/pmf/pmf.h @@ -600,6 +600,7 @@ int apmf_get_static_slider_granular(struct amd_pmf_dev *pdev, struct apmf_static_slider_granular_output *output); bool is_pprof_balanced(struct amd_pmf_dev *pmf); int amd_pmf_power_slider_update_event(struct amd_pmf_dev *dev); +const char *amd_pmf_source_as_str(unsigned int state); int apmf_update_fan_idx(struct amd_pmf_dev *pdev, bool manual, u32 idx); diff --git a/drivers/platform/x86/amd/pmf/sps.c b/drivers/platform/x86/amd/pmf/sps.c index a70e67749be3..33e23e25c8b1 100644 --- a/drivers/platform/x86/amd/pmf/sps.c +++ b/drivers/platform/x86/amd/pmf/sps.c @@ -27,7 +27,7 @@ static const char *slider_as_str(unsigned int state) } } -static const char *source_as_str(unsigned int state) +const char *amd_pmf_source_as_str(unsigned int state) { switch (state) { case POWER_SOURCE_AC: @@ -47,7 +47,8 @@ static void amd_pmf_dump_sps_defaults(struct amd_pmf_static_slider_granular *dat for (i = 0; i < POWER_SOURCE_MAX; i++) { for (j = 0; j < POWER_MODE_MAX; j++) { - pr_debug("--- Source:%s Mode:%s ---\n", source_as_str(i), slider_as_str(j)); + pr_debug("--- Source:%s Mode:%s ---\n", amd_pmf_source_as_str(i), + slider_as_str(j)); pr_debug("SPL: %u mW\n", data->prop[i][j].spl); pr_debug("SPPT: %u mW\n", data->prop[i][j].sppt); pr_debug("SPPT_ApuOnly: %u mW\n", data->prop[i][j].sppt_apu_only); From patchwork Fri Nov 17 08:07:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shyam Sundar S K X-Patchwork-Id: 744791 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="nN6wPWE8" Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2083.outbound.protection.outlook.com [40.107.93.83]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E0F5A8; Fri, 17 Nov 2023 00:11:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2023 08:11:18.8100 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0b2ac0fc-aae8-4c96-97e4-08dbe744c72e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000252A2.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB7821 A policy binary is OS agnostic, and the same policies are expected to work across the OSes. At times it becomes difficult to debug when the policies inside the policy binaries starts to misbehave. Add a way to sideload such policies independently to debug them via a debugfs entry. Reviewed-by: Mario Limonciello Signed-off-by: Shyam Sundar S K --- drivers/platform/x86/amd/pmf/pmf.h | 1 + drivers/platform/x86/amd/pmf/tee-if.c | 54 +++++++++++++++++++++++++++ 2 files changed, 55 insertions(+) diff --git a/drivers/platform/x86/amd/pmf/pmf.h b/drivers/platform/x86/amd/pmf/pmf.h index 593930519039..8712299ad52b 100644 --- a/drivers/platform/x86/amd/pmf/pmf.h +++ b/drivers/platform/x86/amd/pmf/pmf.h @@ -219,6 +219,7 @@ struct amd_pmf_dev { bool cnqf_supported; struct notifier_block pwr_src_notifier; /* Smart PC solution builder */ + struct dentry *esbin; unsigned char *policy_buf; u32 policy_sz; struct tee_context *tee_ctx; diff --git a/drivers/platform/x86/amd/pmf/tee-if.c b/drivers/platform/x86/amd/pmf/tee-if.c index 5f10e5c6335e..f73663c629fe 100644 --- a/drivers/platform/x86/amd/pmf/tee-if.c +++ b/drivers/platform/x86/amd/pmf/tee-if.c @@ -8,6 +8,7 @@ * Author: Shyam Sundar S K */ +#include #include #include #include "pmf.h" @@ -16,9 +17,14 @@ /* Policy binary actions sampling frequency (in ms) */ static int pb_actions_ms = MSEC_PER_SEC; +/* Sideload policy binaries to debug policy failures */ +static bool pb_side_load; + #ifdef CONFIG_AMD_PMF_DEBUG module_param(pb_actions_ms, int, 0644); MODULE_PARM_DESC(pb_actions_ms, "Policy binary actions sampling frequency (default = 1000ms)"); +module_param(pb_side_load, bool, 0444); +MODULE_PARM_DESC(pb_side_load, "Sideload policy binaries debug policy failures"); #endif static const uuid_t amd_pmf_ta_uuid = UUID_INIT(0x6fd93b77, 0x3fb8, 0x524d, @@ -269,6 +275,48 @@ static int amd_pmf_start_policy_engine(struct amd_pmf_dev *dev) return 0; } +#ifdef CONFIG_AMD_PMF_DEBUG +static ssize_t amd_pmf_get_pb_data(struct file *filp, const char __user *buf, + size_t length, loff_t *pos) +{ + struct amd_pmf_dev *dev = filp->private_data; + int ret; + + /* Policy binary size cannot exceed POLICY_BUF_MAX_SZ */ + if (length > POLICY_BUF_MAX_SZ || length == 0) + return -EINVAL; + + dev->policy_sz = length; + if (copy_from_user(dev->policy_buf, buf, dev->policy_sz)) + return -EFAULT; + + ret = amd_pmf_start_policy_engine(dev); + if (ret) + return -EINVAL; + + return length; +} + +static const struct file_operations pb_fops = { + .write = amd_pmf_get_pb_data, + .open = simple_open, +}; + +static void amd_pmf_open_pb(struct amd_pmf_dev *dev, struct dentry *debugfs_root) +{ + dev->esbin = debugfs_create_dir("pb", debugfs_root); + debugfs_create_file("update_policy", 0644, dev->esbin, dev, &pb_fops); +} + +static void amd_pmf_remove_pb(struct amd_pmf_dev *dev) +{ + debugfs_remove_recursive(dev->esbin); +} +#else +static void amd_pmf_open_pb(struct amd_pmf_dev *dev, struct dentry *debugfs_root) {} +static void amd_pmf_remove_pb(struct amd_pmf_dev *dev) {} +#endif + static int amd_pmf_get_bios_buffer(struct amd_pmf_dev *dev) { dev->policy_buf = kzalloc(dev->policy_sz, GFP_KERNEL); @@ -281,6 +329,9 @@ static int amd_pmf_get_bios_buffer(struct amd_pmf_dev *dev) memcpy(dev->policy_buf, dev->policy_base, dev->policy_sz); + if (pb_side_load) + amd_pmf_open_pb(dev, dev->dbgfs_dir); + return amd_pmf_start_policy_engine(dev); } @@ -382,6 +433,9 @@ int amd_pmf_init_smart_pc(struct amd_pmf_dev *dev) void amd_pmf_deinit_smart_pc(struct amd_pmf_dev *dev) { + if (pb_side_load) + amd_pmf_remove_pb(dev); + kfree(dev->prev_data); kfree(dev->policy_buf); cancel_delayed_work_sync(&dev->pb_work); From patchwork Fri Nov 17 08:07:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shyam Sundar S K X-Patchwork-Id: 744790 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="fCZyviTS" Received: from NAM11-CO1-obe.outbound.protection.outlook.com (mail-co1nam11on2050.outbound.protection.outlook.com [40.107.220.50]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 91E45A8; Fri, 17 Nov 2023 00:11:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Wd9yS28RO8lWz5qpZ7GWZLwtJzW5svKA8xzlwgj39GI+f8IIzG0SZVd0z8OzawvaBKMtrmZOb6PEkEOJlTPRteult+U9thiuHQliTXeq01ZM/q1qc9Fx0LfEjC3nd5fTNcNYyDnzvnUj3U8bFDAhW2iWSsoVDRdBUaJQinmkesMeN9opsqMR9oIDT5V/hO2+EtRrJDOB4xTa7GNbHeyO3CMJusrQwx7pTUErvTOdoLkvMukkBDT02zwNhhzBZjaTEBYb63m+ki/LWTLi9bfZokbq3Xr0TSoYXfQZ7H9C0eL1vZikMbC38emATyOq5yUiMkGbi4KsTD7R34z+wBAgZg== ARC-Message-Signature: i=1; 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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SN1PEPF000252A0.mail.protection.outlook.com (10.167.242.7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7025.12 via Frontend Transport; Fri, 17 Nov 2023 08:11:52 +0000 Received: from jatayu.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.32; Fri, 17 Nov 2023 02:11:48 -0600 From: Shyam Sundar S K To: , , , , , CC: , , , , "Shyam Sundar S K" Subject: [PATCH v5 13/17] platform/x86/amd/pmf: Add PMF-AMDGPU get interface Date: Fri, 17 Nov 2023 13:37:43 +0530 Message-ID: <20231117080747.3643990-14-Shyam-sundar.S-k@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231117080747.3643990-1-Shyam-sundar.S-k@amd.com> References: <20231117080747.3643990-1-Shyam-sundar.S-k@amd.com> Precedence: bulk X-Mailing-List: linux-input@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000252A0:EE_|DS7PR12MB5717:EE_ X-MS-Office365-Filtering-Correlation-Id: 74380d76-9b90-4a93-9584-08dbe744db0d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2023 08:11:52.1325 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 74380d76-9b90-4a93-9584-08dbe744db0d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000252A0.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5717 In order to provide GPU inputs to TA for the Smart PC solution to work, we need to have interface between the PMF driver and the AMDGPU driver. Add the initial code path for get interface from AMDGPU. Co-developed-by: Mario Limonciello Signed-off-by: Mario Limonciello Signed-off-by: Shyam Sundar S K --- drivers/platform/x86/amd/pmf/core.c | 3 +- drivers/platform/x86/amd/pmf/pmf.h | 18 +++++++ drivers/platform/x86/amd/pmf/spc.c | 41 ++++++++++++++ drivers/platform/x86/amd/pmf/tee-if.c | 77 +++++++++++++++++++++++++++ 4 files changed, 138 insertions(+), 1 deletion(-) diff --git a/drivers/platform/x86/amd/pmf/core.c b/drivers/platform/x86/amd/pmf/core.c index 4b8156033fa6..9b14a997cd48 100644 --- a/drivers/platform/x86/amd/pmf/core.c +++ b/drivers/platform/x86/amd/pmf/core.c @@ -411,6 +411,7 @@ static int amd_pmf_probe(struct platform_device *pdev) } dev->cpu_id = rdev->device; + dev->root = rdev; err = amd_smn_read(0, AMD_PMF_BASE_ADDR_LO, &val); if (err) { @@ -482,4 +483,4 @@ module_platform_driver(amd_pmf_driver); MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("AMD Platform Management Framework Driver"); -MODULE_SOFTDEP("pre: amdtee"); +MODULE_SOFTDEP("pre: amdtee amdgpu"); diff --git a/drivers/platform/x86/amd/pmf/pmf.h b/drivers/platform/x86/amd/pmf/pmf.h index 8712299ad52b..525308519fa3 100644 --- a/drivers/platform/x86/amd/pmf/pmf.h +++ b/drivers/platform/x86/amd/pmf/pmf.h @@ -11,7 +11,11 @@ #ifndef PMF_H #define PMF_H +#include +#include #include +#include +#include #include #define POLICY_BUF_MAX_SZ 0x4b000 @@ -83,6 +87,8 @@ #define TA_OUTPUT_RESERVED_MEM 906 #define MAX_OPERATION_PARAMS 4 +#define MAX_SUPPORTED_DISPLAY 4 + /* AMD PMF BIOS interfaces */ struct apmf_verify_interface { u16 size; @@ -194,6 +200,15 @@ enum power_modes { POWER_MODE_MAX, }; +struct amd_gpu_pmf_data { + struct pci_dev *gpu_dev; + struct backlight_device *raw_bd; + struct thermal_cooling_device *cooling_dev; + enum drm_connector_status con_status[MAX_SUPPORTED_DISPLAY]; + int display_count; + int connector_type[MAX_SUPPORTED_DISPLAY]; +}; + struct amd_pmf_dev { void __iomem *regbase; void __iomem *smu_virt_addr; @@ -228,9 +243,12 @@ struct amd_pmf_dev { void *shbuf; struct delayed_work pb_work; struct pmf_action_table *prev_data; + struct amd_gpu_pmf_data gfx_data; u64 policy_addr; void *policy_base; bool smart_pc_enabled; + struct pci_dev *root; + struct drm_device *drm_dev; }; struct apmf_sps_prop_granular { diff --git a/drivers/platform/x86/amd/pmf/spc.c b/drivers/platform/x86/amd/pmf/spc.c index 959146fd483f..47ec563088b8 100644 --- a/drivers/platform/x86/amd/pmf/spc.c +++ b/drivers/platform/x86/amd/pmf/spc.c @@ -44,6 +44,10 @@ void amd_pmf_dump_ta_inputs(struct amd_pmf_dev *dev, struct ta_pmf_enact_table * dev_dbg(dev->dev, "Max C0 Residency: %u\n", in->ev_info.max_c0residency); dev_dbg(dev->dev, "GFX Busy: %u\n", in->ev_info.gfx_busy); dev_dbg(dev->dev, "Connected Display Count: %u\n", in->ev_info.monitor_count); + dev_dbg(dev->dev, "Primary Display Type: %s\n", + drm_get_connector_type_name(in->ev_info.display_type)); + dev_dbg(dev->dev, "Primary Display State: %s\n", in->ev_info.display_state ? + "Connected" : "disconnected/unknown"); dev_dbg(dev->dev, "LID State: %s\n", in->ev_info.lid_state ? "close" : "open"); dev_dbg(dev->dev, "==== TA inputs END ====\n"); } @@ -146,6 +150,41 @@ static int amd_pmf_get_slider_info(struct amd_pmf_dev *dev, struct ta_pmf_enact_ return 0; } +static int amd_pmf_get_gfx_data(struct amd_pmf_dev *pmf) +{ + struct drm_connector_list_iter iter; + struct drm_connector *connector; + int i = 0; + + /* Reset the count to zero */ + pmf->gfx_data.display_count = 0; + + drm_connector_list_iter_begin(pmf->drm_dev, &iter); + drm_for_each_connector_iter(connector, &iter) { + if (connector->status == connector_status_connected) + pmf->gfx_data.display_count++; + if (connector->status != pmf->gfx_data.con_status[i]) + pmf->gfx_data.con_status[i] = connector->status; + if (connector->connector_type != pmf->gfx_data.connector_type[i]) + pmf->gfx_data.connector_type[i] = connector->connector_type; + + i++; + if (i >= MAX_SUPPORTED_DISPLAY) + break; + } + drm_connector_list_iter_end(&iter); + + return 0; +} + +static void amd_pmf_get_gpu_info(struct amd_pmf_dev *dev, struct ta_pmf_enact_table *in) +{ + amd_pmf_get_gfx_data(dev); + in->ev_info.monitor_count = dev->gfx_data.display_count; + in->ev_info.display_type = dev->gfx_data.connector_type[0]; + in->ev_info.display_state = dev->gfx_data.con_status[0]; +} + void amd_pmf_populate_ta_inputs(struct amd_pmf_dev *dev, struct ta_pmf_enact_table *in) { /* TA side lid open is 1 and close is 0, hence the ! here */ @@ -154,4 +193,6 @@ void amd_pmf_populate_ta_inputs(struct amd_pmf_dev *dev, struct ta_pmf_enact_tab amd_pmf_get_smu_info(dev, in); amd_pmf_get_battery_info(dev, in); amd_pmf_get_slider_info(dev, in); + if (dev->drm_dev) + amd_pmf_get_gpu_info(dev, in); } diff --git a/drivers/platform/x86/amd/pmf/tee-if.c b/drivers/platform/x86/amd/pmf/tee-if.c index 81b1bd356e83..82ee2b1c627f 100644 --- a/drivers/platform/x86/amd/pmf/tee-if.c +++ b/drivers/platform/x86/amd/pmf/tee-if.c @@ -10,6 +10,7 @@ #include #include +#include #include #include "pmf.h" @@ -422,6 +423,60 @@ static void amd_pmf_tee_deinit(struct amd_pmf_dev *dev) tee_client_close_context(dev->tee_ctx); } +static int amd_pmf_gpu_get_cur_state(struct thermal_cooling_device *cooling_dev, + unsigned long *state) +{ + struct backlight_device *bd; + + if (acpi_video_get_backlight_type() != acpi_backlight_native) + return -ENODEV; + + bd = backlight_device_get_by_type(BACKLIGHT_RAW); + if (!bd) + return -ENODEV; + + *state = backlight_get_brightness(bd); + + return 0; +} + +static int amd_pmf_gpu_get_max_state(struct thermal_cooling_device *cooling_dev, + unsigned long *state) +{ + struct backlight_device *bd; + + if (acpi_video_get_backlight_type() != acpi_backlight_native) + return -ENODEV; + + bd = backlight_device_get_by_type(BACKLIGHT_RAW); + if (!bd) + return -ENODEV; + + if (backlight_is_blank(bd)) + *state = 0; + else + *state = bd->props.max_brightness; + + return 0; +} + +static const struct thermal_cooling_device_ops bd_cooling_ops = { + .get_max_state = amd_pmf_gpu_get_max_state, + .get_cur_state = amd_pmf_gpu_get_cur_state, +}; + +static int amd_pmf_get_gpu_handle(struct pci_dev *pdev, void *data) +{ + struct amd_pmf_dev *dev = data; + + if (pdev->vendor == PCI_VENDOR_ID_ATI && pdev->devfn == 0) { + dev->gfx_data.gpu_dev = pdev; + return 1; /* Stop walking */ + } + + return 0; /* Continue walking */ +} + int amd_pmf_init_smart_pc(struct amd_pmf_dev *dev) { int ret; @@ -433,10 +488,30 @@ int amd_pmf_init_smart_pc(struct amd_pmf_dev *dev) INIT_DELAYED_WORK(&dev->pb_work, amd_pmf_invoke_cmd); amd_pmf_set_dram_addr(dev); amd_pmf_get_bios_buffer(dev); + dev->prev_data = kzalloc(sizeof(*dev->prev_data), GFP_KERNEL); if (!dev->prev_data) return -ENOMEM; + pci_walk_bus(dev->root->bus, amd_pmf_get_gpu_handle, dev); + if (dev->gfx_data.gpu_dev) { + dev->drm_dev = pci_get_drvdata(dev->gfx_data.gpu_dev); + if (!dev->drm_dev) + return -EINVAL; + + if (acpi_video_get_backlight_type() != acpi_backlight_native) + return -ENODEV; + + dev->gfx_data.raw_bd = backlight_device_get_by_type(BACKLIGHT_RAW); + if (!dev->gfx_data.raw_bd) + return -ENODEV; + + dev->gfx_data.cooling_dev = thermal_cooling_device_register("pmf_gpu_bd", + NULL, &bd_cooling_ops); + if (IS_ERR(dev->gfx_data.cooling_dev)) + return -ENODEV; + } + return dev->smart_pc_enabled; } @@ -448,5 +523,7 @@ void amd_pmf_deinit_smart_pc(struct amd_pmf_dev *dev) kfree(dev->prev_data); kfree(dev->policy_buf); cancel_delayed_work_sync(&dev->pb_work); + if (dev->gfx_data.cooling_dev) + thermal_cooling_device_unregister(dev->gfx_data.cooling_dev); amd_pmf_tee_deinit(dev); } From patchwork Fri Nov 17 08:07:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Shyam Sundar S K X-Patchwork-Id: 744789 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="1LJI0Zo0" Received: from NAM11-DM6-obe.outbound.protection.outlook.com (mail-dm6nam11on2054.outbound.protection.outlook.com [40.107.223.54]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B0A22A8; Fri, 17 Nov 2023 00:12:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; 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Fri, 17 Nov 2023 08:11:58 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SN1PEPF000252A1.mail.protection.outlook.com (10.167.242.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7002.20 via Frontend Transport; Fri, 17 Nov 2023 08:11:58 +0000 Received: from jatayu.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.32; Fri, 17 Nov 2023 02:11:55 -0600 From: Shyam Sundar S K To: , , , , , CC: , , , , Basavaraj Natikar , Shyam Sundar S K Subject: [PATCH v5 15/17] HID: amd_sfh: rename float_to_int() to amd_sfh_float_to_int() Date: Fri, 17 Nov 2023 13:37:45 +0530 Message-ID: <20231117080747.3643990-16-Shyam-sundar.S-k@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231117080747.3643990-1-Shyam-sundar.S-k@amd.com> References: <20231117080747.3643990-1-Shyam-sundar.S-k@amd.com> Precedence: bulk X-Mailing-List: linux-input@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000252A1:EE_|IA0PR12MB8932:EE_ X-MS-Office365-Filtering-Correlation-Id: db188a2c-a166-4afc-f07d-08dbe744df04 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2023 08:11:58.7867 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: db188a2c-a166-4afc-f07d-08dbe744df04 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000252A1.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8932 From: Basavaraj Natikar Current amd_sfh driver has float_to_int() to convert units from float to int. This is fine until this function gets called outside of the current scope of file. Add a prefix "amd_sfh" to float_to_int() so that function represents the driver name. This function will be called by multiple callers in the next patch. Reviewed-by: Ilpo Järvinen Co-developed-by: Shyam Sundar S K Signed-off-by: Shyam Sundar S K Signed-off-by: Basavaraj Natikar --- drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c | 28 ++++++++++--------- .../amd-sfh-hid/sfh1_1/amd_sfh_interface.h | 1 + 2 files changed, 16 insertions(+), 13 deletions(-) diff --git a/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c b/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c index 8a037de08e92..33fbdde8aff0 100644 --- a/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c +++ b/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c @@ -132,7 +132,7 @@ static void get_common_inputs(struct common_input_property *common, int report_i common->event_type = HID_USAGE_SENSOR_EVENT_DATA_UPDATED_ENUM; } -static int float_to_int(u32 flt32_val) +int amd_sfh_float_to_int(u32 flt32_val) { int fraction, shift, mantissa, sign, exp, zeropre; @@ -201,9 +201,9 @@ static u8 get_input_rep(u8 current_index, int sensor_idx, int report_id, OFFSET_SENSOR_DATA_DEFAULT; memcpy_fromio(&accel_data, sensoraddr, sizeof(struct sfh_accel_data)); get_common_inputs(&acc_input.common_property, report_id); - acc_input.in_accel_x_value = float_to_int(accel_data.acceldata.x) / 100; - acc_input.in_accel_y_value = float_to_int(accel_data.acceldata.y) / 100; - acc_input.in_accel_z_value = float_to_int(accel_data.acceldata.z) / 100; + acc_input.in_accel_x_value = amd_sfh_float_to_int(accel_data.acceldata.x) / 100; + acc_input.in_accel_y_value = amd_sfh_float_to_int(accel_data.acceldata.y) / 100; + acc_input.in_accel_z_value = amd_sfh_float_to_int(accel_data.acceldata.z) / 100; memcpy(input_report, &acc_input, sizeof(acc_input)); report_size = sizeof(acc_input); break; @@ -212,9 +212,9 @@ static u8 get_input_rep(u8 current_index, int sensor_idx, int report_id, OFFSET_SENSOR_DATA_DEFAULT; memcpy_fromio(&gyro_data, sensoraddr, sizeof(struct sfh_gyro_data)); get_common_inputs(&gyro_input.common_property, report_id); - gyro_input.in_angel_x_value = float_to_int(gyro_data.gyrodata.x) / 1000; - gyro_input.in_angel_y_value = float_to_int(gyro_data.gyrodata.y) / 1000; - gyro_input.in_angel_z_value = float_to_int(gyro_data.gyrodata.z) / 1000; + gyro_input.in_angel_x_value = amd_sfh_float_to_int(gyro_data.gyrodata.x) / 1000; + gyro_input.in_angel_y_value = amd_sfh_float_to_int(gyro_data.gyrodata.y) / 1000; + gyro_input.in_angel_z_value = amd_sfh_float_to_int(gyro_data.gyrodata.z) / 1000; memcpy(input_report, &gyro_input, sizeof(gyro_input)); report_size = sizeof(gyro_input); break; @@ -223,9 +223,9 @@ static u8 get_input_rep(u8 current_index, int sensor_idx, int report_id, OFFSET_SENSOR_DATA_DEFAULT; memcpy_fromio(&mag_data, sensoraddr, sizeof(struct sfh_mag_data)); get_common_inputs(&magno_input.common_property, report_id); - magno_input.in_magno_x = float_to_int(mag_data.magdata.x) / 100; - magno_input.in_magno_y = float_to_int(mag_data.magdata.y) / 100; - magno_input.in_magno_z = float_to_int(mag_data.magdata.z) / 100; + magno_input.in_magno_x = amd_sfh_float_to_int(mag_data.magdata.x) / 100; + magno_input.in_magno_y = amd_sfh_float_to_int(mag_data.magdata.y) / 100; + magno_input.in_magno_z = amd_sfh_float_to_int(mag_data.magdata.z) / 100; magno_input.in_magno_accuracy = mag_data.accuracy / 100; memcpy(input_report, &magno_input, sizeof(magno_input)); report_size = sizeof(magno_input); @@ -235,13 +235,15 @@ static u8 get_input_rep(u8 current_index, int sensor_idx, int report_id, OFFSET_SENSOR_DATA_DEFAULT; memcpy_fromio(&als_data, sensoraddr, sizeof(struct sfh_als_data)); get_common_inputs(&als_input.common_property, report_id); - als_input.illuminance_value = float_to_int(als_data.lux); + als_input.illuminance_value = amd_sfh_float_to_int(als_data.lux); memcpy_fromio(&binfo, mp2->vsbase, sizeof(struct sfh_base_info)); if (binfo.sbase.s_prop[ALS_IDX].sf.feat & 0x2) { als_input.light_color_temp = als_data.light_color_temp; - als_input.chromaticity_x_value = float_to_int(als_data.chromaticity_x); - als_input.chromaticity_y_value = float_to_int(als_data.chromaticity_y); + als_input.chromaticity_x_value = + amd_sfh_float_to_int(als_data.chromaticity_x); + als_input.chromaticity_y_value = + amd_sfh_float_to_int(als_data.chromaticity_y); } report_size = sizeof(als_input); diff --git a/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.h b/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.h index 656c3e95ef8c..75267b0fec70 100644 --- a/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.h +++ b/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.h @@ -166,4 +166,5 @@ struct hpd_status { void sfh_interface_init(struct amd_mp2_dev *mp2); void amd_sfh1_1_set_desc_ops(struct amd_mp2_ops *mp2_ops); +int amd_sfh_float_to_int(u32 flt32_val); #endif From patchwork Fri Nov 17 08:07:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shyam Sundar S K X-Patchwork-Id: 744788 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="UV8cPbkd" Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2041.outbound.protection.outlook.com [40.107.236.41]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EFB4CA8; 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Fri, 17 Nov 2023 08:12:47 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SN1PEPF000252A0.mail.protection.outlook.com (10.167.242.7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7025.12 via Frontend Transport; Fri, 17 Nov 2023 08:12:46 +0000 Received: from jatayu.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.32; Fri, 17 Nov 2023 02:12:35 -0600 From: Shyam Sundar S K To: , , , , , CC: , , , , Basavaraj Natikar , Shyam Sundar S K Subject: [PATCH v5 17/17] platform/x86/amd/pmf: Add PMF-AMDSFH interface for ALS Date: Fri, 17 Nov 2023 13:37:47 +0530 Message-ID: <20231117080747.3643990-18-Shyam-sundar.S-k@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231117080747.3643990-1-Shyam-sundar.S-k@amd.com> References: <20231117080747.3643990-1-Shyam-sundar.S-k@amd.com> Precedence: bulk X-Mailing-List: linux-input@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000252A0:EE_|LV2PR12MB5941:EE_ X-MS-Office365-Filtering-Correlation-Id: 91b7e894-6d2b-4f44-a855-08dbe744fbbb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2023 08:12:46.9604 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 91b7e894-6d2b-4f44-a855-08dbe744fbbb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000252A0.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5941 From: Basavaraj Natikar AMDSFH has information about the Ambient light via the Ambient Light Sensor (ALS) which is part of the AMD sensor fusion hub. Add PMF and AMDSFH interface to get this information. Reviewed-by: Mario Limonciello Co-developed-by: Shyam Sundar S K Signed-off-by: Shyam Sundar S K Signed-off-by: Basavaraj Natikar --- drivers/hid/amd-sfh-hid/amd_sfh_common.h | 1 + drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.c | 6 ++++++ .../amd-sfh-hid/sfh1_1/amd_sfh_interface.c | 19 +++++++++++++++++++ drivers/platform/x86/amd/pmf/spc.c | 9 ++++++++- include/linux/amd-pmf-io.h | 4 ++++ 5 files changed, 38 insertions(+), 1 deletion(-) diff --git a/drivers/hid/amd-sfh-hid/amd_sfh_common.h b/drivers/hid/amd-sfh-hid/amd_sfh_common.h index cd57037bf217..a1950bc6e6ce 100644 --- a/drivers/hid/amd-sfh-hid/amd_sfh_common.h +++ b/drivers/hid/amd-sfh-hid/amd_sfh_common.h @@ -39,6 +39,7 @@ struct amd_mp2_sensor_info { struct sfh_dev_status { bool is_hpd_present; + bool is_als_present; }; struct amd_mp2_dev { diff --git a/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.c b/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.c index 3dc652d41d7d..f2890d329459 100644 --- a/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.c +++ b/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.c @@ -77,6 +77,9 @@ static int amd_sfh_hid_client_deinit(struct amd_mp2_dev *privdata) case HPD_IDX: privdata->dev_en.is_hpd_present = false; break; + case ALS_IDX: + privdata->dev_en.is_als_present = false; + break; } if (cl_data->sensor_sts[i] == SENSOR_ENABLED) { @@ -188,6 +191,9 @@ static int amd_sfh1_1_hid_client_init(struct amd_mp2_dev *privdata) case HPD_IDX: privdata->dev_en.is_hpd_present = true; break; + case ALS_IDX: + privdata->dev_en.is_als_present = true; + break; } } dev_dbg(dev, "sid 0x%x (%s) status 0x%x\n", diff --git a/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.c b/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.c index c0f31efe4927..0ae087d5bc44 100644 --- a/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.c +++ b/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.c @@ -94,12 +94,31 @@ static int amd_sfh_hpd_info(u8 *user_present) return 0; } +static int amd_sfh_als_info(u32 *ambient_light) +{ + struct sfh_als_data als_data; + void __iomem *sensoraddr; + + if (!emp2 || !emp2->dev_en.is_als_present) + return -ENODEV; + + sensoraddr = emp2->vsbase + + (ALS_IDX * SENSOR_DATA_MEM_SIZE_DEFAULT) + + OFFSET_SENSOR_DATA_DEFAULT; + memcpy_fromio(&als_data, sensoraddr, sizeof(struct sfh_als_data)); + *ambient_light = amd_sfh_float_to_int(als_data.lux); + + return 0; +} + int amd_get_sfh_info(struct amd_sfh_info *sfh_info, enum sfh_message_type op) { if (sfh_info) { switch (op) { case MT_HPD: return amd_sfh_hpd_info(&sfh_info->user_present); + case MT_ALS: + return amd_sfh_als_info(&sfh_info->ambient_light); } } return -EINVAL; diff --git a/drivers/platform/x86/amd/pmf/spc.c b/drivers/platform/x86/amd/pmf/spc.c index 7f63973ab40e..07f6bd238aa2 100644 --- a/drivers/platform/x86/amd/pmf/spc.c +++ b/drivers/platform/x86/amd/pmf/spc.c @@ -51,6 +51,7 @@ void amd_pmf_dump_ta_inputs(struct amd_pmf_dev *dev, struct ta_pmf_enact_table * "Connected" : "disconnected/unknown"); dev_dbg(dev->dev, "LID State: %s\n", in->ev_info.lid_state ? "close" : "open"); dev_dbg(dev->dev, "User Presence: %s\n", in->ev_info.user_present ? "Present" : "Away"); + dev_dbg(dev->dev, "Ambient Light: %d\n", in->ev_info.ambient_light); dev_dbg(dev->dev, "==== TA inputs END ====\n"); } #else @@ -190,8 +191,14 @@ static void amd_pmf_get_gpu_info(struct amd_pmf_dev *dev, struct ta_pmf_enact_ta static void amd_pmf_get_sensor_info(struct amd_pmf_dev *dev, struct ta_pmf_enact_table *in) { struct amd_sfh_info sfh_info; + int ret; - /* get HPD data */ + /* Get ALS data */ + ret = amd_get_sfh_info(&sfh_info, MT_ALS); + if (!ret) + in->ev_info.ambient_light = sfh_info.ambient_light; + + /* Get HPD data */ amd_get_sfh_info(&sfh_info, MT_HPD); switch (sfh_info.user_present) { case SFH_NOT_DETECTED: diff --git a/include/linux/amd-pmf-io.h b/include/linux/amd-pmf-io.h index 5b6d29d36922..b4f818205216 100644 --- a/include/linux/amd-pmf-io.h +++ b/include/linux/amd-pmf-io.h @@ -17,9 +17,11 @@ /** * enum sfh_message_type - Query the SFH message type * @MT_HPD: Message ID to know the Human presence info from MP2 FW + * @MT_ALS: Message ID to know the Ambient light info from MP2 FW */ enum sfh_message_type { MT_HPD, + MT_ALS, }; /** @@ -36,9 +38,11 @@ enum sfh_hpd_info { /** * struct amd_sfh_info - get HPD sensor info from MP2 FW + * @ambient_light: Populates the ambient light information * @user_present: Populates the user presence information */ struct amd_sfh_info { + u32 ambient_light; u8 user_present; };