From patchwork Tue Nov 14 20:05:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alisa-Dariana Roman X-Patchwork-Id: 744160 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7C8135EE3; Tue, 14 Nov 2023 20:06:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="mLHje3qz" Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [IPv6:2a00:1450:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E694B11F; Tue, 14 Nov 2023 12:06:12 -0800 (PST) Received: by mail-ej1-x631.google.com with SMTP id a640c23a62f3a-9d10f94f70bso884807966b.3; Tue, 14 Nov 2023 12:06:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1699992371; x=1700597171; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=z7Mr2ZgTh2/vo8hRXNB8ZpBVrsMPOFq+JrIplGgPEZQ=; b=mLHje3qzOJtzf6X8BbyUeRFI5u10JuhtLRpbMlwkXcb4m9lP7O9UOzkcFtD6Rek5gA p89abIqwmHSQKr8oW4FRnj/eJ4iWqRXEp5MqQYsAPL9L5PA3fGdsZwvzIWYoXbjSvBxb MOBdG75EEx3XfWsZwB7Mv3WdXMopsJMd3MmwMUH6KIQSOEBOPirkpoZHN7HHCxElbuHJ zgCAKR7mEo4eCuu2aH+q7eVhq3PHf1qLv0mfDMzKzSrE8HY8WOxnjsQq/lCu7ctlSGkB ahI9EvHQIct05n5MHcDXVX8XbdsQUPYHYI5o8+zq6asENc1nxVUjF1lidB42AsTn2uUK REFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699992371; x=1700597171; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=z7Mr2ZgTh2/vo8hRXNB8ZpBVrsMPOFq+JrIplGgPEZQ=; b=giAY/y2cibrcqBmenOQI/B7FqUWYw5n64/C91badmD3kPVhctKfewFPJrHCzFm3aKx Yac2sASLDYYZLP13TnGjenHZt/quSn4Mtl81TNjSpCfHcw/BoJVkF+7mzf7wovV3q8Fy BU9aOLMbQJ/hFiMj71jI6lpcYTjRcDM8on95XjlIdHsp4b7aDOc2RHPYK1lNtwVGLQSm 8tb+cGWY4O0FcaPt1d+uA5VBt7wZSdFap4KW3/Bz3lg3xdWY2VLTeJuo/9WQYoC2FXBM 5K4CxRvv1WmcKSRcIxfM8ocoX4DJvVPZb7z8xFkxCA3ixeJA0BPJOk3h/mnGnY0SfT8i K4Iw== X-Gm-Message-State: AOJu0YxQi+a8bCOvmzEC3+WoIqUP8+t3dtyJMYdNafiA6aKEmBthhkIy 3lJm6USQmBoDjP1c26GBvLR3PWGRxx0WxbM4duY= X-Google-Smtp-Source: AGHT+IE2tak691DnNaPukHISODyxkOWNm3bwSIuhQwCzZQvTU7H+vTG6Q3hWxOVR6Y2wiN8yYL2KrA== X-Received: by 2002:a17:906:3942:b0:9e3:b88c:d735 with SMTP id g2-20020a170906394200b009e3b88cd735mr7444263eje.61.1699992371281; Tue, 14 Nov 2023 12:06:11 -0800 (PST) Received: from spiri.. ([5.2.194.157]) by smtp.gmail.com with ESMTPSA id me19-20020a170906aed300b009ae587ce133sm5984429ejb.188.2023.11.14.12.06.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 12:06:10 -0800 (PST) From: Alisa-Dariana Roman X-Google-Original-From: Alisa-Dariana Roman To: Alisa-Dariana Roman , Krzysztof Kozlowski , Michael Hennerich Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Lars-Peter Clausen , Michael Hennerich , Alexandru Tachici , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH v2 1/4] dt-bindings: iio: adc: ad7192: Add properties Date: Tue, 14 Nov 2023 22:05:30 +0200 Message-Id: <20231114200533.137995-2-alisa.roman@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231114200533.137995-1-alisa.roman@analog.com> References: <20231114200533.137995-1-alisa.roman@analog.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Document properties used for clock configuration. Signed-off-by: Alisa-Dariana Roman --- .../devicetree/bindings/iio/adc/adi,ad7192.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml index 16def2985ab4..9b59d6eea368 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml @@ -80,6 +80,16 @@ properties: and when chop is disabled. type: boolean + adi,clock-xtal: + description: | + External crystal connected from MCLK1 to MCLK2. + type: boolean + + adi,int-clock-output-enable: + description: | + Internal 4.92 MHz clock available on MCLK2 pin. + type: boolean + bipolar: description: see Documentation/devicetree/bindings/iio/adc/adc.yaml type: boolean From patchwork Tue Nov 14 20:05:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alisa-Dariana Roman X-Patchwork-Id: 743846 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 379B935EE8; Tue, 14 Nov 2023 20:06:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="N1uydid1" Received: from mail-ej1-x633.google.com (mail-ej1-x633.google.com [IPv6:2a00:1450:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C8E2A181; Tue, 14 Nov 2023 12:06:28 -0800 (PST) Received: by mail-ej1-x633.google.com with SMTP id a640c23a62f3a-9c3aec5f326so26806466b.1; Tue, 14 Nov 2023 12:06:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1699992387; x=1700597187; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oyyZDkc0Wj7minjSP1UoKOglPc5es2p26jbnUyN/6fU=; b=N1uydid1O9ZGquiYGOSzGnU9i2KC1dQjKXguS8q03gURiI6mBC13Ep87rk9hjDu9mu 5OcosoaAlS6xijwtzEDUFKyhx4KVpgiQpIEVC30AIJ58NUdkXw7y1PQhHTsHlfXhF/+4 zBufxtfp49aH5yQlxXNpD+qzMYVE/UxsgoOum0cvHQ9utA11bCgtSNwnzSym3JGDAWus kqn6fsieTtEzDjPIlNRmn5+a++SOkrK6EkaWW7zhqLC8TdMLJB+40gNeXyAG+vu8xpSq bBoKjAme4qBqbIiE+DaLQRVEQ3hV9VWMqif3SoXBEMwzlHRi3obBii0K8M3h6WOoB1EQ LQOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699992387; x=1700597187; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oyyZDkc0Wj7minjSP1UoKOglPc5es2p26jbnUyN/6fU=; b=jP/UvA6enjuGMDTmNhCJNhlhXkeVXKL9iDm2S0qQ/H7XHNzbQL7JnQVgaaDSpvLI/1 GPMdVLuy5HogSuyalwsPs7ocXPXmo/Q847Ojqe+9SiUsLU5sfNhsJICaT8S6mYkgBEY+ Q/hJbc6maFSQr7jC1YOuFHuuokTvkEQAH7VVLSqxclYHz6t1rTaMSUnlLZBazBaIbHPt Y+6RPrCbQQOlBulhN91Mlbm/LVjayiU+qeIr0yDMacGvUff0fRBIE4Q8jPSo+ovWSOV0 RsE99+UfTPUqyHAmwh5WvNKsh0CX5U9WQBRtTGh97N6mIAddVDQI9RZRMoq/XWZ5aMpK cLww== X-Gm-Message-State: AOJu0YwOkCpa2pp/Nx8piqUvOpGIUZVft72D6/hqBcwTPKvw2wwaAU/7 QfqhZRL/cp2FAhmh9Ttpsz4= X-Google-Smtp-Source: AGHT+IH3MC4UIYYnqtCHmnf+EsCekcir3VXx1nA1PstT0HzLHjiliGG0jsH4HhgqXHacFGHXGESfhw== X-Received: by 2002:a17:907:9813:b0:9b2:be5e:3674 with SMTP id ji19-20020a170907981300b009b2be5e3674mr3614330ejc.36.1699992386810; Tue, 14 Nov 2023 12:06:26 -0800 (PST) Received: from spiri.. ([5.2.194.157]) by smtp.gmail.com with ESMTPSA id me19-20020a170906aed300b009ae587ce133sm5984429ejb.188.2023.11.14.12.06.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 12:06:26 -0800 (PST) From: Alisa-Dariana Roman X-Google-Original-From: Alisa-Dariana Roman To: Jonathan Cameron , Alisa-Dariana Roman Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Shevchenko , Lars-Peter Clausen , Michael Hennerich , Alexandru Tachici , Jonathan Cameron Subject: [PATCH v2 2/4] iio: adc: ad7192: Use device api Date: Tue, 14 Nov 2023 22:05:31 +0200 Message-Id: <20231114200533.137995-3-alisa.roman@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231114200533.137995-1-alisa.roman@analog.com> References: <20231114200533.137995-1-alisa.roman@analog.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Replace of.h and corresponding functions with preferred device specific functions. Also replace of_device_get_match_data() with spi_get_device_match_data(). Signed-off-by: Alisa-Dariana Roman Reviewed-by: Andy Shevchenko Reviewed-by: Nuno Sa --- drivers/iio/adc/ad7192.c | 32 +++++++++++++++----------------- 1 file changed, 15 insertions(+), 17 deletions(-) diff --git a/drivers/iio/adc/ad7192.c b/drivers/iio/adc/ad7192.c index adc3cbe92d6e..48e0357564af 100644 --- a/drivers/iio/adc/ad7192.c +++ b/drivers/iio/adc/ad7192.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include @@ -364,19 +363,19 @@ static inline bool ad7192_valid_external_frequency(u32 freq) freq <= AD7192_EXT_FREQ_MHZ_MAX); } -static int ad7192_of_clock_select(struct ad7192_state *st) +static int ad7192_device_clock_select(struct ad7192_state *st) { - struct device_node *np = st->sd.spi->dev.of_node; + struct device *dev = &st->sd.spi->dev; unsigned int clock_sel; clock_sel = AD7192_CLK_INT; /* use internal clock */ if (!st->mclk) { - if (of_property_read_bool(np, "adi,int-clock-output-enable")) + if (device_property_read_bool(dev, "adi,int-clock-output-enable")) clock_sel = AD7192_CLK_INT_CO; } else { - if (of_property_read_bool(np, "adi,clock-xtal")) + if (device_property_read_bool(dev, "adi,clock-xtal")) clock_sel = AD7192_CLK_EXT_MCLK1_2; else clock_sel = AD7192_CLK_EXT_MCLK2; @@ -385,9 +384,10 @@ static int ad7192_of_clock_select(struct ad7192_state *st) return clock_sel; } -static int ad7192_setup(struct iio_dev *indio_dev, struct device_node *np) +static int ad7192_setup(struct iio_dev *indio_dev) { struct ad7192_state *st = iio_priv(indio_dev); + struct device *dev = &st->sd.spi->dev; bool rej60_en, refin2_en; bool buf_en, bipolar, burnout_curr_en; unsigned long long scale_uv; @@ -416,26 +416,26 @@ static int ad7192_setup(struct iio_dev *indio_dev, struct device_node *np) st->conf = FIELD_PREP(AD7192_CONF_GAIN_MASK, 0); - rej60_en = of_property_read_bool(np, "adi,rejection-60-Hz-enable"); + rej60_en = device_property_read_bool(dev, "adi,rejection-60-Hz-enable"); if (rej60_en) st->mode |= AD7192_MODE_REJ60; - refin2_en = of_property_read_bool(np, "adi,refin2-pins-enable"); + refin2_en = device_property_read_bool(dev, "adi,refin2-pins-enable"); if (refin2_en && st->chip_info->chip_id != CHIPID_AD7195) st->conf |= AD7192_CONF_REFSEL; st->conf &= ~AD7192_CONF_CHOP; - buf_en = of_property_read_bool(np, "adi,buffer-enable"); + buf_en = device_property_read_bool(dev, "adi,buffer-enable"); if (buf_en) st->conf |= AD7192_CONF_BUF; - bipolar = of_property_read_bool(np, "bipolar"); + bipolar = device_property_read_bool(dev, "bipolar"); if (!bipolar) st->conf |= AD7192_CONF_UNIPOLAR; - burnout_curr_en = of_property_read_bool(np, - "adi,burnout-currents-enable"); + burnout_curr_en = + device_property_read_bool(dev, "adi,burnout-currents-enable"); if (burnout_curr_en && buf_en) { st->conf |= AD7192_CONF_BURN; } else if (burnout_curr_en) { @@ -1117,9 +1117,7 @@ static int ad7192_probe(struct spi_device *spi) } st->int_vref_mv = ret / 1000; - st->chip_info = of_device_get_match_data(&spi->dev); - if (!st->chip_info) - st->chip_info = (void *)spi_get_device_id(spi)->driver_data; + st->chip_info = spi_get_device_match_data(spi); indio_dev->name = st->chip_info->name; indio_dev->modes = INDIO_DIRECT_MODE; indio_dev->channels = st->chip_info->channels; @@ -1140,7 +1138,7 @@ static int ad7192_probe(struct spi_device *spi) if (IS_ERR(st->mclk)) return PTR_ERR(st->mclk); - st->clock_sel = ad7192_of_clock_select(st); + st->clock_sel = ad7192_device_clock_select(st); if (st->clock_sel == AD7192_CLK_EXT_MCLK1_2 || st->clock_sel == AD7192_CLK_EXT_MCLK2) { @@ -1152,7 +1150,7 @@ static int ad7192_probe(struct spi_device *spi) } } - ret = ad7192_setup(indio_dev, spi->dev.of_node); + ret = ad7192_setup(indio_dev); if (ret) return ret; From patchwork Tue Nov 14 20:05:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alisa-Dariana Roman X-Patchwork-Id: 744159 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F46135EE3; Tue, 14 Nov 2023 20:06:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="OVfJVElC" Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [IPv6:2a00:1450:4864:20::529]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A4FF18A; Tue, 14 Nov 2023 12:06:33 -0800 (PST) Received: by mail-ed1-x529.google.com with SMTP id 4fb4d7f45d1cf-543456dbd7bso256216a12.1; Tue, 14 Nov 2023 12:06:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1699992391; x=1700597191; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MHqmZQtpCfDNx8aSq2U41jb/Kk8YGjCcXQnDvNvG/4s=; b=OVfJVElCIQ5vT7ELyh6MJYqdumoRb/n66EPzsLu/nf3UvnaooVlOJTMcNol2j80q1V UwwSWaElRq33uSneLbyO/ZhocD2ITY+iCTBJD/yvRYJtF55MW/d6LqGjewzOBiucXNDp pEEaag8OtxzLQ3gWdzc8CSY4S2+TM6YJoLHRfoF0dV4FjAMXfSxNIuK65UNNtXNLICqV C9XlqrtWIa5IOeXuCzLBP1g0WVZPmyEcln/Lb5uPy9tSx4oLyrdtcjNeRsdnMKy/uhST fWwOlb38q/s0IJDv4+jCczWGCkQVdHCsRsVx2uDr3Mzxw9YJu8FsPHOKTF8UEUbETIa7 ApuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699992391; x=1700597191; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MHqmZQtpCfDNx8aSq2U41jb/Kk8YGjCcXQnDvNvG/4s=; b=Bs7S1uwqD2KLQh1Fi9ewnXXJJONLZmTY7haGKKsB2KsR5o9vSnkyZsQL9xcwE0x5Pf wYNJ9TXbTRQMs2ce2WYON6YTsVs5F28wuYwUxqr6RznpzNnAChO6syUr/c6Si+vZ/tRc KxoojHxRh2KofMnK03Jh+U54/EO3htsec1NBuZs0UgAmcV4pAK64lDzGd+FV/m/zGExg 5NZ2vyQR685DMzDgSx9h8m/R/QuFySJMKC2Wq6DjeUEwN4FmO1w9V2w0DN/0BKEVa9/L yADg9kuffLqh6Vkrzl1D3ycQ2rpBZ/hyRkSkL9pqhdpkTh9DPITeMy774VLj/i0OAHP9 5luQ== X-Gm-Message-State: AOJu0Yy4Lgev3FVCoiMetHM39UDK6QLWC/zRjWvcjJXzPmorYLSJ01i9 qxkbmcnPqbiufDzAPzZlXiQ= X-Google-Smtp-Source: AGHT+IGYcF3sw91u9Mb8PeF1/f2eeg0FghwvAfphmlFXB39+fUZYeYYr62DYmnd4AMVp06QWUmxzkg== X-Received: by 2002:a17:906:da1d:b0:9f2:8220:3f57 with SMTP id fi29-20020a170906da1d00b009f282203f57mr157979ejb.8.1699992391605; Tue, 14 Nov 2023 12:06:31 -0800 (PST) Received: from spiri.. ([5.2.194.157]) by smtp.gmail.com with ESMTPSA id me19-20020a170906aed300b009ae587ce133sm5984429ejb.188.2023.11.14.12.06.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 12:06:31 -0800 (PST) From: Alisa-Dariana Roman X-Google-Original-From: Alisa-Dariana Roman To: Alisa-Dariana Roman , Krzysztof Kozlowski , Michael Hennerich Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alexandru Tachici , Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH v2 3/4] dt-bindings: iio: adc: ad7192: Add AD7194 support Date: Tue, 14 Nov 2023 22:05:32 +0200 Message-Id: <20231114200533.137995-4-alisa.roman@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231114200533.137995-1-alisa.roman@analog.com> References: <20231114200533.137995-1-alisa.roman@analog.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Unlike the other AD719Xs, AD7194 has configurable differential channels. The default configuration for these channels can be changed from the devicetree. Also add an example for AD7194 devicetree. Signed-off-by: Alisa-Dariana Roman --- .../bindings/iio/adc/adi,ad7192.yaml | 74 +++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml index 9b59d6eea368..800b396f5993 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml @@ -21,6 +21,7 @@ properties: - adi,ad7190 - adi,ad7192 - adi,ad7193 + - adi,ad7194 - adi,ad7195 reg: @@ -108,6 +109,42 @@ required: allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# + - if: + properties: + compatible: + const: adi,ad7194 + then: + properties: + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + patternProperties: + "^channel@([0-7a-f])$": + type: object + $ref: adc.yaml + unevaluatedProperties: false + + properties: + reg: + description: The channel index. + minimum: 0 + maximum: 7 + + diff-channels: + description: | + The differential channel pair for Ad7194 configurable channels. The + first channel is the positive input, the second channel is the + negative input. + items: + minimum: 1 + maximum: 16 + + required: + - reg + - diff-channels unevaluatedProperties: false @@ -137,3 +174,40 @@ examples: adi,burnout-currents-enable; }; }; + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,ad7194"; + reg = <0>; + spi-max-frequency = <1000000>; + spi-cpol; + spi-cpha; + clocks = <&ad7192_mclk>; + clock-names = "mclk"; + interrupts = <25 0x2>; + interrupt-parent = <&gpio>; + dvdd-supply = <&dvdd>; + avdd-supply = <&avdd>; + vref-supply = <&vref>; + + adi,refin2-pins-enable; + adi,rejection-60-Hz-enable; + adi,buffer-enable; + adi,burnout-currents-enable; + + channel@0 { + reg = <0>; + diff-channels = <1 6>; + }; + + channel@1 { + reg = <1>; + diff-channels = <2 3>; + }; + }; + }; From patchwork Tue Nov 14 20:05:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alisa-Dariana Roman X-Patchwork-Id: 743845 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B8B8035EE5; Tue, 14 Nov 2023 20:06:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="kHYNKJ0N" Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B4F3124; Tue, 14 Nov 2023 12:06:40 -0800 (PST) Received: by mail-lf1-x129.google.com with SMTP id 2adb3069b0e04-507ad511315so8678546e87.0; Tue, 14 Nov 2023 12:06:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1699992398; x=1700597198; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jzxakurDFhuOGXvo9vBEbL3SYK0M5/oRNZ8JnfWuaeI=; b=kHYNKJ0NNj7JKW4mX+xqeLKIK0uKAMJWwdTRRW9u/zSLEPfPZ3SlNVW1DOfw9IC3Qy 2XgrRGQVSqIPUMKIwSdyvFtIoOQ4/aTezPzfTbH2dontSOF1d9q3lD33/u2dBgRBgjzJ TmW+7ZBQRm/fndTmQPaQQ93WPlPDUOfifQlmV/lVZ0PH9sQQrlm1wW/riOCcbOdYjSSH I4ieof5y0XkKjtAk8F7fIPPKnFGwlrgbfNVlwIQApGcJ7OIDhOv9kaPPdrcgEtPdilyB AIFEsKATbygqaPnQZM/G6tbmtWGVoSU1L5tXqXhV1W/mgFQWs5LUsBhDJqpKa3hpdfgh QXGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699992398; x=1700597198; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jzxakurDFhuOGXvo9vBEbL3SYK0M5/oRNZ8JnfWuaeI=; b=svSw0n/WIbBKGnBPTAHKmOe3glRLieNYkCJ64SK9U2vORlanhZ9zDEqPqfuBv1AMlC 5yc9Zf4qPB+t1lM2ZwhIcFVEmnK4vpW1AeGzbh0U8MbR23k038W8iyf+4mZLoNAlBgnl uP3zfeVqRqyL7TaCHmm88jKV8qJQkQW2YeyBdCGMva/hHGeBvi9LWEL3lrZIs32RGsfp wMao6cr1t02K1wOvQhLkgnR0ZvmV2Z9VkEt+523CKnHk4nSJaLNoQaqhBUU00mMK9CAy 9LXPBUVhoOjEQrzYZQlPpyuuZUcWIu9T4dadoH5a+yt5yyxU7qOB/sFtb6+Fq5gZy6xp 4PzQ== X-Gm-Message-State: AOJu0YxmoJILJPz75mGrR3lV2njWi8MdJmrhM1milpRauo6i4p0y2/Y6 E1yMUdx9AuRyhZ8SIgsIJMs= X-Google-Smtp-Source: AGHT+IHv+HkF9SxXDR9kYtk+0rkvDn+zNvMDjKRgzljxGkAIYywFP2s9pZ8mqEjVLz2sFBjn98aOAA== X-Received: by 2002:a19:5017:0:b0:502:ff3b:766f with SMTP id e23-20020a195017000000b00502ff3b766fmr6978545lfb.6.1699992398234; Tue, 14 Nov 2023 12:06:38 -0800 (PST) Received: from spiri.. ([5.2.194.157]) by smtp.gmail.com with ESMTPSA id me19-20020a170906aed300b009ae587ce133sm5984429ejb.188.2023.11.14.12.06.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 12:06:37 -0800 (PST) From: Alisa-Dariana Roman X-Google-Original-From: Alisa-Dariana Roman To: Jonathan Cameron , Alisa-Dariana Roman Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jonathan Cameron , Lars-Peter Clausen , Michael Hennerich , Alexandru Tachici Subject: [PATCH v2 4/4] iio: adc: ad7192: Add AD7194 support Date: Tue, 14 Nov 2023 22:05:33 +0200 Message-Id: <20231114200533.137995-5-alisa.roman@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231114200533.137995-1-alisa.roman@analog.com> References: <20231114200533.137995-1-alisa.roman@analog.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Unlike the other AD719Xs, AD7194 has configurable differential channels. The default configuration for these channels can be changed from the devicetree. The default configuration is hardcoded in order to have a stable number of channels. Also modify config AD7192 description for better scaling. Signed-off-by: Alisa-Dariana Roman --- drivers/iio/adc/Kconfig | 11 ++- drivers/iio/adc/ad7192.c | 144 ++++++++++++++++++++++++++++++++++++++- 2 files changed, 150 insertions(+), 5 deletions(-) diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 1e2b7a2c67c6..05344054b88e 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -55,12 +55,17 @@ config AD7124 called ad7124. config AD7192 - tristate "Analog Devices AD7190 AD7192 AD7193 AD7195 ADC driver" + tristate "Analog Devices AD7192 and similar ADC driver" depends on SPI select AD_SIGMA_DELTA help - Say yes here to build support for Analog Devices AD7190, - AD7192, AD7193 or AD7195 SPI analog to digital converters (ADC). + Say yes here to build support for Analog Devices SPI analog to digital + converters (ADC): + - AD7190 + - AD7192 + - AD7193 + - AD7194 + - AD7195 If unsure, say N (but it's safe to say "Y"). To compile this driver as a module, choose M here: the diff --git a/drivers/iio/adc/ad7192.c b/drivers/iio/adc/ad7192.c index 48e0357564af..0532678ad665 100644 --- a/drivers/iio/adc/ad7192.c +++ b/drivers/iio/adc/ad7192.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * AD7190 AD7192 AD7193 AD7195 SPI ADC driver + * AD7190 AD7192 AD7193 AD7194 AD7195 SPI ADC driver * * Copyright 2011-2015 Analog Devices Inc. */ @@ -125,10 +125,39 @@ #define AD7193_CH_AIN8 0x480 /* AIN7 - AINCOM */ #define AD7193_CH_AINCOM 0x600 /* AINCOM - AINCOM */ +#define AD7194_CH_TEMP 0x100 /* Temp sensor */ +#define AD7194_CH_AIN1 0x400 /* AIN1 - AINCOM */ +#define AD7194_CH_AIN2 0x410 /* AIN2 - AINCOM */ +#define AD7194_CH_AIN3 0x420 /* AIN3 - AINCOM */ +#define AD7194_CH_AIN4 0x430 /* AIN4 - AINCOM */ +#define AD7194_CH_AIN5 0x440 /* AIN5 - AINCOM */ +#define AD7194_CH_AIN6 0x450 /* AIN6 - AINCOM */ +#define AD7194_CH_AIN7 0x460 /* AIN7 - AINCOM */ +#define AD7194_CH_AIN8 0x470 /* AIN8 - AINCOM */ +#define AD7194_CH_AIN9 0x480 /* AIN9 - AINCOM */ +#define AD7194_CH_AIN10 0x490 /* AIN10 - AINCOM */ +#define AD7194_CH_AIN11 0x4A0 /* AIN11 - AINCOM */ +#define AD7194_CH_AIN12 0x4B0 /* AIN12 - AINCOM */ +#define AD7194_CH_AIN13 0x4C0 /* AIN13 - AINCOM */ +#define AD7194_CH_AIN14 0x4D0 /* AIN14 - AINCOM */ +#define AD7194_CH_AIN15 0x4E0 /* AIN15 - AINCOM */ +#define AD7194_CH_AIN16 0x4F0 /* AIN16 - AINCOM */ +#define AD7194_CH_POS_MASK GENMASK(7, 4) +#define AD7194_CH_POS(x) FIELD_PREP(AD7194_CH_POS_MASK, (x)) +#define AD7194_CH_NEG_MASK GENMASK(3, 0) +#define AD7194_CH_NEG(x) FIELD_PREP(AD7194_CH_NEG_MASK, (x)) +#define AD7194_CH_DIFF(pos, neg) \ + (AD7194_CH_POS(pos) | AD7194_CH_NEG(neg)) +#define AD7194_CH_DIFF_START 0 +#define AD7194_CH_DIFF_NR 8 +#define AD7194_CH_AIN_START 1 +#define AD7194_CH_AIN_NR 16 + /* ID Register Bit Designations (AD7192_REG_ID) */ #define CHIPID_AD7190 0x4 #define CHIPID_AD7192 0x0 #define CHIPID_AD7193 0x2 +#define CHIPID_AD7194 0x3 #define CHIPID_AD7195 0x6 #define AD7192_ID_MASK GENMASK(3, 0) @@ -166,6 +195,7 @@ enum { ID_AD7190, ID_AD7192, ID_AD7193, + ID_AD7194, ID_AD7195, }; @@ -644,6 +674,15 @@ static const struct attribute_group ad7192_attribute_group = { .attrs = ad7192_attributes, }; +static struct attribute *ad7194_attributes[] = { + &iio_dev_attr_filter_low_pass_3db_frequency_available.dev_attr.attr, + NULL +}; + +static const struct attribute_group ad7194_attribute_group = { + .attrs = ad7194_attributes, +}; + static struct attribute *ad7195_attributes[] = { &iio_dev_attr_filter_low_pass_3db_frequency_available.dev_attr.attr, &iio_dev_attr_bridge_switch_en.dev_attr.attr, @@ -928,6 +967,16 @@ static const struct iio_info ad7192_info = { .update_scan_mode = ad7192_update_scan_mode, }; +static const struct iio_info ad7194_info = { + .read_raw = ad7192_read_raw, + .write_raw = ad7192_write_raw, + .write_raw_get_fmt = ad7192_write_raw_get_fmt, + .read_avail = ad7192_read_avail, + .attrs = &ad7194_attribute_group, + .validate_trigger = ad_sd_validate_trigger, + .update_scan_mode = ad7192_update_scan_mode, +}; + static const struct iio_info ad7195_info = { .read_raw = ad7192_read_raw, .write_raw = ad7192_write_raw, @@ -1017,6 +1066,35 @@ static const struct iio_chan_spec ad7193_channels[] = { IIO_CHAN_SOFT_TIMESTAMP(14), }; +static struct iio_chan_spec ad7194_channels[] = { + AD7193_DIFF_CHANNEL(0, 1, 2, 0x001), + AD7193_DIFF_CHANNEL(1, 3, 4, 0x023), + AD7193_DIFF_CHANNEL(2, 5, 6, 0x045), + AD7193_DIFF_CHANNEL(3, 7, 8, 0x067), + AD7193_DIFF_CHANNEL(4, 9, 10, 0x089), + AD7193_DIFF_CHANNEL(5, 11, 12, 0x0AB), + AD7193_DIFF_CHANNEL(6, 13, 14, 0x0CD), + AD7193_DIFF_CHANNEL(7, 15, 16, 0x0EF), + AD719x_TEMP_CHANNEL(8, AD7194_CH_TEMP), + AD7193_CHANNEL(9, 1, AD7194_CH_AIN1), + AD7193_CHANNEL(10, 2, AD7194_CH_AIN2), + AD7193_CHANNEL(11, 3, AD7194_CH_AIN3), + AD7193_CHANNEL(12, 4, AD7194_CH_AIN4), + AD7193_CHANNEL(13, 5, AD7194_CH_AIN5), + AD7193_CHANNEL(14, 6, AD7194_CH_AIN6), + AD7193_CHANNEL(15, 7, AD7194_CH_AIN7), + AD7193_CHANNEL(16, 8, AD7194_CH_AIN8), + AD7193_CHANNEL(17, 9, AD7194_CH_AIN9), + AD7193_CHANNEL(18, 10, AD7194_CH_AIN10), + AD7193_CHANNEL(19, 11, AD7194_CH_AIN11), + AD7193_CHANNEL(20, 12, AD7194_CH_AIN12), + AD7193_CHANNEL(21, 13, AD7194_CH_AIN13), + AD7193_CHANNEL(22, 14, AD7194_CH_AIN14), + AD7193_CHANNEL(23, 15, AD7194_CH_AIN15), + AD7193_CHANNEL(24, 16, AD7194_CH_AIN16), + IIO_CHAN_SOFT_TIMESTAMP(25), +}; + static const struct ad7192_chip_info ad7192_chip_info_tbl[] = { [ID_AD7190] = { .chip_id = CHIPID_AD7190, @@ -1039,6 +1117,13 @@ static const struct ad7192_chip_info ad7192_chip_info_tbl[] = { .num_channels = ARRAY_SIZE(ad7193_channels), .info = &ad7192_info, }, + [ID_AD7194] = { + .chip_id = CHIPID_AD7194, + .name = "ad7194", + .channels = ad7194_channels, + .num_channels = ARRAY_SIZE(ad7194_channels), + .info = &ad7194_info, + }, [ID_AD7195] = { .chip_id = CHIPID_AD7195, .name = "ad7195", @@ -1053,6 +1138,53 @@ static void ad7192_reg_disable(void *reg) regulator_disable(reg); } +static int ad7192_parse_channel(struct iio_dev *indio_dev, + struct fwnode_handle *child) +{ + u32 reg, ain[2]; + int ret; + + ret = fwnode_property_read_u32(child, "reg", ®); + if (ret) + return ret; + + if (!in_range(reg, AD7194_CH_DIFF_START, AD7194_CH_DIFF_NR)) + return -EINVAL; + + ret = fwnode_property_read_u32_array(child, "diff-channels", ain, + ARRAY_SIZE(ain)); + if (ret) + return ret; + + if (!in_range(ain[0], AD7194_CH_AIN_START, AD7194_CH_AIN_NR) || + !in_range(ain[1], AD7194_CH_AIN_START, AD7194_CH_AIN_NR)) + return -EINVAL; + + ad7194_channels[reg].channel = ain[0]; + ad7194_channels[reg].channel2 = ain[1]; + ad7194_channels[reg].address = AD7194_CH_DIFF(ain[0], ain[1]); + + return 0; +} + +static int ad7192_parse_channels(struct iio_dev *indio_dev) +{ + struct ad7192_state *st = iio_priv(indio_dev); + struct device *dev = &st->sd.spi->dev; + struct fwnode_handle *child; + int ret; + + device_for_each_child_node(dev, child) { + ret = ad7192_parse_channel(indio_dev, child); + if (ret) { + fwnode_handle_put(child); + return ret; + } + } + + return 0; +} + static int ad7192_probe(struct spi_device *spi) { struct ad7192_state *st; @@ -1150,6 +1282,12 @@ static int ad7192_probe(struct spi_device *spi) } } + if (st->chip_info->chip_id == CHIPID_AD7194) { + ret = ad7192_parse_channels(indio_dev); + if (ret) + return ret; + } + ret = ad7192_setup(indio_dev); if (ret) return ret; @@ -1161,6 +1299,7 @@ static const struct of_device_id ad7192_of_match[] = { { .compatible = "adi,ad7190", .data = &ad7192_chip_info_tbl[ID_AD7190] }, { .compatible = "adi,ad7192", .data = &ad7192_chip_info_tbl[ID_AD7192] }, { .compatible = "adi,ad7193", .data = &ad7192_chip_info_tbl[ID_AD7193] }, + { .compatible = "adi,ad7194", .data = &ad7192_chip_info_tbl[ID_AD7194] }, { .compatible = "adi,ad7195", .data = &ad7192_chip_info_tbl[ID_AD7195] }, {} }; @@ -1170,6 +1309,7 @@ static const struct spi_device_id ad7192_ids[] = { { "ad7190", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7190] }, { "ad7192", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7192] }, { "ad7193", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7193] }, + { "ad7194", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7194] }, { "ad7195", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7195] }, {} }; @@ -1186,6 +1326,6 @@ static struct spi_driver ad7192_driver = { module_spi_driver(ad7192_driver); MODULE_AUTHOR("Michael Hennerich "); -MODULE_DESCRIPTION("Analog Devices AD7190, AD7192, AD7193, AD7195 ADC"); +MODULE_DESCRIPTION("Analog Devices AD7190, AD7192, AD7193, AD7194, AD7195 ADC"); MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS(IIO_AD_SIGMA_DELTA);