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a=openpgp-sha256; l=5661; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=xEIVdCWxBgWYRyP0mz0KJl0Xxx+I4F1TtFiSbarQTN0=; b=owGbwMvMwCFYaeA6f6eBkTjjabUkhtTgXKf13eIN9/j3ilx7kd/9rWX2kUOGGVKZ8xY96+7Ki hW4KdzaUcrCIMjBICumyCJ+Ypll09rL9hrbF1yAmcPKBDKEgYtTACaycwEjw/rE21ZW2tZL3IPa +vhPZpxZx3Xjv4+tnLvUXr8s/9UcvxgZWj5umh/B1JH898vs6MwT8j/4S0OPXlK0mtF9JnzPuvv NawE= X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean commit 1b15483deb3f ("misc: add Qualcomm GENI SE QUP device driver") introduced support for platform-specific oversampling values, necessary to configure the UART clocks on all platforms at runtime. However it relies in probing a parent device. Despite the DM_FLAG_PRE_RELOC flag, this is not done consistently during boot. Instead, take another approach by relying on ofnode_ helpers to read the serial engine base address and do the read directly. This fixes early UART on boards with a non-default oversampling rate. Signed-off-by: Caleb Connolly --- drivers/misc/Kconfig | 7 ------- drivers/misc/Makefile | 1 - drivers/misc/qcom-geni-se.c | 41 ---------------------------------------- drivers/serial/Kconfig | 2 -- drivers/serial/serial_msm_geni.c | 29 ++++++++++++++++++---------- 5 files changed, 19 insertions(+), 61 deletions(-) diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 97057de8bf92..423cf22949aa 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -527,13 +527,6 @@ config WINBOND_W83627 legacy UART or other devices in the Winbond Super IO chips on X86 platforms. -config QCOM_GENI_SE - bool "Qualcomm GENI Serial Engine Driver" - depends on ARCH_SNAPDRAGON - help - The driver manages Generic Interface (GENI) firmware based - Qualcomm Technologies, Inc. Universal Peripheral (QUP) Wrapper. - config QFW bool help diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index b67b82358a6c..2d08181251c7 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -60,7 +60,6 @@ obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o obj-$(CONFIG_P2SB) += p2sb-uclass.o obj-$(CONFIG_PCA9551_LED) += pca9551_led.o obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o -obj-$(CONFIG_QCOM_GENI_SE) += qcom-geni-se.o ifdef CONFIG_QFW obj-y += qfw.o obj-$(CONFIG_QFW_PIO) += qfw_pio.o diff --git a/drivers/misc/qcom-geni-se.c b/drivers/misc/qcom-geni-se.c deleted file mode 100644 index 281a5ec819a9..000000000000 --- a/drivers/misc/qcom-geni-se.c +++ /dev/null @@ -1,41 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Qualcomm Generic Interface (GENI) Serial Engine (SE) Wrapper - * - * Copyright (C) 2023 Linaro Ltd. - */ - -#include -#include -#include -#include - -static int geni_se_qup_read(struct udevice *dev, int offset, - void *buf, int size) -{ - fdt_addr_t base = dev_read_addr(dev); - - if (size != sizeof(u32)) - return -EINVAL; - - *(u32 *)buf = readl(base + offset); - - return size; -} - -static struct misc_ops geni_se_qup_ops = { - .read = geni_se_qup_read, -}; - -static const struct udevice_id geni_se_qup_ids[] = { - { .compatible = "qcom,geni-se-qup" }, - {} -}; - -U_BOOT_DRIVER(geni_se_qup) = { - .name = "geni_se_qup", - .id = UCLASS_MISC, - .of_match = geni_se_qup_ids, - .ops = &geni_se_qup_ops, - .flags = DM_FLAG_PRE_RELOC, -}; diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 9f0f84c9b426..81fdac047824 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -957,8 +957,6 @@ config MSM_SERIAL config MSM_GENI_SERIAL bool "Qualcomm on-chip GENI UART" - select MISC - imply QCOM_GENI_SE help Support UART based on Generic Interface (GENI) Serial Engine (SE), used on Qualcomm Snapdragon SoCs. Should support all qualcomm SOCs diff --git a/drivers/serial/serial_msm_geni.c b/drivers/serial/serial_msm_geni.c index 78fd9389c036..3e2e15b6cefe 100644 --- a/drivers/serial/serial_msm_geni.c +++ b/drivers/serial/serial_msm_geni.c @@ -486,12 +486,12 @@ static const struct dm_serial_ops msm_serial_ops = { .setbrg = msm_serial_setbrg, }; -static void geni_set_oversampling(struct udevice *dev) +static int geni_set_oversampling(struct udevice *dev) { struct msm_serial_data *priv = dev_get_priv(dev); - struct udevice *parent_dev = dev_get_parent(dev); + ofnode parent_node = ofnode_get_parent(dev_ofnode(dev)); u32 geni_se_version; - int ret; + fdt_addr_t addr; priv->oversampling = UART_OVERSAMPLING; @@ -499,16 +499,22 @@ static void geni_set_oversampling(struct udevice *dev) * It could happen that GENI SE IP is missing in the board's device * tree or GENI UART node is a direct child of SoC device tree node. */ - if (device_get_uclass_id(parent_dev) != UCLASS_MISC) - return; + if (!ofnode_device_is_compatible(parent_node, "qcom,geni-se-qup")) { + pr_err("%s: UART node must be a child of geniqup node\n", + __func__); + return -ENODEV; + } - ret = misc_read(parent_dev, QUP_HW_VER_REG, - &geni_se_version, sizeof(geni_se_version)); - if (ret != sizeof(geni_se_version)) - return; + /* Read the HW_VER register relative to the parents address space */ + addr = ofnode_get_addr(parent_node); + geni_se_version = readl(addr + QUP_HW_VER_REG); + + printf("geni_se_version: %x\n", geni_se_version); if (geni_se_version >= QUP_SE_VERSION_2_5) priv->oversampling /= 2; + + return 0; } static inline void geni_serial_init(struct udevice *dev) @@ -553,8 +559,11 @@ static inline void geni_serial_init(struct udevice *dev) static int msm_serial_probe(struct udevice *dev) { struct msm_serial_data *priv = dev_get_priv(dev); + int ret; - geni_set_oversampling(dev); + ret = geni_set_oversampling(dev); + if (ret < 0) + return ret; /* No need to reinitialize the UART after relocation */ if (gd->flags & GD_FLG_RELOC) From patchwork Tue Nov 14 12:51:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caleb Connolly X-Patchwork-Id: 743767 Delivered-To: patch@linaro.org Received: by 2002:a5d:67cf:0:b0:32d:baff:b0ca with SMTP id n15csp2149875wrw; Tue, 14 Nov 2023 04:51:39 -0800 (PST) X-Google-Smtp-Source: AGHT+IE2bJL0W1eTZBCENcYbPQoKQ4XTR/ZaoC/Z+I0mmepb80xpzxb2TTge5TQ8MHByrqipQA5/ X-Received: by 2002:a17:906:c56:b0:9de:4007:d676 with SMTP id t22-20020a1709060c5600b009de4007d676mr6593910ejf.16.1699966299308; Tue, 14 Nov 2023 04:51:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699966299; cv=none; d=google.com; s=arc-20160816; b=dzfl+ZOg6XM0lWEqZGOejSzj+Z8E0yhbypP0h20kZbNainFiW+4fpCp4r93jgDWPdA Of3BLAMleGVPcjqzJH62I8qn/HVITxRPbnZOe8s52vMgwvVluwT6hqqUmxkQYS2wkZDq z6reut/EZ7J5ctnUoeb9SlUOvtFZN7iNl06yziON4nj2O+nSk6xhq3umHeVzDlx7NU5r qSaGP8HxCKJSo7LumC1COffTVg6aFn2l8Ky9sT8KQ+/rQZPZAoawm6ons4BuHG8I+H1V g7z1qg6Jia3QVXbBUdHsCMONQMNrDbP3jWFSz1UEQpyUgSGwjK8vpJdWfgr35cJuJ7Jv cHKg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=+SngRAX0rA2yULTVEkfIRWhVaH4aZVpyhzLZRSQZlvg=; fh=wPf8tFaJnqwJChFfbvcDrxFf4pPncxqFi8a3CXki61k=; b=w0TKekUFm2SEf6BKEfKJ3okb/IA5G0pnSqT33zXQL4WFVR9uXmBhLqdwK7dn/BzucD Lhs0N1kfHaS3Kinz+Ii4WQVs06YdhgN0buSM1QTjQvpcObxv533/kHSX6WhAyZrNR8Om SSh9Sgtw1F4bp7F2A0JpahzQsh1nzxvrA2lALx/ahufMRF17lENdAgpQL5wPCFySynYm Fix5Nw2MZtzs5tlD5QricL4JjfvAYEpiqsndI5MSGnx7Naq8QcoQZXI5FEfQo6UNikbC p+Kiu5CMCFyf+/ZbXNQy66BrxrxVoGHmdU/yeaQRpG8oTCsIYOrdEJ/AwyTJhuB5vAAv npGA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MRYprjMk; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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a=openpgp-sha256; l=1472; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=Uh1ey1bT5RyQaWQJWTvuAqZqgpilzcAjZkkJ3g1li2g=; b=owGbwMvMwCFYaeA6f6eBkTjjabUkhtTgXKfNuS3z/gvlvn6S9vvlNMGNFprxVzauqSsxP1W+a tPk/rITHaUsDIIcDLJiiiziJ5ZZNq29bK+xfcEFmDmsTCBDGLg4BWAiv58z/GJ+viCvQOKU6uV5 Ce+sfk9JT+PJPv0jT1vssotTA8f87cmMDHONPL4WLsvun56zg3daxrHJ1523XvJ+tqz09tbSRYo nZYUB X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean devm_clk_get() returns an ERR_PTR on failure, not null. Fix the check to avoid the board crashing when the clock isn't available. Additionally, add the missing error handling for this function. Fixes: 324df15a292e ("serial: qcom: add support for GENI serial driver") Signed-off-by: Caleb Connolly --- drivers/serial/serial_msm_geni.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/serial/serial_msm_geni.c b/drivers/serial/serial_msm_geni.c index 3e2e15b6cefe..0eee776fe8a4 100644 --- a/drivers/serial/serial_msm_geni.c +++ b/drivers/serial/serial_msm_geni.c @@ -189,8 +189,8 @@ static int geni_serial_set_clock_rate(struct udevice *dev, u64 rate) int ret; clk = devm_clk_get(dev, NULL); - if (!clk) - return -EINVAL; + if (IS_ERR(clk)) + return PTR_ERR(clk); ret = clk_set_rate(clk, rate); return ret; @@ -249,11 +249,16 @@ static int msm_serial_setbrg(struct udevice *dev, int baud) struct msm_serial_data *priv = dev_get_priv(dev); u64 clk_rate; u32 clk_div; + int ret; priv->baud = baud; clk_rate = get_clk_div_rate(baud, priv->oversampling, &clk_div); - geni_serial_set_clock_rate(dev, clk_rate); + ret = geni_serial_set_clock_rate(dev, clk_rate); + if (ret < 0) { + pr_err("%s: Couldn't set clock rate: %d\n", __func__, ret); + return ret; + } geni_serial_baud(priv->base, clk_div, baud); return 0;