From patchwork Thu Aug 15 05:44:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 171387 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp1760995ily; Wed, 14 Aug 2019 22:45:21 -0700 (PDT) X-Google-Smtp-Source: APXvYqzDuh0CegeT/9fl09YzUqUbUBijVd6UDwq9+hi0DEHToLZWPWL3gA2zSFPh5J1AulnRa5YU X-Received: by 2002:a17:90a:1b48:: with SMTP id q66mr717784pjq.83.1565847921799; Wed, 14 Aug 2019 22:45:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565847921; cv=none; d=google.com; s=arc-20160816; b=ELA8TSY1k3zb0+7++tmjFdfuBBehhNmdJljfedEe23Mx9q5L06rNh6Tk8JFGHB+Ynh b85D/x8SQ1hdG8IGDhIB6tuAgYsW9n2us8UX3gabAQWV8/kthIkJhxdPlBdh46cGlBtC udZd5+RE8Sts6m5rmjt0HuvYhs9RIVb/DgwxQzUA/YeiagXqIV2fn9WrqS3YSXpLE5J1 CEs4IA5qp9Jjw16sUu0GvxmHjl6OiM81MhPu4WsF5yimYMMdCKeBskS9p+Ttn74EZ/ao 7lsi//kWshp3CwBr1Ucm8PwxK6/12ngRyEfvO7ev2rmkQnqCCK8A1kWMCB+ReYSTKkHo 1e2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=sgGLbjFqZvsP29wPSsnR6e/y/5V7HpSdTWKbXSb0AXQ=; b=hePtGKUYSy5pRlwrR4rF9QeeS0ji9i/ICF5PRq4UeKK+2bALWd4H2nnSeDVoyRH6VE ovvyo3LZhCSR6NuOmp6neNJ9bDc3TsNZypBALGfCgamgAjuusGW0qROQJjFnBygXLz5V 4PNO6Suj7KY9FeMNf7R7T6ahjsScTl9D34LvDOZTwyG4Epf8zn4M32jhAcznWYYMlI+/ pvcSSEb/breBlBUefcKCSW1U5xOA3BQ7UiIjWuszMtuib4yxDOHpRyWSPoIF2IxSSVf3 fesMvWDzqcr4DwG8xAJ2NXaGgw4y7miej5BoaDVgYLDTnA66ghDx4z7STsm9fFrGboji RYxQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h11si1227515pgr.555.2019.08.14.22.45.21; Wed, 14 Aug 2019 22:45:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730407AbfHOFpU (ORCPT + 28 others); Thu, 15 Aug 2019 01:45:20 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:39440 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730384AbfHOFpR (ORCPT ); Thu, 15 Aug 2019 01:45:17 -0400 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id E2B252335EBECA1A4F1E; Thu, 15 Aug 2019 13:45:10 +0800 (CST) Received: from HGHY4L002753561.china.huawei.com (10.133.215.186) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.439.0; Thu, 15 Aug 2019 13:45:04 +0800 From: Zhen Lei To: Jean-Philippe Brucker , "Jean-Philippe Brucker" , John Garry , "Robin Murphy" , Will Deacon , Joerg Roedel , iommu , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH v2 1/2] iommu/arm-smmu-v3: don't add a master into smmu_domain before it's ready Date: Thu, 15 Aug 2019 13:44:38 +0800 Message-ID: <20190815054439.30652-2-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20190815054439.30652-1-thunder.leizhen@huawei.com> References: <20190815054439.30652-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.133.215.186] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Once a master has been added into smmu_domain->devices, it may immediately be scaned in arm_smmu_unmap()-->arm_smmu_atc_inv_domain(). From a logical point of view, the master should be added into smmu_domain after it has been completely initialized. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 1.8.3 diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index a9a9fabd396804a..29056d9bb12aa01 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -1958,10 +1958,6 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) master->domain = smmu_domain; - spin_lock_irqsave(&smmu_domain->devices_lock, flags); - list_add(&master->domain_head, &smmu_domain->devices); - spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); - if (smmu_domain->stage != ARM_SMMU_DOMAIN_BYPASS) arm_smmu_enable_ats(master); @@ -1969,6 +1965,10 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) arm_smmu_write_ctx_desc(smmu, &smmu_domain->s1_cfg); arm_smmu_install_ste_for_dev(master); + + spin_lock_irqsave(&smmu_domain->devices_lock, flags); + list_add(&master->domain_head, &smmu_domain->devices); + spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); out_unlock: mutex_unlock(&smmu_domain->init_mutex); return ret; From patchwork Thu Aug 15 05:44:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 171386 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp1760965ily; Wed, 14 Aug 2019 22:45:20 -0700 (PDT) X-Google-Smtp-Source: APXvYqzZ7G49gM08oBPAhTrHPpHm0Team+5p6BXkkl7/qjjfLhTlWFx9p+3iwwegVT/8qIXLtIDk X-Received: by 2002:a63:e5a:: with SMTP id 26mr2174991pgo.3.1565847920066; Wed, 14 Aug 2019 22:45:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565847920; cv=none; d=google.com; s=arc-20160816; b=VRoaAqkO4ZgmQYfNSEWKLUEaxEJmGmdMUoEGiIiHClDrGmTA7tUNWSKWf43u5uw699 XaMRxavCCFPQtlrAeqd1r40uzMi5D7CYVIzF7xAhWz6/FnPZ2+Y3T7AndlW5QLovA0r9 gHXNE3ZRoaUiCjLfRCyZq5FcJ/4s3DN93jIm5rNn8lEkMuC8KkHJt9tKVXUY72dc/kZS fFxisy5ib2RNYlCyWlXxe20j7FsZ2+iOj9A5/ZVY/d58sNn/QTeMyraqFn7ep8xDmBbS le8yvDD1HQfqTK9yjNClPRW7WKuBqWfmnAI7Y9xFHcu9s0UagfFiM5Wc8tghH7lalVhE d5NA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=qWpFvcBMfzf8rlXQKxvsrZRCkbBku3AdYB0CZ2AhVSY=; b=YFi99AJT/2sscQ1k3QEaikcq5DO3mqJ88GKIxywEcIdBPfunBDMSfYaarwt+4ILrrJ f8/2iYAFZb0e6SjvBxJAzY+yMOojTE4jvaDoqZed3S/CE+xBX2vbVrov/zCOT4ZFrrQs 2wp2Xb5JPhAnsiRdee8sdgK4vpQObzevpIDy5rJkZKrz/mrC6JPJmRNWCv4u2RACzO2m wPmXazPbspqoGTh05lednEdHT3SLYn7M6Qigy0girVnjZHf7pJ94fJI/TaT4ybm10I5v FpcqeGynU7HPn2xc8sspLNpBBxai4wRrFdSRDb2nUPpWkKGHpygiMIF+UWY3MeVJarqW aBKQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h11si1227515pgr.555.2019.08.14.22.45.19; Wed, 14 Aug 2019 22:45:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730396AbfHOFpT (ORCPT + 28 others); Thu, 15 Aug 2019 01:45:19 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:39448 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729759AbfHOFpQ (ORCPT ); Thu, 15 Aug 2019 01:45:16 -0400 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id E8352C04C9C9B653EB55; Thu, 15 Aug 2019 13:45:10 +0800 (CST) Received: from HGHY4L002753561.china.huawei.com (10.133.215.186) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.439.0; Thu, 15 Aug 2019 13:45:04 +0800 From: Zhen Lei To: Jean-Philippe Brucker , "Jean-Philippe Brucker" , John Garry , "Robin Murphy" , Will Deacon , Joerg Roedel , iommu , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH v2 2/2] iommu/arm-smmu-v3: add nr_ats_masters for quickly check Date: Thu, 15 Aug 2019 13:44:39 +0800 Message-ID: <20190815054439.30652-3-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20190815054439.30652-1-thunder.leizhen@huawei.com> References: <20190815054439.30652-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.133.215.186] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When (smmu_domain->smmu->features & ARM_SMMU_FEAT_ATS) is true, even if a smmu domain does not contain any ats master, the operations of arm_smmu_atc_inv_to_cmd() and lock protection in arm_smmu_atc_inv_domain() are always executed. This will impact performance, especially in multi-core and stress scenarios. For my FIO test scenario, about 8% performance reduced. In fact, we can use a struct member to record how many ats masters that the smmu contains. And check that without traverse the list and check all masters one by one in the lock protection. Fixes: 9ce27afc0830 ("iommu/arm-smmu-v3: Add support for PCI ATS") Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) -- 1.8.3 diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 29056d9bb12aa01..154334d3310c9b8 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -631,6 +631,7 @@ struct arm_smmu_domain { struct io_pgtable_ops *pgtbl_ops; bool non_strict; + int nr_ats_masters; enum arm_smmu_domain_stage stage; union { @@ -1531,7 +1532,16 @@ static int arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain, struct arm_smmu_cmdq_ent cmd; struct arm_smmu_master *master; - if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_ATS)) + /* + * The protectiom of spinlock(&iommu_domain->devices_lock) is omitted. + * Because for a given master, its map/unmap operations should only be + * happened after it has been attached and before it has been detached. + * So that, if at least one master need to be atc invalidated, the + * value of smmu_domain->nr_ats_masters can not be zero. + * + * This can alleviate performance loss in multi-core scenarios. + */ + if (!smmu_domain->nr_ats_masters) return 0; arm_smmu_atc_inv_to_cmd(ssid, iova, size, &cmd); @@ -1913,6 +1923,7 @@ static void arm_smmu_detach_dev(struct arm_smmu_master *master) spin_lock_irqsave(&smmu_domain->devices_lock, flags); list_del(&master->domain_head); + smmu_domain->nr_ats_masters--; spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); master->domain = NULL; @@ -1968,6 +1979,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) spin_lock_irqsave(&smmu_domain->devices_lock, flags); list_add(&master->domain_head, &smmu_domain->devices); + smmu_domain->nr_ats_masters++; spin_unlock_irqrestore(&smmu_domain->devices_lock, flags); out_unlock: mutex_unlock(&smmu_domain->init_mutex);