From patchwork Wed Nov 8 07:36:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenglin Wu via B4 Relay X-Patchwork-Id: 742264 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 26454D2EC; Wed, 8 Nov 2023 07:36:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="MRb5OnF/" Received: by smtp.kernel.org (Postfix) with ESMTPS id A4F27C433C7; Wed, 8 Nov 2023 07:36:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1699429015; bh=dxVytm8peBK9ARsrywTYF+uWNd63jD+cCHCJtDKnwR0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=MRb5OnF/rIaR62N/HntngtVR4DBIlXEeY+6xnF5a+Ez0odd0oy8VjLqN5hT4cN5Lj NsgXz4mBVLh1wQ8eaU36+E4hJLiuoryEdtReWU6krVIkcwqJlsSWOqKOF2dqwzmyNU E4uWR8YtYoBy/5Tsej4E2gi40f7wvflVGYmLs49DFGeL2RrSca0WnyxTfTsPU3tpAx TliTaqRP7qiK7fINCtF39CjZF4U1zib1HH+m4jBkYKD+bN7MC9dBD39+cWVZrXIVXN 7mkv05HxgccOmQa5rmLQdKaJv5QJ7dp0BgWwryEd3UBxoS+pwXAy8a2u/L1mJIj9pD kxSNSSWWiHYsA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 878F9C4167D; Wed, 8 Nov 2023 07:36:55 +0000 (UTC) From: Fenglin Wu via B4 Relay Date: Wed, 08 Nov 2023 15:36:34 +0800 Subject: [PATCH RESEND v7 1/3] input: pm8xxx-vib: refactor to easily support new SPMI vibrator Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231108-pm8xxx-vibrator-v7-1-632c731d25a8@quicinc.com> References: <20231108-pm8xxx-vibrator-v7-0-632c731d25a8@quicinc.com> In-Reply-To: <20231108-pm8xxx-vibrator-v7-0-632c731d25a8@quicinc.com> To: linux-arm-msm@vger.kernel.org, Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Torokhov , Rob Herring , Krzysztof Kozlowski Cc: linux-input@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, quic_collinsd@quicinc.com, quic_subbaram@quicinc.com, quic_kamalw@quicinc.com, jestar@qti.qualcomm.com, Luca Weiss , Fenglin Wu X-Mailer: b4 0.13-dev-83828 X-Developer-Signature: v=1; a=ed25519-sha256; t=1699429013; l=7094; i=quic_fenglinw@quicinc.com; s=20230725; h=from:subject:message-id; bh=edsISTWo4DvHUFy8IoGl7O/e9THyTA4/ImPMjWn8NI0=; b=hkDKypefUq+klm/0JECcc6GWRQiYu6w8IVzray3bryxv0cqVmJ+VAUU3gYObkOk33DhL1Mh1Q ERTo9cYrgVeABbJpQQ+yIzewSea41jwH1qWiN5m0bnc4IE9sqCUGOz+ X-Developer-Key: i=quic_fenglinw@quicinc.com; a=ed25519; pk=hleIDz3Unk1zeiwwOnZUjoQVMMelRancDFXg927lNjI= X-Endpoint-Received: by B4 Relay for quic_fenglinw@quicinc.com/20230725 with auth_id=68 X-Original-From: Fenglin Wu Reply-To: From: Fenglin Wu Currently, all vibrator control register addresses are hard coded, including the base address and the offset, it's not flexible to support new SPMI vibrator module which is usually included in different PMICs with different base address. Refactor this by defining register offset with HW type combination, and register base address which is defined in 'reg' property is added for SPMI vibrators. Signed-off-by: Fenglin Wu --- drivers/input/misc/pm8xxx-vibrator.c | 130 ++++++++++++++++++++++------------- 1 file changed, 81 insertions(+), 49 deletions(-) diff --git a/drivers/input/misc/pm8xxx-vibrator.c b/drivers/input/misc/pm8xxx-vibrator.c index 04cb87efd799..ba9be374f892 100644 --- a/drivers/input/misc/pm8xxx-vibrator.c +++ b/drivers/input/misc/pm8xxx-vibrator.c @@ -12,36 +12,44 @@ #include #include +#define SSBI_VIB_DRV_REG 0x4A +#define SSBI_VIB_DRV_EN_MANUAL_MASK GENMASK(7, 2) +#define SSBI_VIB_DRV_LEVEL_MASK GENMASK(7, 3) +#define SSBI_VIB_DRV_SHIFT 3 + +#define SPMI_VIB_DRV_REG 0x41 +#define SPMI_VIB_DRV_LEVEL_MASK GENMASK(4, 0) +#define SPMI_VIB_DRV_SHIFT 0 + +#define SPMI_VIB_EN_REG 0x46 +#define SPMI_VIB_EN_BIT BIT(7) + #define VIB_MAX_LEVEL_mV (3100) #define VIB_MIN_LEVEL_mV (1200) #define VIB_MAX_LEVELS (VIB_MAX_LEVEL_mV - VIB_MIN_LEVEL_mV) #define MAX_FF_SPEED 0xff -struct pm8xxx_regs { - unsigned int enable_addr; - unsigned int enable_mask; +enum vib_hw_type { + SSBI_VIB, + SPMI_VIB, +}; - unsigned int drv_addr; - unsigned int drv_mask; - unsigned int drv_shift; - unsigned int drv_en_manual_mask; +struct pm8xxx_vib_data { + enum vib_hw_type hw_type; + unsigned int enable_addr; + unsigned int drv_addr; }; -static const struct pm8xxx_regs pm8058_regs = { - .drv_addr = 0x4A, - .drv_mask = 0xf8, - .drv_shift = 3, - .drv_en_manual_mask = 0xfc, +static const struct pm8xxx_vib_data ssbi_vib_data = { + .hw_type = SSBI_VIB, + .drv_addr = SSBI_VIB_DRV_REG, }; -static struct pm8xxx_regs pm8916_regs = { - .enable_addr = 0xc046, - .enable_mask = BIT(7), - .drv_addr = 0xc041, - .drv_mask = 0x1F, - .drv_shift = 0, - .drv_en_manual_mask = 0, +static const struct pm8xxx_vib_data spmi_vib_data = { + .hw_type = SPMI_VIB, + .enable_addr = SPMI_VIB_EN_REG, + .drv_addr = SPMI_VIB_DRV_REG, }; /** @@ -49,7 +57,8 @@ static struct pm8xxx_regs pm8916_regs = { * @vib_input_dev: input device supporting force feedback * @work: work structure to set the vibration parameters * @regmap: regmap for register read/write - * @regs: registers' info + * @data: vibrator HW info + * @reg_base: the register base of the module * @speed: speed of vibration set from userland * @active: state of vibrator * @level: level of vibration to set in the chip @@ -59,7 +68,8 @@ struct pm8xxx_vib { struct input_dev *vib_input_dev; struct work_struct work; struct regmap *regmap; - const struct pm8xxx_regs *regs; + const struct pm8xxx_vib_data *data; + unsigned int reg_base; int speed; int level; bool active; @@ -75,24 +85,39 @@ static int pm8xxx_vib_set(struct pm8xxx_vib *vib, bool on) { int rc; unsigned int val = vib->reg_vib_drv; - const struct pm8xxx_regs *regs = vib->regs; + u32 mask, shift; + + switch (vib->data->hw_type) { + case SSBI_VIB: + mask = SSBI_VIB_DRV_LEVEL_MASK; + shift = SSBI_VIB_DRV_SHIFT; + break; + case SPMI_VIB: + mask = SPMI_VIB_DRV_LEVEL_MASK; + shift = SPMI_VIB_DRV_SHIFT; + break; + default: + return -EINVAL; + + } if (on) - val |= (vib->level << regs->drv_shift) & regs->drv_mask; + val |= (vib->level << shift) & mask; else - val &= ~regs->drv_mask; + val &= ~mask; - rc = regmap_write(vib->regmap, regs->drv_addr, val); + rc = regmap_update_bits(vib->regmap, vib->reg_base + vib->data->drv_addr, mask, val); if (rc < 0) return rc; vib->reg_vib_drv = val; - if (regs->enable_mask) - rc = regmap_update_bits(vib->regmap, regs->enable_addr, - regs->enable_mask, on ? ~0 : 0); + if (vib->data->hw_type == SSBI_VIB) + return 0; - return rc; + mask = SPMI_VIB_EN_BIT; + val = on ? SPMI_VIB_EN_BIT : 0; + return regmap_update_bits(vib->regmap, vib->reg_base + vib->data->enable_addr, mask, val); } /** @@ -102,13 +127,6 @@ static int pm8xxx_vib_set(struct pm8xxx_vib *vib, bool on) static void pm8xxx_work_handler(struct work_struct *work) { struct pm8xxx_vib *vib = container_of(work, struct pm8xxx_vib, work); - const struct pm8xxx_regs *regs = vib->regs; - int rc; - unsigned int val; - - rc = regmap_read(vib->regmap, regs->drv_addr, &val); - if (rc < 0) - return; /* * pmic vibrator supports voltage ranges from 1.2 to 3.1V, so @@ -168,9 +186,9 @@ static int pm8xxx_vib_probe(struct platform_device *pdev) { struct pm8xxx_vib *vib; struct input_dev *input_dev; + const struct pm8xxx_vib_data *data; int error; - unsigned int val; - const struct pm8xxx_regs *regs; + unsigned int val, reg_base; vib = devm_kzalloc(&pdev->dev, sizeof(*vib), GFP_KERNEL); if (!vib) @@ -187,19 +205,33 @@ static int pm8xxx_vib_probe(struct platform_device *pdev) INIT_WORK(&vib->work, pm8xxx_work_handler); vib->vib_input_dev = input_dev; - regs = of_device_get_match_data(&pdev->dev); + data = of_device_get_match_data(&pdev->dev); + if (!data) + return -EINVAL; - /* operate in manual mode */ - error = regmap_read(vib->regmap, regs->drv_addr, &val); - if (error < 0) - return error; + if (data->hw_type != SSBI_VIB) { + error = fwnode_property_read_u32(pdev->dev.fwnode, "reg", ®_base); + if (error < 0) { + dev_err(&pdev->dev, "Failed to read reg address, rc=%d\n", error); + return error; + } + + vib->reg_base += reg_base; + } - val &= regs->drv_en_manual_mask; - error = regmap_write(vib->regmap, regs->drv_addr, val); + error = regmap_read(vib->regmap, vib->reg_base + data->drv_addr, &val); if (error < 0) return error; - vib->regs = regs; + /* operate in manual mode */ + if (data->hw_type == SSBI_VIB) { + val &= SSBI_VIB_DRV_EN_MANUAL_MASK; + error = regmap_write(vib->regmap, vib->reg_base + data->drv_addr, val); + if (error < 0) + return error; + } + + vib->data = data; vib->reg_vib_drv = val; input_dev->name = "pm8xxx_vib_ffmemless"; @@ -239,9 +271,9 @@ static int pm8xxx_vib_suspend(struct device *dev) static DEFINE_SIMPLE_DEV_PM_OPS(pm8xxx_vib_pm_ops, pm8xxx_vib_suspend, NULL); static const struct of_device_id pm8xxx_vib_id_table[] = { - { .compatible = "qcom,pm8058-vib", .data = &pm8058_regs }, - { .compatible = "qcom,pm8921-vib", .data = &pm8058_regs }, - { .compatible = "qcom,pm8916-vib", .data = &pm8916_regs }, + { .compatible = "qcom,pm8058-vib", .data = &ssbi_vib_data }, + { .compatible = "qcom,pm8921-vib", .data = &ssbi_vib_data }, + { .compatible = "qcom,pm8916-vib", .data = &spmi_vib_data }, { } }; MODULE_DEVICE_TABLE(of, pm8xxx_vib_id_table); From patchwork Wed Nov 8 07:36:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenglin Wu via B4 Relay X-Patchwork-Id: 742663 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 23501D2EA; Wed, 8 Nov 2023 07:36:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="jerS7h89" Received: by smtp.kernel.org (Postfix) with ESMTPS id BE67DC433CA; Wed, 8 Nov 2023 07:36:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1699429015; bh=2pSJ5RtkTJUIWZtuMClF1MziyBCDcsQTg8O2HQnpmqY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=jerS7h89Mol+Jsq7kUd9TPJ3tspQI/+E70c4Xbwa70CxP0sLRXkFjQ3XLRqaxDAGc 4a98IwACWcBYmMVZuQlJi2opGEss6Adw+Ci2wg1V/68nF6TbrkidcxsZEZByj2D9bl 1W0V2uN99boiF9+BMm5UgPb4t/SUm2Cl+u0R+hdCZD4KR6P0y1BToQxFj6n544piaN cjeDf5KBOOi5uZkkueYHFsYZ+uWTK8B7pxTx0+mKl6+mD/G8tNNn6opU5kJzNOLgMm wD7GDEUB/DNX7vmzf23uDSaf/ywhhXELDIcRzrjY3yLHaq40bC4Qe0Efwd/z66gdc2 3ppPRaAXb5tUg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F468C4167B; Wed, 8 Nov 2023 07:36:55 +0000 (UTC) From: Fenglin Wu via B4 Relay Date: Wed, 08 Nov 2023 15:36:35 +0800 Subject: [PATCH RESEND v7 2/3] dt-bindings: input: qcom,pm8xxx-vib: add new SPMI vibrator module Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231108-pm8xxx-vibrator-v7-2-632c731d25a8@quicinc.com> References: <20231108-pm8xxx-vibrator-v7-0-632c731d25a8@quicinc.com> In-Reply-To: <20231108-pm8xxx-vibrator-v7-0-632c731d25a8@quicinc.com> To: linux-arm-msm@vger.kernel.org, Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Torokhov , Rob Herring , Krzysztof Kozlowski Cc: linux-input@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, quic_collinsd@quicinc.com, quic_subbaram@quicinc.com, quic_kamalw@quicinc.com, jestar@qti.qualcomm.com, Luca Weiss , Krzysztof Kozlowski , Fenglin Wu X-Mailer: b4 0.13-dev-83828 X-Developer-Signature: v=1; a=ed25519-sha256; t=1699429013; l=1205; i=quic_fenglinw@quicinc.com; s=20230725; h=from:subject:message-id; bh=SwnogURbBf0S1flEa633BZvpsevy5nBnFae6M+y7bFo=; b=9rVUFUqm95tJAlvcp2hmpddaXqS8H57ZLXV+OdVJHAUmD6RwUm+THXTSNtFQkITRsWtIX+P6T ASimZa7PRlcAG13pW0TmJz+LODjM4kqnGncNXasgoaXyNAZ3rYlmZyL X-Developer-Key: i=quic_fenglinw@quicinc.com; a=ed25519; pk=hleIDz3Unk1zeiwwOnZUjoQVMMelRancDFXg927lNjI= X-Endpoint-Received: by B4 Relay for quic_fenglinw@quicinc.com/20230725 with auth_id=68 X-Original-From: Fenglin Wu Reply-To: From: Fenglin Wu Add compatible strings to support vibrator module inside PMI632, PMI7250B, PM7325B, PM7550BA. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Fenglin Wu --- .../devicetree/bindings/input/qcom,pm8xxx-vib.yaml | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml b/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml index c8832cd0d7da..2025d6a5423e 100644 --- a/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml +++ b/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml @@ -11,10 +11,18 @@ maintainers: properties: compatible: - enum: - - qcom,pm8058-vib - - qcom,pm8916-vib - - qcom,pm8921-vib + oneOf: + - enum: + - qcom,pm8058-vib + - qcom,pm8916-vib + - qcom,pm8921-vib + - qcom,pmi632-vib + - items: + - enum: + - qcom,pm7250b-vib + - qcom,pm7325b-vib + - qcom,pm7550ba-vib + - const: qcom,pmi632-vib reg: maxItems: 1 From patchwork Wed Nov 8 07:36:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenglin Wu via B4 Relay X-Patchwork-Id: 742662 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 288A7D2EF; Wed, 8 Nov 2023 07:36:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Ftzwuao3" Received: by smtp.kernel.org (Postfix) with ESMTPS id C71AEC43391; Wed, 8 Nov 2023 07:36:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1699429015; bh=DmQ7v8XOka3ZnDfCNSbZLIVIjhSv7gUIq7ZztoA3hr8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Ftzwuao33vY/id63aUiPXstAdgNG76V6GN8JuyYlc42PskxIbpzcxNm2ySgAe4nbV lLRjeCLgLcw1RsvssoJ1vHMZ7TYIZnkqS3vAZ0dENTZokaVbg0KR8SK1+kd03cEgop BwUoG3k5B9MDyIAlj5k3k1VsW14P9GDV9hyMeK4/K2oVu4rNunhbJtnmzYq3WfkGbZ 01F8g4LkLiEB0yuSxSv3fKfQ4Ie4tkzQbnifsuMSU5ow5MpMV1hgPF8d7CiKbArQ9Z 9WpWxXHwmZP67RoZs23Osgk+pIJMrPpagZshqrkxIFi2xFfqaXFEogRvC7wyszf9m5 TL/IsINLV8NLQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF19AC41535; Wed, 8 Nov 2023 07:36:55 +0000 (UTC) From: Fenglin Wu via B4 Relay Date: Wed, 08 Nov 2023 15:36:36 +0800 Subject: [PATCH RESEND v7 3/3] input: pm8xxx-vibrator: add new SPMI vibrator support Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231108-pm8xxx-vibrator-v7-3-632c731d25a8@quicinc.com> References: <20231108-pm8xxx-vibrator-v7-0-632c731d25a8@quicinc.com> In-Reply-To: <20231108-pm8xxx-vibrator-v7-0-632c731d25a8@quicinc.com> To: linux-arm-msm@vger.kernel.org, Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Torokhov , Rob Herring , Krzysztof Kozlowski Cc: linux-input@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, quic_collinsd@quicinc.com, quic_subbaram@quicinc.com, quic_kamalw@quicinc.com, jestar@qti.qualcomm.com, Luca Weiss , Fenglin Wu X-Mailer: b4 0.13-dev-83828 X-Developer-Signature: v=1; a=ed25519-sha256; t=1699429013; l=3749; i=quic_fenglinw@quicinc.com; s=20230725; h=from:subject:message-id; bh=wJayTUhik7klfO9cHbbqPgCXQ4qQW2jIadjS/C/xeqc=; b=DjrEFk0hcNjBhnUa4usIq1v7z/9LSEFGcDTvarvAIjpg6ryyFgAXUp9oaZT41mU8PvB3EjW2d 1Jvu/HzC7m6C9KVqVSic++o6N3LwaOyunHdtIH8xkoGDSbuBY6ZoEeE X-Developer-Key: i=quic_fenglinw@quicinc.com; a=ed25519; pk=hleIDz3Unk1zeiwwOnZUjoQVMMelRancDFXg927lNjI= X-Endpoint-Received: by B4 Relay for quic_fenglinw@quicinc.com/20230725 with auth_id=68 X-Original-From: Fenglin Wu Reply-To: From: Fenglin Wu Add new SPMI vibrator module which is very similar to the SPMI vibrator module inside PM8916 but just has a finer drive voltage step (1mV vs 100mV) hence its drive level control is expanded to across 2 registers. The vibrator module can be found in Qualcomm PMIC PMI632, then following PM7250B, PM7325B, PM7550BA PMICs. Signed-off-by: Fenglin Wu Tested-by: Luca Weiss # sdm632-fairphone-fp3 (pmi632) --- drivers/input/misc/pm8xxx-vibrator.c | 42 +++++++++++++++++++++++++++++++++--- 1 file changed, 39 insertions(+), 3 deletions(-) diff --git a/drivers/input/misc/pm8xxx-vibrator.c b/drivers/input/misc/pm8xxx-vibrator.c index ba9be374f892..82c788841f1f 100644 --- a/drivers/input/misc/pm8xxx-vibrator.c +++ b/drivers/input/misc/pm8xxx-vibrator.c @@ -21,6 +21,13 @@ #define SPMI_VIB_DRV_LEVEL_MASK GENMASK(4, 0) #define SPMI_VIB_DRV_SHIFT 0 +#define SPMI_VIB_GEN2_DRV_REG 0x40 +#define SPMI_VIB_GEN2_DRV_MASK GENMASK(7, 0) +#define SPMI_VIB_GEN2_DRV_SHIFT 0 +#define SPMI_VIB_GEN2_DRV2_REG 0x41 +#define SPMI_VIB_GEN2_DRV2_MASK GENMASK(3, 0) +#define SPMI_VIB_GEN2_DRV2_SHIFT 8 + #define SPMI_VIB_EN_REG 0x46 #define SPMI_VIB_EN_BIT BIT(7) @@ -33,12 +40,14 @@ enum vib_hw_type { SSBI_VIB, SPMI_VIB, + SPMI_VIB_GEN2 }; struct pm8xxx_vib_data { enum vib_hw_type hw_type; unsigned int enable_addr; unsigned int drv_addr; + unsigned int drv2_addr; }; static const struct pm8xxx_vib_data ssbi_vib_data = { @@ -52,6 +61,13 @@ static const struct pm8xxx_vib_data spmi_vib_data = { .drv_addr = SPMI_VIB_DRV_REG, }; +static const struct pm8xxx_vib_data spmi_vib_gen2_data = { + .hw_type = SPMI_VIB_GEN2, + .enable_addr = SPMI_VIB_EN_REG, + .drv_addr = SPMI_VIB_GEN2_DRV_REG, + .drv2_addr = SPMI_VIB_GEN2_DRV2_REG, +}; + /** * struct pm8xxx_vib - structure to hold vibrator data * @vib_input_dev: input device supporting force feedback @@ -96,9 +112,12 @@ static int pm8xxx_vib_set(struct pm8xxx_vib *vib, bool on) mask = SPMI_VIB_DRV_LEVEL_MASK; shift = SPMI_VIB_DRV_SHIFT; break; + case SPMI_VIB_GEN2: + mask = SPMI_VIB_GEN2_DRV_MASK; + shift = SPMI_VIB_GEN2_DRV_SHIFT; + break; default: return -EINVAL; - } if (on) @@ -112,6 +131,19 @@ static int pm8xxx_vib_set(struct pm8xxx_vib *vib, bool on) vib->reg_vib_drv = val; + if (vib->data->hw_type == SPMI_VIB_GEN2) { + mask = SPMI_VIB_GEN2_DRV2_MASK; + shift = SPMI_VIB_GEN2_DRV2_SHIFT; + if (on) + val = (vib->level >> shift) & mask; + else + val = 0; + rc = regmap_update_bits(vib->regmap, + vib->reg_base + vib->data->drv2_addr, mask, val); + if (rc < 0) + return rc; + } + if (vib->data->hw_type == SSBI_VIB) return 0; @@ -136,10 +168,13 @@ static void pm8xxx_work_handler(struct work_struct *work) vib->active = true; vib->level = ((VIB_MAX_LEVELS * vib->speed) / MAX_FF_SPEED) + VIB_MIN_LEVEL_mV; - vib->level /= 100; + if (vib->data->hw_type != SPMI_VIB_GEN2) + vib->level /= 100; } else { vib->active = false; - vib->level = VIB_MIN_LEVEL_mV / 100; + vib->level = VIB_MIN_LEVEL_mV; + if (vib->data->hw_type != SPMI_VIB_GEN2) + vib->level /= 100; } pm8xxx_vib_set(vib, vib->active); @@ -274,6 +309,7 @@ static const struct of_device_id pm8xxx_vib_id_table[] = { { .compatible = "qcom,pm8058-vib", .data = &ssbi_vib_data }, { .compatible = "qcom,pm8921-vib", .data = &ssbi_vib_data }, { .compatible = "qcom,pm8916-vib", .data = &spmi_vib_data }, + { .compatible = "qcom,pmi632-vib", .data = &spmi_vib_gen2_data }, { } }; MODULE_DEVICE_TABLE(of, pm8xxx_vib_id_table);