From patchwork Mon Nov 6 09:52:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 741623 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9CCC1168A6 for ; Mon, 6 Nov 2023 09:52:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tq-group.com header.i=@tq-group.com header.b="kEHMFNAz" Received: from mx1.tq-group.com (mx1.tq-group.com [93.104.207.81]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BC291F1; Mon, 6 Nov 2023 01:52:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1699264329; x=1730800329; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jd6MUcWKRJ1RmTUfwIIEw+3tKFwk7+0cW8fgrk+BS8c=; b=kEHMFNAz2vPiW5P2BOLKH1/bhkYuwuatBRwgIBZQYCo+5B75VpxGn/Hk ispph5H2OA/MKxixsmIRTWBdONOZt1FVfHwg7RGDTG5Tw3zs7j7Q3QICh AMQ4UbEfejrkFKE2oqi4no14utVkUQ1E/vmB+kO6njsE1WoE3x6EMxR3T kc0LbQhrIsRVeY1TFviTOR/UOXN7UKs0azv+ZChwyQTmJ70qdOrDgmRex 2+AGk1bF+vgPUZs+P9PO4L4aGK5/dl3rdyppJGMXL2sejDn9Nvzx9HWuc X3ySm2xYhWAt+x1V01V6DT2AVo/SGpOQsL6F4qcufGIquw/WZYj4uRSJV Q==; X-IronPort-AV: E=Sophos;i="6.03,281,1694728800"; d="scan'208";a="33823100" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 06 Nov 2023 10:52:05 +0100 Received: from steina-w.tq-net.de (steina-w.tq-net.de [10.123.53.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id 34F5F280084; Mon, 6 Nov 2023 10:52:05 +0100 (CET) From: Alexander Stein To: Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6n?= =?utf-8?q?ig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Alexander Stein , Pengutronix Kernel Team , NXP Linux Team , Philippe Schenker , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/3] dt-bindings: pwm: imx-pwm: Add constraints for #pwm-cells Date: Mon, 6 Nov 2023 10:52:03 +0100 Message-Id: <20231106095205.231210-2-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231106095205.231210-1-alexander.stein@ew.tq-group.com> References: <20231106095205.231210-1-alexander.stein@ew.tq-group.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Only fsl,imx1-pwm comptabile devices use #pwm-cells = <2>. Newer SoCs supportinverted PWM output, thus #pwm-cells needs to be set to 3. Signed-off-by: Alexander Stein --- .../devicetree/bindings/pwm/imx-pwm.yaml | 20 ++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.yaml b/Documentation/devicetree/bindings/pwm/imx-pwm.yaml index c01dff3b7f843..59a981c0f39ab 100644 --- a/Documentation/devicetree/bindings/pwm/imx-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/imx-pwm.yaml @@ -9,9 +9,6 @@ title: Freescale i.MX PWM controller maintainers: - Philipp Zabel -allOf: - - $ref: pwm.yaml# - properties: "#pwm-cells": description: | @@ -74,6 +71,23 @@ required: additionalProperties: false +allOf: + - $ref: pwm.yaml# + + - if: + properties: + compatible: + contains: + const: fsl,imx1-pwm + then: + properties: + "#pwm-cells": + enum: [2] + else: + properties: + "#pwm-cells": + enum: [3] + examples: - | #include From patchwork Mon Nov 6 09:52:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 742072 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B547316420 for ; Mon, 6 Nov 2023 09:52:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tq-group.com header.i=@tq-group.com header.b="YKvRaxcy" Received: from mx1.tq-group.com (mx1.tq-group.com [93.104.207.81]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 113B7FA; Mon, 6 Nov 2023 01:52:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1699264330; x=1730800330; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EGTF9v07Bby5eR466771r5R+MLgJZA5MIcBkAOpXjrg=; b=YKvRaxcyz0FFrCcJVsWCQQfi4PGTF5CXFawYbI9XGkIToW2PvfIO1nA7 O4wwOspf2TZo9fnP49RjOMTB2cza0y3+UBdOZOBR0Ig0G+ZDGPPZFzFOH 6s+f1yEmc6LWHuQTfyniiElF16FzCGdZ+yFrFnp2E7zXrerjgodyoQmYW bNMUTJdUxX+exAVCzB/DFhAqIbs/ieCvmzXVMsg3TSShfAbZ5nc8qAy8R ni9f0SJefyErD0gAVWXodcmsgQOcQgf3OaPUQqt4SBcPWs6Vo/oB13xPw JcsLu7nrWlMyadUFigI/eVn6DTC4jJJnxKe8C2PA1FDWBlFU+spAMUGp1 g==; X-IronPort-AV: E=Sophos;i="6.03,281,1694728800"; d="scan'208";a="33823101" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 06 Nov 2023 10:52:05 +0100 Received: from steina-w.tq-net.de (steina-w.tq-net.de [10.123.53.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id 73FB7280085; Mon, 6 Nov 2023 10:52:05 +0100 (CET) From: Alexander Stein To: Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6n?= =?utf-8?q?ig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Alexander Stein , Pengutronix Kernel Team , NXP Linux Team , Philippe Schenker , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/3] arm64: dts: freescale: imx8-ss-lsio: Fix #pwm-cells Date: Mon, 6 Nov 2023 10:52:04 +0100 Message-Id: <20231106095205.231210-3-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231106095205.231210-1-alexander.stein@ew.tq-group.com> References: <20231106095205.231210-1-alexander.stein@ew.tq-group.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 i.MX8QM/QXP supports inverted PWM output, thus #pwm-cells needs to be set to 3. Fixes: a05c329644d81 ("arm64: dts: freescale: imx8-ss-lsio: add support for lsio_pwm0-3") Signed-off-by: Alexander Stein --- arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi index 49ad3413db948..7e510b21bbac5 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi @@ -29,7 +29,7 @@ lsio_pwm0: pwm@5d000000 { <&pwm0_lpcg 1>; assigned-clocks = <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; - #pwm-cells = <2>; + #pwm-cells = <3>; interrupts = ; status = "disabled"; }; @@ -42,7 +42,7 @@ lsio_pwm1: pwm@5d010000 { <&pwm1_lpcg 1>; assigned-clocks = <&clk IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; - #pwm-cells = <2>; + #pwm-cells = <3>; interrupts = ; status = "disabled"; }; @@ -55,7 +55,7 @@ lsio_pwm2: pwm@5d020000 { <&pwm2_lpcg 1>; assigned-clocks = <&clk IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; - #pwm-cells = <2>; + #pwm-cells = <3>; interrupts = ; status = "disabled"; }; @@ -68,7 +68,7 @@ lsio_pwm3: pwm@5d030000 { <&pwm3_lpcg 1>; assigned-clocks = <&clk IMX_SC_R_PWM_3 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; - #pwm-cells = <2>; + #pwm-cells = <3>; interrupts = ; status = "disabled"; }; From patchwork Mon Nov 6 09:52:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 741622 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D86BD168A6 for ; Mon, 6 Nov 2023 09:52:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tq-group.com header.i=@tq-group.com header.b="lVi0AHWJ" Received: from mx1.tq-group.com (mx1.tq-group.com [93.104.207.81]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9464E100; Mon, 6 Nov 2023 01:52:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1699264331; x=1730800331; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=n3w1++R+tKubh/JShRcdfaY4sdWM0Thnc5B85fY3mYw=; b=lVi0AHWJvA1wu74TGEGuW5+MhF/ePP0fynh73Q6m962DlihOMV0pVVGc W5C3ziw+b+bwnGjxxxqRHirrrzWmVOjW7wB7CTr2xb617BE7qcSjxXMzv MPvOThwfzng5jNqPnStKFjYup1EY4PVjItNsTBWrVZ8F0LMtnMRFE3F0s dRQgFOe2xnf8RC/UkBgg4pRm0GHPlGJRP1uPwbUIQVTP+l1uZcdFzX6wZ xkNa2+lAJPxF4WVr+uCCqgAieFfqukJ0nAfMU/V8pYBRXi8hXnBZvmzrI c0r1VzqcKzqaKqTqM4PGQyJYFW5BhpM+rqPR0bmr2auv5sQcZzx/TuMpq g==; X-IronPort-AV: E=Sophos;i="6.03,281,1694728800"; d="scan'208";a="33823102" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 06 Nov 2023 10:52:05 +0100 Received: from steina-w.tq-net.de (steina-w.tq-net.de [10.123.53.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id B1F0928007F; Mon, 6 Nov 2023 10:52:05 +0100 (CET) From: Alexander Stein To: Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6n?= =?utf-8?q?ig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Alexander Stein , Pengutronix Kernel Team , NXP Linux Team , Philippe Schenker , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/3] arm64: dts: freescale: imx8-ss-dma: Fix #pwm-cells Date: Mon, 6 Nov 2023 10:52:05 +0100 Message-Id: <20231106095205.231210-4-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231106095205.231210-1-alexander.stein@ew.tq-group.com> References: <20231106095205.231210-1-alexander.stein@ew.tq-group.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 i.MX8QXP supports inverted PWM output, thus #pwm-cells needs to be set to 3. Fixes: f1d6a6b991ef9 ("arm64: dts: imx8qxp: add adma_pwm in adma") Signed-off-by: Alexander Stein Reviewed-by: Uwe Kleine-König --- arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index ce66d30a4839b..b0bb77150adcc 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -149,7 +149,7 @@ adma_pwm: pwm@5a190000 { clock-names = "ipg", "per"; assigned-clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; - #pwm-cells = <2>; + #pwm-cells = <3>; power-domains = <&pd IMX_SC_R_LCD_0_PWM_0>; };