From patchwork Tue Oct 31 09:47:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jaewon Kim X-Patchwork-Id: 739973 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 970C9C4167D for ; Tue, 31 Oct 2023 09:50:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235304AbjJaJuj (ORCPT ); Tue, 31 Oct 2023 05:50:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58684 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234972AbjJaJug (ORCPT ); Tue, 31 Oct 2023 05:50:36 -0400 Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 782F510A for ; Tue, 31 Oct 2023 02:50:28 -0700 (PDT) Received: from epcas2p4.samsung.com (unknown [182.195.41.56]) by mailout3.samsung.com (KnoxPortal) with ESMTP id 20231031095016epoutp03d6814c6d5a52ed731085eb8ca137fbef~TKFHwyMQS1262512625epoutp03t for ; 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Tue, 31 Oct 2023 18:50:15 +0900 (KST) Received: from epsmtrp1.samsung.com (unknown [182.195.40.13]) by epcas2p3.samsung.com (KnoxPortal) with ESMTPA id 20231031095015epcas2p3cc52b365b99a00bef3f75bea38ea91e9~TKFGg4ZbE0127001270epcas2p3m; Tue, 31 Oct 2023 09:50:15 +0000 (GMT) Received: from epsmgmc1p1new.samsung.com (unknown [182.195.42.40]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20231031095015epsmtrp19337e914479ebfdaf9166842d6c6bdd7~TKFGe2qbE2510125101epsmtrp1c; Tue, 31 Oct 2023 09:50:15 +0000 (GMT) X-AuditID: b6c32a47-bfdfa70000002726-25-6540cdd7eaa8 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgmc1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id 4E.32.07368.7DDC0456; Tue, 31 Oct 2023 18:50:15 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.55]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20231031095014epsmtip185964591a6a2111a9a4b1345ec95ce14~TKFFtCcXR1599915999epsmtip1Z; Tue, 31 Oct 2023 09:50:14 +0000 (GMT) From: Jaewon Kim To: Krzysztof Kozlowski , Alim Akhtar , Rob Herring , Conor Dooley , Tomasz Figa , Sylwester Nawrocki , Linus Walleij , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Greg Kroah-Hartman , Jiri Slaby Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org, linux-serial@vger.kernel.org, Jaewon Kim Subject: [PATCH 01/10] dt-bindings: soc: samsung: exynos-sysreg: add exynosautov920 sysreg Date: Tue, 31 Oct 2023 18:47:43 +0900 Message-ID: <20231031094852.118677-2-jaewon02.kim@samsung.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231031094852.118677-1-jaewon02.kim@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrMJsWRmVeSWpSXmKPExsWy7bCmme71sw6pBnNXmlg8mLeNzWLN3nNM FvOPnGO1aF68ns1iR8MRVot3c2Us9r7eym4x5c9yJotNj6+xWmye/4fR4vKuOWwWd++uYrSY cX4fk8WZxb3sFq17j7BbHH7Tzmrxc9c8FotVu4Dqbk+czOgg7LFz1l12j02rOtk87lzbw+ax f+4ado/NS+o9+v8aePRtWcXo8XmTXABHVLZNRmpiSmqRQmpecn5KZl66rZJ3cLxzvKmZgaGu oaWFuZJCXmJuqq2Si0+ArltmDtA7SgpliTmlQKGAxOJiJX07m6L80pJUhYz84hJbpdSClJwC 8wK94sTc4tK8dL281BIrQwMDI1OgwoTsjN47XYwFM7kqep/OYm9gvMjexcjBISFgIvHjmnQX IxeHkMAORokFm7YxQzifGCW2PPkK5XxjlLh0dxNTFyMnWMf0C0sZIRJ7GSXWtbeyQzgfGSUa 179jAaliE9CW+L5+MSuILSLwhVli+qNqkCJmgXYmiXnfXoIVCQvESBzseM4GYrMIqErs/f2e FeQoXgE7iTXz7CC2yUvsWfQdbDOngL3Ezp4mRhCbV0BQ4uTMJ2BjmIFqmrfOBjtVQuAKh8Sz k+tZIJpdJJad2c8MYQtLvDq+hR3ClpJ42d8GZWdLtE//wwphV0hc3DCbDcI2lpj1rJ0R5B5m AU2J9bv0IeGlLHHkFtRaPomOw3+hwcgr0dEmBNGoJnF/6jmoITISk46shIabh0TPjD5ogE5i lPj27x3bBEaFWUi+mYXkm1kIixcwMq9iFEstKM5NTy02KjCGR3Byfu4mRnDq1nLfwTjj7Qe9 Q4xMHIyHGCU4mJVEeA+bOqQK8aYkVlalFuXHF5XmpBYfYjQFBvVEZinR5Hxg9sgriTc0sTQw MTMzNDcyNTBXEue91zo3RUggPbEkNTs1tSC1CKaPiYNTqoEpx4dr1fSdjtfiA0NFqlfaWPwx 5CvOeFvedVr9i7Se6tRJhu2vDkUa9XFanev6vdqs6J1DKedkLS/dstzTwfOO3bx89lJFK0es 4uP7PHZ9nkpZ+ROev1o/P2qpxB6eUjmm4kcaTJ+vx8cri12X2F6RFsGwMOr1w8rfsh+55Vby MSyt6zVafSRtU4LcLs/lb1TMFP5N+DGlLsze/gjbK9ttE+sT7b7FiMfxPH+jl9D6T2Ka+6J3 zkF1/q89UkunnRRL3FvN/vj3xnjvrA8hRQ/iljGsMq4s1AjwOh3w0ajzjfH5FJ4QCcfqmOdB fi/YPFY+P3bUl+lPGL/jP/EypwcOrFfmzbYTecffMPP3EyWW4oxEQy3mouJEAClaQTRmBAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupnkeLIzCtJLcpLzFFi42LZdlhJTvf6WYdUg63TRS0ezNvGZrFm7zkm i/lHzrFaNC9ez2axo+EIq8W7uTIWe19vZbeY8mc5k8Wmx9dYLTbP/8NocXnXHDaLu3dXMVrM OL+PyeLM4l52i9a9R9gtDr9pZ7X4uWsei8WqXUB1tydOZnQQ9tg56y67x6ZVnWwed67tYfPY P3cNu8fmJfUe/X8NPPq2rGL0+LxJLoAjissmJTUnsyy1SN8ugSuj904XY8FMrorep7PYGxgv sncxcnJICJhITL+wlLGLkYtDSGA3o8TOeY1QCRmJ5c/62CBsYYn7LUdYIYreM0ocmbwBLMEm oC3xff1isISIwC9mid0T7jKCJJgF+pkkrm9KALGFBaIkZvf/ApvKIqAqsff3e6AGDg5eATuJ NfPsIBbIS+xZ9J0JxOYUsJfY2dMENkYIqOTihptgcV4BQYmTM5+wQIyXl2jeOpt5AqPALCSp WUhSCxiZVjFKphYU56bnJhsWGOallusVJ+YWl+al6yXn525iBMeZlsYOxnvz/+kdYmTiYDzE KMHBrCTCe9jUIVWINyWxsiq1KD++qDQntfgQozQHi5I4r+GM2SlCAumJJanZqakFqUUwWSYO TqkGpg1hJrnp6//lTjql9vhky6Lvm9K3alywf/Vpe3xM+eO89xX5x+/98hEpPd0x/+mL36Yt 22tuBlRWpPXOD3T3e3TPqnWpYEgro+mudZGGgUpZW2s+zBfWmL0jjGdbox/j5dmr1tyaqF90 aXHtsV9vFC5eWqd5l91w9sofIrpNb6a/z9wh0+z7yr9misukcq5ZqSssIq0bg2+c8bJ6uzbq 2FSpgMDAPZ1qcWkRp/N/P4zY9mKaacaCqtZj748s1Dte9qFA0KmuYvX+kKUng6XYbRV+hise X8d/5OwC/dDeTvP1K+clLZ8//8/1s3Psj2x7t+HNsSkHmddKvVmt/NF75tFn/ctOVszvNft5 xUKVc52VEktxRqKhFnNRcSIAyAX7dyIDAAA= X-CMS-MailID: 20231031095015epcas2p3cc52b365b99a00bef3f75bea38ea91e9 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20231031095015epcas2p3cc52b365b99a00bef3f75bea38ea91e9 References: <20231031094852.118677-1-jaewon02.kim@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add compatible for ExynosAutov920 sysreg controllers. Signed-off-by: Jaewon Kim --- .../bindings/soc/samsung/samsung,exynos-sysreg.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml index 163e912e9cad..aa2a29ec6072 100644 --- a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml @@ -35,6 +35,7 @@ properties: - samsung,exynos5433-sysreg - samsung,exynos850-sysreg - samsung,exynosautov9-sysreg + - samsung,exynosautov920-sysreg - const: syscon deprecated: true - items: @@ -50,6 +51,12 @@ properties: - samsung,exynosautov9-peric1-sysreg - const: samsung,exynosautov9-sysreg - const: syscon + - items: + - enum: + - samsung,exynosautov920-peric0-sysreg + - samsung,exynosautov920-peric1-sysreg + - const: samsung,exynosautov920-sysreg + - const: syscon reg: maxItems: 1 From patchwork Tue Oct 31 09:47:44 2023 Content-Type: text/plain; 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Tue, 31 Oct 2023 18:50:16 +0900 (KST) Received: from epsmtrp2.samsung.com (unknown [182.195.40.14]) by epcas2p3.samsung.com (KnoxPortal) with ESMTPA id 20231031095016epcas2p341141f6354ee083be8d95d615c7a63dd~TKFHKt0l60127001270epcas2p3t; Tue, 31 Oct 2023 09:50:16 +0000 (GMT) Received: from epsmgms1p2new.samsung.com (unknown [182.195.42.42]) by epsmtrp2.samsung.com (KnoxPortal) with ESMTP id 20231031095016epsmtrp2ef7eebfac8a5c08e3249d809b4a70360~TKFHIm3rX1473914739epsmtrp23; Tue, 31 Oct 2023 09:50:16 +0000 (GMT) X-AuditID: b6c32a4d-9f7ff70000004a32-fb-6540cdd80bc4 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p2new.samsung.com (Symantec Messaging Gateway) with SMTP id 6C.11.08817.8DDC0456; Tue, 31 Oct 2023 18:50:16 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.55]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20231031095015epsmtip124afb19201f08ee7b8bd1c2a9bbd30fa~TKFGXM-lf2325323253epsmtip1o; Tue, 31 Oct 2023 09:50:15 +0000 (GMT) From: Jaewon Kim To: Krzysztof Kozlowski , Alim Akhtar , Rob Herring , Conor Dooley , Tomasz Figa , Sylwester Nawrocki , Linus Walleij , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Greg Kroah-Hartman , Jiri Slaby Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org, linux-serial@vger.kernel.org, Jaewon Kim Subject: [PATCH 02/10] dt-bindings: soc: samsung: usi: add exynosautov920-usi compatible Date: Tue, 31 Oct 2023 18:47:44 +0900 Message-ID: <20231031094852.118677-3-jaewon02.kim@samsung.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231031094852.118677-1-jaewon02.kim@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrGJsWRmVeSWpSXmKPExsWy7bCmhe6Nsw6pBktOq1s8mLeNzWLN3nNM FvOPnGO1aF68ns1iR8MRVot3c2Us9r7eym4x5c9yJotNj6+xWmye/4fR4vKuOWwWd++uYrSY cX4fk8WZxb3sFq17j7BbHH7Tzmrxc9c8FotVu4Dqbk+czOgg7LFz1l12j02rOtk87lzbw+ax f+4ado/NS+o9+v8aePRtWcXo8XmTXABHVLZNRmpiSmqRQmpecn5KZl66rZJ3cLxzvKmZgaGu oaWFuZJCXmJuqq2Si0+ArltmDtA7SgpliTmlQKGAxOJiJX07m6L80pJUhYz84hJbpdSClJwC 8wK94sTc4tK8dL281BIrQwMDI1OgwoTsjC0rNrAWrGev+PM8sIHxM2sXIyeHhICJxPZ3O5m6 GLk4hAT2MEos6V7ADuF8YpRo6vrHBuF8Y5R49HMOM0xL88oZLBCJvYwSJxc3sIMkhAQ+Mkpc OcYIYrMJaEt8X78YbIeIwBdmiemPqkEamAXamSTmfXsJ1M3BISwQJfGpVRGkhkVAVWLbovtg vbwCdhKPXv5khFgmL7Fn0XcmEJtTwF5iZ08TVI2gxMmZT1hAbGagmuats5lB5ksIXOCQ6F51 Heo5F4nZrdfYIGxhiVfHt7BD2FISn9/thYpnS7RP/wNVXyFxccNsqLixxKxn7YwgdzILaEqs 36UPYkoIKEscuQW1lk+i4/Bfdogwr0RHmxBEo5rE/annoIbISEw6spIJwvaQeHToBjSkJzFK /Hy6mG0Co8IsJN/MQvLNLITFCxiZVzFKpRYU56anJhsVGOrmpZbD4zg5P3cTIziBa/nuYHy9 /q/eIUYmDsZDjBIczEoivIdNHVKFeFMSK6tSi/Lji0pzUosPMZoCw3sis5Rocj4wh+SVxBua WBqYmJkZmhuZGpgrifPea52bIiSQnliSmp2aWpBaBNPHxMEp1cCU7uSdNOU18xEP5Yrn38x8 vk+4/HidtUFGxApBJalvb5avWxqzpr/g8ds7Ch8FLhZMS27beNBox4EzPWnttckL7szxmBjk /X7PmzWpa92WCBxdLJ2/Yb+1QLH1scUPPu08Ybfkm9XkrKM3HzovXOdw+VGuyK9NP3imP31V +nybxT3WqTXNy5Nmbb7wPLmt6njKxtu3V7hlqdjcSPbp2fP3+dXpkjMfdj+4Y/MrruaK35EP Dz94dktEtJ1VqxOd5rZ8t7WI4FtDjYSo7wednk5ZdURr82Nj8cb22FsiO19WLTjD0/2x0W/F 4hVTnkyesfwOy62EYHkBrq5pbOcDL5n5bkzrtsvfVa25N8c95+XzxJtKLMUZiYZazEXFiQAS +L0laQQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupjkeLIzCtJLcpLzFFi42LZdlhJTvfGWYdUg+kfWC0ezNvGZrFm7zkm i/lHzrFaNC9ez2axo+EIq8W7uTIWe19vZbeY8mc5k8Wmx9dYLTbP/8NocXnXHDaLu3dXMVrM OL+PyeLM4l52i9a9R9gtDr9pZ7X4uWsei8WqXUB1tydOZnQQ9tg56y67x6ZVnWwed67tYfPY P3cNu8fmJfUe/X8NPPq2rGL0+LxJLoAjissmJTUnsyy1SN8ugStjy4oNrAXr2Sv+PA9sYPzM 2sXIySEhYCLRvHIGSxcjF4eQwG5GiR0/2hkhEjISy5/1sUHYwhL3W46ANQgJvGeUuHnZA8Rm E9CW+L5+MStIs4jAL2aJ3RPugjUzC/QzSVzflABiCwtESKx5vYgJxGYRUJXYtug+WA2vgJ3E o5c/oZbJS+xZ9B2shlPAXmJnTxMjxDI7iYsbbjJB1AtKnJz5hAVivrxE89bZzBMYBWYhSc1C klrAyLSKUTK1oDg3PbfYsMAoL7Vcrzgxt7g0L10vOT93EyM4yrS0djDuWfVB7xAjEwfjIUYJ DmYlEd7Dpg6pQrwpiZVVqUX58UWlOanFhxilOViUxHm/ve5NERJITyxJzU5NLUgtgskycXBK NTCdv3RuQs9aPtHCLXlF1dHrvcOnaqbPzdHSPlX6XsggV2eD69pvc1V/3mPk8XvIWc9eFlfZ XyEyYW37v+ubJ69pstgU+qRR3anCq7TnttyNT+s/3vGSuFDomnDufB3bXs0CK/lHXp7mV45d X/vzYHjWH7H7XD+44iY+C/ZZXrhozvPQ0qIJ7YyBUT7v3li+2MWf5frwMsf1++2c9VVREkIH ep92dPTMWqTmI9/8l20Fs5SafuHvq4su5r8WExNIdQurKfs3KdP4ZM3up3P+e96qPszA/0U0 5zpDffWKTewf3Oqe3G/Iu3nwTnPmwpo5+6PT91/bsNnzibPg1Ti+oGJJnw8cmXOiLYquMh5Y nqrEUpyRaKjFXFScCAAlyC3xIQMAAA== X-CMS-MailID: 20231031095016epcas2p341141f6354ee083be8d95d615c7a63dd X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20231031095016epcas2p341141f6354ee083be8d95d615c7a63dd References: <20231031094852.118677-1-jaewon02.kim@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add samsung,exynosautov920-usi dedicated compatible for representing USI of ExynosAutoV920 SoC. Signed-off-by: Jaewon Kim --- Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml index a6836904a4f8..70735d188a2e 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml @@ -24,7 +24,9 @@ properties: compatible: oneOf: - items: - - const: samsung,exynosautov9-usi + - enum: + - samsung,exynosautov9-usi + - samsung,exynosautov920-usi - const: samsung,exynos850-usi - enum: - samsung,exynos850-usi From patchwork Tue Oct 31 09:47:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jaewon Kim X-Patchwork-Id: 740905 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39CACC4167B for ; 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Tue, 31 Oct 2023 09:50:16 +0000 (GMT) Received: from epsmgmc1p1new.samsung.com (unknown [182.195.42.40]) by epsmtrp2.samsung.com (KnoxPortal) with ESMTP id 20231031095016epsmtrp2b0f7e79b0b753366159565e03fcda9b9~TKFH4c5E41473914739epsmtrp26; Tue, 31 Oct 2023 09:50:16 +0000 (GMT) X-AuditID: b6c32a47-9a3ff70000002726-28-6540cdd9ad6f Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgmc1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id AF.32.07368.8DDC0456; Tue, 31 Oct 2023 18:50:16 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.55]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20231031095016epsmtip1b1a154a2af3f614110ff1b92841ca099~TKFHDuFjx2314323143epsmtip11; Tue, 31 Oct 2023 09:50:16 +0000 (GMT) From: Jaewon Kim To: Krzysztof Kozlowski , Alim Akhtar , Rob Herring , Conor Dooley , Tomasz Figa , Sylwester Nawrocki , Linus Walleij , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Greg Kroah-Hartman , Jiri Slaby Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org, linux-serial@vger.kernel.org, Jaewon Kim Subject: [PATCH 03/10] dt-bindings: serial: samsung: add exynosautov920-uart compatible Date: Tue, 31 Oct 2023 18:47:45 +0900 Message-ID: <20231031094852.118677-4-jaewon02.kim@samsung.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231031094852.118677-1-jaewon02.kim@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrMJsWRmVeSWpSXmKPExsWy7bCmue7Nsw6pBi07hS0ezNvGZrFm7zkm i/lHzrFaNC9ez2axo+EIq8W7uTIWe19vZbeY8mc5k8Wmx9dYLTbP/8NocXnXHDaLu3dXMVrM OL+PyeLM4l52i9a9R9gtDr9pZ7X4uWsei8WqXUB1tydOZnQQ9tg56y67x6ZVnWwed67tYfPY P3cNu8fmJfUe/X8NPPq2rGL0+LxJLoAjKtsmIzUxJbVIITUvOT8lMy/dVsk7ON453tTMwFDX 0NLCXEkhLzE31VbJxSdA1y0zB+gdJYWyxJxSoFBAYnGxkr6dTVF+aUmqQkZ+cYmtUmpBSk6B eYFecWJucWleul5eaomVoYGBkSlQYUJ2xtEN85kK5rJXLPrwm6mB8SFrFyMnh4SAicSLQ58Z uxi5OIQEdjBKXH+8hQnC+cQose7qflYI5xujRM/Cd+wwLU/vnmaDSOxllFhwaRaU85FR4uC/ LmaQKjYBbYnv6xeDLRER+MIsMf1RNUgRs0A7k8S8by9ZQBLCApESfX0ngBo4OFgEVCUe/mID CfMK2EncmbkJapu8xJ5F35lAbE4Be4mdPU2MEDWCEidnPgEbwwxU07x1NjNE/QUOiXknrSFs F4nLs86xQdjCEq+Ob4GaKSXx+d1eqHi2RPv0P9DAqJC4uGE2VNxYYtazdkaQ05gFNCXW79IH MSUElCWO3ILayifRcfgvO0SYV6KjTQiiUU3i/lSYpTISk46sZIKwPSR2dN1kgYTUJEaJrjlf mCcwKsxC8swsJM/MQli8gJF5FaNYakFxbnpqsVGBMTyCk/NzNzGCU7eW+w7GGW8/6B1iZOJg PMQowcGsJMJ72NQhVYg3JbGyKrUoP76oNCe1+BCjKTCkJzJLiSbnA7NHXkm8oYmlgYmZmaG5 kamBuZI4773WuSlCAumJJanZqakFqUUwfUwcnFINTCIzHkwSdroqfPJYAZ+Pz7Hv3ExXbitX 99TcPfuTQ2x3z3P/p0F3fVM81f693zI7f2LJ2x5vYUMpExn/1Jx2u+K5zL3RMdIcTz5mv0+9 dLlWxrJvQ/MLlY1aq71sDDM/xJUueOKnEuYiLlQioHsr5tXO7XeXT7m3+OzSgiPq0T3Pg61D eFfveTR7a9DzfefquN5WfNQx/901X+VqjpEhXxb7/aVti78mBaw+PquMLcsyVfqrMb/qnHSX FQzxb1r+/3wvVPTwM/va7vQgLwtpD678OWcKN3+TcLLZqnWvI/3YUtYk4a7ZUjwPJ2ac3s+T EezeGLtJ4/KqJ94y1znYLObXi22Ym58pJX7U78YRJZbijERDLeai4kQABjEfp2YEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupnkeLIzCtJLcpLzFFi42LZdlhJTvfGWYdUg43TTC0ezNvGZrFm7zkm i/lHzrFaNC9ez2axo+EIq8W7uTIWe19vZbeY8mc5k8Wmx9dYLTbP/8NocXnXHDaLu3dXMVrM OL+PyeLM4l52i9a9R9gtDr9pZ7X4uWsei8WqXUB1tydOZnQQ9tg56y67x6ZVnWwed67tYfPY P3cNu8fmJfUe/X8NPPq2rGL0+LxJLoAjissmJTUnsyy1SN8ugSvj6Ib5TAVz2SsWffjN1MD4 kLWLkZNDQsBE4und02xdjFwcQgK7GSX+HNvPBpGQkVj+rA/KFpa433KEFaLoPaNE69U/jCAJ NgFtie/rF4MlRAR+MUvsnnAXLMEs0M8kcX1TAogtLBAuce7dduYuRg4OFgFViYe/wIbyCthJ 3Jm5iR1igbzEnkXfmUBsTgF7iZ09TWBjhIBqLm64yQRRLyhxcuYTFojx8hLNW2czT2AUmIUk NQtJagEj0ypGydSC4tz03GTDAsO81HK94sTc4tK8dL3k/NxNjOA409LYwXhv/j+9Q4xMHIyH GCU4mJVEeA+bOqQK8aYkVlalFuXHF5XmpBYfYpTmYFES5zWcMTtFSCA9sSQ1OzW1ILUIJsvE wSnVwHT+2rkrfUYSVo8O7z/z5uzK0ln8n6Zd0bpvc27DSa9K56tX/kf7Lo7+IOQk8N1cevmR Q4eC9jGckf3DNavh+NJ0O5cXYiaXhSK2Lpapcme/23VodqJunJRE5vxqmTUuEwvtrRueTYt0 0LunysP98r+0pbbrt+tfTNq3xV+TSp8Wfsu4W/D6RuFvui5C0dFfZI+zL3Q+tGii09N3scEl bUeXeJyY0nxZkv3TpNyyPe7rXyhOF1b4ElDPECn9udBI6ov9V46Xz7R4+dKu+2idOXDRYZ/W sX13P7O2KPjnL176pciROTEn3a6twbVuNrtlIbedS27aEu+e9r171n+MjdDlaz9oq/rkaq79 lzXSckosxRmJhlrMRcWJAIlR9JIiAwAA X-CMS-MailID: 20231031095016epcas2p4d975f6a3647d24da606ef168c2b234cf X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20231031095016epcas2p4d975f6a3647d24da606ef168c2b234cf References: <20231031094852.118677-1-jaewon02.kim@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add samsung,exynosautov9-uart dedicated compatible for representing uart of ExynosAutoV920 SoC. Signed-off-by: Jaewon Kim --- Documentation/devicetree/bindings/serial/samsung_uart.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml index 8bd88d5cbb11..3e88722d0793 100644 --- a/Documentation/devicetree/bindings/serial/samsung_uart.yaml +++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml @@ -19,7 +19,9 @@ properties: compatible: oneOf: - items: - - const: samsung,exynosautov9-uart + - enum: + - samsung,exynosautov9-uart + - samsung,exynosautov920-uart - const: samsung,exynos850-uart - enum: - apple,s5l-uart From patchwork Tue Oct 31 09:47:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jaewon Kim X-Patchwork-Id: 740902 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 779C1C0018A for ; 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Tue, 31 Oct 2023 09:50:17 +0000 (GMT) Received: from epsmgmc1p1new.samsung.com (unknown [182.195.42.40]) by epsmtrp2.samsung.com (KnoxPortal) with ESMTP id 20231031095017epsmtrp29e336deb23c4bc0eb956d645d253fe77~TKFIuiTFe1473414734epsmtrp2J; Tue, 31 Oct 2023 09:50:17 +0000 (GMT) X-AuditID: b6c32a4d-743ff70000004a32-00-6540cddabf7a Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgmc1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id 41.42.07368.9DDC0456; Tue, 31 Oct 2023 18:50:17 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.55]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20231031095016epsmtip198044db94405101d0236281ec5b4e9ec~TKFHzz4KI2328423284epsmtip1j; Tue, 31 Oct 2023 09:50:16 +0000 (GMT) From: Jaewon Kim To: Krzysztof Kozlowski , Alim Akhtar , Rob Herring , Conor Dooley , Tomasz Figa , Sylwester Nawrocki , Linus Walleij , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Greg Kroah-Hartman , Jiri Slaby Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org, linux-serial@vger.kernel.org, Jaewon Kim Subject: [PATCH 04/10] dt-bindings: pwm: samsung: add exynosautov9 compatible Date: Tue, 31 Oct 2023 18:47:46 +0900 Message-ID: <20231031094852.118677-5-jaewon02.kim@samsung.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231031094852.118677-1-jaewon02.kim@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrKJsWRmVeSWpSXmKPExsWy7bCmhe6tsw6pBjcb+SwezNvGZrFm7zkm i/lHzrFaNC9ez2axo+EIq8W7uTIWe19vZbeY8mc5k8Wmx9dYLTbP/8NocXnXHDaLu3dXMVrM OL+PyeLM4l52i9a9R9gtDr9pZ7X4uWsei8WqXUB1tydOZnQQ9tg56y67x6ZVnWwed67tYfPY P3cNu8fmJfUe/X8NPPq2rGL0+LxJLoAjKtsmIzUxJbVIITUvOT8lMy/dVsk7ON453tTMwFDX 0NLCXEkhLzE31VbJxSdA1y0zB+gdJYWyxJxSoFBAYnGxkr6dTVF+aUmqQkZ+cYmtUmpBSk6B eYFecWJucWleul5eaomVoYGBkSlQYUJ2xsQzOgVvWCsuv3nO1sB4j6WLkZNDQsBE4t3fz2C2 kMAeRomtk6K6GLmA7E+MEq1HP7JCON8YJU79X8cI0/F7awMjRMdeRolPO3ghij4ySty8vIUZ JMEmoC3xff1iVhBbROALs8T0R9UgRcwC7UwS8769BNrHwSEs4C/x534sSA2LgKrEpsMLmEBs XgE7ic0L2pkglslL7Fn0HczmFLCX2NnTxAhRIyhxcuYTsLOZgWqat85mBpkvIXCBQ+L7xN9Q l7pIXDjfzgZhC0u8Or6FHcKWkvj8bi9UPFuiffofVgi7QuLihtlQcWOJWc/aGUHuZBbQlFi/ Sx/ElBBQljhyC2otn0TH4b/sEGFeiY42IYhGNYn7U89BDZGRmHRkJdQnHhKTb7YyQYJqEqPE hdf32CcwKsxC8s0sJN/MQli8gJF5FaNUakFxbnpqslGBoW5eajk8ipPzczcxgtO3lu8Oxtfr /+odYmTiYDzEKMHBrCTCe9jUIVWINyWxsiq1KD++qDQntfgQoykwvCcyS4km5wMzSF5JvKGJ pYGJmZmhuZGpgbmSOO+91rkpQgLpiSWp2ampBalFMH1MHJxSDUzcn5VNJzhNWxTH8PoHl2HD Pd9dFz2558h68Gk8mDV1qb2EuijfrlxPlt/+8+v0VZUq/1pZ361TzTCS/3nW4Oayl94BDf/K VjqHJNiZht9VK3I+c6K0KzZ89md5rTuGu79/O1W56lXcj6bPAXM8zfqsuDK6Av8Uvp8V8DmX Mzh91Tptlkt163eu6zJcn/rwu/4J31kPFXfx9Z2T9f3RvD5i3bTGLJOUAx82P5/v/yLiNFOD ZBSHXCqPTbXsljv7Xm0xlwmxdw/s3PD8m765ufaHLTPZfKanu4V2fFAVeH0xcEni9MUZD3OX F126I39SQLbApVHjgLrUw7dnjrkfSXY8sCbx9zM1pgBuhgkedkosxRmJhlrMRcWJACe53jlo BAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupjkeLIzCtJLcpLzFFi42LZdlhJTvfmWYdUg9WrjCwezNvGZrFm7zkm i/lHzrFaNC9ez2axo+EIq8W7uTIWe19vZbeY8mc5k8Wmx9dYLTbP/8NocXnXHDaLu3dXMVrM OL+PyeLM4l52i9a9R9gtDr9pZ7X4uWsei8WqXUB1tydOZnQQ9tg56y67x6ZVnWwed67tYfPY P3cNu8fmJfUe/X8NPPq2rGL0+LxJLoAjissmJTUnsyy1SN8ugStj4hmdgjesFZffPGdrYLzH 0sXIySEhYCLxe2sDYxcjF4eQwG5Gidv3n7FCJGQklj/rY4OwhSXutxxhhSh6zyhx8nEDM0iC TUBb4vv6xWAJEYFfzBK7J9xlBEkwC/QzSVzflNDFyMEhLOArcWehNUiYRUBVYtPhBUwgNq+A ncTmBe1MEAvkJfYs+g5mcwrYS+zsaQIbIwRUc3HDTah6QYmTM5+wQIyXl2jeOpt5AqPALCSp WUhSCxiZVjFKphYU56bnJhsWGOallusVJ+YWl+al6yXn525iBEeZlsYOxnvz/+kdYmTiYDzE KMHBrCTCe9jUIVWINyWxsiq1KD++qDQntfgQozQHi5I4r+GM2SlCAumJJanZqakFqUUwWSYO TqkGJlnTKe9v1E3tiLx3P72xskXqpN/dXOvSZ6whFxllJu+MS6270igxPfJcw9GSd/y/TxhW vWwLcP3ldOD/I96f2bLJ91deuSW48/rh0rWKmqHdVRlqpaszGDcY9MxtELqdWVfDMqXXzWFC xd9OzlmeznIBl9uLZR46Mvy/uP7XH55te3v+ZK94eui35JwFc9/NOLn2XucX1Qmsyjqf9iqd fGLL31vKyXLRY6dbWWR/uPqJLqvkG9xO0qEeR9wuJ96+Y9CT/DPq+rdHv5xWvlh/VCNPYpKb ruDL3R+W7JBoCsg7veKWwJ+oOeUsPNJOmT43wqJ+h0x7JiJ3IPsBa9FLeXnGimkqd3ODfj5O 6jgSocRSnJFoqMVcVJwIAH074ZMhAwAA X-CMS-MailID: 20231031095017epcas2p306a504619cbaf1fc260f6c46f8b75dd8 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20231031095017epcas2p306a504619cbaf1fc260f6c46f8b75dd8 References: <20231031094852.118677-1-jaewon02.kim@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add samsung,exynosautov920-pwm compatible string to binding document. Signed-off-by: Jaewon Kim Acked-by: Uwe Kleine-König --- Documentation/devicetree/bindings/pwm/pwm-samsung.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml index 2162f661ed5a..b6beca2ae81e 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml @@ -30,6 +30,7 @@ properties: - items: - enum: - samsung,exynosautov9-pwm + - samsung,exynosautov920-pwm - const: samsung,exynos4210-pwm reg: From patchwork Tue Oct 31 09:47:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jaewon Kim X-Patchwork-Id: 740903 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC553C4167B for ; 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Tue, 31 Oct 2023 09:50:18 +0000 (GMT) Received: from epsmgmcp1.samsung.com (unknown [182.195.42.82]) by epsmtrp2.samsung.com (KnoxPortal) with ESMTP id 20231031095018epsmtrp21a1d2d642ff573d3263e74470ca55318~TKFJsI8m31473914739epsmtrp2A; Tue, 31 Oct 2023 09:50:18 +0000 (GMT) X-AuditID: b6c32a48-963ff70000002587-60-6540cddbdfb2 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgmcp1.samsung.com (Symantec Messaging Gateway) with SMTP id 2D.9E.18939.ADDC0456; Tue, 31 Oct 2023 18:50:18 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.55]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20231031095017epsmtip1145573b5339db5250670c8c0f23270fb~TKFIsfAAI2314323143epsmtip14; Tue, 31 Oct 2023 09:50:17 +0000 (GMT) From: Jaewon Kim To: Krzysztof Kozlowski , Alim Akhtar , Rob Herring , Conor Dooley , Tomasz Figa , Sylwester Nawrocki , Linus Walleij , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Greg Kroah-Hartman , Jiri Slaby Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org, linux-serial@vger.kernel.org, Jaewon Kim Subject: [PATCH 05/10] dt-bindings: pinctrl: samsung: add exynosautov920 pinctrl binding Date: Tue, 31 Oct 2023 18:47:47 +0900 Message-ID: <20231031094852.118677-6-jaewon02.kim@samsung.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231031094852.118677-1-jaewon02.kim@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrMJsWRmVeSWpSXmKPExsWy7bCmqe7tsw6pBp+75SwezNvGZrFm7zkm i/lHzrFaNC9ez2axo+EIq8W7uTIWe19vZbeY8mc5k8Wmx9dYLTbP/8NocXnXHDaLu3dXMVrM OL+PyeLM4l52i9a9R9gtDr9pZ7X4uWsei8WqXUB1tydOZnQQ9tg56y67x6ZVnWwed67tYfPY P3cNu8fmJfUe/X8NPPq2rGL0+LxJLoAjKtsmIzUxJbVIITUvOT8lMy/dVsk7ON453tTMwFDX 0NLCXEkhLzE31VbJxSdA1y0zB+gdJYWyxJxSoFBAYnGxkr6dTVF+aUmqQkZ+cYmtUmpBSk6B eYFecWJucWleul5eaomVoYGBkSlQYUJ2xqIDK1gKbvNWtPVdZm1gXMndxcjJISFgIvGv6wpL FyMXh5DADkaJY/OeskI4nxglmvb1M8I5S9s+MsK0zF/dwgZiCwnsZJTYsrcQougjo8TMhT/B EmwC2hLf1y9mBbFFBL4wS0x/VA1SxCzQziQx79tLFpCEsECUxJmXjWA2i4CqxJbdu8E28ArY Saxft4sVYpu8xJ5F35lAbE4Be4mdPU1QNYISJ2c+AetlBqpp3jqbGWSBhMAZDolFbUdZIJpd JBoPLWSHsIUlXh3fAmVLSXx+t5cNws6WaJ/+B2pZhcTFDbOh4sYSs561Ay3jAFqgKbF+lz6I KSGgLHHkFtRaPomOw3/ZIcK8Eh1tQhCNahL3p56DGiIjMenISiYI20Oi/f5/aLhNYpQ4vst4 AqPCLCTPzELyzCyEvQsYmVcxiqUWFOempxYbFZjAIzg5P3cTIzh1a3nsYJz99oPeIUYmDsZD jBIczEoivIdNHVKFeFMSK6tSi/Lji0pzUosPMZoCg3ois5Rocj4we+SVxBuaWBqYmJkZmhuZ GpgrifPea52bIiSQnliSmp2aWpBaBNPHxMEp1cDEfaX88nOLk0qbZgXNtTjvXCq07dJsQd7m Ns+gCaYTzr5bwnzB6oV64s2fUXG9Oz87G19MvBh5/vI/E8PVAYxK5Rd3r+85lFZU3xdZVPHR bHvx/kVPfzGmvxG8+ex7pOVrm8Nir0zk2loi7PZdZ2tRec9xvmauW2NVZLl+iv/q3PMsJb9b ovyX6xl28/z8L3JFt7zh3BIm574Wy4YNgYIfRFPmZ1rGXXvIJdy64tayxPdVE/Q9Jb+susCd s1Y4d9OP93x5aUoMPnmvF/y9WLU31cvylWDTYinxKpOKe/Z3L2duMD9Rr/tPtmhfXPCcbc4H hOpO/TwhcS9yuuvDW04TPjvuajb38l0z84JGxX8lluKMREMt5qLiRABXs61SZgQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFuphkeLIzCtJLcpLzFFi42LZdlhJTvfWWYdUg0kvDS0ezNvGZrFm7zkm i/lHzrFaNC9ez2axo+EIq8W7uTIWe19vZbeY8mc5k8Wmx9dYLTbP/8NocXnXHDaLu3dXMVrM OL+PyeLM4l52i9a9R9gtDr9pZ7X4uWsei8WqXUB1tydOZnQQ9tg56y67x6ZVnWwed67tYfPY P3cNu8fmJfUe/X8NPPq2rGL0+LxJLoAjissmJTUnsyy1SN8ugStj0YEVLAW3eSva+i6zNjCu 5O5i5OSQEDCRmL+6ha2LkYtDSGA7o8SDVbMZIRIyEsuf9bFB2MIS91uOsEIUvWeU+LRhFlgR m4C2xPf1i8ESIgK/mCV2T7gLlmAW6GeSuL4pAcQWFoiQmPNtAjuIzSKgKrFl926wGl4BO4n1 63axQmyQl9iz6DsTiM0pYC+xs6cJrEYIqObihptMEPWCEidnPmGBmC8v0bx1NvMERoFZSFKz kKQWMDKtYhRNLSjOTc9NLjDUK07MLS7NS9dLzs/dxAiOMK2gHYzL1v/VO8TIxMF4iFGCg1lJ hPewqUOqEG9KYmVValF+fFFpTmrxIUZpDhYlcV7lnM4UIYH0xJLU7NTUgtQimCwTB6dUA5NO 6yJ2he9lbzdYlJkkn57f8EfIRve6zBS/KcXTbvRzW+y+nsSiO83Zf1rKAxu7Oc1OTTzqxheE 372aNJHleJnl1lWMx6+eK2mNXSX1cZ5oaNUWlZ5FIS/eFlZ3Tdz5TcPrq6DeYo9/YUtsZ+Xn B56bERM61+7d2QPRG+0mJHIo/mRiSI/+vIj10vL/sbZmCZkh816qXzi8gFHoQvr2l8v8vwXs c7KZp6NaJy17vqMj63sIk5Gevtst9avlCwQbVrMcW3fy6JLYqWeYotl/7P/gKbRg55SZXwr/ Mhp+2/Bky7xA67OFByY97FGc+F6M72H0oX1TF6UdFS9xLPhqz5lz2i+rhpOrxks06M/zrl1K LMUZiYZazEXFiQCbLlc4HwMAAA== X-CMS-MailID: 20231031095018epcas2p2e73b59954e76b14c928b7cb94bc3ac60 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20231031095018epcas2p2e73b59954e76b14c928b7cb94bc3ac60 References: <20231031094852.118677-1-jaewon02.kim@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add compatible string for exynosautov920 pin controller. Signed-off-by: Jaewon Kim --- .../bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml | 2 ++ Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml | 1 + 2 files changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml index 1de91a51234d..e508499cc1f0 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml @@ -37,6 +37,7 @@ properties: - samsung,exynos7-wakeup-eint - samsung,exynos850-wakeup-eint - samsung,exynosautov9-wakeup-eint + - samsung,exynosautov920-wakeup-eint interrupts: description: @@ -99,6 +100,7 @@ allOf: enum: - samsung,exynos850-wakeup-eint - samsung,exynosautov9-wakeup-eint + - samsung,exynosautov920-wakeup-eint then: properties: interrupts: false diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml index 26614621774a..c2e6ff290df3 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml @@ -53,6 +53,7 @@ properties: - samsung,exynos7885-pinctrl - samsung,exynos850-pinctrl - samsung,exynosautov9-pinctrl + - samsung,exynosautov920-pinctrl - tesla,fsd-pinctrl interrupts: From patchwork Tue Oct 31 09:47:48 2023 Content-Type: text/plain; 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Tue, 31 Oct 2023 18:50:20 +0900 (KST) Received: from epsmtrp1.samsung.com (unknown [182.195.40.13]) by epcas2p2.samsung.com (KnoxPortal) with ESMTPA id 20231031095019epcas2p245cd178dad2d97ccb974a6ba44820a2a~TKFKsh8_h1547915479epcas2p2x; Tue, 31 Oct 2023 09:50:19 +0000 (GMT) Received: from epsmgms1p2new.samsung.com (unknown [182.195.42.42]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20231031095019epsmtrp170ec2be3db381ec0453068732b15e2c9~TKFKrlA5h2510125101epsmtrp1o; Tue, 31 Oct 2023 09:50:19 +0000 (GMT) X-AuditID: b6c32a43-721fd700000021c8-46-6540cddc1778 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p2new.samsung.com (Symantec Messaging Gateway) with SMTP id 5F.11.08817.BDDC0456; Tue, 31 Oct 2023 18:50:19 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.55]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20231031095018epsmtip1d3da0103a188d3180b6f91ef2dbff660~TKFJoWlef2325323253epsmtip1p; Tue, 31 Oct 2023 09:50:18 +0000 (GMT) From: Jaewon Kim To: Krzysztof Kozlowski , Alim Akhtar , Rob Herring , Conor Dooley , Tomasz Figa , Sylwester Nawrocki , Linus Walleij , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Greg Kroah-Hartman , Jiri Slaby Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org, linux-serial@vger.kernel.org, Jaewon Kim Subject: [PATCH 06/10] dt-bindings: arm: samsung: Document exynosautov920 SADK board binding Date: Tue, 31 Oct 2023 18:47:48 +0900 Message-ID: <20231031094852.118677-7-jaewon02.kim@samsung.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231031094852.118677-1-jaewon02.kim@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrMJsWRmVeSWpSXmKPExsWy7bCmme6dsw6pBst2i1o8mLeNzWLN3nNM FvOPnGO1aF68ns1iR8MRVot3c2Us9r7eym4x5c9yJotNj6+xWmye/4fR4vKuOWwWd++uYrSY cX4fk8WZxb3sFq17j7BbHH7Tzmrxc9c8FotVu4Dqbk+czOgg7LFz1l12j02rOtk87lzbw+ax f+4ado/NS+o9+v8aePRtWcXo8XmTXABHVLZNRmpiSmqRQmpecn5KZl66rZJ3cLxzvKmZgaGu oaWFuZJCXmJuqq2Si0+ArltmDtA7SgpliTmlQKGAxOJiJX07m6L80pJUhYz84hJbpdSClJwC 8wK94sTc4tK8dL281BIrQwMDI1OgwoTsjF0NZxgLPrJXnPg0jbmBcTlbFyMnh4SAicSelp8s XYxcHEICOxglXuy8xgbhfGKUuLr4FVTmG6PE2183WWBaVq+5AVW1l1Hi1PEjTBDOR0aJ5g8N YFVsAtoS39cvZgWxRQS+MEtMf1QNUsQs0M4kMe/bS7AiYYE4iXM3p7GD2CwCqhJ33z8HauDg 4BWwk9i5WBdim7zEnkXfmUBsTgF7iZ09TYwgNq+AoMTJmU/AxjAD1TRvnc0MMl9C4AKHxJPt /1khml0kGpYfhLKFJV4d38IOYUtJvOxvg7KzJdqn/4GqqZC4uGE2NGSMJWY9a2cEuYdZQFNi /S59EFNCQFniyC2otXwSHYf/skOEeSU62oQgGtUk7k89BzVERmLSkZVMECUeEo8v2ENCahKj RFfPN/YJjAqzkDwzC8kzsxD2LmBkXsUollpQnJuemmxUYAiP4OT83E2M4NSt5byD8cr8f3qH GJk4GA8xSnAwK4nwHjZ1SBXiTUmsrEotyo8vKs1JLT7EaAoM6YnMUqLJ+cDskVcSb2hiaWBi ZmZobmRqYK4kznuvdW6KkEB6YklqdmpqQWoRTB8TB6dUAxNPmeTHkDWq75PVfp/+vj7suxKT rvCGyphPHelSQqqbql1YjI6/WuG6hGHi7do8kQkFfWUHAzW1Hu/7e39vIyfrFZOnZ+YWR38O z2SYwZuzvP6qYLXkJ279BZ/5s9Xa7ol/6ilKkp5xV+PMlim8X3N+KeRt/zJRd2XwlFNXTKxK nGUmVqi9UJfQ3jK3+LtXx3aGvcUlx6z9zNJ5Fi5fdWOGkj3nr7z5jOdfOnr86DirqTvpXdy8 6ZGLjq+/9vO15m9VK7G1i+yCOR/fvbj/X+VDvyMte0TsNR+wtLRv6lui1xAjpZ+x5vHD2RNv qzM1PZl5QvH30/P8ffL2e2X89/5a6pmVqylc9OLpQYOy+W+UWIozEg21mIuKEwHJE3vDZgQA AA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupnkeLIzCtJLcpLzFFi42LZdlhJTvf2WYdUg5t/jC0ezNvGZrFm7zkm i/lHzrFaNC9ez2axo+EIq8W7uTIWe19vZbeY8mc5k8Wmx9dYLTbP/8NocXnXHDaLu3dXMVrM OL+PyeLM4l52i9a9R9gtDr9pZ7X4uWsei8WqXUB1tydOZnQQ9tg56y67x6ZVnWwed67tYfPY P3cNu8fmJfUe/X8NPPq2rGL0+LxJLoAjissmJTUnsyy1SN8ugStjV8MZxoKP7BUnPk1jbmBc ztbFyMkhIWAisXrNDSCbi0NIYDejxM4F3xghEjISy5/1QRUJS9xvOcIKUfSeUeLao8UsIAk2 AW2J7+sXgyVEBH4xS+yecBesm1mgn0ni+qYEEFtYIEZi56UbYA0sAqoSd98/B2rg4OAVsJPY uVgXYoG8xJ5F35lAbE4Be4mdPU1gY4SASi5uuAkW5xUQlDg58wkLxHh5ieats5knMArMQpKa hSS1gJFpFaNkakFxbnpusWGBUV5quV5xYm5xaV66XnJ+7iZGcJxpae1g3LPqg94hRiYOxkOM EhzMSiK8h00dUoV4UxIrq1KL8uOLSnNSiw8xSnOwKInzfnvdmyIkkJ5YkpqdmlqQWgSTZeLg lGpgmpW186nifjsJl9NGcTNky/0rnZxtJt3S+GJ0RNn5BdeqdHHF2/PvXdsae/6B3boHjI8S Hx1NvKKicpX9BKeCoajw2us/XxyfvsVR3XaZwqIFeWkX+iKmCXjUaAvaXdBvu2UptvW6XHyK 5DoX83N+9e9yykIunWP+dnthtezi5evaX12xa+TwZCmsq0xZxDyzQUo1Pvqg5D3Ni3XtfznU i3eEbj0ccLMqySp+Rsn7uSG9JXv7Ypje6StbbzAO9b/PUNlmfLHw69XPswOyj25T2vGqkJPl 1H3esuMf271UW1caNHb8PlRutSK3vtGN7cfylk1u9TMEtHXflPY76zCpiqbvjNE98n6jwFth aXslluKMREMt5qLiRACdeVROIgMAAA== X-CMS-MailID: 20231031095019epcas2p245cd178dad2d97ccb974a6ba44820a2a X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20231031095019epcas2p245cd178dad2d97ccb974a6ba44820a2a References: <20231031094852.118677-1-jaewon02.kim@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add binding for the ExynosAutov920 SADK(Samsung Automotive Development Kit) board. Signed-off-by: Jaewon Kim --- .../devicetree/bindings/arm/samsung/samsung-boards.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml index e3ffd8159ab6..01dcbd8aa703 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml @@ -230,6 +230,12 @@ properties: - samsung,exynosautov9-sadk # Samsung Exynos Auto v9 SADK - const: samsung,exynosautov9 + - description: Exynos Auto v920 based boards + items: + - enum: + - samsung,exynosautov920-sadk # Samsung Exynos Auto v920 SADK + - const: samsung,exynosautov920 + required: - compatible From patchwork Tue Oct 31 09:47:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jaewon Kim X-Patchwork-Id: 739971 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33507C4332F for ; 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Tue, 31 Oct 2023 09:50:20 +0000 (GMT) Received: from epsmgms1p2new.samsung.com (unknown [182.195.42.42]) by epsmtrp2.samsung.com (KnoxPortal) with ESMTP id 20231031095020epsmtrp259e02aed1437c19019e7a84076e031b0~TKFLRHmSi1473914739epsmtrp2G; Tue, 31 Oct 2023 09:50:20 +0000 (GMT) X-AuditID: b6c32a47-9a3ff70000002726-30-6540cddc0f89 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p2new.samsung.com (Symantec Messaging Gateway) with SMTP id C0.21.08817.CDDC0456; Tue, 31 Oct 2023 18:50:20 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.55]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20231031095019epsmtip14215fc8c0abd0124137d6b5d91a71163~TKFKmSILj2330523305epsmtip1L; Tue, 31 Oct 2023 09:50:19 +0000 (GMT) From: Jaewon Kim To: Krzysztof Kozlowski , Alim Akhtar , Rob Herring , Conor Dooley , Tomasz Figa , Sylwester Nawrocki , Linus Walleij , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Greg Kroah-Hartman , Jiri Slaby Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org, linux-serial@vger.kernel.org, Jaewon Kim Subject: [PATCH 07/10] soc: samsung: exynos-chipid: add exynosautov920 SoC support Date: Tue, 31 Oct 2023 18:47:49 +0900 Message-ID: <20231031094852.118677-8-jaewon02.kim@samsung.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231031094852.118677-1-jaewon02.kim@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrCJsWRmVeSWpSXmKPExsWy7bCmqe6dsw6pBvObrC0ezNvGZrFm7zkm i/lHzrFaNC9ez2axo+EIq8W7uTIWe19vZbeY8mc5k8Wmx9dYLTbP/8NocXnXHDaLu3dXMVrM OL+PyeLM4l52i9a9R9gtDr9pZ7X4uWsei8WqXUB1tydOZnQQ9tg56y67x6ZVnWwed67tYfPY P3cNu8fmJfUe/X8NPPq2rGL0+LxJLoAjKtsmIzUxJbVIITUvOT8lMy/dVsk7ON453tTMwFDX 0NLCXEkhLzE31VbJxSdA1y0zB+gdJYWyxJxSoFBAYnGxkr6dTVF+aUmqQkZ+cYmtUmpBSk6B eYFecWJucWleul5eaomVoYGBkSlQYUJ2xpvt29kKrrFWNLxaxNLA+Jyli5GTQ0LAROLQn8lA NheHkMAORoltj08xgySEBD4xSrRezoRIfGOU2Ll0ESNMx+6rv5ghEnsZJbqOnmWFcD4ySrz8 dwOsik1AW+L7+sWsILaIwBdmiemPqkGKmAXamSTmfXsJtlxYIERi/Zv37CA2i4CqRPu1R2DN vAJ2Er2rr0EdKC+xZ9F3JhCbU8BeYmdPE1SNoMTJmU/AapiBapq3zgY7SULgDIdE/8mDzBDN LhKHJzRB2cISr45vYYewpSQ+v9vLBmFnS7RP/8MKYVdIXNwwGypuLDHrWTvQMg6gBZoS63fp g5gSAsoSR25BreWT6Dj8lx0izCvR0SYE0agmcX/qOaghMhKTjqxkgrA9JGZtnQYNq0mMEn/P 3maawKgwC8k3s5B8Mwth8QJG5lWMYqkFxbnpqcVGBcbwGE7Oz93ECE7eWu47GGe8/aB3iJGJ g/EQowQHs5II72FTh1Qh3pTEyqrUovz4otKc1OJDjKbAsJ7ILCWanA/MH3kl8YYmlgYmZmaG 5kamBuZK4rz3WuemCAmkJ5akZqemFqQWwfQxcXBKNTD1PWLg37VFJOp7pZGj5nbJI0s2LfyY oDPvtnzHzHldq7t5918S/2n1UbDj6M/f53XDX7Ctsep6aeW93T6Me/XDtO83WkoeNIhK5t0K Dpy7Q2P7yfPfv27aWylS99xG7+2F5UrM0+wKVMvdJ+3an++8lPmQdwa/yFEBFfM5BvVne5dk PGXW738aIezK7H815uns8/H/2EXLVHT6Hk2+qavEX8B3/lBP2+fvmoeT3h10FOJZqs3RfPi4 kLKp4V+Dh3uNJqyxmf2UL7jk49ppk8zO93tylYs1HFo24/U8LoEJgdJ1FxeGFpZPvy1j7xu7 V007ofvX01gH1+q9XhNN++T/+fT5P9S/2NL67O/63EQlluKMREMt5qLiRACqy2ugZwQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprAIsWRmVeSWpSXmKPExsWy7bCSnO6dsw6pBp8uKlo8mLeNzWLN3nNM FvOPnGO1aF68ns1iR8MRVot3c2Us9r7eym4x5c9yJotNj6+xWmye/4fR4vKuOWwWd++uYrSY cX4fk8WZxb3sFq17j7BbHH7Tzmrxc9c8FotVu4Dqbk+czOgg7LFz1l12j02rOtk87lzbw+ax f+4ado/NS+o9+v8aePRtWcXo8XmTXABHFJdNSmpOZllqkb5dAlfGm+3b2QqusVY0vFrE0sD4 nKWLkZNDQsBEYvfVX8xdjFwcQgK7GSWe7p7ABJGQkVj+rI8NwhaWuN9yhBWi6D2jxPaXS8G6 2QS0Jb6vXwyWEBH4xSyxe8JdRpAEs0A/k8T1TQkgtrBAkMTue01gU1kEVCXarz0Cq+EVsJPo XX0N6gx5iT2LvoPVcArYS+zsaQKrEQKqubjhJhNEvaDEyZlPWCDmy0s0b53NPIFRYBaS1Cwk qQWMTKsYJVMLinPTc4sNC4zyUsv1ihNzi0vz0vWS83M3MYIjTUtrB+OeVR/0DjEycTAeYpTg YFYS4T1s6pAqxJuSWFmVWpQfX1Sak1p8iFGag0VJnPfb694UIYH0xJLU7NTUgtQimCwTB6dU A5NzRfTF4vTiSSzbs/NmzHtZ+2Xz+ceP11mu5GDRWRXzJGeG5Nk+4RfiYinieuermLRTA/ZJ bFh5222pxRz3y3MP7vv/Q+nY33dTNCbPzvcQ5xJXZXgg9Ljf8I5oyXJBkR/8O75V+er2ZnFP aSs05ps729wztlnE9JzIYwOfy4vYb9b05BjqXrcXK51e5tWrWBgmodyueaH0/tuDrduY2srq u9es/vf8ye/qn7N9zGbFb218E9BwmyUgyOTx6TvPxa3O1a3XubplymYd8ZiD85P9Y04yJHLP VIm1X8chILKh1+U5S8dsgfofZz9pey4O2H/O/DhD2YwXHrWCmucnWJ7s7rMtTv605NXsL7p5 f5RYijMSDbWYi4oTAbMzgVkjAwAA X-CMS-MailID: 20231031095020epcas2p1b72264a38832dc2fcb9df8e6b968770f X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20231031095020epcas2p1b72264a38832dc2fcb9df8e6b968770f References: <20231031094852.118677-1-jaewon02.kim@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add EXYNOSAUTOV920 information to soc_ids tables. This SoC product id is "0x0A920000". Signed-off-by: Jaewon Kim --- drivers/soc/samsung/exynos-chipid.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/samsung/exynos-chipid.c b/drivers/soc/samsung/exynos-chipid.c index 7ba45c4aff97..3ee554595e49 100644 --- a/drivers/soc/samsung/exynos-chipid.c +++ b/drivers/soc/samsung/exynos-chipid.c @@ -59,6 +59,7 @@ static const struct exynos_soc_id { { "EXYNOS7885", 0xE7885000 }, { "EXYNOS850", 0xE3830000 }, { "EXYNOSAUTOV9", 0xAAA80000 }, + { "EXYNOSAUTOV920", 0x0A920000 }, }; static const char *product_id_to_soc_id(unsigned int product_id) From patchwork Tue Oct 31 09:47:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jaewon Kim X-Patchwork-Id: 739970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E17F4C4167B for ; Tue, 31 Oct 2023 09:52:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235606AbjJaJwF (ORCPT ); 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Tue, 31 Oct 2023 09:50:20 +0000 (GMT) X-AuditID: b6c32a4d-9f7ff70000004a32-0d-6540cddd3d93 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p2new.samsung.com (Symantec Messaging Gateway) with SMTP id 52.21.08817.CDDC0456; Tue, 31 Oct 2023 18:50:20 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.55]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20231031095020epsmtip16885486a60d9c4f0de010c5ce61d471e~TKFLMBBSC2332123321epsmtip1e; Tue, 31 Oct 2023 09:50:20 +0000 (GMT) From: Jaewon Kim To: Krzysztof Kozlowski , Alim Akhtar , Rob Herring , Conor Dooley , Tomasz Figa , Sylwester Nawrocki , Linus Walleij , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Greg Kroah-Hartman , Jiri Slaby Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org, linux-serial@vger.kernel.org, Jaewon Kim Subject: [PATCH 08/10] pinctrl: samsung: add exynosautv920 pinctrl Date: Tue, 31 Oct 2023 18:47:50 +0900 Message-ID: <20231031094852.118677-9-jaewon02.kim@samsung.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231031094852.118677-1-jaewon02.kim@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Te0xTVxjPube9vZh0uRbYThqyNZdsS92gLc8DCoNplqrbIJrMPQM37Q10 lNvaFoRNHI7xzHjL0PLaeIRBzNDyGBYQAghjGxWn6xxScdPgBHUMt4IGdC2tm//9vu/7fef7 /b5zDomLfiXEpIYzsQaO0dLEFl7fmDQiyDEdx8rHrP7oWmMfgU4O2TDUNG7jo7yWLgL1547z 0d2GADS01CtAx9bbMWS5buej7qZ1gC5a6wnkcHQCdPz8WQz92FIqQPlD4wI0druQj+5bG3mo 0+riXamsBnG+yjNmh0Bp6SwmlHP2QUI53HBSoOxu/URZviFXlvV0AuU9y7OJ5LtpO1JZRs0a JCyn0qk1XEoMvXd/0s6k8Ai5IkgRhSJpCcekszH0rtcTg17TaF12aEkmo81wpRIZo5GWxe4w 6DJMrCRVZzTF0KxerdVH6oONTLoxg0sJ5lhTtEIuDwl3EZPTUo8v3QN6uxlkPTjNywXnj4IS 4ENCKgxOLPRiJWALKaIGAawZfeQNVgCcrvoe9wROADvqVwSPW0p7WnmewhCA9up6gSf4C0DH TwOEm0VQL8HVrha+G/tRf+Ow9veP3SScKsRgo/MWz13wpV6F3d+ub5J41POwddruypOkkIqF U1OhnmnPwcHmVcyNfahX4JnPP90ULqS2wqkTNzaPwV2cvN66TamQmiHhZPuS190uWNJ3hfBg X7g42eO1IIa3ygu8OA0W1no0QCoLXjhV5+WHQvNCIXDrwSkp7LLK3BBSgXB81jv2KVg0tiHw pIWwqEDkaXwBztfYvIcEwKrxDsyDlTB37RLfs6oqAOeHJ4gKIDE/4cb8hBvz/4O/BHgnELN6 Y3oKqwrRK4I49tB/16zSpVvA5hvf9kY/WOraCB4FGAlGASRx2k84Fh7HioRqJvsj1qBLMmRo WeMoCHetuxIX+6t0rk/CmZIUYVHysIgIRWRIuDySfkZ4Nb9BLaJSGBObxrJ61vC4DyN9xLlY x2/t8MjbNRV34vMOtmJnL84vOx7kDJdexu4Saw//5EJWnk4esbTHvjhguXxj8mX63KWWiT+u Hpqdbb752ZsJi7mq0a9i9gbsObe9b75NYPhBKv3i61NG6oB49uHhhXcSJL11Kucdqd/MtbcG 7XmaE8Xp1bFTVNvcLztFltOxPwcW8dRYdPDyQCP3yHKgwhCdPLJ7+74S3DaCAq3Z94+Ssv7W 6X3HhmTaoNCF79b6bdnkgo25DhTrU2WBmpmyQW3l6gWD7b0jW/01mbJU6e3mD0HTXGTOcpbT 6VjErVROLRHP7f9gz+7MgqjiOck3+ZZ/Eg6HtRXG16H3y28G5wwfxGieMZVRbMMNRuZf/wAH KmwEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprAIsWRmVeSWpSXmKPExsWy7bCSnO6dsw6pBke/mVk8mLeNzWLN3nNM FvOPnGO1aF68ns1iR8MRVot3c2Us9r7eym4x5c9yJotNj6+xWmye/4fR4vKuOWwWd++uYrSY cX4fk8WZxb3sFq17j7BbHH7Tzmrxc9c8FotVu4Dqbk+czOgg7LFz1l12j02rOtk87lzbw+ax f+4ado/NS+o9+v8aePRtWcXo8XmTXABHFJdNSmpOZllqkb5dAlfGjNefGQuuzWKs+LWRpYHx fCNjFyMnh4SAiUTvliUsXYxcHEICuxkl+j7vhErISCx/1scGYQtL3G85wgpR9J5R4lzjMbAE m4C2xPf1i8ESIgK/mCV2T7gL1s0s0M8kcX1TAogtLOAksXn7H1YQm0VAVWLJ2WtA6zg4eAXs JE6eNIZYIC+xZ9F3JhCbU8BeYmdPE9gYIaCSixtugsV5BQQlTs58wgIxXl6ieets5gmMArOQ pGYhSS1gZFrFKJlaUJybnltsWGCUl1quV5yYW1yal66XnJ+7iREcaVpaOxj3rPqgd4iRiYPx EKMEB7OSCO9hU4dUId6UxMqq1KL8+KLSnNTiQ4zSHCxK4rzfXvemCAmkJ5akZqemFqQWwWSZ ODilGpgyg+vTfiudaL5dd+jriuYeLfv3krkhK05tXen69+M1o9oCC5c1VzZuVQq5OuH+mfR7 qckPzCP9JlnmbvvTxlQkviWq9vNh9lvq1in7umZUHcwW+W+le/j3lCNvTrW7nmPZcFaZkbPs ddI700ONwUL33zhxP3YTMd/TZP48yorXtO1FRKOC9EzhP1F3/rnlXnXdUuz55miiIot2wCYO Z58nT+RmOk6TdZyq7J3eXKG27Xp+RaO50ZcHrHFVyXy9j54pKa3wvVHveEDnvvQ74UfiVmEN 6svNDHo7um49OXf+gdayA/+yeKbN/5+lItGV0KjnDPSUs8RWkdctK2u2MeU31k8sVxQuuHC7 iMlfiaU4I9FQi7moOBEAbSemhCMDAAA= X-CMS-MailID: 20231031095020epcas2p36f320f3609064b3c906449a2ac517f43 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20231031095020epcas2p36f320f3609064b3c906449a2ac517f43 References: <20231031094852.118677-1-jaewon02.kim@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org ExynosAutov920 GPIO has a different register structure. In the existing Exynos series, EINT control register enumerated after a specific offset (e.g EXYNOS_GPIO_ECON_OFFSET). However, in ExynosAutov920 SoC, the register that controls EINT belongs to each GPIO group, and each GPIO group has 0x1000 align. This is a structure to protect the GPIO group with S2MPU in VM environment, and will only be applied in ExynosAuto series SoCs. Example) ------------------------------------------------- | original | ExynosAutov920 | |-----------------------------------------------| | 0x0 GPIO_CON | 0x0 GPIO_CON | | 0x4 GPIO_DAT | 0x4 GPIO_DAT | | 0x8 GPIO_PUD | 0x8 GPIO_PUD | | 0xc GPIO_DRV | 0xc GPIO_DRV | | 0x700 EINT_CON | 0x18 EINT_CON | | 0x800 EINT_FLTCON | 0x1c EINT_FLTCON0 | | 0x900 EINT_MASK | 0x20 EINT_FLTCON1 | | 0xa00 EINT_PEND | 0x24 EINT_MASK | | | 0x28 EINT_PEND | ------------------------------------------------- Pinctrl data for ExynosAutoV920 SoC. - GPA0,GPA1 (10): External wake up interrupt - GPQ0 (2): SPMI (PMIC I/F) - GPB0,GPB1,GPB2,GPB3,GPB4,GPB5,GPB6 (47): I2S Audio - GPH0,GPH1,GPH2,GPH3,GPH4,GPH5,GPH6,GPH8 (49): PCIE, UFS, Ethernet - GPG0,GPG1,GPG2,GPG3,GPG4,GPG5 (29): General purpose - GPP0,GPP1,GPP2,GPP3,GPP4,GPP5,GPP6,GPP7,GPP8,GPP9,GPP10 (77): USI Signed-off-by: Jaewon Kim --- .../pinctrl/samsung/pinctrl-exynos-arm64.c | 131 ++++++++++++++++++ drivers/pinctrl/samsung/pinctrl-exynos.c | 99 ++++++++++++- drivers/pinctrl/samsung/pinctrl-exynos.h | 27 ++++ drivers/pinctrl/samsung/pinctrl-samsung.c | 5 + drivers/pinctrl/samsung/pinctrl-samsung.h | 13 ++ 5 files changed, 268 insertions(+), 7 deletions(-) diff --git a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c index cb965cf93705..8551b85c3e6f 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c @@ -796,3 +796,134 @@ const struct samsung_pinctrl_of_match_data fsd_of_data __initconst = { .ctrl = fsd_pin_ctrl, .num_ctrl = ARRAY_SIZE(fsd_pin_ctrl), }; + +/* pin banks of exynosautov920 pin-controller 0 (ALIVE) */ +static struct samsung_pin_bank_data exynosautov920_pin_banks0[] = { + EXYNOSV920_PIN_BANK_EINTW(8, 0x0000, "gpa0", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTW(2, 0x1000, "gpa1", 0x18, 0x20, 0x24), + EXYNOS850_PIN_BANK_EINTN(2, 0x2000, "gpq0"), +}; + +/* pin banks of exynosautov920 pin-controller 1 (AUD) */ +static struct samsung_pin_bank_data exynosautov920_pin_banks1[] = { + EXYNOSV920_PIN_BANK_EINTG(7, 0x0000, "gpb0", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(6, 0x1000, "gpb1", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(8, 0x2000, "gpb2", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(8, 0x3000, "gpb3", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(8, 0x4000, "gpb4", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(5, 0x5000, "gpb5", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(5, 0x6000, "gpb6", 0x18, 0x24, 0x28), +}; + +/* pin banks of exynosautov920 pin-controller 2 (HSI0) */ +static struct samsung_pin_bank_data exynosautov920_pin_banks2[] = { + EXYNOSV920_PIN_BANK_EINTG(6, 0x0000, "gph0", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(2, 0x1000, "gph1", 0x18, 0x20, 0x24), +}; + +/* pin banks of exynosautov920 pin-controller 3 (HSI1) */ +static struct samsung_pin_bank_data exynosautov920_pin_banks3[] = { + EXYNOSV920_PIN_BANK_EINTG(7, 0x000, "gph8", 0x18, 0x24, 0x28), +}; + +/* pin banks of exynosautov920 pin-controller 4 (HSI2) */ +static struct samsung_pin_bank_data exynosautov920_pin_banks4[] = { + EXYNOSV920_PIN_BANK_EINTG(8, 0x0000, "gph3", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(7, 0x1000, "gph4", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(8, 0x2000, "gph5", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(7, 0x3000, "gph6", 0x18, 0x24, 0x28), +}; + +/* pin banks of exynosautov920 pin-controller 5 (HSI2UFS) */ +static struct samsung_pin_bank_data exynosautov920_pin_banks5[] = { + EXYNOSV920_PIN_BANK_EINTG(4, 0x000, "gph2", 0x18, 0x20, 0x24), +}; + +/* pin banks of exynosautov920 pin-controller 6 (PERIC0) */ +static struct samsung_pin_bank_data exynosautov920_pin_banks6[] = { + EXYNOSV920_PIN_BANK_EINTG(8, 0x0000, "gpp0", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(8, 0x1000, "gpp1", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(8, 0x2000, "gpp2", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(5, 0x3000, "gpg0", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(8, 0x4000, "gpp3", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(4, 0x5000, "gpp4", 0x18, 0x20, 0x24), + EXYNOSV920_PIN_BANK_EINTG(4, 0x6000, "gpg2", 0x18, 0x20, 0x24), + EXYNOSV920_PIN_BANK_EINTG(4, 0x7000, "gpg5", 0x18, 0x20, 0x24), + EXYNOSV920_PIN_BANK_EINTG(3, 0x8000, "gpg3", 0x18, 0x20, 0x24), + EXYNOSV920_PIN_BANK_EINTG(5, 0x9000, "gpg4", 0x18, 0x24, 0x28), +}; + +/* pin banks of exynosautov920 pin-controller 7 (PERIC1) */ +static struct samsung_pin_bank_data exynosautov920_pin_banks7[] = { + EXYNOSV920_PIN_BANK_EINTG(8, 0x0000, "gpp5", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(5, 0x1000, "gpp6", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(4, 0x2000, "gpp10", 0x18, 0x20, 0x24), + EXYNOSV920_PIN_BANK_EINTG(8, 0x3000, "gpp7", 0x18, 0x24, 0x28), + EXYNOSV920_PIN_BANK_EINTG(4, 0x4000, "gpp8", 0x18, 0x20, 0x24), + EXYNOSV920_PIN_BANK_EINTG(4, 0x5000, "gpp11", 0x18, 0x20, 0x24), + EXYNOSV920_PIN_BANK_EINTG(4, 0x6000, "gpp9", 0x18, 0x20, 0x24), + EXYNOSV920_PIN_BANK_EINTG(4, 0x7000, "gpp12", 0x18, 0x20, 0x24), + EXYNOSV920_PIN_BANK_EINTG(8, 0x8000, "gpg1", 0x18, 0x24, 0x28), +}; + +const struct samsung_pin_ctrl exynosautov920_pin_ctrl[] = { + { + /* pin-controller instance 0 ALIVE data */ + .pin_banks = exynosautov920_pin_banks0, + .nr_banks = ARRAY_SIZE(exynosautov920_pin_banks0), + .eint_wkup_init = exynos_eint_wkup_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 1 AUD data */ + .pin_banks = exynosautov920_pin_banks1, + .nr_banks = ARRAY_SIZE(exynosautov920_pin_banks1), + }, { + /* pin-controller instance 2 HSI0 data */ + .pin_banks = exynosautov920_pin_banks2, + .nr_banks = ARRAY_SIZE(exynosautov920_pin_banks2), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 2 HSI1 data */ + .pin_banks = exynosautov920_pin_banks3, + .nr_banks = ARRAY_SIZE(exynosautov920_pin_banks3), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 2 HSI2 data */ + .pin_banks = exynosautov920_pin_banks4, + .nr_banks = ARRAY_SIZE(exynosautov920_pin_banks4), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 2 HSI2UFS data */ + .pin_banks = exynosautov920_pin_banks5, + .nr_banks = ARRAY_SIZE(exynosautov920_pin_banks5), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 2 PERIC0 data */ + .pin_banks = exynosautov920_pin_banks6, + .nr_banks = ARRAY_SIZE(exynosautov920_pin_banks6), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 2 PERIC1 data */ + .pin_banks = exynosautov920_pin_banks7, + .nr_banks = ARRAY_SIZE(exynosautov920_pin_banks7), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, +}; + +const struct samsung_pinctrl_of_match_data exynosautov920_of_data __initconst = { + .ctrl = exynosautov920_pin_ctrl, + .num_ctrl = ARRAY_SIZE(exynosautov920_pin_ctrl), +}; diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c index a8212fc126bf..c50ddbc6bfd4 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c @@ -56,6 +56,9 @@ static void exynos_irq_mask(struct irq_data *irqd) unsigned int mask; unsigned long flags; + if (bank->combine) + reg_mask = bank->mask_offset; + raw_spin_lock_irqsave(&bank->slock, flags); mask = readl(bank->eint_base + reg_mask); @@ -72,6 +75,9 @@ static void exynos_irq_ack(struct irq_data *irqd) struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); unsigned long reg_pend = our_chip->eint_pend + bank->eint_offset; + if (bank->combine) + reg_pend = bank->pend_offset; + writel(1 << irqd->hwirq, bank->eint_base + reg_pend); } @@ -95,6 +101,9 @@ static void exynos_irq_unmask(struct irq_data *irqd) if (irqd_get_trigger_type(irqd) & IRQ_TYPE_LEVEL_MASK) exynos_irq_ack(irqd); + if (bank->combine) + reg_mask = bank->mask_offset; + raw_spin_lock_irqsave(&bank->slock, flags); mask = readl(bank->eint_base + reg_mask); @@ -221,6 +230,19 @@ static const struct exynos_irq_chip exynos_gpio_irq_chip __initconst = { /* eint_wake_mask_value not used */ }; +static const struct exynos_irq_chip exynosautov920_gpio_irq_chip __initconst = { + .chip = { + .name = "exynosautov920_gpio_irq_chip", + .irq_unmask = exynos_irq_unmask, + .irq_mask = exynos_irq_mask, + .irq_ack = exynos_irq_ack, + .irq_set_type = exynos_irq_set_type, + .irq_request_resources = exynos_irq_request_resources, + .irq_release_resources = exynos_irq_release_resources, + }, + /* eint_wake_mask_value not used */ +}; + static int exynos_eint_irq_map(struct irq_domain *h, unsigned int virq, irq_hw_number_t hw) { @@ -247,7 +269,10 @@ static irqreturn_t exynos_eint_gpio_irq(int irq, void *data) unsigned int svc, group, pin; int ret; - svc = readl(bank->eint_base + EXYNOS_SVC_OFFSET); + if (bank->combine) + svc = readl(bank->eint_base + EXYNOSAUTOV920_SVC_OFFSET); + else + svc = readl(bank->eint_base + EXYNOS_SVC_OFFSET); group = EXYNOS_SVC_GROUP(svc); pin = svc & EXYNOS_SVC_NUM_MASK; @@ -297,8 +322,12 @@ __init int exynos_eint_gpio_init(struct samsung_pinctrl_drv_data *d) if (bank->eint_type != EINT_TYPE_GPIO) continue; - bank->irq_chip = devm_kmemdup(dev, &exynos_gpio_irq_chip, - sizeof(*bank->irq_chip), GFP_KERNEL); + if (bank->combine) + bank->irq_chip = devm_kmemdup(dev, &exynosautov920_gpio_irq_chip, + sizeof(*bank->irq_chip), GFP_KERNEL); + else + bank->irq_chip = devm_kmemdup(dev, &exynos_gpio_irq_chip, + sizeof(*bank->irq_chip), GFP_KERNEL); if (!bank->irq_chip) { ret = -ENOMEM; goto err_domains; @@ -456,6 +485,22 @@ static const struct exynos_irq_chip exynos7_wkup_irq_chip __initconst = { .set_eint_wakeup_mask = exynos_pinctrl_set_eint_wakeup_mask, }; +static const struct exynos_irq_chip exynosautov920_wkup_irq_chip __initconst = { + .chip = { + .name = "exynosautov920_wkup_irq_chip", + .irq_unmask = exynos_irq_unmask, + .irq_mask = exynos_irq_mask, + .irq_ack = exynos_irq_ack, + .irq_set_type = exynos_irq_set_type, + .irq_set_wake = exynos_wkup_irq_set_wake, + .irq_request_resources = exynos_irq_request_resources, + .irq_release_resources = exynos_irq_release_resources, + }, + .eint_wake_mask_value = &eint_wake_mask_value, + .eint_wake_mask_reg = EXYNOS5433_EINT_WAKEUP_MASK, + .set_eint_wakeup_mask = exynos_pinctrl_set_eint_wakeup_mask, +}; + /* list of external wakeup controllers supported */ static const struct of_device_id exynos_wkup_irq_ids[] = { { .compatible = "samsung,s5pv210-wakeup-eint", @@ -468,6 +513,8 @@ static const struct of_device_id exynos_wkup_irq_ids[] = { .data = &exynos7_wkup_irq_chip }, { .compatible = "samsung,exynosautov9-wakeup-eint", .data = &exynos7_wkup_irq_chip }, + { .compatible = "samsung,exynosautov920-wakeup-eint", + .data = &exynosautov920_wkup_irq_chip }, { } }; @@ -655,6 +702,20 @@ static void exynos_pinctrl_suspend_bank( pr_debug("%s: save mask %#010x\n", bank->name, save->eint_mask); } +static void exynosautov920_pinctrl_suspend_bank( + struct samsung_pinctrl_drv_data *drvdata, + struct samsung_pin_bank *bank) +{ + struct exynos_eint_gpio_save *save = bank->soc_priv; + void __iomem *regs = bank->eint_base; + + save->eint_con = readl(regs + bank->eint_offset); + save->eint_mask = readl(regs + bank->mask_offset); + + pr_debug("%s: save con %#010x\n", bank->name, save->eint_con); + pr_debug("%s: save mask %#010x\n", bank->name, save->eint_mask); +} + void exynos_pinctrl_suspend(struct samsung_pinctrl_drv_data *drvdata) { struct samsung_pin_bank *bank = drvdata->pin_banks; @@ -662,8 +723,12 @@ void exynos_pinctrl_suspend(struct samsung_pinctrl_drv_data *drvdata) int i; for (i = 0; i < drvdata->nr_banks; ++i, ++bank) { - if (bank->eint_type == EINT_TYPE_GPIO) - exynos_pinctrl_suspend_bank(drvdata, bank); + if (bank->eint_type == EINT_TYPE_GPIO) { + if (bank->combine) + exynosautov920_pinctrl_suspend_bank(drvdata, bank); + else + exynos_pinctrl_suspend_bank(drvdata, bank); + } else if (bank->eint_type == EINT_TYPE_WKUP) { if (!irq_chip) { irq_chip = bank->irq_chip; @@ -704,14 +769,34 @@ static void exynos_pinctrl_resume_bank( + bank->eint_offset); } +static void exynosautov920_pinctrl_resume_bank( + struct samsung_pinctrl_drv_data *drvdata, + struct samsung_pin_bank *bank) +{ + struct exynos_eint_gpio_save *save = bank->soc_priv; + void __iomem *regs = bank->eint_base; + + pr_debug("%s: con %#010x => %#010x\n", bank->name, + readl(regs + bank->eint_offset), save->eint_con); + pr_debug("%s: mask %#010x => %#010x\n", bank->name, + readl(regs + bank->mask_offset), save->eint_mask); + + writel(save->eint_con, regs + bank->eint_offset); + writel(save->eint_mask, regs + bank->mask_offset); +} + void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata) { struct samsung_pin_bank *bank = drvdata->pin_banks; int i; for (i = 0; i < drvdata->nr_banks; ++i, ++bank) - if (bank->eint_type == EINT_TYPE_GPIO) - exynos_pinctrl_resume_bank(drvdata, bank); + if (bank->eint_type == EINT_TYPE_GPIO) { + if (bank->combine) + exynosautov920_pinctrl_resume_bank(drvdata, bank); + else + exynos_pinctrl_resume_bank(drvdata, bank); + } } static void exynos_retention_enable(struct samsung_pinctrl_drv_data *drvdata) diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.h b/drivers/pinctrl/samsung/pinctrl-exynos.h index 7bd6d82c9f36..212225a3ed3b 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.h +++ b/drivers/pinctrl/samsung/pinctrl-exynos.h @@ -31,6 +31,7 @@ #define EXYNOS7_WKUP_EMASK_OFFSET 0x900 #define EXYNOS7_WKUP_EPEND_OFFSET 0xA00 #define EXYNOS_SVC_OFFSET 0xB08 +#define EXYNOSAUTOV920_SVC_OFFSET 0xF008 /* helpers to access interrupt service register */ #define EXYNOS_SVC_GROUP_SHIFT 3 @@ -140,6 +141,32 @@ .name = id \ } +#define EXYNOSV920_PIN_BANK_EINTG(pins, reg, id, offs, mask_offs, pend_offs) \ + { \ + .type = &exynos850_bank_type_off, \ + .pctl_offset = reg, \ + .nr_pins = pins, \ + .eint_type = EINT_TYPE_GPIO, \ + .eint_offset = (reg + offs), \ + .mask_offset = (reg + mask_offs), \ + .pend_offset = (reg + pend_offs), \ + .combine = true, \ + .name = id \ + } + +#define EXYNOSV920_PIN_BANK_EINTW(pins, reg, id, offs, mask_offs, pend_offs) \ + { \ + .type = &exynos850_bank_type_alive, \ + .pctl_offset = reg, \ + .nr_pins = pins, \ + .eint_type = EINT_TYPE_WKUP, \ + .eint_offset = (reg + offs), \ + .mask_offset = (reg + mask_offs), \ + .pend_offset = (reg + pend_offs), \ + .combine = true, \ + .name = id \ + } + /** * struct exynos_weint_data: irq specific data for all the wakeup interrupts * generated by the external wakeup interrupt controller. diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c index e54847040b4a..4066a1e1aff7 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c @@ -1105,6 +1105,9 @@ samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d, bank->eint_type = bdata->eint_type; bank->eint_mask = bdata->eint_mask; bank->eint_offset = bdata->eint_offset; + bank->mask_offset = bdata->mask_offset; + bank->pend_offset = bdata->pend_offset; + bank->combine = bdata->combine; bank->name = bdata->name; raw_spin_lock_init(&bank->slock); @@ -1319,6 +1322,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = { .data = &exynosautov9_of_data }, { .compatible = "tesla,fsd-pinctrl", .data = &fsd_of_data }, + { .compatible = "samsung,exynosautov920-pinctrl", + .data = &exynosautov920_of_data }, #endif #ifdef CONFIG_PINCTRL_S3C64XX { .compatible = "samsung,s3c64xx-pinctrl", diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h index 9af93e3d8d9f..8151583d4a88 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.h +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h @@ -122,6 +122,9 @@ struct samsung_pin_bank_type { * @eint_type: type of the external interrupt supported by the bank. * @eint_mask: bit mask of pins which support EINT function. * @eint_offset: SoC-specific EINT register or interrupt offset of bank. + * @mask_offset: SoC-specific EINT mask register offset of bank. + * @pend_offset: SoC-specific EINT pend register offset of bank. + * @combine: EINT register is combined to the GPIO control register. * @name: name to be prefixed for each pin in this pin bank. */ struct samsung_pin_bank_data { @@ -133,6 +136,9 @@ struct samsung_pin_bank_data { enum eint_type eint_type; u32 eint_mask; u32 eint_offset; + u32 mask_offset; + u32 pend_offset; + bool combine; const char *name; }; @@ -147,6 +153,9 @@ struct samsung_pin_bank_data { * @eint_type: type of the external interrupt supported by the bank. * @eint_mask: bit mask of pins which support EINT function. * @eint_offset: SoC-specific EINT register or interrupt offset of bank. + * @mask_offset: SoC-specific EINT mask register offset of bank. + * @pend_offset: SoC-specific EINT pend register offset of bank. + * @combine: EINT register is combined to the GPIO control register. * @name: name to be prefixed for each pin in this pin bank. * @pin_base: starting pin number of the bank. * @soc_priv: per-bank private data for SoC-specific code. @@ -169,6 +178,9 @@ struct samsung_pin_bank { enum eint_type eint_type; u32 eint_mask; u32 eint_offset; + u32 mask_offset; + u32 pend_offset; + bool combine; const char *name; u32 pin_base; @@ -350,6 +362,7 @@ extern const struct samsung_pinctrl_of_match_data exynos7_of_data; extern const struct samsung_pinctrl_of_match_data exynos7885_of_data; extern const struct samsung_pinctrl_of_match_data exynos850_of_data; extern const struct samsung_pinctrl_of_match_data exynosautov9_of_data; +extern const struct samsung_pinctrl_of_match_data exynosautov920_of_data; extern const struct samsung_pinctrl_of_match_data fsd_of_data; extern const struct samsung_pinctrl_of_match_data s3c64xx_of_data; extern const struct samsung_pinctrl_of_match_data s3c2412_of_data; From patchwork Tue Oct 31 09:47:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jaewon Kim X-Patchwork-Id: 740900 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D43B0C4167D for ; Tue, 31 Oct 2023 09:52:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235590AbjJaJwE (ORCPT ); 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Tue, 31 Oct 2023 09:50:21 +0000 (GMT) X-AuditID: b6c32a47-bfdfa70000002726-33-6540cddda45e Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id CE.64.08755.DDDC0456; Tue, 31 Oct 2023 18:50:21 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.55]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20231031095020epsmtip1cc7de6367f332ad7b81b8bdc996e40df~TKFLgWu-v2056520565epsmtip1M; Tue, 31 Oct 2023 09:50:20 +0000 (GMT) From: Jaewon Kim To: Krzysztof Kozlowski , Alim Akhtar , Rob Herring , Conor Dooley , Tomasz Figa , Sylwester Nawrocki , Linus Walleij , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Greg Kroah-Hartman , Jiri Slaby Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org, linux-serial@vger.kernel.org, Jaewon Kim Subject: [PATCH 09/10] arm64: dts: exynos: add initial support for exynosautov920 SoC Date: Tue, 31 Oct 2023 18:47:51 +0900 Message-ID: <20231031094852.118677-10-jaewon02.kim@samsung.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231031094852.118677-1-jaewon02.kim@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrOJsWRmVeSWpSXmKPExsWy7bCmqe7dsw6pBu/7dSwezNvGZrFm7zkm i/lHzrFaNC9ez2axo+EIq8W7uTIWe19vZbeY8mc5k8Wmx9dYLTbP/8NocXnXHDaLu3dXMVrM OL+PyeLM4l52i9a9R9gtDr9pZ7X4uWsei8WqXUB1tydOZnQQ9tg56y67x6ZVnWwed67tYfPY P3cNu8fmJfUe/X8NPPq2rGL0+LxJLoAjKtsmIzUxJbVIITUvOT8lMy/dVsk7ON453tTMwFDX 0NLCXEkhLzE31VbJxSdA1y0zB+gdJYWyxJxSoFBAYnGxkr6dTVF+aUmqQkZ+cYmtUmpBSk6B eYFecWJucWleul5eaomVoYGBkSlQYUJ2xrQ7v5kK7p9mqlj0som1gbGvh6mLkZNDQsBEYvbV /4xdjFwcQgI7GCUufN4I5XxilJjdf4MJwvnGKLHn5wZmmJYL11+zQCT2MkpM/78QyvnIKHF4 /nxWkCo2AW2J7+sXg9kiAl+YJaY/qgYpYhZoZ5KY9+0lC0hCWCBc4uWMuewgNouAqsTtnq1g Nq+AvcTU13vYINbJS+xZ9B3sWk6g+M6eJkaIGkGJkzOfgM1hBqpp3jqbGWSBhMAFDokl0yZA 3eoicWv6PahXhSVeHd/CDmFLSXx+txdqQbZE+/Q/rBB2hcTFDbOh4sYSs561Ay3jAFqgKbF+ lz6IKSGgLHHkFtRaPomOw3/ZIcK8Eh1tQhCNahL3p56DGiIjMenISqgDPCQ+nlrDCgmrSYwS d1pPs01gVJiF5JtZSL6ZhbB4ASPzKkax1ILi3PTUYqMCY3gkJ+fnbmIEp3At9x2MM95+0DvE yMTBeIhRgoNZSYT3sKlDqhBvSmJlVWpRfnxRaU5q8SFGU2BYT2SWEk3OB2aRvJJ4QxNLAxMz M0NzI1MDcyVx3nutc1OEBNITS1KzU1MLUotg+pg4OKUamOYqiT5c2Jl49fjy+eZmWw5pV898 Xhhdv9XV8mXwn+yl3z22rTCXZvrpmsrYOVldWkzk7LX7Oi4m39oMg7b+3Xhjv+WSqpKqD0pn 2tZv2ZucJ/rngeeXf6qcod47N746eC7GRv1HvJ0IvzHrsrUBf7d5Vkoe/P1o5qJ50Y6rTf4t MHiQVCj/rfy4Uwangl2/wAVTLW0e/yNT+NYW1AZXeXZXhfikrjl0hqu6vURj7+OOUEmzhHW+ +5407Zu8+8KyGQpKzz8FmUhO3/m89MOciy+b17FtU9ofPHF6/WONwJpbD75mSb0TipI/5byu ZlH9vG1filnuzb6weJGi4VL5Y+3mdzY8mFW7+rix+pugjkYlluKMREMt5qLiRADfS+DmagQA AA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprEIsWRmVeSWpSXmKPExsWy7bCSnO7dsw6pBpPW8Fk8mLeNzWLN3nNM FvOPnGO1aF68ns1iR8MRVot3c2Us9r7eym4x5c9yJotNj6+xWmye/4fR4vKuOWwWd++uYrSY cX4fk8WZxb3sFq17j7BbHH7Tzmrxc9c8FotVu4Dqbk+czOgg7LFz1l12j02rOtk87lzbw+ax f+4ado/NS+o9+v8aePRtWcXo8XmTXABHFJdNSmpOZllqkb5dAlfGtDu/mQrun2aqWPSyibWB sa+HqYuRk0NCwETiwvXXLF2MXBxCArsZJfZP+84KkZCRWP6sjw3CFpa433KEFaLoPaPE7Jdt YAk2AW2J7+sXgyVEBH4xS+yecJcRJMEs0M8kcX1TAogtLBAqsWhPK1gDi4CqxO2erewgNq+A vcTU13ugNshL7Fn0HewkTqD4zp4msDlCAnYSFzfcZIKoF5Q4OfMJC8R8eYnmrbOZJzAKzEKS moUktYCRaRWjZGpBcW56brFhgWFearlecWJucWleul5yfu4mRnC0aWnuYNy+6oPeIUYmDsZD jBIczEoivIdNHVKFeFMSK6tSi/Lji0pzUosPMUpzsCiJ84q/6E0REkhPLEnNTk0tSC2CyTJx cEo1MPkHzbh++0jHqkd6/semVG9/v/jLb66CQEvN22lZBVJPlU+93LIg9vmZlkxe5zli89uy 7d+ElvZP54sqTl+fxmm0+PR2TfUUtUvXxQrTtA8VFs59e9fysp+i7mszpwC7Eg2Zwzof2q58 Tr2xYYcN68sj65cd+TmF7WJn+LKln9eeOMPh4JrFt8Bm2Q9f823VSo/Papv1M/ee4q52K3j3 684pO0f+xUWMDFw3ludZdCWflt2UdLm58sPdq6/DlU5VV83we/v0kvepfXFqeSfYri1YluBv wbFbpG5l7+9muzo1vXA7wUnOpj1qiTMKrt/lf3DuuNqdaSVusecqBV4FVp3pLRD5zblNZAbv o9tH5ZRYijMSDbWYi4oTAebZZDglAwAA X-CMS-MailID: 20231031095021epcas2p352c4ace8652d7bf1f74a9b32ab61a913 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20231031095021epcas2p352c4ace8652d7bf1f74a9b32ab61a913 References: <20231031094852.118677-1-jaewon02.kim@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Samsung ExynosAutov920 is ARMv8-based automotive-oriented SoC. It has AE(Automotive Enhanced) IPs for safety. * Cortex-A78AE 10-cores * GIC-600AE This is minimal support for ExynosAutov920 SoC. * Enumerate all pinctrl nodes * Enable Chip-Id * Serial0 for console * PWM Since the clock driver is not yet implemented, it is supported as fixed-clock. Signed-off-by: Jaewon Kim --- .../dts/exynos/exynosautov920-pinctrl.dtsi | 1266 +++++++++++++++++ .../arm64/boot/dts/exynos/exynosautov920.dtsi | 318 +++++ 2 files changed, 1584 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920.dtsi diff --git a/arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi new file mode 100644 index 000000000000..63b958b96c48 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi @@ -0,0 +1,1266 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's ExynosAutov920 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2023 Samsung Electronics Co., Ltd. + * + * Samsung's ExynosAutov920 SoC pin-mux and pin-config options are listed as + * device tree nodes in this file. + */ + +#include + +#include "exynos-pinctrl.h" + +&pinctrl_alive { + gpa0: gpa0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + ; + }; + + gpa1: gpa1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = , + ; + }; + + gpq0: gpq0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_aud { + gpb0: gpb0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb1: gpb1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb2: gpb2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb3: gpb3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb4: gpb4-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb5: gpb5-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb6: gpb6-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_hsi0 { + gph0: gph0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph1: gph1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_hsi1 { + gph8: gph8-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_hsi2 { + gph3: gph3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph4: gph4-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph5: gph5-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph6: gph6-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_hsi2ufs { + gph2: gph2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + ufs_rst_n: ufs-rst-n-pins { + samsung,pins = "gph2-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + ufs_refclk_out: ufs-refclk-out-pins { + samsung,pins = "gph2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + ufs_rst_n_1: ufs-rst-n-1-pins { + samsung,pins = "gph2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + ufs_refclk_out_1: ufs-refclk-out-1-pins { + samsung,pins = "gph2-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; +}; + +&pinctrl_peric0 { + gpp0: gpp0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp1: gpp1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp2: gpp2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp3: gpp3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp4: gpp4-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg0: gpg0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg2: gpg2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg3: gpg3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg4: gpg4-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg5: gpg5-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + /* UART PERIC0_USI00 */ + uart0_bus: uart0-bus-pins { + samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2", "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart0_bus_dual: uart0-bus-dual-pins { + samsung,pins = "gpp0-0", "gpp0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* UART PERIC0_USI01 */ + uart1_bus: uart1-bus-pins { + samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6", "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart1_bus_dual: uart1-bus-dual-pins { + samsung,pins = "gpp0-4", "gpp0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* UART PERIC0_USI02 */ + uart2_bus: uart2-bus-pins { + samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2", "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart2_bus_dual: uart2-bus-dual-pins { + samsung,pins = "gpp1-0", "gpp1-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* UART PERIC0_USI03 */ + uart3_bus: uart3-bus-pins { + samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6", "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart3_bus_dual: uart3-bus-dual-pins { + samsung,pins = "gpp1-4", "gpp1-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* UART PERIC0_USI04 */ + uart4_bus: uart4-bus-pins { + samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2", "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart4_bus_dual: uart4-bus-dual-pins { + samsung,pins = "gpp2-0", "gpp2-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* UART PERIC0_USI05 */ + uart5_bus: uart5-bus-pins { + samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6", "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart5_bus_dual: uart5-bus-dual-pins { + samsung,pins = "gpp2-4", "gpp2-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* UART PERIC0_USI06 */ + uart6_bus: uart6-bus-pins { + samsung,pins = "gpp3-0", "gpp3-1", "gpp3-2", "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart6_bus_dual: uart6-bus-dual-pins { + samsung,pins = "gpp3-0", "gpp3-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* UART PERIC0_USI07 */ + uart7_bus: uart7-bus-pins { + samsung,pins = "gpp3-4", "gpp3-5", "gpp3-6", "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart7_bus_dual: uart7-bus-dual-pins { + samsung,pins = "gpp3-4", "gpp3-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* UART PERIC0_USI08 */ + uart8_bus: uart8-bus-pins { + samsung,pins = "gpp4-0", "gpp4-1", "gpp4-2", "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart8_bus_dual: uart8-bus-dual-pins { + samsung,pins = "gpp4-0", "gpp4-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI00 */ + hsi2c0_bus: hsi2c0-bus-pins { + samsung,pins = "gpp0-0", "gpp0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI00_I2C */ + hsi2c1_bus: hsi2c1-bus-pins { + samsung,pins = "gpp0-2", "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI01 */ + hsi2c2_bus: hsi2c2-bus-pins { + samsung,pins = "gpp0-4", "gpp0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI01_I2C */ + hsi2c3_bus: hsi2c3-bus-pins { + samsung,pins = "gpp0-6", "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI02 */ + hsi2c4_bus: hsi2c4-bus-pins { + samsung,pins = "gpp1-0", "gpp1-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI02_I2C */ + hsi2c5_bus: hsi2c5-bus-pins { + samsung,pins = "gpp1-2", "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI03 */ + hsi2c6_bus: hsi2c6-bus-pins { + samsung,pins = "gpp1-4", "gpp1-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI03_I2C */ + hsi2c7_bus: hsi2c7-bus-pins { + samsung,pins = "gpp1-6", "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI04 */ + hsi2c8_bus: hsi2c8-bus-pins { + samsung,pins = "gpp2-0", "gpp2-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI04_I2C */ + hsi2c9_bus: hsi2c9-bus-pins { + samsung,pins = "gpp2-2", "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI05 */ + hsi2c10_bus: hsi2c10-bus-pins { + samsung,pins = "gpp2-4", "gpp2-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI05_I2C */ + hsi2c11_bus: hsi2c11-bus-pins { + samsung,pins = "gpp2-6", "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI06 */ + hsi2c12_bus: hsi2c12-bus-pins { + samsung,pins = "gpp3-0", "gpp3-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI06_I2C */ + hsi2c13_bus: hsi2c13-bus-pins { + samsung,pins = "gpp3-2", "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI07 */ + hsi2c14_bus: hsi2c14-bus-pins { + samsung,pins = "gpp3-4", "gpp3-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI07_I2C */ + hsi2c15_bus: hsi2c15-bus-pins { + samsung,pins = "gpp3-6", "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI08 */ + hsi2c16_bus: hsi2c16-bus-pins { + samsung,pins = "gpp4-0", "gpp4-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC0 USI08_I2C */ + hsi2c17_bus: hsi2c17-bus-pins { + samsung,pins = "gpp4-2", "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC0 USI00 */ + spi0_bus: spi0-bus-pins { + samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi0_cs: spi0-cs-pins { + samsung,pins = "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi0_cs_func: spi0-cs-func-pins { + samsung,pins = "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC0 USI01 */ + spi1_bus: spi1-bus-pins { + samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi1_cs: spi1-cs-pins { + samsung,pins = "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi1_cs_func: spi1-cs-func-pins { + samsung,pins = "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC0 USI02 */ + spi2_bus: spi2-bus-pins { + samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi2_cs: spi2-cs-pins { + samsung,pins = "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi2_cs_func: spi2-cs-func-pins { + samsung,pins = "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC0 USI03 */ + spi3_bus: spi3-bus-pins { + samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi3_cs: spi3-cs-pins { + samsung,pins = "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi3_cs_func: spi3-cs-func-pins { + samsung,pins = "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC0 USI04 */ + spi4_bus: spi4-bus-pins { + samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi4_cs: spi4-cs-pins { + samsung,pins = "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi4_cs_func: spi4-cs-func-pins { + samsung,pins = "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC0 USI05 */ + spi5_bus: spi5-bus-pins { + samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi5_cs: spi5-cs-pins { + samsung,pins = "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi5_cs_func: spi5-cs-func-pins { + samsung,pins = "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC0 USI06 */ + spi6_bus: spi6-bus-pins { + samsung,pins = "gpp3-0", "gpp3-1", "gpp3-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi6_cs: spi6-cs-pins { + samsung,pins = "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi6_cs_func: spi6-cs-func-pins { + samsung,pins = "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC0 USI07 */ + spi7_bus: spi7-bus-pins { + samsung,pins = "gpp3-4", "gpp3-5", "gpp3-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi7_cs: spi7-cs-pins { + samsung,pins = "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi7_cs_func: spi7-cs-func-pins { + samsung,pins = "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC0 USI08 */ + spi8_bus: spi8-bus-pins { + samsung,pins = "gpp4-0", "gpp4-1", "gpp4-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi8_cs: spi8-cs-pins { + samsung,pins = "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi8_cs_func: spi8-cs-func-pins { + samsung,pins = "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I3C PERIC0 */ + i3c0_bus: i3c0-bus-pins { + samsung,pins = "gpp2-6", "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + i3c1_bus: i3c1-bus-pins { + samsung,pins = "gpp3-2", "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + i3c2_bus: i3c2-bus-pins { + samsung,pins = "gpp3-6", "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + i3c3_bus: i3c3-bus-pins { + samsung,pins = "gpp4-2", "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PWM PERIC0 */ + pwm_tout0: pwm-tout0-pins { + samsung,pins = "gpg0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + pwm_tout1: pwm-tout1-pins { + samsung,pins = "gpg0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + pwm_tout2: pwm-tout2-pins { + samsung,pins = "gpg0-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + pwm_tout3: pwm-tout3-pins { + samsung,pins = "gpg0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_peric1 { + gpp5: gpp5-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp6: gpp6-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp7: gpp7-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp8: gpp8-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp9: gpp9-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp10: gpp10-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp11: gpp11-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp12: gpp12-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg1: gpg1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + /* UART PERIC1 USI09 */ + uart9_bus: uart9-bus-pins { + samsung,pins = "gpp5-0", "gpp5-1", "gpp5-2", "gpp5-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart9_bus_dual: uart9-bus-dual-pins { + samsung,pins = "gpp5-0", "gpp5-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* UART PERIC1 USI10 */ + uart10_bus: uart10-bus-pins { + samsung,pins = "gpp5-4", "gpp5-5", "gpp5-6", "gpp5-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart10_bus_dual: uart10-bus-dual-pins { + samsung,pins = "gpp5-4", "gpp5-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* UART PERIC1 USI11 */ + uart11_bus: uart11-bus-pins { + samsung,pins = "gpp10-0", "gpp10-1", "gpp10-2", "gpp10-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart11_bus_dual: uart11-bus-dual-pins { + samsung,pins = "gpp10-0", "gpp10-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* UART PERIC1_USI12 */ + uart12_bus: uart12-bus-pins { + samsung,pins = "gpp7-0", "gpp7-1", "gpp7-2", "gpp7-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart12_bus_dual: uart12-bus-dual-pins { + samsung,pins = "gpp7-0", "gpp7-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* UART PERIC1_USI13 */ + uart13_bus: uart13-bus-pins { + samsung,pins = "gpp7-4", "gpp7-5", "gpp7-6", "gpp7-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart13_bus_dual: uart13-bus-dual-pins { + samsung,pins = "gpp7-4", "gpp7-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* UART PERIC1 USI14 */ + uart14_bus: uart14-bus-pins { + samsung,pins = "gpp8-0", "gpp8-1", "gpp8-2", "gpp8-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart14_bus_dual: uart14-bus-dual-pins { + samsung,pins = "gpp8-0", "gpp8-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* UART PERIC1 USI15 */ + uart15_bus: uart15-bus-pins { + samsung,pins = "gpp11-0", "gpp11-1", "gpp11-2", "gpp11-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart15_bus_dual: uart15-bus-dual-pins { + samsung,pins = "gpp11-0", "gpp11-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* UART PERIC1 USI16 */ + uart16_bus: uart16-bus-pins { + samsung,pins = "gpp9-0", "gpp9-1", "gpp9-2", "gpp9-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart16_bus_dual: uart16-bus-dual-pins { + samsung,pins = "gpp9-0", "gpp9-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* UART PERIC1 USI17 */ + uart17_bus: uart17-bus-pins { + samsung,pins = "gpp12-0", "gpp12-1", "gpp12-2", "gpp12-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart17_bus_dual: uart17-bus-dual-pins { + samsung,pins = "gpp12-0", "gpp12-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI09 */ + hsi2c18_bus: hsi2c18-bus-pins { + samsung,pins = "gpp5-0", "gpp5-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI09_I2C */ + hsi2c19_bus: hsi2c19-bus-pins { + samsung,pins = "gpp5-2", "gpp5-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI10 */ + hsi2c20_bus: hsi2c20-bus-pins { + samsung,pins = "gpp5-4", "gpp5-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI10_I2C */ + hsi2c21_bus: hsi2c21-bus-pins { + samsung,pins = "gpp5-6", "gpp5-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI11 */ + hsi2c22_bus: hsi2c22-bus-pins { + samsung,pins = "gpp10-0", "gpp10-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI11_I2C */ + hsi2c23_bus: hsi2c23-bus-pins { + samsung,pins = "gpp10-2", "gpp10-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI12 */ + hsi2c24_bus: hsi2c24-bus-pins { + samsung,pins = "gpp7-0", "gpp7-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI12_I2C */ + hsi2c25_bus: hsi2c25-bus-pins { + samsung,pins = "gpp7-2", "gpp7-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI13 */ + hsi2c26_bus: hsi2c26-bus-pins { + samsung,pins = "gpp7-4", "gpp7-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI13_I2C */ + hsi2c27_bus: hsi2c27-bus-pins { + samsung,pins = "gpp7-6", "gpp7-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI14 */ + hsi2c28_bus: hsi2c28-bus-pins { + samsung,pins = "gpp8-0", "gpp8-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI14_I2C */ + hsi2c29_bus: hsi2c29-bus-pins { + samsung,pins = "gpp8-2", "gpp8-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI15 */ + hsi2c30_bus: hsi2c30-bus-pins { + samsung,pins = "gpp11-0", "gpp11-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI15_I2C */ + hsi2c31_bus: hsi2c31-bus-pins { + samsung,pins = "gpp11-2", "gpp11-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI16 */ + hsi2c32_bus: hsi2c32-bus-pins { + samsung,pins = "gpp9-0", "gpp9-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI16_I2C */ + hsi2c33_bus: hsi2c33-bus-pins { + samsung,pins = "gpp9-2", "gpp9-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI17 */ + hsi2c34_bus: hsi2c34-bus-pins { + samsung,pins = "gpp12-0", "gpp12-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I2C PERIC1 USI17_I2C */ + hsi2c35_bus: hsi2c35-bus-pins { + samsung,pins = "gpp12-2", "gpp12-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC1 USI09 */ + spi9_bus: spi9-bus-pins { + samsung,pins = "gpp5-0", "gpp5-1", "gpp5-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi9_cs: spi9-cs-pins { + samsung,pins = "gpp5-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi9_cs_func: spi9-cs-func-pins { + samsung,pins = "gpp5-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC1 USI10 */ + spi10_bus: spi10-bus-pins { + samsung,pins = "gpp5-4", "gpp5-5", "gpp5-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi10_cs: spi10-cs-pins { + samsung,pins = "gpp5-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi10_cs_func: spi10-cs-func-pins { + samsung,pins = "gpp5-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC1 USI11 */ + spi11_bus: spi11-bus-pins { + samsung,pins = "gpp10-0", "gpp10-1", "gpp10-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi11_cs: spi11-cs-pins { + samsung,pins = "gpp10-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi11_cs_func: spi11-cs-func-pins { + samsung,pins = "gpp10-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC1 USI12 */ + spi12_bus: spi12-bus-pins { + samsung,pins = "gpp7-0", "gpp7-1", "gpp7-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi12_cs: spi12-cs-pins { + samsung,pins = "gpp7-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi12_cs_func: spi12-cs-func-pins { + samsung,pins = "gpp7-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC1 USI13 */ + spi13_bus: spi13-bus-pins { + samsung,pins = "gpp7-4", "gpp7-5", "gpp7-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi13_cs: spi13-cs-pins { + samsung,pins = "gpp7-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi13_cs_func: spi13-cs-func-pins { + samsung,pins = "gpp7-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC1 USI14 */ + spi14_bus: spi14-bus-pins { + samsung,pins = "gpp8-0", "gpp8-1", "gpp8-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi14_cs: spi14-cs-pins { + samsung,pins = "gpp8-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi14_cs_func: spi14-cs-func-pins { + samsung,pins = "gpp8-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC1 USI15 */ + spi15_bus: spi15-bus-pins { + samsung,pins = "gpp11-0", "gpp11-1", "gpp11-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi15_cs: spi15-cs-pins { + samsung,pins = "gpp11-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi15_cs_func: spi15-cs-func-pins { + samsung,pins = "gpp11-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC1 USI16 */ + spi16_bus: spi16-bus-pins { + samsung,pins = "gpp9-0", "gpp9-1", "gpp9-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi16_cs: spi16-cs-pins { + samsung,pins = "gpp9-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi16_cs_func: spi16-cs-func-pins { + samsung,pins = "gpp9-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI PERIC1 USI17 */ + spi17_bus: spi17-bus-pins { + samsung,pins = "gpp12-0", "gpp12-1", "gpp12-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi17_cs: spi17-cs-pins { + samsung,pins = "gpp12-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi17_cs_func: spi17-cs-func-pins { + samsung,pins = "gpp12-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* I3C PERIC1 */ + i3c4_bus: i3c4-bus-pins { + samsung,pins = "gpp7-2", "gpp7-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + i3c5_bus: i3c5-bus-pins { + samsung,pins = "gpp7-6", "gpp7-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + i3c6_bus: i3c6-bus-pins { + samsung,pins = "gpp8-2", "gpp8-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + i3c7_bus: i3c7-bus-pins { + samsung,pins = "gpp11-2", "gpp11-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi new file mode 100644 index 000000000000..ec704fec323f --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi @@ -0,0 +1,318 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's ExynosAutov920 SoC device tree source + * + * Copyright (c) 2023 Samsung Electronics Co., Ltd. + * + */ + +#include +#include + +/ { + compatible = "samsung,exynosautov920"; + #address-cells = <2>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + aliases { + pinctrl0 = &pinctrl_alive; + pinctrl1 = &pinctrl_aud; + pinctrl2 = &pinctrl_hsi0; + pinctrl3 = &pinctrl_hsi1; + pinctrl4 = &pinctrl_hsi2; + pinctrl5 = &pinctrl_hsi2ufs; + pinctrl6 = &pinctrl_peric0; + pinctrl7 = &pinctrl_peric1; + }; + + arm-pmu { + compatible = "arm,cortex-a78-pmu"; + interrupts = ; + }; + + chosen: chosen { + bootargs = "console=ttySAC0,115200n8 loglevel=3 printk.devkmsg=on log_buf_len=512K"; + linux,initrd-start = <0x85000000>; + linux,initrd-end = <0x8AFFFFFF>; + }; + + cpus: cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + + cluster2 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + }; + }; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a78ae"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu1: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a78ae"; + reg = <0x0 0x100>; + enable-method = "psci"; + }; + + cpu2: cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a78ae"; + reg = <0x0 0x200>; + enable-method = "psci"; + }; + + cpu3: cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a78ae"; + reg = <0x0 0x300>; + enable-method = "psci"; + }; + + cpu4: cpu@10000 { + device_type = "cpu"; + compatible = "arm,cortex-a78ae"; + reg = <0x0 0x10000>; + enable-method = "psci"; + }; + + cpu5: cpu@10100 { + device_type = "cpu"; + compatible = "arm,cortex-a78ae"; + reg = <0x0 0x10100>; + enable-method = "psci"; + }; + + cpu6: cpu@10200 { + device_type = "cpu"; + compatible = "arm,cortex-a78ae"; + reg = <0x0 0x10200>; + enable-method = "psci"; + }; + + cpu7: cpu@10300 { + device_type = "cpu"; + compatible = "arm,cortex-a78ae"; + reg = <0x0 0x10300>; + enable-method = "psci"; + }; + + cpu8: cpu@20000 { + device_type = "cpu"; + compatible = "arm,cortex-a78ae"; + reg = <0x0 0x20000>; + enable-method = "psci"; + }; + + cpu9: cpu@20100 { + device_type = "cpu"; + compatible = "arm,cortex-a78ae"; + reg = <0x0 0x20100>; + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + , + ; + }; + + fixed-rate-clocks { + xtcxo: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "oscclk"; + }; + + /* + * Keep the stub clock for serial driver, until proper clock + * driver is implemented. + */ + usi_clock: usi-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + clock-output-names = "usi"; + }; + }; + + soc: soc@0 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x0 0x20000000>; + + chipid@10000000 { + compatible = "samsung,exynos850-chipid"; + reg = <0x10000000 0x24>; + }; + + gic: interrupt-controller@10400000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x10400000 0x10000>, + <0x10460000 0x140000>; + interrupts = ; + }; + + pinctrl_alive: pinctrl@11850000 { + compatible = "samsung,exynosautov920-pinctrl"; + reg = <0x11850000 0x10000>; + + wakeup-interrupt-controller { + compatible = "samsung,exynosautov920-wakeup-eint"; + }; + }; + + pinctrl_aud: pinctrl@1a460000 { + compatible = "samsung,exynosautov920-pinctrl"; + reg = <0x1a460000 0x10000>; + }; + + pinctrl_hsi0: pinctrl@16040000 { + compatible = "samsung,exynosautov920-pinctrl"; + reg = <0x16040000 0x10000>; + interrupts = ; + }; + + pinctrl_hsi1: pinctrl@16450000 { + compatible = "samsung,exynosautov920-pinctrl"; + reg = <0x16450000 0x10000>; + interrupts = ; + }; + + pinctrl_hsi2: pinctrl@16c10000 { + compatible = "samsung,exynosautov920-pinctrl"; + reg = <0x16c10000 0x10000>; + interrupts = ; + }; + + pinctrl_hsi2ufs: pinctrl@16d20000 { + compatible = "samsung,exynosautov920-pinctrl"; + reg = <0x16d20000 0x10000>; + interrupts = ; + }; + + pinctrl_peric0: pinctrl@10830000 { + compatible = "samsung,exynosautov920-pinctrl"; + reg = <0x10830000 0x10000>; + interrupts = ; + }; + + pinctrl_peric1: pinctrl@10c30000 { + compatible = "samsung,exynosautov920-pinctrl"; + reg = <0x10c30000 0x10000>; + interrupts = ; + }; + + pmu_system_controller: system-controller@11860000 { + compatible = "samsung,exynos7-pmu", "syscon"; + reg = <0x11860000 0x10000>; + }; + + pwm: pwm@109b0000 { + compatible = "samsung,exynosautov920-pwm", + "samsung,exynos4210-pwm"; + reg = <0x109b0000 0x100>; + samsung,pwm-outputs = <0>, <1>, <2>, <3>; + #pwm-cells = <3>; + clocks = <&xtcxo>; + clock-names = "timers"; + status = "disabled"; + }; + + syscon_peric0: syscon@102820000 { + compatible = "samsung,exynosautov920-peric0-sysreg", + "samsung,exynosautov920-sysreg", "syscon"; + reg = <0x10820000 0x2000>; + }; + + syscon_peric1: syscon@10c21000 { + compatible = "samsung,exynosautov920-peric1-sysreg", + "samsung,exynosautov920-sysreg", "syscon"; + reg = <0x10c21000 0x2000>; + }; + + usi_0: usi@108800c0 { + compatible = "samsung,exynosautov920-usi", + "samsung,exynos850-usi"; + reg = <0x108800c0 0x20>; + samsung,sysreg = <&syscon_peric0 0x1000>; + samsung,mode = ; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&usi_clock>, <&usi_clock>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_0: serial@10880000 { + compatible = "samsung,exynosautov920-uart", + "samsung,exynos850-uart"; + reg = <0x10880000 0xc0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_bus>; + clocks = <&usi_clock>, <&usi_clock>; + clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <256>; + status = "disabled"; + }; + }; + }; +}; + +#include "exynosautov920-pinctrl.dtsi" From patchwork Tue Oct 31 09:47:52 2023 Content-Type: text/plain; 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Tue, 31 Oct 2023 18:50:22 +0900 (KST) Received: from epsmtrp2.samsung.com (unknown [182.195.40.14]) by epcas2p3.samsung.com (KnoxPortal) with ESMTPA id 20231031095021epcas2p343514064dc0da3fff87e4b8a24d895fd~TKFMSIeNY0127001270epcas2p3G; Tue, 31 Oct 2023 09:50:21 +0000 (GMT) Received: from epsmgmc1p1new.samsung.com (unknown [182.195.42.40]) by epsmtrp2.samsung.com (KnoxPortal) with ESMTP id 20231031095021epsmtrp24e846dd33a0bb2a6729563a9dd777dcc~TKFMRTggq1473914739epsmtrp2M; Tue, 31 Oct 2023 09:50:21 +0000 (GMT) X-AuditID: b6c32a47-9a3ff70000002726-34-6540cdde65f7 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgmc1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id E3.42.07368.DDDC0456; Tue, 31 Oct 2023 18:50:21 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.55]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20231031095021epsmtip13a8fcaf2ab6663eeb538bf106d2d2005~TKFLz3D4h2273922739epsmtip1q; Tue, 31 Oct 2023 09:50:21 +0000 (GMT) From: Jaewon Kim To: Krzysztof Kozlowski , Alim Akhtar , Rob Herring , Conor Dooley , Tomasz Figa , Sylwester Nawrocki , Linus Walleij , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Greg Kroah-Hartman , Jiri Slaby Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org, linux-serial@vger.kernel.org, Jaewon Kim Subject: [PATCH 10/10] arm64: dts: exynos: add minimal support for exynosautov920 sadk board Date: Tue, 31 Oct 2023 18:47:52 +0900 Message-ID: <20231031094852.118677-11-jaewon02.kim@samsung.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231031094852.118677-1-jaewon02.kim@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrKJsWRmVeSWpSXmKPExsWy7bCmqe69sw6pBtOeclg8mLeNzWLN3nNM FvOPnGO1aF68ns1iR8MRVot3c2Us9r7eym4x5c9yJotNj6+xWmye/4fR4vKuOWwWd++uYrSY cX4fk8WZxb3sFq17j7BbHH7Tzmrxc9c8FotVu4Dqbk+czOgg7LFz1l12j02rOtk87lzbw+ax f+4ado/NS+o9+v8aePRtWcXo8XmTXABHVLZNRmpiSmqRQmpecn5KZl66rZJ3cLxzvKmZgaGu oaWFuZJCXmJuqq2Si0+ArltmDtA7SgpliTmlQKGAxOJiJX07m6L80pJUhYz84hJbpdSClJwC 8wK94sTc4tK8dL281BIrQwMDI1OgwoTsjDfvmxkLbopXvOx4ytbAOF+4i5GTQ0LARGLmt08s XYxcHEICOxglrn2YxwrhfGKUmH/0KlTmG6NEw6Ed7DAtjU+72CESexkltm7vZ4RwPjJKrJ/e xwJSxSagLfF9/WJWEFtE4AuzxPRH1SBFzALtTBLzvr0EKxIWiJPY9HwKG4jNIqAqMW/jXyYQ m1fAXuLagmZmiHXyEnsWfQeLcwLFd/Y0MULUCEqcnPkEbA4zUE3z1tnMIAskBK5wSOy4uYEN otlF4tjEbkYIW1ji1fEtUD9ISXx+txeqJluiffofVgi7QuLihtlQcWOJWc/agXo5gBZoSqzf pQ9iSggoSxy5BbWWT6Lj8F92iDCvREebEESjmsT9qeeghshITDqykgnC9pDobbzEBAmrSYwS M842MU5gVJiF5JtZSL6ZhbB4ASPzKkax1ILi3PTUYqMCY3gUJ+fnbmIEp28t9x2MM95+0DvE yMTBeIhRgoNZSYT3sKlDqhBvSmJlVWpRfnxRaU5q8SFGU2BYT2SWEk3OB2aQvJJ4QxNLAxMz M0NzI1MDcyVx3nutc1OEBNITS1KzU1MLUotg+pg4OKUamOZlL/cq7HnT2t3CvqJ+T2jC43d/ p0/P5RIPjG1LCPr7vPFLVnDL6ekdldXlR/fFrRIxe6cZuz3UxzxezMXkPeur078vKLGHMTz6 9v387hmmGm0GWWI8MdWqFw7sv/Pd7xbzwStq+xaJN3zcyhm74aLilwlGG9bM2BLrO/MUw2vd DSecys7LbJl2Pskge9961903dauzFI+lrmlfPkFiWbSDz8y77w8utZoQXMb5MKdEpPyRaezB afp/+Yzr6hStXz3bJslks8N28YpvTX+2KN4x/2cdO+vOJmvX0LtT5l9ktuHunrj/3lVT57Z5 18M3aBgx7PIUTfVleP4wfte3BW9FFtStNNU5efh+lnX20k1KLMUZiYZazEXFiQCb4RbDaAQA AA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupnkeLIzCtJLcpLzFFi42LZdlhJTvfuWYdUg1vP5C0ezNvGZrFm7zkm i/lHzrFaNC9ez2axo+EIq8W7uTIWe19vZbeY8mc5k8Wmx9dYLTbP/8NocXnXHDaLu3dXMVrM OL+PyeLM4l52i9a9R9gtDr9pZ7X4uWsei8WqXUB1tydOZnQQ9tg56y67x6ZVnWwed67tYfPY P3cNu8fmJfUe/X8NPPq2rGL0+LxJLoAjissmJTUnsyy1SN8ugSvjzftmxoKb4hUvO56yNTDO F+5i5OSQEDCRaHzaxd7FyMUhJLCbUWLdvOWsEAkZieXP+tggbGGJ+y1HWCGK3jNK3LrTwQSS YBPQlvi+fjFYQkTgF7PE7gl3GUESzAL9TBLXNyV0MXJwCAvESDy5bg0SZhFQlZi38S9YL6+A vcS1Bc3MEAvkJfYs+g4W5wSK7+xpAhsjJGAncXHDTah6QYmTM5+wQIyXl2jeOpt5AqPALCSp WUhSCxiZVjFKphYU56bnJhsWGOallusVJ+YWl+al6yXn525iBMeZlsYOxnvz/+kdYmTiYDzE KMHBrCTCe9jUIVWINyWxsiq1KD++qDQntfgQozQHi5I4r+GM2SlCAumJJanZqakFqUUwWSYO TqkGptOiK7y/rX/DyBZf5eWyVUnx37ZLFdHmWxk+rvGJlhDm3/H1cSav3U/Dk0+2f9Yvu/VK a6aIfn6IZDXHvTSdiw8NNTfKKbQzfejkKtRg3hcYfyZhU8nzQ9qXV06aeL1348vFoUmvLGKu 3Yub6XzgUXJfUrn3sULW46vrn2+rtp+gvL3qxh6lpdMYogMmfQvTTWlbFPX4Hm/lvrRZt08W qTzZmXNrfaO3gc+k9w07GU48aNm/6/Lh26sd9uderW6df/zSvUj508wXHcustroarFx49pH/ jNX3LXcwzmXqS3zRfV3H4uOlsGWM6V3lalpPd3XcY6yJ/cSzl1e59VNGocGN+Ag510tJ6Xf8 tizJSFdiKc5INNRiLipOBADEScfPIgMAAA== X-CMS-MailID: 20231031095021epcas2p343514064dc0da3fff87e4b8a24d895fd X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20231031095021epcas2p343514064dc0da3fff87e4b8a24d895fd References: <20231031094852.118677-1-jaewon02.kim@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org ExynosAutov920 SADK is ExynosAutov920 SoC based SADK(Samsung Automotive Development Kit) board. It has 16GB(8GB + 8GB) LPDDR5 RAM and 256GB (128GB + 128GB) UFS. This is minimal support board device-tree. * Serial console * GPIO Key * PWM FAN Signed-off-by: Jaewon Kim --- arch/arm64/boot/dts/exynos/Makefile | 3 +- .../boot/dts/exynos/exynosautov920-sadk.dts | 88 +++++++++++++++++++ 2 files changed, 90 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile index 6e4ba69268e5..da06e1a9456c 100644 --- a/arch/arm64/boot/dts/exynos/Makefile +++ b/arch/arm64/boot/dts/exynos/Makefile @@ -5,4 +5,5 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \ exynos7-espresso.dtb \ exynos7885-jackpotlte.dtb \ exynos850-e850-96.dtb \ - exynosautov9-sadk.dtb + exynosautov9-sadk.dtb \ + exynosautov920-sadk.dtb diff --git a/arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts new file mode 100644 index 000000000000..e250b5594b58 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's ExynosAutov920 SADK board device tree source + * + * Copyright (c) 2023 Samsung Electronics Co., Ltd. + * + */ + +/dts-v1/; +#include "exynosautov920.dtsi" +#include "exynos-pinctrl.h" +#include +#include + +/ { + model = "Samsung ExynosAutov920 SADK board"; + compatible = "samsung,exynosautov920-sadk", "samsung,exynosautov920"; + + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &serial_0; + }; + + chosen { + stdout-path = &serial_0; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x70000000>, + <0x8 0x80000000 0x1 0xfba00000>, + <0xa 0x00000000 0x2 0x00000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&key_wakeup &key_back>; + + key-wakeup { + label = "KEY_WAKEUP"; + linux,code = ; + gpios = <&gpa0 0 GPIO_ACTIVE_LOW>; + wakeup-source; + }; + + key-back { + label = "KEY_BACK"; + linux,code = ; + gpios = <&gpp6 3 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&pinctrl_alive { + key_wakeup: key-wakeup-pins { + samsung,pins = "gpa0-0"; + samsung,pin-function = ; + }; +}; + +&pinctrl_peric1 { + key_back: key-back-pins { + samsung,pins = "gpp6-3"; + samsung,pin-function = ; + }; +}; + +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm_tout0>; + status = "okay"; +}; + +&serial_0 { + status = "okay"; +}; + +&usi_0 { + samsung,clkreq-on; /* needed for UART mode */ + status = "okay"; +}; + +&xtcxo { + clock-frequency = <38400000>; +};