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[176.172.55.165]) by smtp.gmail.com with ESMTPSA id g38-20020a05600c4ca600b004078d71be9csm15935123wmp.13.2023.10.24.01.30.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 24 Oct 2023 01:30:18 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Thomas Huth , Laurent Vivier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PATCH v2 1/6] hw/m68k/irqc: Pass CPU using QOM link property Date: Tue, 24 Oct 2023 10:30:04 +0200 Message-ID: <20231024083010.12453-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231024083010.12453-1-philmd@linaro.org> References: <20231024083010.12453-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22a; envelope-from=philmd@linaro.org; helo=mail-lj1-x22a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Avoid the interrupt controller directly access the 'first_cpu' global. Pass 'cpu' from the board code. Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daudé --- include/hw/intc/m68k_irqc.h | 1 + hw/intc/m68k_irqc.c | 10 +++++++++- hw/m68k/virt.c | 2 ++ 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/include/hw/intc/m68k_irqc.h b/include/hw/intc/m68k_irqc.h index ef91f21812..693e33b0aa 100644 --- a/include/hw/intc/m68k_irqc.h +++ b/include/hw/intc/m68k_irqc.h @@ -33,6 +33,7 @@ typedef struct M68KIRQCState { SysBusDevice parent_obj; uint8_t ipr; + ArchCPU *cpu; /* statistics */ uint64_t stats_irq_count[M68K_IRQC_LEVEL_NUM]; diff --git a/hw/intc/m68k_irqc.c b/hw/intc/m68k_irqc.c index 0c515e4ecb..e09705eeaf 100644 --- a/hw/intc/m68k_irqc.c +++ b/hw/intc/m68k_irqc.c @@ -11,6 +11,7 @@ #include "cpu.h" #include "migration/vmstate.h" #include "monitor/monitor.h" +#include "hw/qdev-properties.h" #include "hw/nmi.h" #include "hw/intc/intc.h" #include "hw/intc/m68k_irqc.h" @@ -35,7 +36,7 @@ static void m68k_irqc_print_info(InterruptStatsProvider *obj, Monitor *mon) static void m68k_set_irq(void *opaque, int irq, int level) { M68KIRQCState *s = opaque; - M68kCPU *cpu = M68K_CPU(first_cpu); + M68kCPU *cpu = M68K_CPU(s->cpu); int i; if (level) { @@ -85,12 +86,19 @@ static const VMStateDescription vmstate_m68k_irqc = { } }; +static Property m68k_irqc_properties[] = { + DEFINE_PROP_LINK("m68k-cpu", M68KIRQCState, cpu, + TYPE_M68K_CPU, ArchCPU *), + DEFINE_PROP_END_OF_LIST(), +}; + static void m68k_irqc_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); NMIClass *nc = NMI_CLASS(oc); InterruptStatsProviderClass *ic = INTERRUPT_STATS_PROVIDER_CLASS(oc); + device_class_set_props(dc, m68k_irqc_properties); nc->nmi_monitor_handler = m68k_nmi; dc->reset = m68k_irqc_reset; dc->vmsd = &vmstate_m68k_irqc; diff --git a/hw/m68k/virt.c b/hw/m68k/virt.c index 2dd3c99894..e7dc188855 100644 --- a/hw/m68k/virt.c +++ b/hw/m68k/virt.c @@ -155,6 +155,8 @@ static void virt_init(MachineState *machine) /* IRQ Controller */ irqc_dev = qdev_new(TYPE_M68K_IRQC); + object_property_set_link(OBJECT(irqc_dev), "m68k-cpu", + OBJECT(cpu), &error_abort); sysbus_realize_and_unref(SYS_BUS_DEVICE(irqc_dev), &error_fatal); /* From patchwork Tue Oct 24 08:30:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 737526 Delivered-To: patch@linaro.org Received: by 2002:adf:dd81:0:b0:32d:baff:b0ca with SMTP id x1csp1916726wrl; Tue, 24 Oct 2023 01:31:12 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFopMWMAAa5ynIILhyA1Jn0d0lDp13XagH+qf5VrasX4wzpbamNtaqMzxbZHLz1R8wOLUGk X-Received: by 2002:a05:6214:e6c:b0:66d:9d6:633a with SMTP id jz12-20020a0562140e6c00b0066d09d6633amr13173858qvb.33.1698136271955; Tue, 24 Oct 2023 01:31:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698136271; cv=none; d=google.com; s=arc-20160816; b=YROmjDrsozsC4Hj1AQBzZfjiWw34ylSHRmmMSPbD1++iYZSdMutraazhuzJ9w1DhXc IPQVe0fCeTAK+9EfCCjHr57Xn8uzvhFdDUkBetPkbfk4PAiVuho7Y/SOn2545e9sXX+c oUCyYNQVtBsb57G+hl7bDHOH86l/slZEDPTd2euvIBcDC/zeWgEQF48WimROy1Yjhqnm lNRULiFw+YaywIHpiwWM4FaDoAwJT/scoroXtABoFBg4HaN+Phm+Ws0rBaiuRz5uzPFC T9NctukTUb5qPL80c9DvQvtbDENzKn4fK6QyMREJ4zlZMWt3uDnNbEdCb718HiDoevcD Wgmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=qgMoLhn/PijE82EW0MI6DqC9oqnirXW6IOpPCP9Xfok=; fh=JCpky7niHyNvgZITwflAzKrQ1Rp2zJoC9GCk/Ap1/EE=; b=sx9PuGS2yYxeU29RHk0c1/5hzYjubcFdZp3nKGqtxG4ApU034hUziKXN+A2z2bhquH EMjMGz0ooOYw9NcO8ffbb3dSKf6duPyJsripYY4P21TW6Gijic8wTW8JzHU8RDqd98SX Ko1NVlPk3hzwy9vCxQfO0AIE57krE/7FKT46BKQ9SWA9ueZ1t8QULQ3LsPFe3ZWBxpTO aoGsF7+F1dCpW4HtT2HA6R6nwSoN+QsAvw1ChTRognhUP2pFxJC74i2xtEPowdnzcPIA aSnUQnbItE0IHDrHCrAlIp33hsclVhCGETbByaYVokvtRhzWXdAXyUMiXuodOTgPVpJH EuPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="i/4aO4pG"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.172.55.165]) by smtp.gmail.com with ESMTPSA id b14-20020a5d550e000000b0032d9caeab0fsm9394218wrv.77.2023.10.24.01.30.23 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 24 Oct 2023 01:30:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Thomas Huth , Laurent Vivier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PATCH v2 2/6] hw/m68k/mcf5206: Pass CPU using QOM link property Date: Tue, 24 Oct 2023 10:30:05 +0200 Message-ID: <20231024083010.12453-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231024083010.12453-1-philmd@linaro.org> References: <20231024083010.12453-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Avoid the interrupt controller directly access the first cpu via the qemu_get_cpu() call. Pass it as argument to mcf5206_init() from the board code. Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daudé --- hw/m68k/an5206.c | 6 ++++-- hw/m68k/mcf5206.c | 9 ++++++++- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c index 11ae4c9795..1e8e64f8bd 100644 --- a/hw/m68k/an5206.c +++ b/hw/m68k/an5206.c @@ -20,12 +20,14 @@ #define AN5206_MBAR_ADDR 0x10000000 #define AN5206_RAMBAR_ADDR 0x20000000 -static void mcf5206_init(MemoryRegion *sysmem, uint32_t base) +static void mcf5206_init(M68kCPU *cpu, MemoryRegion *sysmem, uint32_t base) { DeviceState *dev; SysBusDevice *s; dev = qdev_new(TYPE_MCF5206_MBAR); + object_property_set_link(OBJECT(dev), "m68k-cpu", + OBJECT(cpu), &error_abort); s = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(s, &error_fatal); @@ -60,7 +62,7 @@ static void an5206_init(MachineState *machine) memory_region_init_ram(sram, NULL, "an5206.sram", 512, &error_fatal); memory_region_add_subregion(address_space_mem, AN5206_RAMBAR_ADDR, sram); - mcf5206_init(address_space_mem, AN5206_MBAR_ADDR); + mcf5206_init(cpu, address_space_mem, AN5206_MBAR_ADDR); /* Load kernel. */ if (!kernel_filename) { diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c index 2ab1b4f059..f920ca2ceb 100644 --- a/hw/m68k/mcf5206.c +++ b/hw/m68k/mcf5206.c @@ -10,6 +10,7 @@ #include "qemu/error-report.h" #include "qemu/log.h" #include "cpu.h" +#include "hw/qdev-properties.h" #include "hw/boards.h" #include "hw/irq.h" #include "hw/m68k/mcf.h" @@ -601,13 +602,19 @@ static void mcf5206_mbar_realize(DeviceState *dev, Error **errp) s->timer[1] = m5206_timer_init(s->pic[10]); s->uart[0] = mcf_uart_init(s->pic[12], serial_hd(0)); s->uart[1] = mcf_uart_init(s->pic[13], serial_hd(1)); - s->cpu = M68K_CPU(qemu_get_cpu(0)); } +static Property mcf5206_mbar_properties[] = { + DEFINE_PROP_LINK("m68k-cpu", m5206_mbar_state, cpu, + TYPE_M68K_CPU, M68kCPU *), + DEFINE_PROP_END_OF_LIST(), +}; + static void mcf5206_mbar_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); + device_class_set_props(dc, mcf5206_mbar_properties); set_bit(DEVICE_CATEGORY_MISC, dc->categories); dc->desc = "MCF5206 system integration module"; dc->realize = mcf5206_mbar_realize; From patchwork Tue Oct 24 08:30:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 737531 Delivered-To: patch@linaro.org Received: by 2002:adf:dd81:0:b0:32d:baff:b0ca with SMTP id x1csp1917141wrl; Tue, 24 Oct 2023 01:32:22 -0700 (PDT) X-Google-Smtp-Source: AGHT+IELzzw1Y5Auy1r9oUpzXKKjLUu+E8ZLlBIIn5kb5WBXFm4Zt17IOTpa6SK8p+G08K9lSyDD X-Received: by 2002:ad4:5765:0:b0:655:dd4b:d077 with SMTP id r5-20020ad45765000000b00655dd4bd077mr14817922qvx.51.1698136342120; Tue, 24 Oct 2023 01:32:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698136342; cv=none; d=google.com; s=arc-20160816; b=o/JiHvZ8BWwXrh2X1UeM2c2+upOtM57PkigRTUDN8ujNk95nfBcdPB0WYkDPn6REyp b66v0oVOEsRxP4nlu8ca610vGly7gGQKlBlioaHurucxqPqqOQ2kc2MhhOQkVIB3+Z4O /vRPtU8c3xpNNqDi11MOwBg95oHyKyohcZBhxaDV/O2/vEN5oLdalJLHfYnAhfssXaO1 ZgR3D8F6+DKTLyUDsqhA0bIx/Zym9TApj0+mNkVl11eW4IuHf0GbdetzxMOQzv5vAWS7 Y3/Pf5PBrCpKD9qG9iG1+qFECRtu1+5z5Xt/AunAs8nVDr6ImHl56yiRRJIgcrU4Efs5 n5Uw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Xfu4/2AUQ8XPD1VFcNgXAyGx5PWs1jSOc11hThF88Y4=; fh=JCpky7niHyNvgZITwflAzKrQ1Rp2zJoC9GCk/Ap1/EE=; b=aYfP1NDwZWvBQyRSRugihprcLhzg4oQtR0CmTTUxHs/mPZO1p2YazfFmxlgfLF/S6c H5O2HPvUFoIlbGcHpcuZJrB+q+kZwGOcTWHigZlSdRxxENNpBBWJQTeNHDbJVAJB0P05 CWQ35XzctXXvGvSqFucj7Ax4nqna+FWcHyFSXbb5ofXTnDv+By6sifEnFDlXKaXFAEXe s6PxenEfIsmbdqzxSbc5YqFQFErzf4og1k6QaO3vYeh3BQ/sE4Vwi8pqgDGvwo73lGY9 dUJh7/ki449ooLNklmWgVfGuWU5F/JPAv5qLrXGMfw3GwYnlvychHAAEDgOquw04Bwek ce5Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Z0g/pdCR"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.172.55.165]) by smtp.gmail.com with ESMTPSA id d14-20020adffd8e000000b0031984b370f2sm9365431wrr.47.2023.10.24.01.30.28 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 24 Oct 2023 01:30:28 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Thomas Huth , Laurent Vivier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PATCH v2 3/6] hw/m68k/mcf_intc: Expose MMIO region via SysBus API Date: Tue, 24 Oct 2023 10:30:06 +0200 Message-ID: <20231024083010.12453-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231024083010.12453-1-philmd@linaro.org> References: <20231024083010.12453-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::135; envelope-from=philmd@linaro.org; helo=mail-lf1-x135.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org QOM objects shouldn't access each other internals fields except using the QOM API. Here the caller of mcf_intc_init() access the MMIO region from the MCF_INTC state. Avoid that by exposing that region via sysbus_init_mmio(), then get it with sysbus_mmio_get_region(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Tested-by: Thomas Huth Reviewed-by: Thomas Huth --- hw/m68k/mcf_intc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c index 4cd30188c0..1f74ea0e14 100644 --- a/hw/m68k/mcf_intc.c +++ b/hw/m68k/mcf_intc.c @@ -173,6 +173,7 @@ static void mcf_intc_instance_init(Object *obj) mcf_intc_state *s = MCF_INTC(obj); memory_region_init_io(&s->iomem, obj, &mcf_intc_ops, s, "mcf", 0x100); + sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem); } static void mcf_intc_class_init(ObjectClass *oc, void *data) @@ -211,7 +212,8 @@ qemu_irq *mcf_intc_init(MemoryRegion *sysmem, s = MCF_INTC(dev); s->cpu = cpu; - memory_region_add_subregion(sysmem, base, &s->iomem); + memory_region_add_subregion(sysmem, base, + sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); return qemu_allocate_irqs(mcf_intc_set_irq, s, 64); } From patchwork Tue Oct 24 08:30:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 737529 Delivered-To: patch@linaro.org Received: by 2002:adf:dd81:0:b0:32d:baff:b0ca with SMTP id x1csp1917027wrl; Tue, 24 Oct 2023 01:32:03 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG3mfDmO7EKR763OVRrw4Noj0CIyCjEVMoZWeLxBWd4aO7tPxoh+2rPLLVuLFBimu2gvSmR X-Received: by 2002:ad4:5ca3:0:b0:66d:6585:e787 with SMTP id q3-20020ad45ca3000000b0066d6585e787mr14766022qvh.39.1698136322852; Tue, 24 Oct 2023 01:32:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698136322; cv=none; d=google.com; s=arc-20160816; b=njt4jaNGU8ctecwYaq6LCtWu/QNLYyx9CA2NJKkj/f0ANTFB2VEhYvCdy/KiNB/H4P jBiq63G7IiTL2wAf8rATvBK/G7dmQuFh5g1H6RjMDRTqZH1BrCAkELfkG/1FsEzxSJxW cfj4/t3ITMtgMhYcj/1hQLdNaxVNxELqRimWScBG0pYVio9+ocyjNIzmXxdJngekPisl B/ABtX2sS8YmtTqPyBZHJw8nd1RIxkC4aXUGQSfGyeuxVx6/6MyHPjoM1UmzXDUZkL7I lU9MsS8jt+c0iwQQt/ybfA2mUULxql4yW83x0oY2hzu3FzgkXaU7NFm9NkdUhlQCdzuT 7kUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=jQzYUltxj5g7ekyBL7Wz4ZsV8ZVW3gL9B5H+7rR+rus=; fh=JCpky7niHyNvgZITwflAzKrQ1Rp2zJoC9GCk/Ap1/EE=; b=EcHfjZy0Fz2kOxjSEfzEVWm5djcmwumdBmzTNbaFQ7iZ/rht6xy7rcGLkwx/12655u 2BfaYHG/Pr/6fQxPTMUd3/r+jzuQi8wJtqnRN/zMQ/qcZVB+M+XhVK+doV6C0DWMNzpn 3u9CHjJGIKX2fhagGpSirz9x0kM4oesKxRqiTHNWuciL2T+WnHPvpVJQlb+iLNOjZ5kS FY9nGqueyoeovpk4iJBfbp05DFF661YJTg5sLIUKJB5ouh+b/jF4iVkxRVzmY78BIlnx kHMGekMe1LMA3y7fR7Qmm8yOsDt/jE8BwTWFKoCc6UQcO2Xg6N/+wSivr2hhL2qZ7gyx ZItQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PNljHyad; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.172.55.165]) by smtp.gmail.com with ESMTPSA id p6-20020a5d6386000000b00327b5ca093dsm9409641wru.117.2023.10.24.01.30.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 24 Oct 2023 01:30:35 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Thomas Huth , Laurent Vivier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PATCH v2 4/6] hw/m68k/mcf_intc: Pass CPU using QOM link property Date: Tue, 24 Oct 2023 10:30:07 +0200 Message-ID: <20231024083010.12453-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231024083010.12453-1-philmd@linaro.org> References: <20231024083010.12453-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::233; envelope-from=philmd@linaro.org; helo=mail-lj1-x233.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org QOM objects shouldn't access each other internals fields except using the QOM API. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Tested-by: Thomas Huth Reviewed-by: Thomas Huth --- hw/m68k/mcf_intc.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c index 1f74ea0e14..1d3b34e18c 100644 --- a/hw/m68k/mcf_intc.c +++ b/hw/m68k/mcf_intc.c @@ -14,6 +14,7 @@ #include "hw/irq.h" #include "hw/sysbus.h" #include "hw/m68k/mcf.h" +#include "hw/qdev-properties.h" #include "qom/object.h" #define TYPE_MCF_INTC "mcf-intc" @@ -176,10 +177,17 @@ static void mcf_intc_instance_init(Object *obj) sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem); } +static Property mcf_intc_properties[] = { + DEFINE_PROP_LINK("m68k-cpu", mcf_intc_state, cpu, + TYPE_M68K_CPU, M68kCPU *), + DEFINE_PROP_END_OF_LIST(), +}; + static void mcf_intc_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); + device_class_set_props(dc, mcf_intc_properties); set_bit(DEVICE_CATEGORY_MISC, dc->categories); dc->reset = mcf_intc_reset; } @@ -204,16 +212,13 @@ qemu_irq *mcf_intc_init(MemoryRegion *sysmem, M68kCPU *cpu) { DeviceState *dev; - mcf_intc_state *s; dev = qdev_new(TYPE_MCF_INTC); + object_property_set_link(OBJECT(dev), "m68k-cpu", + OBJECT(cpu), &error_abort); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - - s = MCF_INTC(dev); - s->cpu = cpu; - memory_region_add_subregion(sysmem, base, sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); - return qemu_allocate_irqs(mcf_intc_set_irq, s, 64); + return qemu_allocate_irqs(mcf_intc_set_irq, dev, 64); } From patchwork Tue Oct 24 08:30:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 737527 Delivered-To: patch@linaro.org Received: by 2002:adf:dd81:0:b0:32d:baff:b0ca with SMTP id x1csp1916730wrl; Tue, 24 Oct 2023 01:31:12 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGjhC130GuvBIM1poL76fuJHbAdriEpXCOPBCe/9hznCkwS46FDVNN82HerDzliMfpg+lOw X-Received: by 2002:a05:620a:288c:b0:76c:df5d:13a9 with SMTP id j12-20020a05620a288c00b0076cdf5d13a9mr12267313qkp.58.1698136272379; Tue, 24 Oct 2023 01:31:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698136272; cv=none; d=google.com; s=arc-20160816; b=wl/2zdfatv8FHiAcwv/I4GQIi8O26ykHQ5m62VSj9p+S+5uO0l8S0CAyJDlvqhR5UA BWBZpSHvlcb0dUsZssVyW4/2X5uP11eRVoovAIrF+rMYLtLp57ibuWhqrxLqiPxIlJ7r Q1lN00hXegwHnXdF0l/BxzRCLVG4a/KREisFlvYzxa3oTH3MtQK6YO9u5c5VEbY9t2Z9 lM8MGH5poDx9gJsDldi17mr9glhU7Z67LD9veaPsEFhwkc5lFeNOQ/cTkov13j4+f3hJ r09kyYqAa+G9lliCOYLlyFe3cPRprtHlFrinYF/EQ/1El9E3WGpdyu7rcl8a3a/hPttm bQGg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ZlPzf4Ab5QFLnbSPHtWGOn/3d8rqF62sEucKv3iijfs=; fh=JCpky7niHyNvgZITwflAzKrQ1Rp2zJoC9GCk/Ap1/EE=; b=OhPZaBtbPHgFNquXXLSEJgT07lqa8Lz24v6X2nbZCuTd2BlmFlojwznmci8bBHKpjR unKW2m/ImK77SgK40Su8CsefYG82Clj8e0kgrnQuaoQ0VmeC4sbRs/1G2dYNm+4sPjao FfEZKDJWRkn9tAUN6zKAbraU4ysjCl+FvYtU4EiSpnClbqqGCqhDwrJctg2qCmvragQr SbYWlZVaWTUvFGBCzMI0sUAh0GBpJRINetUb+El9/Ep82qWZbcB2quFsg+6Soa1k+7oM Z/LHERBi6VU83512dJXgyVanpY/NdYUPDhW6wvJIKVdRmmY4jLPbEHaIevnLZ5wut2N/ g7Yw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Lf52840P; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.172.55.165]) by smtp.gmail.com with ESMTPSA id k12-20020a5d518c000000b0031f82743e25sm9383775wrv.67.2023.10.24.01.30.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 24 Oct 2023 01:30:40 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Thomas Huth , Laurent Vivier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PATCH v2 5/6] hw/m68k/next-cube: Do not open-code sysbus_create_simple() Date: Tue, 24 Oct 2023 10:30:08 +0200 Message-ID: <20231024083010.12453-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231024083010.12453-1-philmd@linaro.org> References: <20231024083010.12453-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::132; envelope-from=philmd@linaro.org; helo=mail-lf1-x132.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Mechanical change using the following coccinelle script: @@ identifier dev; identifier sbd; expression qom_type; expression addr; @@ - dev = qdev_new(qom_type); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); + dev = sysbus_create_simple(qom_type, addr, NULL); then manually removing the 'dev' variable to avoid: error: variable 'dev' set but not used [-Werror,-Wunused-but-set-variable] Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth --- hw/m68k/next-cube.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 5d244b3b95..d17e6be8e1 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -950,7 +950,6 @@ static void next_cube_init(MachineState *machine) MemoryRegion *bmapm2 = g_new(MemoryRegion, 1); MemoryRegion *sysmem = get_system_memory(); const char *bios_name = machine->firmware ?: ROM_FILE; - DeviceState *dev; DeviceState *pcdev; /* Initialize the cpu core */ @@ -974,9 +973,7 @@ static void next_cube_init(MachineState *machine) memory_region_add_subregion(sysmem, 0x04000000, machine->ram); /* Framebuffer */ - dev = qdev_new(TYPE_NEXTFB); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x0B000000); + sysbus_create_simple(TYPE_NEXTFB, 0x0B000000, NULL); /* MMIO */ sysbus_mmio_map(SYS_BUS_DEVICE(pcdev), 0, 0x02000000); @@ -993,9 +990,7 @@ static void next_cube_init(MachineState *machine) memory_region_add_subregion(sysmem, 0x820c0000, bmapm2); /* KBD */ - dev = qdev_new(TYPE_NEXTKBD); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x0200e000); + sysbus_create_simple(TYPE_NEXTKBD, 0x0200e000, NULL); /* Load ROM here */ /* still not sure if the rom should also be mapped at 0x0*/ From patchwork Tue Oct 24 08:30:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 737528 Delivered-To: patch@linaro.org Received: by 2002:adf:dd81:0:b0:32d:baff:b0ca with SMTP id x1csp1916789wrl; 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[176.172.55.165]) by smtp.gmail.com with ESMTPSA id c8-20020a05600c0a4800b0040775fd5bf9sm11594619wmq.0.2023.10.24.01.30.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 24 Oct 2023 01:30:46 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Thomas Huth , Laurent Vivier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PATCH v2 6/6] hw/m68k/virt: Do not open-code sysbus_create_simple() Date: Tue, 24 Oct 2023 10:30:09 +0200 Message-ID: <20231024083010.12453-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231024083010.12453-1-philmd@linaro.org> References: <20231024083010.12453-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22d; envelope-from=philmd@linaro.org; helo=mail-lj1-x22d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Mechanical change using the following coccinelle script: @@ identifier dev; expression qom_type; expression addr; expression irq; @@ - dev = qdev_new(qom_type); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); - sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); + dev = sysbus_create_simple(qom_type, addr, irq); Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth --- hw/m68k/virt.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/hw/m68k/virt.c b/hw/m68k/virt.c index e7dc188855..2e49e262ee 100644 --- a/hw/m68k/virt.c +++ b/hw/m68k/virt.c @@ -201,11 +201,8 @@ static void virt_init(MachineState *machine) sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_TTY_IRQ_BASE)); /* virt controller */ - dev = qdev_new(TYPE_VIRT_CTRL); - sysbus = SYS_BUS_DEVICE(dev); - sysbus_realize_and_unref(sysbus, &error_fatal); - sysbus_mmio_map(sysbus, 0, VIRT_CTRL_MMIO_BASE); - sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_CTRL_IRQ_BASE)); + dev = sysbus_create_simple(TYPE_VIRT_CTRL, VIRT_CTRL_MMIO_BASE, + PIC_GPIO(VIRT_CTRL_IRQ_BASE)); /* virtio-mmio */ io_base = VIRT_VIRTIO_MMIO_BASE;