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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id e16-20020adfe390000000b0032dab20e773sm212889wrm.69.2023.10.19.14.18.22 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:18:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, Luc Michel , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PULL 01/46] mailmap: update email addresses for Luc Michel Date: Thu, 19 Oct 2023 23:17:26 +0200 Message-ID: <20231019211814.30576-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Luc Michel Map my old and now invalid work email addresses to my personal one. Signed-off-by: Luc Michel Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20230929140326.2056658-2-luc@lmichel.fr> Signed-off-by: Philippe Mathieu-Daudé --- .mailmap | 3 +++ 1 file changed, 3 insertions(+) diff --git a/.mailmap b/.mailmap index d214959288..94f19a0ac9 100644 --- a/.mailmap +++ b/.mailmap @@ -81,6 +81,9 @@ Huacai Chen James Hogan Leif Lindholm Leif Lindholm +Luc Michel +Luc Michel +Luc Michel Radoslaw Biernacki Paul Brook Paul Burton From patchwork Thu Oct 19 21:17:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735627 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1731768wro; Thu, 19 Oct 2023 14:25:29 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFeMyxc4TSHSLV3/ACaw93OXa/ynzsPifZKrbpEnCBvfqQa6E7VkhSZY3rVl44jqPEmMvDg X-Received: by 2002:a25:23d2:0:b0:d9a:5d69:54b with SMTP id j201-20020a2523d2000000b00d9a5d69054bmr18511ybj.25.1697750729656; Thu, 19 Oct 2023 14:25:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750729; cv=none; d=google.com; s=arc-20160816; b=CbGTpl1PIYJQ7QpzbcubhmM9IX1ejKGWkTcxE//bXrbWmmJinX5UGcZ99jEeiexpjx P8a59nHg2RuZp9pWZOXc6EuyEJ5Uq1cGUm1IiRXfFicnWhYeDVGEdpfvvOM4qybAlRTH cbDWig1XYD5WWaiEoMV113SMQRlQch9ksW5IC3fxuN2Po4Ssv/6vI8jTreaNPR8JOSlz K58J3OSDhNKEG5j5a5YONt4Mru+zACzHwqaejZQoCkwbCedSs4A3pNPA2XpIOTe9Qxnf l+8aOZw0lC/PGJepJ2idiFgh7sA1xjV2FEH+blVh8nf0HNpe39x9gYUZxaRBzDHOcA77 ghAA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=/hpCEMkB9kpmbEy5heZ/fa+AI3RvYUKVxbgc0+G8NZg=; fh=QhaOZ6QGfjKMzLeDMQRTnibOKy2NlfDG446TAiedCIU=; b=VOnxq+SeUs7vhmvcdV5oeojjkLXake9UMu7iiW+XxJc0hKX4ErDcTMxn8hDEgYji2Z A62SRGbAFfiJKXRZ73Y6o/GXlw6P3lf3subeP6MyPKXtAyaNYLTStG6ChxZDwI8FY5pl vA20nl9I4QvwBL1YJ/A+xY6y5MVzXCJT9ZX0vs3Bf51jGttpBAVZsOQUd2qX108Tu46i Sqi/C27RPa0CAHvcIVkqjAIAXhNvowqxl+TxdS7g4fdPIQoIAj4YcHceiVkO9mCt9i+9 0+RnriqlzcXsT2uZHEr4QU05iv3v36n8LOHfpPGQAVg8lUK/SMwGmjHFOURpeFC+Ab9I E9Sg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HwJrf++Q; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id fm12-20020a05600c0c0c00b004030e8ff964sm5343291wmb.34.2023.10.19.14.18.28 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:18:30 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, BALATON Zoltan , =?utf-8?q?Philipp?= =?utf-8?q?e_Mathieu-Daud=C3=A9?= Subject: [PULL 02/46] MAINTAINERS: Split vt82c686 out of fuloong2e Date: Thu, 19 Oct 2023 23:17:27 +0200 Message-ID: <20231019211814.30576-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: BALATON Zoltan The VIA south bridges are now mostly used by other machines not just fuloong2e so split off into a separate section and take maintainership. Signed-off-by: BALATON Zoltan Message-ID: <20231015141517.219317456A7@zero.eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 9bd4fe378d..5f7d8ed866 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1322,10 +1322,7 @@ M: Philippe Mathieu-Daudé R: Jiaxun Yang S: Odd Fixes F: hw/mips/fuloong2e.c -F: hw/isa/vt82c686.c F: hw/pci-host/bonito.c -F: hw/usb/vt82c686-uhci-pci.c -F: include/hw/isa/vt82c686.h F: include/hw/pci-host/bonito.h F: tests/avocado/machine_mips_fuloong2e.py @@ -2481,6 +2478,15 @@ S: Maintained F: hw/isa/piix4.c F: include/hw/southbridge/piix.h +VIA South Bridges (VT82C686B, VT8231) +M: BALATON Zoltan +M: Philippe Mathieu-Daudé +R: Jiaxun Yang +S: Maintained +F: hw/isa/vt82c686.c +F: hw/usb/vt82c686-uhci-pci.c +F: include/hw/isa/vt82c686.h + Firmware configuration (fw_cfg) M: Philippe Mathieu-Daudé R: Gerd Hoffmann From patchwork Thu Oct 19 21:17:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735611 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1730857wro; Thu, 19 Oct 2023 14:22:52 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG649RopAd9UXsaHHr3nE2kA9hKKXRWgsG4VHK36ZfJhbuHLUO5H48N9vepLft9egUSpyQ/ X-Received: by 2002:a05:620a:4446:b0:776:5135:d98c with SMTP id w6-20020a05620a444600b007765135d98cmr4370363qkp.15.1697750571752; Thu, 19 Oct 2023 14:22:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750571; cv=none; d=google.com; s=arc-20160816; b=m9Or0r7sB3e1Hd2hzSgTluzFHcdKHi05Dpfb3yJbJV1GzpL9+YMZD6eRjYYJ/Lce+k E8aD6SfAqsKV1ljxOtnB7oXPg2FQfcddM9vfKa96fkUp6gIhAVSMmyDTQMQ5SnV6PWZy KrPcbwiiGThJgkY64kPK0qgmgJt3shpIU0Ku6A8AlsVRAOb3I3Y+5nEwdO8eJdHGhWgq FAazV3G7ctRRSoqjpsM3G7e0cEZyry4PAkk7vWO6k+oQnRDXqeaaNGQDqMj+sJjPr2bt 5t0Dr3iOMHSSzYTLW+Z12dU/9HCYSWsfntq3QbXO1o+R67G8w+jfzSM/aAgFu6z4eV/4 XMHQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=P143GsrIkkWZV6XUtWMe/VI7qSgf5Ym9rpk/8SpsGrY=; fh=8e8O9o5ucF67m0tI8iDbRxi9m3irGwkxinTZb0/omDk=; b=vGpHe70NsmmTnLMkXmQLjYIpYQmfnGl6C6q9KWPXLyXC4W4U31f32lYf6SCTxSAmkF HFhvZrB+MFCDOYKHawu8TAeu96aFf0WWT1miHPBYtbatnTlane+xydqTKDXq7ScBcWgm Iu1MY7g4YKeJcR/omzkDw48uwiDcCiEasu0osJzV3CH/M5n6U+IkFszQGoShYPqqNYvt +e/o1oOLWSnO686MYuS5S4SmK56paPuGIBUlZz0scvIesChHGAxfSNZUOak6pdEFL0CU IF6gyvJpugIDgn8CrBj5WJ3HQd6rc52tPHE6wM1BPp5kz6KN6j24+smorZhSPua9gRMC DIBw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gN8aIfFl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id p21-20020a05600c431500b004076f522058sm5278343wme.0.2023.10.19.14.18.35 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:18:37 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, Thomas Huth , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= , Mark Cave-Ayland Subject: [PULL 03/46] MAINTAINERS: Add hw/input/lasips2.c to the HPPA machine section Date: Thu, 19 Oct 2023 23:17:28 +0200 Message-ID: <20231019211814.30576-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Thomas Huth hw/input/lasips2.c and the corresponding header include/hw/input/lasips2.h are only used by the HPPA machine, so add them to the corresponding section in the MAINTAINERS file. Signed-off-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland Message-ID: <20231017151933.213780-1-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 5f7d8ed866..29b350f819 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1179,9 +1179,11 @@ R: Helge Deller S: Odd Fixes F: configs/devices/hppa-softmmu/default.mak F: hw/hppa/ +F: hw/input/lasips2.c F: hw/net/*i82596* F: hw/misc/lasi.c F: hw/pci-host/dino.c +F: include/hw/input/lasips2.h F: include/hw/misc/lasi.h F: include/hw/net/lasi_82596.h F: include/hw/pci-host/dino.h From patchwork Thu Oct 19 21:17:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735635 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1732275wro; Thu, 19 Oct 2023 14:27:00 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGNCbuMpIkmG0S2AkjjIWM+pZnjJTSldEZyh7abonJOdVh7hGetqet5/t7U9XgJieDK+7EO X-Received: by 2002:a05:622a:19a7:b0:419:8ec7:cfc6 with SMTP id u39-20020a05622a19a700b004198ec7cfc6mr3511271qtc.12.1697750819785; Thu, 19 Oct 2023 14:26:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750819; cv=none; d=google.com; s=arc-20160816; b=pdPeymf4QdIm5k9gqlkuEVoAmspO26csErbe7bAkMSx/rghkvzMui/fIHIFRiTyDIB jb/LszUBDInDPryxdzTQgx+0AA2HUMRSEk+/Y1iJ3ZxjTY2T/PlZpvMbUh8xU+lW2VkS rcIbaSBuleIyVqD4+SM+tnG/EpbrNcM/4cTgbJX72waxHfhFmPBPIIkq+7d/UOFVmeqR ecHu9oOglCDDSRKCZ19gD/ypovCdyvhBaEPSYJ7sgFv59qId69yyRHeN8EMdkZzxHUHA WzPTnd9+pO6iae+9NnmxIJtwQtPGkClhFOpaeJ5cBEWr8P2FSCJ7C2IDopKhLJO6ithv rKyA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=kiEw9YpCoXl5uwZnYD6Z6QL4RjcbavrFkOGyAF3Ak2A=; fh=ckwBQsqz2xEj0TM3ZdnCjvIA59leA+DNG3TK60N43N0=; b=WeW4GG/CGTp+X9CZq9zd2qIO55SSB+YDH9Kag8oYCt3TJWUU+kIKgrysq6bbLoxn8F FOsPOT8+UoqCi/mn9Z3+6U6bU02ZPFNWm20SFt0qxTfAq7dK6wvWCwXCZmxYi+r6mL+R 2TWMlyziL+easMgMvGeWEvl7plVHcLMCGyrFafhNRL+UaUWgOFBGoMsy/V1Bi/fB0b7K RXjcaXd2PB7KlfScEjB/c7dpF3rQdt1q9n8nagxlfhFhgrn4fOEz1s8rBQNSoDHZp5Pa Ub0+uQp7VUyav3MOlW3DUgfButydncDGA2ibhNC7A0w3EnlByGzbMj9bW09ldBMpz4ea piHA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="TSSkRj/b"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id f1-20020adff8c1000000b0032da75af3easm212753wrq.80.2023.10.19.14.18.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:18:43 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, Thomas Huth , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= , Song Gao Subject: [PULL 04/46] MAINTAINERS: Add include/hw/intc/loongson_liointc.h to the Loongson-3 virt section Date: Thu, 19 Oct 2023 23:17:29 +0200 Message-ID: <20231019211814.30576-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Thomas Huth The corresponding .c file is already listed here, so we should mention the header here, too. Signed-off-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daudé Acked-by: Song Gao Message-ID: <20231017153345.233807-1-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 29b350f819..91ca93328a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1336,6 +1336,7 @@ F: hw/intc/loongson_liointc.c F: hw/mips/loongson3_bootp.c F: hw/mips/loongson3_bootp.h F: hw/mips/loongson3_virt.c +F: include/hw/intc/loongson_liointc.h F: tests/avocado/machine_mips_loongson3v.py Boston From patchwork Thu Oct 19 21:17:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735604 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1730329wro; Thu, 19 Oct 2023 14:21:15 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHRibf6SUBGVZnxbXZKTgUWuu7uqQO+Hr87EzNNWgn+leU+Kgc6AV8UxD1V8aHpkKCknAyb X-Received: by 2002:a05:6808:4d3:b0:3b2:f431:e029 with SMTP id a19-20020a05680804d300b003b2f431e029mr13381oie.26.1697750474796; Thu, 19 Oct 2023 14:21:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750474; cv=none; d=google.com; s=arc-20160816; b=ijM5s+MlMbxAoxv+wCgK3vVQ3VNRcQWFOqRIMGbaFPyJWw3SdsAFncs/czUSiqdhQR 3SzSMr3VKp+lnueTEmRrXGa9hDokQtoqsmZay6xhhX9evCkqepczs+HB+zQY9caNREtB o+GUR3tSGw4DQs2ZZ1H6jVGPUES3i23YAsS5+M/Op44/PBW043q2I5mBY1fr92LVJtd0 9s3tdbn1C9g0Vd5Tkbfn53Tq00DlmXOqTFVZs81LOA6LG36wC4kx36NtrEmdnrwPtKL8 Bx0W3ZlcuZuDLci0qpsCKR4km5g5ecjy9ywCbpHt6asf72vE4jOr/UQjFDnwjCynFCwh SslA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=qBlkrh9XfjJWP3OFrpnOYz+jcm6RPWBlnbPyzymUXR4=; fh=XajuQtpltTokiJNywaRuEMZPgoM5Skz0J95FECLljEQ=; b=qY8kA5RLzS6S60SfyE4rfjZhSlCHY8Gz5pjVabNK5b9FfEMH+YvF2UbB8Dwjpd5JNx MQC1Cm9XV1m8EjiNCgnGC3Y7cwxG+3Q53kHJ+ocFR/jpn3kXJxzc776Up6dOibYsQqlV TWNOt5aifTgUvx29aPEo/0WzvLbiOXAMShogjnvtzu8pxMFM+1B7SkjE2qkg5QmfjDck o4+0GQ2uuCJwLtQlMz2N/UDIGchieZWyLoCSuDUww0Z6NLiLJOFpqXFazy90XWaQYqTB eXKG/h2r10MVS6tthQcneOGR+x9P48MpUVoy5H4487dqggwzaLaSB33ceNXu0jP/wkLv AhuA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=i6bTcQDN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id l9-20020a5d5609000000b0032da7454ebesm208905wrv.79.2023.10.19.14.18.48 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:18:49 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, Thomas Huth , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PULL 05/46] MAINTAINERS: Add include/hw/openrisc/ to the OpenRISC section Date: Thu, 19 Oct 2023 23:17:30 +0200 Message-ID: <20231019211814.30576-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Thomas Huth hw/openrisc/ is already listed here, so we should mention the folder for the headers here, too. Signed-off-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20231017154242.234133-1-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 91ca93328a..fe11c98669 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -295,6 +295,7 @@ S: Odd Fixes F: docs/system/openrisc/cpu-features.rst F: target/openrisc/ F: hw/openrisc/ +F: include/hw/openrisc/ F: tests/tcg/openrisc/ PowerPC TCG CPUs From patchwork Thu Oct 19 21:17:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735622 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1731396wro; Thu, 19 Oct 2023 14:24:26 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFWQU5oM9OJlUvIaPPuYvxFplAyM6hgV0S867TlTiSQ6VC4cA++RVDytXUO5BLNahPQP5q2 X-Received: by 2002:a05:6808:3c2:b0:3b2:e4bd:17e1 with SMTP id o2-20020a05680803c200b003b2e4bd17e1mr26502oie.24.1697750665755; Thu, 19 Oct 2023 14:24:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750665; cv=none; d=google.com; s=arc-20160816; b=yBx+IOTu4sQ3Y4VWbNI8+5ofeWRQpCzy9NfAeKWQv0o76EKjl7DAsy+6LdCUTOFvug 0Y0Am3zMc3PJn5pz8mdijSvLEqx/O/VcBcOZ98mu+Ea9a/cPlNZ2ek4XicJkjuP6Bwsr xA/dUrXZBXT99dgAV9Ul2bLqjLniU3VozmhPcOzVfos11psXq+nkLb+5YuzU0uKRY7Cp 4mT8tZ7QtW4Dp9Dfv4hiUZtAqccmRsNL9YieroiTyuAylSFiTgUc6J9b5bkOrPOEzPzN OpKzGODbpZurqY36oGT0NlsfswI1+IlcceSTFSRGd+8qaTe8ia2NrtKLhMlsOYt3rhUR XdtQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=mJLA18pFybXFPbUpHy1W5xTRic5xRcDchoEnbbPwZSQ=; fh=8UgauOwMpz8HXpUgb8/ulMy8LDcf99vpBwFiCWJiEDo=; b=DG7dCKZ/nLcvdyZrCFjvjLjTstgy1u8VG4hVShCLa55okMiAum0jaaXt7wMrsQ3FzQ xOVo8R1E1OYpJKpFoRh46/UuVYNqkAxmERFuguR4yrFuVGtxgJR9MYMSo4A7OWOcrWob WTZsz6a998oUqFgn1WWSTzqlbAB+A8uLV80dlPVYCvMbjvkbszzfSqLhl2jirEUVO8A6 OydYzPDhmJMw6eP6Ebr13gqidOLGtbSwtSMVjvsiMvIDJVxywy+GV2rpA5FV91fRuLt/ NrWhu0Fb2ukprTNJuC2XB6qzZOh/lIt77XYvRPfj2opuqhzWifiAd97jAA40pkAsIBXW qs3A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=I7V+krl9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id r6-20020a5d6946000000b0032da4c98ab2sm219159wrw.35.2023.10.19.14.18.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:18:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, Akihiko Odaki , Stefan Weil , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 06/46] cutils: Fix get_relocated_path on Windows Date: Thu, 19 Oct 2023 23:17:31 +0200 Message-ID: <20231019211814.30576-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Akihiko Odaki get_relocated_path() did not have error handling for PathCchSkipRoot() because a path given to get_relocated_path() was expected to be a valid path containing a drive letter or UNC server/share path elements on Windows, but sometimes it turned out otherwise. The paths passed to get_relocated_path() are defined by macros generated by Meson. Meson in turn uses a prefix given by the configure script to generate them. For Windows, the script passes /qemu as a prefix to Meson by default. As documented in docs/about/build-platforms.rst, typically MSYS2 is used for the build system, but it is also possible to use Linux as well. When MSYS2 is used, its Bash variant recognizes /qemu as a MSYS2 path, and converts it to a Windows path, adding the MSYS2 prefix including a drive letter or UNC server/share path elements. Such a conversion does not happen on a shell on Linux however, and /qemu will be passed as is in the case. Implement a proper error handling of PathCchSkipRoot() in get_relocated_path() so that it can handle a path without a drive letter or UNC server/share path elements. Reported-by: Stefan Weil Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20231005064726.6945-1-akihiko.odaki@daynix.com> Signed-off-by: Philippe Mathieu-Daudé --- util/cutils.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/util/cutils.c b/util/cutils.c index 64f817b477..42364039a5 100644 --- a/util/cutils.c +++ b/util/cutils.c @@ -1163,17 +1163,21 @@ char *get_relocated_path(const char *dir) g_string_append(result, "/qemu-bundle"); if (access(result->str, R_OK) == 0) { #ifdef G_OS_WIN32 - size_t size = mbsrtowcs(NULL, &dir, 0, &(mbstate_t){0}) + 1; + const char *src = dir; + size_t size = mbsrtowcs(NULL, &src, 0, &(mbstate_t){0}) + 1; PWSTR wdir = g_new(WCHAR, size); - mbsrtowcs(wdir, &dir, size, &(mbstate_t){0}); + mbsrtowcs(wdir, &src, size, &(mbstate_t){0}); PCWSTR wdir_skipped_root; - PathCchSkipRoot(wdir, &wdir_skipped_root); + if (PathCchSkipRoot(wdir, &wdir_skipped_root) == S_OK) { + size = wcsrtombs(NULL, &wdir_skipped_root, 0, &(mbstate_t){0}); + char *cursor = result->str + result->len; + g_string_set_size(result, result->len + size); + wcsrtombs(cursor, &wdir_skipped_root, size + 1, &(mbstate_t){0}); + } else { + g_string_append(result, dir); + } - size = wcsrtombs(NULL, &wdir_skipped_root, 0, &(mbstate_t){0}); - char *cursor = result->str + result->len; - g_string_set_size(result, result->len + size); - wcsrtombs(cursor, &wdir_skipped_root, size + 1, &(mbstate_t){0}); g_free(wdir); #else g_string_append(result, dir); From patchwork Thu Oct 19 21:17:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735602 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1729876wro; Thu, 19 Oct 2023 14:19:58 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEYm3tAtKjo2TekJeO7L48Jbj8xqTbi3fyfsWt9C5ucrf1REA9nF4iDvEo6VNy9bZnrQtbK X-Received: by 2002:a05:620a:f15:b0:777:5b4e:e52e with SMTP id v21-20020a05620a0f1500b007775b4ee52emr3535235qkl.66.1697750398756; Thu, 19 Oct 2023 14:19:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750398; cv=none; d=google.com; s=arc-20160816; b=d89IW6VUpiTSq9lRg5igv3uGd4iWO5aQzjE6QkHG2889Gc5zVJszOrqtUQz3HRh1Zz Re4rEiI3ORRzBLUMN+s+GlJL1yiesbS6mLY7gowW7udnGJTFkg8lZarqR/TLSQ9lJvIy fcXe7IwI+hYe+JWikj6bs4oJ6jaAU+ckZ2JSE7QJ4sPIJQQ/hOGh/xijc4PWIs+DYWdi g5lGQilE/4uUBE9/pbEaPl5jpcra3HQ9nseigOt8U6/YB2X4Ni0EdF7XBckp8tWqYUe6 DrUwI52QfiqjVfGOsMZ2kiGT37YhxBRUpYensqdf1KSHItz6q6FVIQOLj761NBSbn3qo jOrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=CDOh9aTp1V6NdKCqXsAlRdEiv+EPu9d2PQpbnuZZmkw=; fh=ulNUqG6n2HecJzpsniCvENKN89PnjK3EayQSiKZY0zw=; b=B+TYYCjScnvEBaHgp1dkFmkyQ1cREnNd5MgNor5NYE5m7jm45Nf2CqA8Of+o31fjuG ZL+zmfLGrqIE7GXCAK9vGMk3hPhfTnpWga9oRWb+5EbsIjya29E8ywOj0WqvdkllOvwN 3fdCZyPaq0CeGZ+sYisAkpk7lRHSvhyTtWIJCkZbSc8rD8OLCDYq8RXaPS1vDsAKc3m+ R/G1CZil2cxgHRWshJClvFOsvYYhsdPxGGExznxbkS9sVyLx0Fm+euhUP/wx0s/ZCUqo 5z2hbii+6a1T2Hh8tgy8DRmW95PvG2v36WkkVb0Bb2wPtyK6/2J198lx8GGPw/EYdazB TEvw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ijlTvkQh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id y10-20020a5d470a000000b0032d9efeccd8sm220126wrq.51.2023.10.19.14.19.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:19:03 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Akihiko Odaki , Paolo Bonzini , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Thomas Huth Subject: [PULL 07/46] buildsys: Only display Objective-C information when Objective-C is used Date: Thu, 19 Oct 2023 23:17:32 +0200 Message-ID: <20231019211814.30576-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When configuring with '--disable-cocoa --disable-coreaudio' on Darwin, we get: meson.build:4081:58: ERROR: Tried to access compiler for language "objc", not specified for host machine. meson.build:4097:47: ERROR: Tried to access unknown option 'objc_args'. Instead of unconditionally display Objective-C informations on Darwin, display them when Objective-C is discovered. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Akihiko Odaki Message-Id: <20231009093812.52915-1-philmd@linaro.org> --- meson.build | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/meson.build b/meson.build index 259dc5f308..4961c82a6b 100644 --- a/meson.build +++ b/meson.build @@ -4087,8 +4087,10 @@ if 'cpp' in all_languages else summary_info += {'C++ compiler': false} endif -if targetos == 'darwin' +if 'objc' in all_languages summary_info += {'Objective-C compiler': ' '.join(meson.get_compiler('objc').cmd_array())} +else + summary_info += {'Objective-C compiler': false} endif option_cflags = (get_option('debug') ? ['-g'] : []) if get_option('optimization') != 'plain' @@ -4098,7 +4100,7 @@ summary_info += {'CFLAGS': ' '.join(get_option('c_args') + option_cfl if 'cpp' in all_languages summary_info += {'CXXFLAGS': ' '.join(get_option('cpp_args') + option_cflags)} endif -if targetos == 'darwin' +if 'objc' in all_languages summary_info += {'OBJCFLAGS': ' '.join(get_option('objc_args') + option_cflags)} endif link_args = get_option('c_link_args') From patchwork Thu Oct 19 21:17:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735606 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1730594wro; Thu, 19 Oct 2023 14:21:57 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFDwa/Z89p4mU3h5+ToGRbytPvSGHpHRg3lrwE4bQ7xyPZmPREajRvto0wOhfuvaeprW4xf X-Received: by 2002:ad4:5dcc:0:b0:65b:150e:604b with SMTP id m12-20020ad45dcc000000b0065b150e604bmr73613qvh.49.1697750517317; Thu, 19 Oct 2023 14:21:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750517; cv=none; d=google.com; s=arc-20160816; b=fzs6xii8P7GC1BwScU/bsb4q42vsJpD9PWflZX+QF1WTziKg1nllAyhbIX+DdpCmIs Rp4PX20UKKDaIbqMGTE3v1Es8zo3CrJAHW2wxJ0Hg2cYul/Gb/vzIQLu3HDWkm4Oh/AN BfoKdlrJOYjzF13OQMXpcZU66YojWXiYFB9+D1NSd+9XjmXeCfTHISIhg1nTdzU/BWUl tx8wPUR95BOGOabseqoJN9V8XDpN17+RZnpRP78fS+jscJcAFPJrrB6qNDhELbOekMYw hJSjNuoSt/m4dnGSt69R/yY/1rZaw/4W+2MhGmycS/iYSze7p31xVBOR7sp6FZ2yePs7 naZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=TF53WRurKJJRsNtHQwV6C2hpFVA8ru1RM8pOdggQzFc=; fh=WMYVDPEVgLeItH8gWOkBDbvMSqUUAVXxQBAwvOYWap8=; b=hfKWMXCLma0FQyICmSTwQTPDYNfkAWryf6TBN4kV4ZUCprK8fU19Lw5+Zv64XMmjy5 WqS2ttf7EIuvhPCJa9Ejv09J7IpcTDcpuAYnVwuKMxIdpNuo/ZA/hVVmgFz268KAmU5I fhU/YWe/ZXH5EFIxz7RPAaBcd3frZhRGX7lGFzZAGZ17HJJqD2b9BmmKiopRDxxgcfKT /J3rfZsQxqtB1JrTb6DpJDEPdlEuqbjR0Jgs8/cOIyPl8hvpJxNR6y+iJ6ukeHuaS8Z+ MtrhlMA6+3Zv1Y906h9/pz308om95O01Ce9vrR2JaYr71eeKZwwobhTmQL0/xrSq2EFv C6wQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XGL9SjUj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id p5-20020a05600c358500b004053a6b8c41sm515635wmq.12.2023.10.19.14.19.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:19:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , David Hildenbrand , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Paolo Bonzini , Peter Xu Subject: [PULL 08/46] memory: drop needless argument Date: Thu, 19 Oct 2023 23:17:33 +0200 Message-ID: <20231019211814.30576-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Marc-André Lureau The argument is unused since commit bdc44640c ("cpu: Use QTAILQ for CPU list"). Signed-off-by: Marc-André Lureau Reviewed-by: David Hildenbrand Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20231009075231.150568-1-marcandre.lureau@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- system/memory_mapping.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/system/memory_mapping.c b/system/memory_mapping.c index d7f1d096e0..8ba9968f8c 100644 --- a/system/memory_mapping.c +++ b/system/memory_mapping.c @@ -291,7 +291,7 @@ void guest_phys_blocks_append(GuestPhysBlockList *list) memory_listener_unregister(&g.listener); } -static CPUState *find_paging_enabled_cpu(CPUState *start_cpu) +static CPUState *find_paging_enabled_cpu(void) { CPUState *cpu; @@ -312,7 +312,7 @@ void qemu_get_guest_memory_mapping(MemoryMappingList *list, GuestPhysBlock *block; ram_addr_t offset, length; - first_paging_enabled_cpu = find_paging_enabled_cpu(first_cpu); + first_paging_enabled_cpu = find_paging_enabled_cpu(); if (first_paging_enabled_cpu) { for (cpu = first_paging_enabled_cpu; cpu != NULL; cpu = CPU_NEXT(cpu)) { From patchwork Thu Oct 19 21:17:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735610 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1730807wro; Thu, 19 Oct 2023 14:22:44 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE8wjY3Wu1Cv9iXIaL9AKnR1V3POMV/XG9zU8DLvjAlQCbezIP4cdBMS2CoTNr9tqylvRLj X-Received: by 2002:ad4:5946:0:b0:66d:3165:f978 with SMTP id eo6-20020ad45946000000b0066d3165f978mr105148qvb.6.1697750564069; Thu, 19 Oct 2023 14:22:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750564; cv=none; d=google.com; s=arc-20160816; b=OCnc3Nogv0zZfcyEfkeK+1kZDtOrE/+kQIGr1O+fb3MigLME+KL1PICJUIR0ck0CnD loyP+BrReGAzRZBylQ3eJQt3f97irCYRtoCRmrmfqiOR60V/PaMO2mz4mH2nrnFRJPkH F1wxuSjI1+5QgIhiMt2bo8+Ox/5rSU5kFnxn7cbZUR+w92j/FeoFWg4ta9HETNTsGxKD ecQnxZ3bqdKHDNHN5gAXCOWr9UK6B938PHLcS3GPW/+3X34BxIwUKASaeAVR5FIRCIOG pTnYAifjnhBPd/u5e/9mUMAnXj8Z5R6cN3oyEe2y0ShmZmxJg4xUIw9p0i8i+OyTX5+y gQvA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=fejYroQSsxnLZIKfcKraO7+R46FW2xsffxb069wCoCk=; fh=K4WRy4jG1atjyVM9eQJXeEi/Wd3/UW+ZJqEtboNK/hM=; b=hBV2X3c4rNFWGC2jxG5SPgxGGUCF0+ZLRv2l2QiiQSn+0RHfjc1CDAY6K05KpsIVVz UTE6ZUDrUp8oy7x+pv7nk4gzq24mVU3bSuRrCjs/vNCj2HCReM3WMqhqaemc2BI6QsHy 8XhUpa/mxCjl49m+vbihvGU64ptf+sMpqz0XvqlCNSLWFqdQmm50fHciQKmTGzA3wzCj vQ+fDoapLfMT2fXSUUATv04Pw7E68KbU2LU/xhL3m96udzi2+d8/sP7Z6Ch+DeARRdV7 G0nJ7OroOkh52ABCiwD63oKkskjZ2RsAbE+3SiwZ8/xovVKU5NcQCW+lXwpxsNAfm5/A WPqg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="huNWD51/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id n15-20020adfe78f000000b003197869bcd7sm228642wrm.13.2023.10.19.14.19.15 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:19:16 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , David Hildenbrand , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Paolo Bonzini , Peter Xu Subject: [PULL 09/46] memory: follow Error API guidelines Date: Thu, 19 Oct 2023 23:17:34 +0200 Message-ID: <20231019211814.30576-10-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Marc-André Lureau Return true/false on success/failure. Signed-off-by: Marc-André Lureau Reviewed-by: David Hildenbrand Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20231009075310.153617-1-marcandre.lureau@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 4 +++- include/hw/core/sysemu-cpu-ops.h | 2 +- include/sysemu/memory_mapping.h | 2 +- target/i386/cpu.h | 2 +- hw/core/cpu-sysemu.c | 6 +++--- system/memory_mapping.c | 13 ++++++------- target/i386/arch_memory_mapping.c | 6 ++++-- 7 files changed, 19 insertions(+), 16 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 3968369554..18593db5b2 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -618,8 +618,10 @@ bool cpu_paging_enabled(const CPUState *cpu); * @cpu: The CPU whose memory mappings are to be obtained. * @list: Where to write the memory mappings to. * @errp: Pointer for reporting an #Error. + * + * Returns: %true on success, %false otherwise. */ -void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, +bool cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, Error **errp); #if !defined(CONFIG_USER_ONLY) diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-ops.h index ee169b872c..24d003fe04 100644 --- a/include/hw/core/sysemu-cpu-ops.h +++ b/include/hw/core/sysemu-cpu-ops.h @@ -19,7 +19,7 @@ typedef struct SysemuCPUOps { /** * @get_memory_mapping: Callback for obtaining the memory mappings. */ - void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, + bool (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, Error **errp); /** * @get_paging_enabled: Callback for inquiring whether paging is enabled. diff --git a/include/sysemu/memory_mapping.h b/include/sysemu/memory_mapping.h index 3bbeb1bcb4..021e0a6230 100644 --- a/include/sysemu/memory_mapping.h +++ b/include/sysemu/memory_mapping.h @@ -71,7 +71,7 @@ void guest_phys_blocks_free(GuestPhysBlockList *list); void guest_phys_blocks_init(GuestPhysBlockList *list); void guest_phys_blocks_append(GuestPhysBlockList *list); -void qemu_get_guest_memory_mapping(MemoryMappingList *list, +bool qemu_get_guest_memory_mapping(MemoryMappingList *list, const GuestPhysBlockList *guest_phys_blocks, Error **errp); diff --git a/target/i386/cpu.h b/target/i386/cpu.h index e1875466b9..471e71dbc5 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2055,7 +2055,7 @@ int x86_cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu, int x86_cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu, DumpState *s); -void x86_cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, +bool x86_cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, Error **errp); void x86_cpu_dump_state(CPUState *cs, FILE *f, int flags); diff --git a/hw/core/cpu-sysemu.c b/hw/core/cpu-sysemu.c index 5eaf2e79e6..d0d6a910f9 100644 --- a/hw/core/cpu-sysemu.c +++ b/hw/core/cpu-sysemu.c @@ -34,17 +34,17 @@ bool cpu_paging_enabled(const CPUState *cpu) return false; } -void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, +bool cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, Error **errp) { CPUClass *cc = CPU_GET_CLASS(cpu); if (cc->sysemu_ops->get_memory_mapping) { - cc->sysemu_ops->get_memory_mapping(cpu, list, errp); - return; + return cc->sysemu_ops->get_memory_mapping(cpu, list, errp); } error_setg(errp, "Obtaining memory mappings is unsupported on this CPU."); + return false; } hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, diff --git a/system/memory_mapping.c b/system/memory_mapping.c index 8ba9968f8c..6f884c5b90 100644 --- a/system/memory_mapping.c +++ b/system/memory_mapping.c @@ -304,10 +304,11 @@ static CPUState *find_paging_enabled_cpu(void) return NULL; } -void qemu_get_guest_memory_mapping(MemoryMappingList *list, +bool qemu_get_guest_memory_mapping(MemoryMappingList *list, const GuestPhysBlockList *guest_phys_blocks, Error **errp) { + ERRP_GUARD(); CPUState *cpu, *first_paging_enabled_cpu; GuestPhysBlock *block; ram_addr_t offset, length; @@ -316,14 +317,11 @@ void qemu_get_guest_memory_mapping(MemoryMappingList *list, if (first_paging_enabled_cpu) { for (cpu = first_paging_enabled_cpu; cpu != NULL; cpu = CPU_NEXT(cpu)) { - Error *err = NULL; - cpu_get_memory_mapping(cpu, list, &err); - if (err) { - error_propagate(errp, err); - return; + if (!cpu_get_memory_mapping(cpu, list, errp)) { + return false; } } - return; + return true; } /* @@ -335,6 +333,7 @@ void qemu_get_guest_memory_mapping(MemoryMappingList *list, length = block->target_end - block->target_start; create_new_memory_mapping(list, offset, offset, length); } + return true; } void qemu_get_guest_simple_memory_mapping(MemoryMappingList *list, diff --git a/target/i386/arch_memory_mapping.c b/target/i386/arch_memory_mapping.c index 271cb5e41b..d1ff659128 100644 --- a/target/i386/arch_memory_mapping.c +++ b/target/i386/arch_memory_mapping.c @@ -266,7 +266,7 @@ static void walk_pml5e(MemoryMappingList *list, AddressSpace *as, } #endif -void x86_cpu_get_memory_mapping(CPUState *cs, MemoryMappingList *list, +bool x86_cpu_get_memory_mapping(CPUState *cs, MemoryMappingList *list, Error **errp) { X86CPU *cpu = X86_CPU(cs); @@ -275,7 +275,7 @@ void x86_cpu_get_memory_mapping(CPUState *cs, MemoryMappingList *list, if (!cpu_paging_enabled(cs)) { /* paging is disabled */ - return; + return true; } a20_mask = x86_get_a20_mask(env); @@ -310,5 +310,7 @@ void x86_cpu_get_memory_mapping(CPUState *cs, MemoryMappingList *list, pse = !!(env->cr[4] & CR4_PSE_MASK); walk_pde2(list, cs->as, pde_addr, a20_mask, pse); } + + return true; } From patchwork Thu Oct 19 21:17:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735603 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1730242wro; Thu, 19 Oct 2023 14:21:03 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHzaNp0m/PTWmtjqgvwae7j6+EfcmxJo9bI3N6nRF1CEM7TmHBZaMQYPpoCA63SZTpxyt1C X-Received: by 2002:a05:6830:18ee:b0:6b9:b1b0:fcd1 with SMTP id d14-20020a05683018ee00b006b9b1b0fcd1mr3750145otf.31.1697750463013; Thu, 19 Oct 2023 14:21:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750462; cv=none; d=google.com; s=arc-20160816; b=lmlO787j/njECTVDDI/jcIa3tR+55dBrOpnxyBorbto4A8fs8zmtVxcimA+oMhmUQ4 uxl7f2q94S3KcbzdH5RhSWOz739M7PMP0EgbGzDbn/jpmWs7rmEgttEZ/yR+a3wpQMtM RjMJxBzkBNXquZXoh+9RUzz4C58HoIhprYQnLgF5aMZ+Pk4LcEkpWxLJ9QGnsvRJJYb0 02r3DXuS8uyoxdKNk/vW3oEyDxeOZel64kQ3EIjrAe836L4VQGJxlTgeBZgwQ16p43u4 uztkWkn1FsBXP9ahYh+nGxPf7FDoQ2Ap6F0gaRhHMQ2zOqtjc4E3D8RxaRR8hpafB2HN icEg== ARC-Message-Signature: i=1; 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id p15-20020a05600c1d8f00b00402d34ea099sm5359671wms.29.2023.10.19.14.19.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:19:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, Lu Gao , Jianxian Wen , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Bin Meng Subject: [PULL 10/46] hw/sd/sdhci: Block Size Register bits [14:12] is lost Date: Thu, 19 Oct 2023 23:17:35 +0200 Message-ID: <20231019211814.30576-11-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::134; envelope-from=philmd@linaro.org; helo=mail-lf1-x134.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Lu Gao Block Size Register bits [14:12] is SDMA Buffer Boundary, it is missed in register write, but it is needed in SDMA transfer. e.g. it will be used in sdhci_sdma_transfer_multi_blocks to calculate boundary_ variables. Missing this field will cause wrong operation for different SDMA Buffer Boundary settings. Fixes: d7dfca0807 ("hw/sdhci: introduce standard SD host controller") Fixes: dfba99f17f ("hw/sdhci: Fix DMA Transfer Block Size field") Signed-off-by: Lu Gao Signed-off-by: Jianxian Wen Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20220321055618.4026-1-lu.gao@verisilicon.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/sd/sdhci.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 5564765a9b..40473b0db0 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -321,6 +321,8 @@ static void sdhci_poweron_reset(DeviceState *dev) static void sdhci_data_transfer(void *opaque); +#define BLOCK_SIZE_MASK (4 * KiB - 1) + static void sdhci_send_command(SDHCIState *s) { SDRequest request; @@ -371,7 +373,8 @@ static void sdhci_send_command(SDHCIState *s) sdhci_update_irq(s); - if (!timeout && s->blksize && (s->cmdreg & SDHC_CMD_DATA_PRESENT)) { + if (!timeout && (s->blksize & BLOCK_SIZE_MASK) && + (s->cmdreg & SDHC_CMD_DATA_PRESENT)) { s->data_count = 0; sdhci_data_transfer(s); } @@ -406,7 +409,6 @@ static void sdhci_end_transfer(SDHCIState *s) /* * Programmed i/o data transfer */ -#define BLOCK_SIZE_MASK (4 * KiB - 1) /* Fill host controller's read buffer with BLKSIZE bytes of data from card */ static void sdhci_read_block_from_card(SDHCIState *s) @@ -1154,7 +1156,8 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size) s->sdmasysad = (s->sdmasysad & mask) | value; MASKED_WRITE(s->sdmasysad, mask, value); /* Writing to last byte of sdmasysad might trigger transfer */ - if (!(mask & 0xFF000000) && s->blkcnt && s->blksize && + if (!(mask & 0xFF000000) && s->blkcnt && + (s->blksize & BLOCK_SIZE_MASK) && SDHC_DMA_TYPE(s->hostctl1) == SDHC_CTRL_SDMA) { if (s->trnmod & SDHC_TRNS_MULTI) { sdhci_sdma_transfer_multi_blocks(s); @@ -1168,7 +1171,11 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size) if (!TRANSFERRING_DATA(s->prnsts)) { uint16_t blksize = s->blksize; - MASKED_WRITE(s->blksize, mask, extract32(value, 0, 12)); + /* + * [14:12] SDMA Buffer Boundary + * [11:00] Transfer Block Size + */ + MASKED_WRITE(s->blksize, mask, extract32(value, 0, 15)); MASKED_WRITE(s->blkcnt, mask >> 16, value >> 16); /* Limit block size to the maximum buffer size */ From patchwork Thu Oct 19 21:17:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735607 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1730597wro; Thu, 19 Oct 2023 14:21:58 -0700 (PDT) X-Google-Smtp-Source: AGHT+IETU1cdYUuyG7iOqMG7zJ6XhAbyYDxLtDOK71l8R3LJYTk7kqjSY9kIHznRtxPuIfgPNgyK X-Received: by 2002:a05:6870:2c92:b0:1ea:809c:3eb with SMTP id oh18-20020a0568702c9200b001ea809c03ebmr91495oab.44.1697750518073; Thu, 19 Oct 2023 14:21:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750518; cv=none; d=google.com; s=arc-20160816; b=NfKyral0NU+CDlf4K+ByrLIGjn5CjNcDW3r/CyFK8KXYrOpkVUxKqy4XO+DRSma17i Yy9+gPiMctoCxeuRzqe4dDS5jUbRHSRI3GXM5uv282LpXfZIy7l4szonDEaIwn0UDztV JyZ4ASF34SYq4L4GgQTktbq8PBLOCfS7Q2oOdgu2xnA+xiqu9p3VYnFNZo9MqrgzqmD9 PhJ5kueGC/S1Q58qrO0+BFA8Ha4VtkD/2NkVanL/kbUPNsj5KHRxlZEyutS4h1kttP3O ThJu6TZUmHwdFH3VrhHM4war0vG2Vpl/6oydpRiIcMykius7zdUq1ycWd9vU5pL9QWd8 nADQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=7OwRTezp0vv6wqt1NgDnQGraNHaa8cKXk4aoany7tps=; fh=hp1KOKN2uBs/6/dJD+zRXT+HRLjOX+0sB5Ut8st0n/M=; b=mMTCDhh7lRhz4QKnWuHLFDeF+kkpxZ49Zsvce3tS/3Q9bMmyM0Ny6sQDj11HpvO+CS OVrNCk2N+xTi7KvWsa5oh3hk8GOOpVs6Gku2OFAfQ6plOnmuj0cVRdY4P0s2/VCwsmtX O6wlZUQfvn5b9DEyShVlP6dLDwhDb3ciYILroIyTHWriP7yjdm0adoPAk9FmZh3o9uKO mTE3YJja5fmjIJIlHVHAqZpKUo7xmZQBJ9XwnyqtPg5nOTtyotf/TkMNI2rH7UGrvnTJ vyW/hvj9vQj1hKBacEZQPqGhjzKlcHIAcKSjHaMmRcPUOVh7o8gJhXV2n5SKJfz/UIQG QzDA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TJ3LLJro; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id c8-20020a05600c0a4800b0040775fd5bf9sm564120wmq.0.2023.10.19.14.19.28 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:19:30 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , BALATON Zoltan , Richard Henderson , Aurelien Jarno , Jiaxun Yang Subject: [PULL 11/46] hw/mips/malta: Use sdram_type enum from 'hw/i2c/smbus_eeprom.h' Date: Thu, 19 Oct 2023 23:17:36 +0200 Message-ID: <20231019211814.30576-12-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since commit 93198b6cad ("i2c: Split smbus into parts") the SDRAM types are enumerated as sdram_type in "hw/i2c/smbus_eeprom.h". Using the enum removes this global shadow warning: hw/mips/malta.c:209:12: error: declaration shadows a variable in the global scope [-Werror,-Wshadow] enum { SDR = 0x4, DDR2 = 0x8 } type; ^ include/hw/i2c/smbus_eeprom.h:33:19: note: previous declaration is here enum sdram_type { SDR = 0x4, DDR = 0x7, DDR2 = 0x8 }; ^ Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: BALATON Zoltan Reviewed-by: Richard Henderson Message-Id: <20231009092127.49778-1-philmd@linaro.org> --- hw/mips/malta.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index dac27fad9d..62d04ed113 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -206,7 +206,7 @@ static eeprom24c0x_t spd_eeprom = { static void generate_eeprom_spd(uint8_t *eeprom, ram_addr_t ram_size) { - enum { SDR = 0x4, DDR2 = 0x8 } type; + enum sdram_type type; uint8_t *spd = spd_eeprom.contents; uint8_t nbanks = 0; uint16_t density = 0; From patchwork Thu Oct 19 21:17:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735617 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1731192wro; Thu, 19 Oct 2023 14:23:53 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHF8FpQMhNdcl+aGN5CNU3TFAJ90r99dpo0EdVlO0+XtQQ4p1ZNZMH+yoef0HioxM1ErvMJ X-Received: by 2002:a05:622a:647:b0:418:225d:e9d2 with SMTP id a7-20020a05622a064700b00418225de9d2mr3889105qtb.52.1697750633525; Thu, 19 Oct 2023 14:23:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750633; cv=none; d=google.com; s=arc-20160816; b=e/CvExhkdLni9uJ1k7PPzENG7ffENLon/wPkvwsBscQtqAjx6g+mN2OMaZzgkBweP0 OnEBnCaq9JsXdAo8zPDQooib0Y1EP3a09U6xvngOKHt14SbaCPlcW+A6rX/Dlpu/y+OY 3Brsp//21jlmPeq400t7y/nAHJDv4k2DH01sNuCR+d1fLeaghwck0g5rPDz/96bXHT3Q xaVCSbsmXLHeTcAvoJatLpYOcaVD175zG1yyg90ynDY8MkUrRyvLQ4Lj7nI6/YbGjVDE xBTaLZKooDAHpslBHSZmfRMOIe6MCjsiGBzn+srRw24KnZuvdkn8KrhHuFZpigDQq7n+ 7gfw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=hZIQ+KgH54UQHRZkZfXDQzeJv7i8hhcdzA1tyvUGSNc=; fh=7CaI8gdpGo7H9DlIj2s0fcRA9RJIC4t0uLXTrrIGJ3o=; b=hjDx+Dq8s6DDFeUX3gdhVAl8mE599+OK23C5Fd2PIobunOjciw1UNSJG5uOxt1JGAy ul9oE6ZT/W2fUQPSJ+Wx48aT/Ap6HWPiZLybQxg3Tk6L26/+QgLbqevBSc5Jl9ui2OVB jIN2jtI9YDPXN0Q084MKccpfVYx28WHoYBO1S8PhVKhlzbBYliyOQYIcqAkeOk8P6WeB 7npAxgGAwgRNv2k50HRL4QeBGEO+bXJmag0wrlbm2rNVQieioq5rNoLhRrVDHqUEk5/L MW/i5gd6UZYbSrjgkmn/OX2nsyoqmFXQbcsGuKkwEONN4MLYLTHZ3uVr1tH051dPr/om IHEg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rXsaNyQl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id r9-20020a05600c158900b0040776008abdsm503991wmf.40.2023.10.19.14.19.35 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:19:36 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Huacai Chen , Jiaxun Yang , =?utf-8?q?Herv=C3=A9_Poussineau?= , Aleksandar Rikalo , Aurelien Jarno Subject: [PULL 12/46] hw/mips: Merge 'hw/mips/cpudevs.h' with 'target/mips/cpu.h' Date: Thu, 19 Oct 2023 23:17:37 +0200 Message-ID: <20231019211814.30576-13-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22f; envelope-from=philmd@linaro.org; helo=mail-lj1-x22f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org "hw/mips/cpudevs.h" contains declarations which are specific to the MIPS architecture; it doesn't make sense for these to be called from a non-MIPS architecture. Move the declarations to "target/mips/cpu.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231009171443.12145-2-philmd@linaro.org> --- include/hw/mips/cpudevs.h | 14 -------------- target/mips/cpu.h | 4 +++- hw/mips/cps.c | 1 - hw/mips/fuloong2e.c | 1 - hw/mips/jazz.c | 1 - hw/mips/loongson3_virt.c | 1 - hw/mips/malta.c | 1 - hw/mips/mips_int.c | 1 - hw/mips/mipssim.c | 1 - target/mips/sysemu/cp0_timer.c | 1 - target/mips/tcg/sysemu/tlb_helper.c | 1 - 11 files changed, 3 insertions(+), 24 deletions(-) delete mode 100644 include/hw/mips/cpudevs.h diff --git a/include/hw/mips/cpudevs.h b/include/hw/mips/cpudevs.h deleted file mode 100644 index f7c9728fa9..0000000000 --- a/include/hw/mips/cpudevs.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef HW_MIPS_CPUDEVS_H -#define HW_MIPS_CPUDEVS_H - -#include "target/mips/cpu-qom.h" - -/* Definitions for MIPS CPU internal devices. */ - -/* mips_int.c */ -void cpu_mips_irq_init_cpu(MIPSCPU *cpu); - -/* mips_timer.c */ -void cpu_mips_clock_init(MIPSCPU *cpu); - -#endif diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 67f8e8b988..fb44defc93 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1345,8 +1345,10 @@ uint64_t cpu_mips_phys_to_kseg1(void *opaque, uint64_t addr); #if !defined(CONFIG_USER_ONLY) -/* mips_int.c */ +/* HW declaration specific to the MIPS target */ void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level); +void cpu_mips_irq_init_cpu(MIPSCPU *cpu); +void cpu_mips_clock_init(MIPSCPU *cpu); /* mips_itu.c */ void itc_reconfigure(struct MIPSITUState *tag); diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 2b5269ebf1..b6612c1762 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -24,7 +24,6 @@ #include "hw/mips/mips.h" #include "hw/qdev-clock.h" #include "hw/qdev-properties.h" -#include "hw/mips/cpudevs.h" #include "sysemu/kvm.h" #include "sysemu/reset.h" diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c index c6109633fe..97b2c8ed8e 100644 --- a/hw/mips/fuloong2e.c +++ b/hw/mips/fuloong2e.c @@ -30,7 +30,6 @@ #include "hw/block/flash.h" #include "hw/mips/mips.h" #include "hw/mips/bootloader.h" -#include "hw/mips/cpudevs.h" #include "hw/pci/pci.h" #include "hw/loader.h" #include "hw/ide/pci.h" diff --git a/hw/mips/jazz.c b/hw/mips/jazz.c index c32d2b0b0a..86dfe05ea8 100644 --- a/hw/mips/jazz.c +++ b/hw/mips/jazz.c @@ -26,7 +26,6 @@ #include "qemu/datadir.h" #include "hw/clock.h" #include "hw/mips/mips.h" -#include "hw/mips/cpudevs.h" #include "hw/intc/i8259.h" #include "hw/dma/i8257.h" #include "hw/char/serial.h" diff --git a/hw/mips/loongson3_virt.c b/hw/mips/loongson3_virt.c index b74b358874..33eae01eca 100644 --- a/hw/mips/loongson3_virt.c +++ b/hw/mips/loongson3_virt.c @@ -32,7 +32,6 @@ #include "hw/char/serial.h" #include "hw/intc/loongson_liointc.h" #include "hw/mips/mips.h" -#include "hw/mips/cpudevs.h" #include "hw/mips/fw_cfg.h" #include "hw/mips/loongson3_bootp.h" #include "hw/misc/unimp.h" diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 62d04ed113..4fa5b33fd9 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -37,7 +37,6 @@ #include "hw/block/flash.h" #include "hw/mips/mips.h" #include "hw/mips/bootloader.h" -#include "hw/mips/cpudevs.h" #include "hw/pci/pci.h" #include "hw/pci/pci_bus.h" #include "qemu/log.h" diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c index 73437cd90f..6c32e466a3 100644 --- a/hw/mips/mips_int.c +++ b/hw/mips/mips_int.c @@ -23,7 +23,6 @@ #include "qemu/osdep.h" #include "qemu/main-loop.h" #include "hw/irq.h" -#include "hw/mips/cpudevs.h" #include "sysemu/kvm.h" #include "kvm_mips.h" diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c index 2f951f7fc6..4f743f37eb 100644 --- a/hw/mips/mipssim.c +++ b/hw/mips/mipssim.c @@ -30,7 +30,6 @@ #include "qemu/datadir.h" #include "hw/clock.h" #include "hw/mips/mips.h" -#include "hw/mips/cpudevs.h" #include "hw/char/serial.h" #include "hw/isa/isa.h" #include "net/net.h" diff --git a/target/mips/sysemu/cp0_timer.c b/target/mips/sysemu/cp0_timer.c index 9d2bcb0dea..62de502caa 100644 --- a/target/mips/sysemu/cp0_timer.c +++ b/target/mips/sysemu/cp0_timer.c @@ -22,7 +22,6 @@ #include "qemu/osdep.h" #include "hw/irq.h" -#include "hw/mips/cpudevs.h" #include "qemu/timer.h" #include "sysemu/kvm.h" #include "internal.h" diff --git a/target/mips/tcg/sysemu/tlb_helper.c b/target/mips/tcg/sysemu/tlb_helper.c index 7dbc2e24c4..4ede904800 100644 --- a/target/mips/tcg/sysemu/tlb_helper.c +++ b/target/mips/tcg/sysemu/tlb_helper.c @@ -24,7 +24,6 @@ #include "exec/exec-all.h" #include "exec/cpu_ldst.h" #include "exec/log.h" -#include "hw/mips/cpudevs.h" #include "exec/helper-proto.h" /* TLB management */ From patchwork Thu Oct 19 21:17:38 2023 Content-Type: text/plain; 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id e16-20020adfe390000000b0032dab20e773sm214722wrm.69.2023.10.19.14.19.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:19:43 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo Subject: [PULL 13/46] hw/misc/mips_itu: Declare itc_reconfigure() in 'hw/misc/mips_itu.h' Date: Thu, 19 Oct 2023 23:17:38 +0200 Message-ID: <20231019211814.30576-14-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We already provide "hw/misc/mips_itu.h" to declare prototype related to MIPSITUState. Move itc_reconfigure() declaration there. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231009171443.12145-3-philmd@linaro.org> --- include/hw/misc/mips_itu.h | 2 ++ target/mips/cpu.h | 3 --- target/mips/tcg/sysemu/cp0_helper.c | 1 + 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/hw/misc/mips_itu.h b/include/hw/misc/mips_itu.h index 35218b2d14..a413789151 100644 --- a/include/hw/misc/mips_itu.h +++ b/include/hw/misc/mips_itu.h @@ -79,4 +79,6 @@ struct MIPSITUState { /* Get ITC Configuration Tag memory region. */ MemoryRegion *mips_itu_get_tag_region(MIPSITUState *itu); +void itc_reconfigure(struct MIPSITUState *tag); + #endif /* MIPS_ITU_H */ diff --git a/target/mips/cpu.h b/target/mips/cpu.h index fb44defc93..5fddceff3a 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1350,9 +1350,6 @@ void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level); void cpu_mips_irq_init_cpu(MIPSCPU *cpu); void cpu_mips_clock_init(MIPSCPU *cpu); -/* mips_itu.c */ -void itc_reconfigure(struct MIPSITUState *tag); - #endif /* !CONFIG_USER_ONLY */ /* helper.c */ diff --git a/target/mips/tcg/sysemu/cp0_helper.c b/target/mips/tcg/sysemu/cp0_helper.c index 5da1124589..d349548743 100644 --- a/target/mips/tcg/sysemu/cp0_helper.c +++ b/target/mips/tcg/sysemu/cp0_helper.c @@ -28,6 +28,7 @@ #include "qemu/host-utils.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" +#include "hw/misc/mips_itu.h" /* SMP helpers. */ From patchwork Thu Oct 19 21:17:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735644 Delivered-To: patch@linaro.org Received: by 2002:adf:cf01:0:b0:32c:eacc:7fa with SMTP id o1csp1751028wrj; Thu, 19 Oct 2023 14:29:11 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFHRR29GyyguAdb3Qi90mkYQEbwIW2O4anEHe5ukGvLU14yDnszoe0nFvvUP1Bm0pAZBe09 X-Received: by 2002:a05:6808:9bc:b0:3a9:e8e2:5799 with SMTP id e28-20020a05680809bc00b003a9e8e25799mr40964oig.14.1697750950984; Thu, 19 Oct 2023 14:29:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750950; cv=none; d=google.com; s=arc-20160816; b=bIFkRgati2bMGDWVTAh20M/tW8aMJ+FS60B6OLZRnIekYEAVlZ6+2e4dlv3CB6bA7K YfADuC/WVAi9/T0kgYszNAGyGnfz0ctTRiNOxr6o714e1a5kxbX0TwAQRzHfPNxYN0AE 89Hf3dTvkYiWLXgDpqRp9plALFQQ4fAGdDemWyDnjztsp46VXyD2P3nlyExMKuvswIhX jyObjjrtnP3dL9px2sg33LdR3i1HXX6EgeS+hJmrPReJtzCvZoIt91hlV1QFfM5IlqZG Vh+hTt8ZJo1JBfEFQI3b2tGDy4JjngRw4ok6N1ae1R+BEd7gqw7GnkNgPDw3gzBVWv2U LI8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=8cFSDOivNgHcSX8AYNeAVwR9ly4r/Wc+Ax9HhfRkEQg=; fh=k5vQ+Ru7LaRGF7GeKQYjxHbbgs3KVlEQtiDNyBPIQcA=; b=DK/v41+fY0DDtzgP4yQ7IB0OiwAUBuSaok68vkq/2N2/B0Vswvg0vRWrV1+58y+ajF 3gyq2F3SAxi2iGgHKh3m+PEaN9PazEPmirqP8IUjD/ZDZXFxF9EV8Om48YGIsroiOs3v DbLCxGJL0DoFnItMRqurb3PbZHlM7ihMSRv06Vh9EFvCaxG4TOebU3hcgD+5GTi+QAk7 aD/x1t1ilPz8dj68XyrHf4jxHdVJcLRmgmYwewudJxEHU8hkrzeQzCbVWzA4s2uPCuja N6S3ZqCpUFUP9scdhkrOnBWBnzXfJIiTIIeYhWyMXdEuMZ3QKU1a74xehXsFeg0Z8h60 6+eg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XcKljRmt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id n16-20020a05600c3b9000b003fee6e170f9sm496411wms.45.2023.10.19.14.19.48 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:19:49 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Jiaxun Yang Subject: [PULL 14/46] hw/misc/mips_itu: Make MIPSITUState target agnostic Date: Thu, 19 Oct 2023 23:17:39 +0200 Message-ID: <20231019211814.30576-15-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When prototyping a heterogenous machine including the ITU, we get: include/hw/misc/mips_itu.h:76:5: error: unknown type name 'MIPSCPU' MIPSCPU *cpu0; ^ MIPSCPU is declared in the target specific "cpu.h" header, but we don't want to include it, because "cpu.h" is target specific and its inclusion taints all files including "mips_itu.h", which become target specific too. We can however use the 'ArchCPU *' type in the public header. By keeping the TYPE_MIPS_CPU QOM type check in the link property declaration, QOM core code will still check the property is a correct MIPS CPU. TYPE_MIPS_ITU is still built per-(MIPS)target, but its header can now be included by other targets. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231009171443.12145-4-philmd@linaro.org> --- include/hw/misc/mips_itu.h | 2 +- hw/misc/mips_itu.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/hw/misc/mips_itu.h b/include/hw/misc/mips_itu.h index a413789151..5caed6cc36 100644 --- a/include/hw/misc/mips_itu.h +++ b/include/hw/misc/mips_itu.h @@ -73,7 +73,7 @@ struct MIPSITUState { /* SAAR */ uint64_t *saar; - MIPSCPU *cpu0; + ArchCPU *cpu0; }; /* Get ITC Configuration Tag memory region. */ diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c index 0eda302db4..5a83ccc4e8 100644 --- a/hw/misc/mips_itu.c +++ b/hw/misc/mips_itu.c @@ -532,7 +532,7 @@ static void mips_itu_realize(DeviceState *dev, Error **errp) return; } - env = &s->cpu0->env; + env = &MIPS_CPU(s->cpu0)->env; if (env->saarp) { s->saar = env->CP0_SAAR; } @@ -563,7 +563,7 @@ static Property mips_itu_properties[] = { ITC_FIFO_NUM_MAX), DEFINE_PROP_UINT32("num-semaphores", MIPSITUState, num_semaphores, ITC_SEMAPH_NUM_MAX), - DEFINE_PROP_LINK("cpu[0]", MIPSITUState, cpu0, TYPE_MIPS_CPU, MIPSCPU *), + DEFINE_PROP_LINK("cpu[0]", MIPSITUState, cpu0, TYPE_MIPS_CPU, ArchCPU *), DEFINE_PROP_END_OF_LIST(), }; From patchwork Thu Oct 19 21:17:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735619 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1731314wro; Thu, 19 Oct 2023 14:24:11 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFZRFpEgV8I2z9hfJwfI9eexGThQtInfJ+1wXuzPgcfT0Wn2ot+4DqTtt8sytCYum08vq7w X-Received: by 2002:a25:404d:0:b0:d9a:3bee:2eeb with SMTP id n74-20020a25404d000000b00d9a3bee2eebmr3754555yba.60.1697750651000; Thu, 19 Oct 2023 14:24:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750650; cv=none; d=google.com; s=arc-20160816; b=k7gDO+uYwr1auEgzgdd9i9EPQdlb+PxMC/mQXSpf+ff92anzJEt91aUbEY6CPkpwD1 bopMfrlpGMCOXtPP+U0pWxGEjnJ7+s9ACWjLQ5Lux/9TTpvYzcog5VQzl2Rm+iBOEscS FoKdLqJ6Z1uk8aScLt/1RudT71o053WNiRHZEdV82mbWEz0g8C/lHF04jjcdEHWYLwWU n6yvOB8Hs7CDw0I1fGG7Rq2UxwLSsfLy8WGdGJ4fsYPZJe2ihEUmA7mtqOWJujIGdPcI fQziuvQ5kK2AZfLXPJ+hGi6bNCWQrDFrD/h6JtiOkyAQYBOto/xiCtQjA4zSJTRWettO K1Fw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=5L3KhgnR+wD3KYNvWp6CWYVG73hhXTbT/VSAj1bhVwM=; fh=JJVrIxA960fi2M8f1oD8ZiXLObaAuT+S4YeQ3hi6v/I=; b=reMWJQCNzOxmuiSxVLIPixUEN9yosaA1VSPheidOFWZU5jb/3sGDivf3qaOHbEAvAI f5RWwo2yCikUnkD82xSWcNV7TUpEfn5SLGOlaDKYcoBM9q/RSLHjw6T+3/pTjod4X9gw 9QNIKB7jT8j1FeE47JS6WdBcAwjzMx2gDhNevOjyFzn7Rz9zfYQlbaEmSaHfmLYJZhe0 6KOWGe3D2pF0ztCgHh5BhPSYsmjcxqHkxRvX/RJeclZsRju05hxgYrUAxQIjnEpvr8Ig U3AzBFvtzfrpxqvlcQ1YQJWfWgHygfRTM61Kd3ZfUC2ledc2tExJjKImwTZrBljXka7X 62BQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=N5WPcaSW; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id h2-20020a5d5042000000b0032d886039easm233498wrt.14.2023.10.19.14.19.54 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:19:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Yoshinori Sato , Magnus Damm Subject: [PULL 15/46] hw/pci-host/sh_pcic: Declare CPU QOM types using DEFINE_TYPES() macro Date: Thu, 19 Oct 2023 23:17:40 +0200 Message-ID: <20231019211814.30576-16-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When multiple QOM types are registered in the same file, it is simpler to use the the DEFINE_TYPES() macro. In particular because type array declared with such macro are easier to review. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Yoshinori Sato Message-Id: <20231012041237.22281-2-philmd@linaro.org> --- hw/pci-host/sh_pci.c | 40 +++++++++++++++++----------------------- 1 file changed, 17 insertions(+), 23 deletions(-) diff --git a/hw/pci-host/sh_pci.c b/hw/pci-host/sh_pci.c index 77e7bbc65f..41aed48c85 100644 --- a/hw/pci-host/sh_pci.c +++ b/hw/pci-host/sh_pci.c @@ -167,17 +167,6 @@ static void sh_pci_host_class_init(ObjectClass *klass, void *data) dc->user_creatable = false; } -static const TypeInfo sh_pci_host_info = { - .name = "sh_pci_host", - .parent = TYPE_PCI_DEVICE, - .instance_size = sizeof(PCIDevice), - .class_init = sh_pci_host_class_init, - .interfaces = (InterfaceInfo[]) { - { INTERFACE_CONVENTIONAL_PCI_DEVICE }, - { }, - }, -}; - static void sh_pci_device_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -185,17 +174,22 @@ static void sh_pci_device_class_init(ObjectClass *klass, void *data) dc->realize = sh_pci_device_realize; } -static const TypeInfo sh_pci_device_info = { - .name = TYPE_SH_PCI_HOST_BRIDGE, - .parent = TYPE_PCI_HOST_BRIDGE, - .instance_size = sizeof(SHPCIState), - .class_init = sh_pci_device_class_init, +static const TypeInfo sh_pcic_types[] = { + { + .name = TYPE_SH_PCI_HOST_BRIDGE, + .parent = TYPE_PCI_HOST_BRIDGE, + .instance_size = sizeof(SHPCIState), + .class_init = sh_pci_device_class_init, + }, { + .name = "sh_pci_host", + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(PCIDevice), + .class_init = sh_pci_host_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, + }, }; -static void sh_pci_register_types(void) -{ - type_register_static(&sh_pci_device_info); - type_register_static(&sh_pci_host_info); -} - -type_init(sh_pci_register_types) +DEFINE_TYPES(sh_pcic_types) From patchwork Thu Oct 19 21:17:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735605 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1730354wro; Thu, 19 Oct 2023 14:21:19 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGUoypIVmmwcONK0EmrBwwN0I8okqVUXM+UiPmnFOuaAMyojrWQyY3+7ru8twpElXoWhGXZ X-Received: by 2002:a05:6214:29cc:b0:66d:8196:c122 with SMTP id gh12-20020a05621429cc00b0066d8196c122mr4722928qvb.3.1697750479368; Thu, 19 Oct 2023 14:21:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750479; cv=none; d=google.com; s=arc-20160816; b=dDmlgr+kDESApsOdDJ8UQETwi0igfqhOAj6Gora1bnjQfNN6yN2ygQSBv15hlfR8Bx MLJB2glsGSvLC2ETGz3SOtnx4BjPxuVoNNekMKd6xKRnN+D2Bvw3dXN18E4gnauZLM04 B8ySkNFZN5+NS3L5W+MutwhaJxYEVwcqaIV2ftOK2GIyB6YDpnx5soKbM09KW64zzaVP RLKQh8n4IQ6ZsWBFj1YXeVXyPHjqpt8Jf2ZniBLQe4/1BrcNDuRNRbWWZ9Z6gS5LqxDd nMH5SHkAyMCdrB+Kws1rXPTq4Wz0229akjsEocSdoiePDr05zWj3hhEnbTwU5xhnq0ou qYcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=yVnP+tB8rBOXz7uiUDsk16xVhO8z/h4DQiumFB9H0lA=; fh=JJVrIxA960fi2M8f1oD8ZiXLObaAuT+S4YeQ3hi6v/I=; b=tNb/ysgIXd7NeuJhHGuJnJzs9K1mIuxzDnZTWUPw8M8nNucMjRj3WMSk6uD0fWgJwx Bapro7D4zCyyzHG+s1G3t9cxPEKo1Nrdw9xl0YNL5Oe/Z0t5yt3Uxy6I+kiw+jecuStS +UYGJkepyFVaqZ7xzYDS1oa7UwoqWEOCH385gzD2MF3cFEjQ05hDdI5Hx3mY1puv7mLS /PVVARaanv3KpfLbObC1dZM1MiUA1uYBHxe9UaGGJn7oI9LA2EytW/QH2WFdbUH2Skkh EzjJ4LACt1By1HEVgi2r/y0EQ/nQO/xr0jEQ9zmM5iUtRsJwpyiY1h4Igl//0wmj4ARD kmnw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mgqcPmN0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id l9-20020a5d5609000000b0032da7454ebesm210465wrv.79.2023.10.19.14.20.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:20:02 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Yoshinori Sato , Magnus Damm Subject: [PULL 16/46] hw/pci-host/sh_pcic: Correct PCI host / devfn#0 function names Date: Thu, 19 Oct 2023 23:17:41 +0200 Message-ID: <20231019211814.30576-17-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Host bridge device and PCI function #0 are inverted. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Yoshinori Sato Message-Id: <20231012041237.22281-3-philmd@linaro.org> --- hw/pci-host/sh_pci.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/pci-host/sh_pci.c b/hw/pci-host/sh_pci.c index 41aed48c85..580e273d96 100644 --- a/hw/pci-host/sh_pci.c +++ b/hw/pci-host/sh_pci.c @@ -116,7 +116,7 @@ static void sh_pci_set_irq(void *opaque, int irq_num, int level) qemu_set_irq(pic[irq_num], level); } -static void sh_pci_device_realize(DeviceState *dev, Error **errp) +static void sh_pcic_host_realize(DeviceState *dev, Error **errp) { SysBusDevice *sbd = SYS_BUS_DEVICE(dev); SHPCIState *s = SH_PCI_HOST_BRIDGE(dev); @@ -145,19 +145,19 @@ static void sh_pci_device_realize(DeviceState *dev, Error **errp) s->dev = pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "sh_pci_host"); } -static void sh_pci_host_realize(PCIDevice *d, Error **errp) +static void sh_pcic_pci_realize(PCIDevice *d, Error **errp) { pci_set_word(d->config + PCI_COMMAND, PCI_COMMAND_WAIT); pci_set_word(d->config + PCI_STATUS, PCI_STATUS_CAP_LIST | PCI_STATUS_FAST_BACK | PCI_STATUS_DEVSEL_MEDIUM); } -static void sh_pci_host_class_init(ObjectClass *klass, void *data) +static void sh_pcic_pci_class_init(ObjectClass *klass, void *data) { PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - k->realize = sh_pci_host_realize; + k->realize = sh_pcic_pci_realize; k->vendor_id = PCI_VENDOR_ID_HITACHI; k->device_id = PCI_DEVICE_ID_HITACHI_SH7751R; /* @@ -167,11 +167,11 @@ static void sh_pci_host_class_init(ObjectClass *klass, void *data) dc->user_creatable = false; } -static void sh_pci_device_class_init(ObjectClass *klass, void *data) +static void sh_pcic_host_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - dc->realize = sh_pci_device_realize; + dc->realize = sh_pcic_host_realize; } static const TypeInfo sh_pcic_types[] = { @@ -179,12 +179,12 @@ static const TypeInfo sh_pcic_types[] = { .name = TYPE_SH_PCI_HOST_BRIDGE, .parent = TYPE_PCI_HOST_BRIDGE, .instance_size = sizeof(SHPCIState), - .class_init = sh_pci_device_class_init, + .class_init = sh_pcic_host_class_init, }, { .name = "sh_pci_host", .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), - .class_init = sh_pci_host_class_init, + .class_init = sh_pcic_pci_class_init, .interfaces = (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, { }, From patchwork Thu Oct 19 21:17:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735618 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1731293wro; Thu, 19 Oct 2023 14:24:09 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFpK9lQd/Lu+nVEPyVe8Y4hNh63L/O8B2zxDIDCnwbnlvWLZ+mZYMSiti+BiCD9K4OfWArw X-Received: by 2002:ac8:4e53:0:b0:41c:cad6:7c4a with SMTP id e19-20020ac84e53000000b0041ccad67c4amr3163747qtw.55.1697750648893; Thu, 19 Oct 2023 14:24:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750648; cv=none; d=google.com; s=arc-20160816; b=gqXqdjf9bHcx2Uer508dw023+fYyV3VqkT9rGdNJiFWHWxbc3zIS94RNGSnJtDmRsf B/PaQsY9VCEPslZP6wqD3ZU5UzDyjnUwz7iIYZAw/n0eZwb0gGQc3/GI5OoWiShkFJ09 9oGKxH/GQHOHoHz9YNAQlMgts6RDo0n4SyxyvRC84f9hpK3SiYw9Js54hWirHr14vjho o5G8t/t5YJP3AnaldoD3xo/wHFx8z2oNwiEBhPEKltD7CusY6dRvBv5ozSNMpgcb5gCs MNIy1ndY5BTNWNREebBs+nsT0tk2zANGM1ozA9hRKFM52bEQ3Hjd0HwDfmgTKiTuATzp hjJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=LI6P3mAOEt0J+sULk7AcXOottYXxMcEMeJJN40YsQ7M=; fh=JJVrIxA960fi2M8f1oD8ZiXLObaAuT+S4YeQ3hi6v/I=; b=xhVZPDQohvGxUNqaxiZUfni9LpJn0pwmowAkMCkmDp3BnXfDC1G+xmDET9XpPRXojp hC4cl8NTXPz1i4QkxwREPj97QP3QCWuszYN84xG/Ko+VvROXNfqyJulJqc6cFpZyk0ID T/mKJH41CYPqgdQ7XdPNAcLMReA9wWxdBE6enny6d79VgjegMqV+AeMUlOdcKMVRvDnt RLWKaRSN/H2+/vl+pVURcS9TsguFehkiAH5U8op1TPqCg5CXHR4Twy3SQfINXR8JmDTh DBT1DMpKtUKSLVN9bApQkNNET1sC7Hp8MAsA/lA+eacz/pZBIAJay0V+5OwPm4J48qti d8yQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kQqYdsN1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id p6-20020a5d6386000000b00327b5ca093dsm208164wru.117.2023.10.19.14.20.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:20:08 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Yoshinori Sato , Magnus Damm Subject: [PULL 17/46] hw/pci-host/sh_pcic: Replace magic value by proper definition Date: Thu, 19 Oct 2023 23:17:42 +0200 Message-ID: <20231019211814.30576-18-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Yoshinori Sato Message-Id: <20231012041237.22281-4-philmd@linaro.org> --- hw/pci-host/sh_pci.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/pci-host/sh_pci.c b/hw/pci-host/sh_pci.c index 580e273d96..4edebced5e 100644 --- a/hw/pci-host/sh_pci.c +++ b/hw/pci-host/sh_pci.c @@ -40,7 +40,7 @@ struct SHPCIState { PCIHostState parent_obj; PCIDevice *dev; - qemu_irq irq[4]; + qemu_irq irq[PCI_NUM_PINS]; MemoryRegion memconfig_p4; MemoryRegion memconfig_a7; MemoryRegion isa; @@ -131,7 +131,8 @@ static void sh_pcic_host_realize(DeviceState *dev, Error **errp) s->irq, get_system_memory(), get_system_io(), - PCI_DEVFN(0, 0), 4, TYPE_PCI_BUS); + PCI_DEVFN(0, 0), PCI_NUM_PINS, + TYPE_PCI_BUS); memory_region_init_io(&s->memconfig_p4, OBJECT(s), &sh_pci_reg_ops, s, "sh_pci", 0x224); memory_region_init_alias(&s->memconfig_a7, OBJECT(s), "sh_pci.2", From patchwork Thu Oct 19 21:17:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735625 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1731544wro; Thu, 19 Oct 2023 14:24:52 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFaHyVcZ5N027mvBtAzm17KzgVXALXXSrGhGnz4oxjY77OOuUBFANeyab+lC0bB6bVJCR4S X-Received: by 2002:a05:620a:4155:b0:777:1e9:f71c with SMTP id k21-20020a05620a415500b0077701e9f71cmr4020742qko.56.1697750692386; Thu, 19 Oct 2023 14:24:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750692; cv=none; d=google.com; s=arc-20160816; b=xmbE4KqpG7Fs6zTl7rrQnMfiz/pLesg8F0b3wgy8Av0ima8V6/5Cwig6kYGhQmGzJ9 wn8y1F12xXlO5ylVfk6n5fi+srKsNzN6IixqmH+8aRRlvzU3hjKYh3dCLP6KzqL7ycEO Jjzftls2Wdbsl7xxqiP9zL0SE0amKINkorb4TdZt5VUPPtU+O0ue1uKDVPotQAWhxFKQ nA04nxrsyNYXfJm28Hc4Ocj4ruunZsI0LSKECCWqtZdBrAjWBLTEZ109GjlvCntC6h/g KyhEF68oZzIiqCSdYA/SGcsWTwNiaRvub/h6JAjzymMYbfQYSMkJ0apVgaCZeJL/aGYw In+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=K26pjgbN/XJgbsjyyabQMj6h89ERK847wNhqfJ3+FrQ=; fh=f7ueWo+GmWg5zwyxkxVOOSat0XAOcP5QFNmKvBmMoZg=; b=JWXV1RDsiJL28d+8KpHZZoQysDZk0A1HR01bHme0IMMgrymabA+YNnRJKUN8vydHmr I4x7LWdJljznLgSRkTq/evwy0+z/TIR6wWe/w1S3Drxoxxd8xGglFrmIc++RXmDsolFx TvARsEqEFKA3smFXttEHpHg/eFFXZ5iD3stjUjz/dMt9azs0yN78hZO5kaz+hBsJ8c2e QZvBELANgGHT5J6P6dCwVZnKAed2DieahANak2mlaiKh1SGA6gYTwZgi+jcOtZV9Rhr9 R0tN3IYKTwwY/8mFGRGAT/a7kuOFJ3j31oRcGbhx/xyKof6wL+doqkYpxMkXsdomYWjA 06eQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tgIbW72g; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id o12-20020a05600c4fcc00b0040775501256sm525525wmq.16.2023.10.19.14.20.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:20:15 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , Artyom Tarasenko Subject: [PULL 18/46] hw/sparc64/ebus: Access memory regions via pci_address_space_io() Date: Thu, 19 Oct 2023 23:17:43 +0200 Message-ID: <20231019211814.30576-19-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org PCI functions are plugged on a PCI bus. They can only access external memory regions via the bus. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland Message-Id: <20231011185954.10337-5-philmd@linaro.org> --- hw/sparc64/sun4u.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index d908a38f73..c871170378 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -360,11 +360,11 @@ static void ebus_realize(PCIDevice *pci_dev, Error **errp) pci_dev->config[0x09] = 0x00; // programming i/f pci_dev->config[0x0D] = 0x0a; // latency_timer - memory_region_init_alias(&s->bar0, OBJECT(s), "bar0", get_system_io(), - 0, 0x1000000); + memory_region_init_alias(&s->bar0, OBJECT(s), "bar0", + pci_address_space_io(pci_dev), 0, 0x1000000); pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar0); - memory_region_init_alias(&s->bar1, OBJECT(s), "bar1", get_system_io(), - 0, 0x8000); + memory_region_init_alias(&s->bar1, OBJECT(s), "bar1", + pci_address_space_io(pci_dev), 0, 0x8000); pci_register_bar(pci_dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->bar1); } From patchwork Thu Oct 19 21:17:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735631 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1732066wro; Thu, 19 Oct 2023 14:26:22 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHbjePVXnPaeUSMxm3svCEaFRBLmd/ul1fLKrcp9WMcfd16e3Y1G076VjiRVCSkvY/CY6hT X-Received: by 2002:ac8:5c04:0:b0:417:b700:b13e with SMTP id i4-20020ac85c04000000b00417b700b13emr3651146qti.28.1697750782182; Thu, 19 Oct 2023 14:26:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750782; cv=none; d=google.com; s=arc-20160816; b=HMRzj2o9yEqOJhCXkuZLeWKXOv9PP1s22QwEzhc6GxhErqkDCgxF6wFkKrGBTs9PKJ KA5TCCe0feKH9r1IMrXWYYkPV5jlbpK7NzlaM8gOpM2P1OaTKoIZsjyFOOCEpF82knBa NWM4UBPGEKsl8OSW5mAhCA86dvKg1EFqIR8EQFFI43RIZ1xaTJHZ59hR+q5XlAHPMJle cO7YC/sImVOho6MBO6jHD+OW3yObqgN6Cf2Bf9XhvCzZFS62Or1HgjY0PowqWnfvvXTK YXSzYjAPnRgdZ5Is8yjrQloOD+nB7K389iTFOTzjDh9hgia1KuSXV1yLPS2x9feCfCs/ sgcQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=aKYzU30OgfdGXu2rSoeATSatQXWleg69ZG3hrJerNH4=; fh=FBj0K5mC/xVU5vbwfI5JGuw4cH8S5NcLcEdE+Lz7jX4=; b=ojFI0wM+EaKGcVI1JeV0JqHwL/MeGU8MAvpMawIxIFzBspftY+Gfx4R9AuqbPu79gh /BVXxqH15b0EiMxks2Nbz+g3DsTrvM/F2nhKozmMy7o2YGVtnzIo2/8ksvW/v73WylCi PDcBs65laiOtpKAo0yuo1zAqOCoklQXupGKIGhGrnZhdUUY/dnw3Yj1x+NMyLO4bvPxC 2+H7fkz/5Zf5N46dORjZLFhz9lSLl4bHHh0AaAvdV0Hq529+Ba25SOP3QTKUuHbi6qtJ wJac7uvlFQAo2S85TQ2g7tCCGC4cfR5sAr8QHTjEek/dg9GvO2MGWL+6KXP0QkD5zMaE HB4A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="PlxEt+r/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id j14-20020a05600c130e00b0040772934b12sm5256785wmf.7.2023.10.19.14.20.20 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:20:21 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Ani Sinha , "Michael S . Tsirkin" , Igor Mammedov Subject: [PULL 19/46] hw/acpi/pcihp: Clean up global variable shadowing in acpi_pcihp_init() Date: Thu, 19 Oct 2023 23:17:44 +0200 Message-ID: <20231019211814.30576-20-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Fix: hw/acpi/pcihp.c:499:36: error: declaration shadows a variable in the global scope [-Werror,-Wshadow] MemoryRegion *address_space_io, ^ include/exec/address-spaces.h:35:21: note: previous declaration is here extern AddressSpace address_space_io; ^ Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Ani Sinha Acked-by: Michael S. Tsirkin Message-Id: <20231010115048.11856-5-philmd@linaro.org> --- include/hw/acpi/pcihp.h | 2 +- hw/acpi/pcihp.c | 5 ++--- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index ef59810c17..ac21a95913 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -56,7 +56,7 @@ typedef struct AcpiPciHpState { } AcpiPciHpState; void acpi_pcihp_init(Object *owner, AcpiPciHpState *, PCIBus *root, - MemoryRegion *address_space_io, uint16_t io_base); + MemoryRegion *io, uint16_t io_base); bool acpi_pcihp_is_hotpluggbale_bus(AcpiPciHpState *s, BusState *bus); void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev, diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index cdd6f775a1..4f75c873e2 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -496,8 +496,7 @@ static const MemoryRegionOps acpi_pcihp_io_ops = { }; void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus, - MemoryRegion *address_space_io, - uint16_t io_base) + MemoryRegion *io, uint16_t io_base) { s->io_len = ACPI_PCIHP_SIZE; s->io_base = io_base; @@ -506,7 +505,7 @@ void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus, memory_region_init_io(&s->io, owner, &acpi_pcihp_io_ops, s, "acpi-pci-hotplug", s->io_len); - memory_region_add_subregion(address_space_io, s->io_base, &s->io); + memory_region_add_subregion(io, s->io_base, &s->io); object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_BASE_PROP, &s->io_base, OBJ_PROP_FLAG_READ); From patchwork Thu Oct 19 21:17:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735636 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1732278wro; Thu, 19 Oct 2023 14:27:00 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEABl7m4+6buWqSv12yMixGqdgBOE53Kqj+we3jPN8axV251XoH08tOypi+regEsu/Y1yz2 X-Received: by 2002:a0d:dd8c:0:b0:58c:6121:48e8 with SMTP id g134-20020a0ddd8c000000b0058c612148e8mr112670ywe.33.1697750820553; Thu, 19 Oct 2023 14:27:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750820; cv=none; d=google.com; s=arc-20160816; b=colQtJN4y7+Q6M/S0RcJOxsZuwvYzOr3HPhQBOe6dh58PDIKEXhuJ0ByrM5AC6QW/w oCGhm8hesTkkMHZBadaGsQ6rcC5GqXieu3L4alkVWvM6R3MV6+jjI3Bh+sL1C1wNyIuH AbET7eMORImqw2ICFrbusWIOC/b7MOBcVk9rr/dK8O9XzPwGSmr8DXxQ3h7ACHhIal7S MGD5+8LGy03yev+ItCWkX6beEmhrt4sBmDmIIcoqueX3LcEij3VR5WwZ3ZUgVxHD72tc rY8/zAXLYcbv2nHPFpYD/HCa9U/a3KVCjhFhL4aTlxF84+pe6ZUEYO68LML411rk8Fl2 8qUw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=JphZjrzTl79mhHMgBe5a65MwYyuf+BAarrB+apkBPKc=; fh=HsJnBu0udoMl2e2NS8rHSx0tRz1W37jeyQS25M8iQmY=; b=nVA1paniwvp1GxQNr/tt8283ePJniXsJ5aBH842Xq9uDhyUWjtS3NjOsG5+4GuEy5v QrWnjwkXcxqse9isQf7Mod8ZGnkh1tUsZ1MDmzU3NFV6JODahM7AVaCZA/A54gafuw2F kAwJCK/hvYkahUlWJUTcpHYh0/0Q6kFABwB7LYF+D6NcUVWHPrYqTL1htKhLKgr2GdPp 1E1qrOoUEnPwoimiDisIHukxmYWsn8o6JsZkkJFXtnV/U/34CjTGCO+ffb5ICNg4f3AN Gs8qiwOLE31i/ETrPuxC4QDAxYgx3lXb7m/XSgz4CHS6ORGQIXQQqcTfQM+B40IiYshu v3+g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MwQnKa1Y; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id o22-20020a5d58d6000000b003143867d2ebsm220609wrf.63.2023.10.19.14.20.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:20:28 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S . Tsirkin" , Marcel Apfelbaum Subject: [PULL 20/46] hw/pci: Clean up global variable shadowing of address_space_io variable Date: Thu, 19 Oct 2023 23:17:45 +0200 Message-ID: <20231019211814.30576-21-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Fix: hw/pci/pci.c:504:54: error: declaration shadows a variable in the global scope [-Werror,-Wshadow] MemoryRegion *address_space_io, ^ hw/pci/pci.c:533:38: error: declaration shadows a variable in the global scope [-Werror,-Wshadow] MemoryRegion *address_space_io, ^ hw/pci/pci.c:543:40: error: declaration shadows a variable in the global scope [-Werror,-Wshadow] MemoryRegion *address_space_io, ^ hw/pci/pci.c:590:45: error: declaration shadows a variable in the global scope [-Werror,-Wshadow] MemoryRegion *address_space_io, ^ include/exec/address-spaces.h:35:21: note: previous declaration is here extern AddressSpace address_space_io; ^ Signed-off-by: Philippe Mathieu-Daudé Acked-by: Michael S. Tsirkin Message-Id: <20231010115048.11856-6-philmd@linaro.org> --- include/hw/pci/pci.h | 9 +++------ hw/pci/pci.c | 25 +++++++++---------------- 2 files changed, 12 insertions(+), 22 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index b70a0b95ff..ea5aff118b 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -279,12 +279,10 @@ bool pci_bus_is_express(const PCIBus *bus); void pci_root_bus_init(PCIBus *bus, size_t bus_size, DeviceState *parent, const char *name, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, + MemoryRegion *mem, MemoryRegion *io, uint8_t devfn_min, const char *typename); PCIBus *pci_root_bus_new(DeviceState *parent, const char *name, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, + MemoryRegion *mem, MemoryRegion *io, uint8_t devfn_min, const char *typename); void pci_root_bus_cleanup(PCIBus *bus); void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, @@ -304,8 +302,7 @@ int pci_swizzle_map_irq_fn(PCIDevice *pci_dev, int pin); PCIBus *pci_register_root_bus(DeviceState *parent, const char *name, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, void *irq_opaque, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, + MemoryRegion *mem, MemoryRegion *io, uint8_t devfn_min, int nirq, const char *typename); void pci_unregister_root_bus(PCIBus *bus); diff --git a/hw/pci/pci.c b/hw/pci/pci.c index b0d21bf43a..7d09e1a39d 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -500,15 +500,14 @@ bool pci_bus_bypass_iommu(PCIBus *bus) } static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, + MemoryRegion *mem, MemoryRegion *io, uint8_t devfn_min) { assert(PCI_FUNC(devfn_min) == 0); bus->devfn_min = devfn_min; bus->slot_reserved_mask = 0x0; - bus->address_space_mem = address_space_mem; - bus->address_space_io = address_space_io; + bus->address_space_mem = mem; + bus->address_space_io = io; bus->flags |= PCI_BUS_IS_ROOT; /* host bridge */ @@ -529,25 +528,21 @@ bool pci_bus_is_express(const PCIBus *bus) void pci_root_bus_init(PCIBus *bus, size_t bus_size, DeviceState *parent, const char *name, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, + MemoryRegion *mem, MemoryRegion *io, uint8_t devfn_min, const char *typename) { qbus_init(bus, bus_size, typename, parent, name); - pci_root_bus_internal_init(bus, parent, address_space_mem, - address_space_io, devfn_min); + pci_root_bus_internal_init(bus, parent, mem, io, devfn_min); } PCIBus *pci_root_bus_new(DeviceState *parent, const char *name, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, + MemoryRegion *mem, MemoryRegion *io, uint8_t devfn_min, const char *typename) { PCIBus *bus; bus = PCI_BUS(qbus_new(typename, parent, name)); - pci_root_bus_internal_init(bus, parent, address_space_mem, - address_space_io, devfn_min); + pci_root_bus_internal_init(bus, parent, mem, io, devfn_min); return bus; } @@ -586,15 +581,13 @@ void pci_bus_irqs_cleanup(PCIBus *bus) PCIBus *pci_register_root_bus(DeviceState *parent, const char *name, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, void *irq_opaque, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, + MemoryRegion *mem, MemoryRegion *io, uint8_t devfn_min, int nirq, const char *typename) { PCIBus *bus; - bus = pci_root_bus_new(parent, name, address_space_mem, - address_space_io, devfn_min, typename); + bus = pci_root_bus_new(parent, name, mem, io, devfn_min, typename); pci_bus_irqs(bus, set_irq, irq_opaque, nirq); pci_bus_map_irqs(bus, map_irq); return bus; From patchwork Thu Oct 19 21:17:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735632 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1732069wro; Thu, 19 Oct 2023 14:26:22 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHsgBc7md8eVJyeYkfWN2YH0wRMnsvaN2tQ6R+hO3hQNn5lpr+dttCTqRrH5St0rUKP0M5U X-Received: by 2002:ac8:5e53:0:b0:417:c066:dd6f with SMTP id i19-20020ac85e53000000b00417c066dd6fmr2908512qtx.65.1697750782506; Thu, 19 Oct 2023 14:26:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750782; cv=none; d=google.com; s=arc-20160816; b=SSALVgqa397E6PWH6bWZO/AIOmRwVUQSdVAXOS2NQ6kcaFzibVGdurgeuMcPTmGHnu nFzuk9EqCX7YkENnSVoRtFlmiKJrVzyl5BKthHBBVb7yJOULI7FY3lIWnlMAzY3NKbXf 4XajjZUPNMNjv8Kukf10V9FCxV2aOvTeEc5QU4ClCTHt6m+lVdgMN2gZ0+W4h4Ox32KZ apvw6mZ2Mwkcen8bqPZWugcRelqZthX6OHqSJ8hFt88sITJjtJLbzLDPyVbkAg6xlhOt nyk88SR5oqavxAYnX03AOV+U2W22AYC7MqOIo2MQ6LfakHjVhLAhg6mUqEG6Qen9LM89 u7pw== ARC-Message-Signature: i=1; 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id p17-20020a5d68d1000000b0032d687fd9d0sm228826wrw.19.2023.10.19.14.20.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:20:35 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , David Hildenbrand , Halil Pasic , Christian Borntraeger , Eric Farman , Richard Henderson , Ilya Leoshkevich Subject: [PULL 21/46] hw/s390x: Clean up global variable shadowing in quiesce_powerdown_req() Date: Thu, 19 Oct 2023 23:17:46 +0200 Message-ID: <20231019211814.30576-22-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Fix: hw/s390x/sclpquiesce.c:90:22: error: declaration shadows a variable in the global scope [-Werror,-Wshadow] QuiesceNotifier *qn = container_of(n, QuiesceNotifier, notifier); ^ hw/s390x/sclpquiesce.c:86:3: note: previous declaration is here } qn; ^ Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: David Hildenbrand Message-Id: <20231010115048.11856-7-philmd@linaro.org> --- hw/s390x/sclpquiesce.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/s390x/sclpquiesce.c b/hw/s390x/sclpquiesce.c index ce07b16884..a641089929 100644 --- a/hw/s390x/sclpquiesce.c +++ b/hw/s390x/sclpquiesce.c @@ -78,12 +78,10 @@ static const VMStateDescription vmstate_sclpquiesce = { } }; -typedef struct QuiesceNotifier QuiesceNotifier; - -static struct QuiesceNotifier { +typedef struct QuiesceNotifier { Notifier notifier; SCLPEvent *event; -} qn; +} QuiesceNotifier; static void quiesce_powerdown_req(Notifier *n, void *opaque) { @@ -97,6 +95,8 @@ static void quiesce_powerdown_req(Notifier *n, void *opaque) static int quiesce_init(SCLPEvent *event) { + static QuiesceNotifier qn; + qn.notifier.notify = quiesce_powerdown_req; qn.event = event; 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id fm12-20020a05600c0c0c00b004030e8ff964sm5346723wmb.34.2023.10.19.14.20.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:20:41 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Peter Xu , "Michael S. Tsirkin" , Paolo Bonzini Subject: [PULL 22/46] hw/intc/apic: Use ERRP_GUARD() in apic_common_realize() Date: Thu, 19 Oct 2023 23:17:47 +0200 Message-ID: <20231019211814.30576-23-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org APICCommonClass::realize() is a DeviceRealize() handler which take an Error** parameter and can fail. Do not proceed further on failure. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Xu Message-Id: <20231003082728.83496-2-philmd@linaro.org> --- hw/intc/apic_common.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c index 68ad30e2f5..bccb4241c2 100644 --- a/hw/intc/apic_common.c +++ b/hw/intc/apic_common.c @@ -257,6 +257,7 @@ static const VMStateDescription vmstate_apic_common; static void apic_common_realize(DeviceState *dev, Error **errp) { + ERRP_GUARD(); APICCommonState *s = APIC_COMMON(dev); APICCommonClass *info; static DeviceState *vapic; @@ -267,6 +268,9 @@ static void apic_common_realize(DeviceState *dev, Error **errp) info = APIC_COMMON_GET_CLASS(s); info->realize(dev, errp); + if (*errp) { + return; + } /* Note: We need at least 1M to map the VAPIC option ROM */ if (!vapic && s->vapic_control & VAPIC_ENABLE_MASK && From patchwork Thu Oct 19 21:17:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735624 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1731430wro; Thu, 19 Oct 2023 14:24:30 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFk9oKVG4yAiv22f3MFuGfPZj7OwZ4FVu4sCCQU5c8QaNt0LrOYPXAIIu26VHSXOSVrvieK X-Received: by 2002:ac8:58c9:0:b0:41c:c428:2be3 with SMTP id u9-20020ac858c9000000b0041cc4282be3mr3703811qta.46.1697750670125; Thu, 19 Oct 2023 14:24:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750670; cv=none; d=google.com; s=arc-20160816; b=kG4Nl6GTJCpid736xZRV0mG6BiZzdKcqTwppLzKBcaqcHBPifHq9EVap6ij+nIADk5 b7gzBH31e3dKv4M8dpfYbp1uQqIJEkXs/UV6yxd1WhPk5lalp7pgVR8a+9q+kST+fBqW +ly/5oYJKs8pLq/V81wHXXnuH4FpOdv+wZU333/Lwcn2VE3qe0oFHSIf7t/uYWa011WC xYAVC3shOBWK0T1LddoBUnQ1DwWvEnh5EgS5mwaVxYwJxm5P/Oc6aeFBGahLIj8cXBrh xCka9u7d5FYk1VlOn2lIhhY4RpD0aOFoneALzYvv7LkLVxePqYHne75hnjVLTXvSwz89 SOdA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=kG3m+UrB+1tXa81IHczK7QBkGPM1a1yV1vD8kixZHhU=; fh=AVBhj4Fy+QyIIwcX4VOy9V2m7/XoySUoeqZjVcC7SWY=; b=VJA6Rc/aI3afE1CNKFUMSGSdMmNLO63b7gt7791RFXc1ZbqUjs2lTo+5pXUUhCFgG6 M1r5X2+qVSUiaE422Z4QBau9KLHpQmyVp7z6zBTd/EulyiYlQ4+hMIDMfXoFaxzxDovK dIVvmTwLR+xNNhyxmUjNg8imZmJp5XuHIyJFkdvVgGzz2hYcNRZpjEazHWuO75bbr9Rj seM/DJZTCcMtx8l1dSOCzz0adqve1jipWr3kc2QsuKRpSTSukgIBk2FhkZaRhZG3Mr2x Vf3IYVYqfcPJYlo/hHEJ9/Ahh2ObHMif6X3eR0uzmXZBfvd4J63NPx8SbfNJ5iCKArau t19g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zxWNbtDB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id t6-20020a05600c450600b0040535648639sm515316wmo.36.2023.10.19.14.20.46 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:20:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?C?= =?utf-8?q?=C3=A9dric_Le_Goater?= , Thomas Huth , Nicholas Piggin , Daniel Henrique Barboza , David Gibson , Harsh Prateek Bora Subject: [PULL 23/46] hw/ppc/spapr_vio: Realize SPAPR_VIO_BRIDGE device before accessing it Date: Thu, 19 Oct 2023 23:17:48 +0200 Message-ID: <20231019211814.30576-24-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org qbus_new() should not be called on unrealized device. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Reviewed-by: Thomas Huth Message-Id: <20231019131647.19690-2-philmd@linaro.org> --- hw/ppc/spapr_vio.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c index 9d4fec2c04..f8ef2b6fa8 100644 --- a/hw/ppc/spapr_vio.c +++ b/hw/ppc/spapr_vio.c @@ -574,13 +574,14 @@ SpaprVioBus *spapr_vio_bus_init(void) /* Create bridge device */ dev = qdev_new(TYPE_SPAPR_VIO_BRIDGE); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Create bus on bridge device */ qbus = qbus_new(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio"); bus = SPAPR_VIO_BUS(qbus); bus->next_reg = SPAPR_VIO_REG_BASE; + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + /* hcall-vio */ spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal); From patchwork Thu Oct 19 21:17:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735628 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1731829wro; Thu, 19 Oct 2023 14:25:40 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGPt6cNqaJZt2czsagf+I0H7Lg1vngxjSDVrUKqXJmeMWl1a+kQ/rXf7cyAjxRgKXIziTta X-Received: by 2002:a05:6214:4110:b0:66c:fb1d:2601 with SMTP id kc16-20020a056214411000b0066cfb1d2601mr131146qvb.5.1697750740704; Thu, 19 Oct 2023 14:25:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750740; cv=none; d=google.com; s=arc-20160816; b=BTZfjP8dKS2MRsRProQHZpmB6EvR1Sk8QaHG4TDFqb5DNW3q+eyvmHOwqbDBhTmDJI iCehUxb1eGcsfotQzWPDiAI47wOHlqPhYHYzl7gz5puAv0d5IDdORlEYFxj5Vpl+G6UH /eVv33jr2c2nDXvG2f5lZKs0LfAOFNny1iXqRcfWGbeqJY0tD+weUYbwiY8ZHtdEkUC7 sPBfGkR3D0mf7dPdGYd2rkepB9ofwFNIw6rRiMAZSEW/Oehv7wziDLNPgF2Y/sBo/3L5 QggsmB/6ZoxqnwPnDT4T25+1FuA5lLIE3FkfG5EXbUoeBHPyipvQpqwgp40CDp7Arab7 BOAQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=3U1ctCoB2Patr0sOy1+nWAx2R2m9mUOpe8fog16ZiDc=; fh=gPUAZr3rG5AAum2cFS0vXpLjRIjvY8asn41zDrAXuoE=; b=ixLfGBzr9bIfgR4KZu8Vdrysmy0lkE8cXvOXnw1BMsTYjN31jir1KJv+q3Xg7aM/f/ gsh9U3oMYcdqzgeiDBH4xKQZilYeah9dm4qOpqC5wUmlBURrrbzLquCh1RQKBQ/y5uKe f09jWICnAoIsO46UOZ1uEWM67+/J/El9mXaMli8DXyg1xlFAHMmeRyBqDGMydXHuIPq4 IeA/7uIipBLvoLRdj1lmXDV3f40uQ9NysLUdw8O6B1GNM7OIe/b+gqmv3cYBPtYxyqXn 0myOsNLG0DGjdoEZkGCpqLpVdLrQ35TcXEkCIsnDixkbfnJeVbwJCpdCE0x0ood9zgs9 0c1A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hb23pGJm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id bh9-20020a05600c3d0900b003feae747ff2sm5380666wmb.35.2023.10.19.14.20.53 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:20:55 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Thomas Huth , LIU Zhiwei , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Nicholas Piggin , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= Subject: [PULL 24/46] hw/ppc/pnv_xscom: Rename pnv_xscom_realize(Error **) -> pnv_xscom_init() Date: Thu, 19 Oct 2023 23:17:49 +0200 Message-ID: <20231019211814.30576-25-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22c; envelope-from=philmd@linaro.org; helo=mail-lj1-x22c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pnv_xscom_realize() is not used to *realize* QDev object, rename it as pnv_xscom_init(). The Error** argument is unused: remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei Reviewed-by: Cédric Le Goater Message-Id: <20231019131647.19690-3-philmd@linaro.org> --- include/hw/ppc/pnv_xscom.h | 2 +- hw/ppc/pnv.c | 18 +++--------------- hw/ppc/pnv_xscom.c | 2 +- 3 files changed, 5 insertions(+), 17 deletions(-) diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 9bc6463547..41671001da 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -170,7 +170,7 @@ struct PnvXScomInterfaceClass { #define PNV10_XSCOM_PEC_PCI_BASE 0x8010800 /* index goes upwards ... */ #define PNV10_XSCOM_PEC_PCI_SIZE 0x200 -void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp); +void pnv_xscom_init(PnvChip *chip, uint64_t size); int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset, uint64_t xscom_base, uint64_t xscom_size, const char *compat, int compat_size); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index eb54f93986..456631c9dc 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1249,11 +1249,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) assert(chip8->xics); /* XSCOM bridge is first */ - pnv_xscom_realize(chip, PNV_XSCOM_SIZE, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } + pnv_xscom_init(chip, PNV_XSCOM_SIZE); sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); @@ -1512,11 +1508,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp) Error *local_err = NULL; /* XSCOM bridge is first */ - pnv_xscom_realize(chip, PNV9_XSCOM_SIZE, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } + pnv_xscom_init(chip, PNV9_XSCOM_SIZE); sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV9_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); @@ -1727,11 +1719,7 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) Error *local_err = NULL; /* XSCOM bridge is first */ - pnv_xscom_realize(chip, PNV10_XSCOM_SIZE, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } + pnv_xscom_init(chip, PNV10_XSCOM_SIZE); sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV10_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index d820e05e40..af57b55863 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -221,7 +221,7 @@ const MemoryRegionOps pnv_xscom_ops = { .endianness = DEVICE_BIG_ENDIAN, }; -void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp) +void pnv_xscom_init(PnvChip *chip, uint64_t size) { SysBusDevice *sbd = SYS_BUS_DEVICE(chip); char *name; From patchwork Thu Oct 19 21:17:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735643 Delivered-To: patch@linaro.org Received: by 2002:adf:cf01:0:b0:32c:eacc:7fa with SMTP id o1csp1750676wrj; Thu, 19 Oct 2023 14:28:13 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG/k3OgL8yfE6JljVpf741i197CoItrsysMBICR/ipZPZMCJQqoNi+HFuYEskPamqd+L3ne X-Received: by 2002:a05:6808:bc1:b0:3a9:cfb5:462a with SMTP id o1-20020a0568080bc100b003a9cfb5462amr21167oik.36.1697750893205; Thu, 19 Oct 2023 14:28:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750893; cv=none; d=google.com; s=arc-20160816; b=vpwrwqQ3CDchFNZb5cLto/PsSXRh4LdUVHRn7zOxF2FwylCULoVbSZBsJ926JUNF62 WozdNUhD7w8Sf6ZzlC6cu3iTwuR0fS7bbcMRffIrTrG2cOY3eraDCfFyE47t8+4AN4c2 1PM6sggEDAvHgUgCwMDmewqZMQgrQBz3um0R2Jb1eTRcRu80BIsXaYLAUNEAx7QAJZat 0UujY4jaMA4i8g0AEJfGwt8zDDNDAn3/R9ibSEpoeBqGjgSX1uhstul1iij7V4AMjRXT x/R4T9kk6d1ZMTTY4huH49DZrIX1ndXNmroLWToieBKkrXCY8xMEES4zD3j3WtDOmuiS PXlw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=yHJOUZD7CaeAazVTXdyNVPRKOq5TT8EL7NxW6Z1zYOU=; fh=gPUAZr3rG5AAum2cFS0vXpLjRIjvY8asn41zDrAXuoE=; b=xIXDiKX0B18sX00VusRlpAXQDXJ8Vt0npQiPKUdETbsWuwR/R+4nHzOGCyoDmB6tln IjXC1agVty9HboxROxEtgJah55dEjxBz7oGMLbUXHEujYHLPG0Xy6SUfofVOGaYatGJR 8YO72sCKLWKaUaRtsDstz9cNcRzrb7xYDizj6i5KCNlhbKPf/ZZsk2QDiEQ627LtFANl 1cEyxPbFb85aMER+t3o4xCoV0GRpQVtmzx5LRPmSPEczeuCfZOagxa76b1R4MUJ3//TA W6ZHlvX+0XY4wKTVd5JX5swwGxZvu0uL9ERIpNnvgHKEDF3Y1Y2IqeXguBmwTO8iapir 8c9g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iaYz1cUW; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id p6-20020a5d6386000000b00327b5ca093dsm209316wru.117.2023.10.19.14.21.00 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:21:02 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Thomas Huth , LIU Zhiwei , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Nicholas Piggin , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= Subject: [PULL 25/46] hw/ppc/pnv_xscom: Move sysbus_mmio_map() call within pnv_xscom_init() Date: Thu, 19 Oct 2023 23:17:50 +0200 Message-ID: <20231019211814.30576-26-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In order to make the next commit trivial, move sysbus_init_mmio() calls just before the corresponding sysbus_mmio_map() calls. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei Reviewed-by: Cédric Le Goater Message-Id: <20231019131647.19690-4-philmd@linaro.org> --- include/hw/ppc/pnv_xscom.h | 2 +- hw/ppc/pnv.c | 9 +++------ hw/ppc/pnv_xscom.c | 3 ++- 3 files changed, 6 insertions(+), 8 deletions(-) diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 41671001da..35b19610f7 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -170,7 +170,7 @@ struct PnvXScomInterfaceClass { #define PNV10_XSCOM_PEC_PCI_BASE 0x8010800 /* index goes upwards ... */ #define PNV10_XSCOM_PEC_PCI_SIZE 0x200 -void pnv_xscom_init(PnvChip *chip, uint64_t size); +void pnv_xscom_init(PnvChip *chip, uint64_t size, hwaddr addr); int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset, uint64_t xscom_base, uint64_t xscom_size, const char *compat, int compat_size); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 456631c9dc..10158f7684 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1249,8 +1249,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) assert(chip8->xics); /* XSCOM bridge is first */ - pnv_xscom_init(chip, PNV_XSCOM_SIZE); - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip)); + pnv_xscom_init(chip, PNV_XSCOM_SIZE, PNV_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); if (local_err) { @@ -1508,8 +1507,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp) Error *local_err = NULL; /* XSCOM bridge is first */ - pnv_xscom_init(chip, PNV9_XSCOM_SIZE); - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV9_XSCOM_BASE(chip)); + pnv_xscom_init(chip, PNV9_XSCOM_SIZE, PNV9_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); if (local_err) { @@ -1719,8 +1717,7 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) Error *local_err = NULL; /* XSCOM bridge is first */ - pnv_xscom_init(chip, PNV10_XSCOM_SIZE); - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV10_XSCOM_BASE(chip)); + pnv_xscom_init(chip, PNV10_XSCOM_SIZE, PNV10_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); if (local_err) { diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index af57b55863..cf892c9fe8 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -221,7 +221,7 @@ const MemoryRegionOps pnv_xscom_ops = { .endianness = DEVICE_BIG_ENDIAN, }; -void pnv_xscom_init(PnvChip *chip, uint64_t size) +void pnv_xscom_init(PnvChip *chip, uint64_t size, hwaddr addr) { SysBusDevice *sbd = SYS_BUS_DEVICE(chip); char *name; @@ -230,6 +230,7 @@ void pnv_xscom_init(PnvChip *chip, uint64_t size) memory_region_init_io(&chip->xscom_mmio, OBJECT(chip), &pnv_xscom_ops, chip, name, size); sysbus_init_mmio(sbd, &chip->xscom_mmio); + sysbus_mmio_map(sbd, 0, addr); memory_region_init(&chip->xscom, OBJECT(chip), name, size); address_space_init(&chip->xscom_as, &chip->xscom, name); From patchwork Thu Oct 19 21:17:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735634 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1732236wro; Thu, 19 Oct 2023 14:26:51 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFSH3hcLuItVXlTqz8fWyiv/w4YcX/yQir5QepHAZp0Q2GQRp0hzZ7KULRQdj6bTQukamy7 X-Received: by 2002:a05:620a:2786:b0:76d:2725:f36f with SMTP id g6-20020a05620a278600b0076d2725f36fmr3149575qkp.71.1697750810948; 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id m21-20020a05600c4f5500b0040841e79715sm521538wmq.27.2023.10.19.14.21.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:21:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Thomas Huth , LIU Zhiwei , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Nicholas Piggin , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= Subject: [PULL 26/46] hw/ppc/pnv_xscom: Do not use SysBus API to map local MMIO region Date: Thu, 19 Oct 2023 23:17:51 +0200 Message-ID: <20231019211814.30576-27-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Transformation done using the following coccinelle script: @@ expression sbdev; expression index; expression addr; expression subregion; @@ - sysbus_init_mmio(sbdev, subregion); ... when != sbdev - sysbus_mmio_map(sbdev, index, addr); + memory_region_add_subregion(get_system_memory(), addr, subregion); Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei Reviewed-by: Cédric Le Goater Message-Id: <20231019131647.19690-5-philmd@linaro.org> --- hw/ppc/pnv_xscom.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index cf892c9fe8..805b1d0c87 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -223,14 +223,12 @@ const MemoryRegionOps pnv_xscom_ops = { void pnv_xscom_init(PnvChip *chip, uint64_t size, hwaddr addr) { - SysBusDevice *sbd = SYS_BUS_DEVICE(chip); char *name; name = g_strdup_printf("xscom-%x", chip->chip_id); memory_region_init_io(&chip->xscom_mmio, OBJECT(chip), &pnv_xscom_ops, chip, name, size); - sysbus_init_mmio(sbd, &chip->xscom_mmio); - sysbus_mmio_map(sbd, 0, addr); + memory_region_add_subregion(get_system_memory(), addr, &chip->xscom_mmio); memory_region_init(&chip->xscom, OBJECT(chip), name, size); address_space_init(&chip->xscom_as, &chip->xscom, name); From patchwork Thu Oct 19 21:17:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735613 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1730944wro; Thu, 19 Oct 2023 14:23:09 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGIRy/OzXMjo51RiqQLqzxfAZdPY/Jkeyq4igfRfsnaSG+PtmsaIMCL725pWanUR/Phirg3 X-Received: by 2002:a05:6808:1ce:b0:3a7:4914:23ce with SMTP id x14-20020a05680801ce00b003a7491423cemr26362oic.18.1697750589308; Thu, 19 Oct 2023 14:23:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750589; cv=none; d=google.com; s=arc-20160816; b=ntD8q1R4PATUf0dIO+my54/AfzkJwAUpicC5CsBKWLP78B9VWJFHNRZ4OcSL0kWI3M TOIusqk+qRqN8Lg10MFm026X2czWuRYpFXiqRZS36g8G3sUAYPJx64uQKEZor5shnG/e nQIRoVFCjNFTjxnMDxA/HdbcuFaBKeDqoz1tU6BFcnRyEikHhfqJk7k+tNjK5QvU/q6k CYLkRXBPI5NbpDNUcsGLJx+lNRdjngonqQ+QecKVIrNMyBoy9KFc3g3edJUz91kbT6gI AoK6n7UCRzmhZMBMHbzKCH4d4NzdRpVdBptQlOegMEeC9YS9h943ApC+QVeNa/Nnsmcf FNzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=cJy63F2Y201nxV5c/iu+pbyPejqWGhQMq+Ig4NcSxhc=; fh=gPUAZr3rG5AAum2cFS0vXpLjRIjvY8asn41zDrAXuoE=; b=kJMW1eOcdAy01D8GeurMj3HTXWwj3bWZr50G6q3aunp85GoCHD3lxkwCCJoKMCiga0 sAgeYzzDYuMXnQ+vbMBwK5L3Z2DzUAwJPQN1+dosmDdZcad9vK9z0eCrvhdRFW4b5NBG ovY6yVtcc4EZWrPyOo+X5mJ+9TtZHMByNmarYlpbKF+BZOi3eSgxpdxHSaIPaT8h44xG mUQvoFsH25xQ0dtgEOYAkoWufpA73CypejEz3XZaUEi1RxJe+bpepWjvx2O/PFxaQ+PB An6a9IqfoTOVaWpmHRuKfteCstS2iSbkieyMnMXoEFp/ajlcxllUXPeljiGM6ao34LPd ZMxQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ezq+9gKj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id w11-20020a5d608b000000b0032008f99216sm213341wrt.96.2023.10.19.14.21.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:21:16 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Thomas Huth , LIU Zhiwei , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Nicholas Piggin , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= Subject: [PULL 27/46] hw/ppc/pnv: Do not use SysBus API to map local MMIO region Date: Thu, 19 Oct 2023 23:17:52 +0200 Message-ID: <20231019211814.30576-28-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Transformation done using the following coccinelle script: @@ expression sbdev; expression index; expression addr; expression subregion; @@ - sysbus_init_mmio(sbdev, subregion); ... when != sbdev - sysbus_mmio_map(sbdev, index, addr); + memory_region_add_subregion(get_system_memory(), addr, subregion); Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei Reviewed-by: Cédric Le Goater Message-Id: <20231019131647.19690-6-philmd@linaro.org> --- hw/ppc/pnv.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 10158f7684..c0e34fffbc 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1217,10 +1217,9 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp) name = g_strdup_printf("icp-%x", chip->chip_id); memory_region_init(&chip8->icp_mmio, OBJECT(chip), name, PNV_ICP_SIZE); - sysbus_init_mmio(SYS_BUS_DEVICE(chip), &chip8->icp_mmio); g_free(name); - - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 1, PNV_ICP_BASE(chip)); + memory_region_add_subregion(get_system_memory(), PNV_ICP_BASE(chip), + &chip8->icp_mmio); /* Map the ICP registers for each thread */ for (i = 0; i < chip->nr_cores; i++) { From patchwork Thu Oct 19 21:17:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735608 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1730725wro; Thu, 19 Oct 2023 14:22:26 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGXj5oT0A1NoxIgWeTibTaqYzQr/zVAQ63Ufl+R9YP4MM/d3M/fC4zCC5MDAVpgxMg1uFYq X-Received: by 2002:a05:620a:24ca:b0:778:a93c:e661 with SMTP id m10-20020a05620a24ca00b00778a93ce661mr267007qkn.32.1697750546545; Thu, 19 Oct 2023 14:22:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750546; cv=none; d=google.com; s=arc-20160816; b=GuzW4kkIi69KyMADLlRot/fRKCJcf0Pn9+FEa/ExxupWiRbsjLG3Bu+GXdyYnv21qe ZgF7wP/DMxB0WT4iVsItQIJwNAdAreuCHO84+NYZEHIGW4Gb6m+D3UxROj4BT4U2neAN AxQsmm2MB85PVIg918tenNKThn5AojPWQ2xYzj5UpBgThtUD3hqHLg8pKBnFve/5P6Gv SCzJ+xQynAM/FmlIGeJhUMhIYKaf7TbBpLqDUylNJ0hVmXn0tX9pIfYbHdFt7g3GAlLZ CZqETXsd92x7c/MT+GbW/I8MHT/rOcd0GOBPDGwBUJAaU9xI8+GWAy4P2O597wNOOIrW j3Pg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=L77YzspB8FLbeJAi/xMSeTxKS717pbBpnSqxW2g70VQ=; fh=2q5eMg19MBJX4UJEslUyHr343qyfN+8GSNgdOvlNCm8=; b=aDIjGBdL7gpfkZemHypmDRj7TwRA3lRetn6KI8tVXWZWpuAgV5oS9dDni5WSETR9YJ 9Gbo04RFdDtFpZ3y/bUbWlLvV+87QSCZ25XlrtVu2higf33+88Cb8W7N3LXrrHjPVmtH C3vgsNPV4t9gGBr7mBcmYoS1jDkNNVOua4MoHoUDJ43hu6MP20NqCP4fHOxcwYqLSWRa c/uAW4uyASWbtpIuF89cUAatSRpybPZImxyAydEVKOu0r2W59MJNguWNljD1yyeBX9UB lLV2L+pDhT4vEuk2SUJK1OqsyRk0lIKiYv0lXu766s9ZgDUOn/C5enQuZfuWQcrHyIrK FNRg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ullVvB39; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id b24-20020a05600c06d800b004064e3b94afsm5307518wmn.4.2023.10.19.14.21.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:21:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Thomas Huth , LIU Zhiwei , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Nicholas Piggin , Daniel Henrique Barboza , David Gibson , Harsh Prateek Bora , =?utf-8?b?RnLDqWTDqXJpYyBCYXJy?= =?utf-8?b?YXQ=?= Subject: [PULL 28/46] hw/intc/spapr_xive: Move sysbus_init_mmio() calls around Date: Thu, 19 Oct 2023 23:17:53 +0200 Message-ID: <20231019211814.30576-29-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In order to make the next commit trivial, move sysbus_init_mmio() calls just before the corresponding sysbus_mmio_map() calls. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei Reviewed-by: Cédric Le Goater Message-Id: <20231019131647.19690-7-philmd@linaro.org> --- hw/intc/spapr_xive.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 7f701d414b..12057ffe5b 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -316,7 +316,6 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) if (!qdev_realize(DEVICE(xsrc), NULL, errp)) { return; } - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xsrc->esb_mmio); /* * Initialize the END ESB source @@ -328,7 +327,6 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) if (!qdev_realize(DEVICE(end_xsrc), NULL, errp)) { return; } - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &end_xsrc->esb_mmio); /* Set the mapping address of the END ESB pages after the source ESBs */ xive->end_base = xive->vc_base + xive_source_esb_len(xsrc); @@ -347,14 +345,16 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) /* TIMA initialization */ memory_region_init_io(&xive->tm_mmio, OBJECT(xive), &spapr_xive_tm_ops, xive, "xive.tima", 4ull << TM_SHIFT); - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xive->tm_mmio); /* * Map all regions. These will be enabled or disabled at reset and * can also be overridden by KVM memory regions if active */ + sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xsrc->esb_mmio); sysbus_mmio_map(SYS_BUS_DEVICE(xive), 0, xive->vc_base); + sysbus_init_mmio(SYS_BUS_DEVICE(xive), &end_xsrc->esb_mmio); sysbus_mmio_map(SYS_BUS_DEVICE(xive), 1, xive->end_base); + sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xive->tm_mmio); sysbus_mmio_map(SYS_BUS_DEVICE(xive), 2, xive->tm_base); } From patchwork Thu Oct 19 21:17:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735615 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1731100wro; Thu, 19 Oct 2023 14:23:35 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHueD0lRv9yPkJ/7Q0osQcQCYmfJuo0aeZxWgDv0BCJ4W0aD2r3hM/vpnbXsZ9IaR20tQlL X-Received: by 2002:a0c:8e0b:0:b0:66d:41f:6dfd with SMTP id v11-20020a0c8e0b000000b0066d041f6dfdmr88206qvb.37.1697750615470; Thu, 19 Oct 2023 14:23:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750615; cv=none; d=google.com; s=arc-20160816; b=RXhwkG18rBTRDunezFwUhiMnVytPk3tdrWF7HLxyKAXh3fe1xRXbNgsrEqb14IMKSw Gm0AxJiPYARcNixrYP9zxuIhHmgpL6Qk3uCDpmPI0mXu2m2lmQhFUkvZ0L1ISVoPq+jw p+NHYYVQiKMtGT4T89mvmJMnVowFtUCTrEYFqb2O9yQh31ShAsTRkv9+MpYNsA4NU+He tALdCUXbVnyF0Gbl8C4caADiQbbV8JCgTmH7dPAzeXzn33E5j3U+Q7xYp2EVdPW3BDWW +0OvX66VgbtAZcmmSjC9z+StoGGaM88p5mCn3AmcBZojZJq9y2gZvJaVyhmGlMHdLaEO hvIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=v2FEPKvYUQPXlVYljpSlyvIweR9xsIaSQUX0X9ROFrQ=; fh=2q5eMg19MBJX4UJEslUyHr343qyfN+8GSNgdOvlNCm8=; b=arz1lIf/Wa8gDsAolyqqeoj7CkwicJByOM3x2P3SJjZnuBf8Dt0aJr2qseLcJWSRbd VZmko6ifZx+QDQO4AJI6xEknjG6Vj3GqitpFLXfn9hcPKoFLdbHKhBZ7Uz21PjyG8+Rk OOWwZcj7XAUeXbudkk0udJEpOXKDD3ulkHUA44ZBDTYxzjqWIKmyOqLjzalGFZzxXhUF 0FI5mcJyOCxVM6sxbntBMJ+3CzzxScJae6iiOIxA7Epu+2TfKYNJeCwBIdq2zWUueobZ c/W1o4qR/j2grGGidfFIvHM/Kbo3cbh5EmvgzICHRCv3mlCtx+z0cUdRY+6DcJVFnLij barw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Io5dx2HJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id z6-20020a05600c220600b0040684abb623sm5244918wml.24.2023.10.19.14.21.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:21:31 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Thomas Huth , LIU Zhiwei , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Nicholas Piggin , Daniel Henrique Barboza , David Gibson , Harsh Prateek Bora , =?utf-8?b?RnLDqWTDqXJpYyBCYXJy?= =?utf-8?b?YXQ=?= Subject: [PULL 29/46] hw/intc/spapr_xive: Do not use SysBus API to map local MMIO region Date: Thu, 19 Oct 2023 23:17:54 +0200 Message-ID: <20231019211814.30576-30-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Transformation done using the following coccinelle script: @@ expression sbdev; expression index; expression addr; expression subregion; @@ - sysbus_init_mmio(sbdev, subregion); ... when != sbdev - sysbus_mmio_map(sbdev, index, addr); + memory_region_add_subregion(get_system_memory(), addr, subregion); Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei Reviewed-by: Cédric Le Goater Message-Id: <20231019131647.19690-8-philmd@linaro.org> --- hw/intc/spapr_xive.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 12057ffe5b..199c261b07 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -350,12 +350,12 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) * Map all regions. These will be enabled or disabled at reset and * can also be overridden by KVM memory regions if active */ - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xsrc->esb_mmio); - sysbus_mmio_map(SYS_BUS_DEVICE(xive), 0, xive->vc_base); - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &end_xsrc->esb_mmio); - sysbus_mmio_map(SYS_BUS_DEVICE(xive), 1, xive->end_base); - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xive->tm_mmio); - sysbus_mmio_map(SYS_BUS_DEVICE(xive), 2, xive->tm_base); + memory_region_add_subregion(get_system_memory(), xive->vc_base, + &xsrc->esb_mmio); + memory_region_add_subregion(get_system_memory(), xive->end_base, + &end_xsrc->esb_mmio); + memory_region_add_subregion(get_system_memory(), xive->tm_base, + &xive->tm_mmio); } static int spapr_xive_get_eas(XiveRouter *xrtr, uint8_t eas_blk, From patchwork Thu Oct 19 21:17:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735640 Delivered-To: patch@linaro.org Received: by 2002:adf:cf01:0:b0:32c:eacc:7fa with SMTP id o1csp1750425wrj; Thu, 19 Oct 2023 14:27:34 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFfwVY8w+cudAfYrFAHgRnC8NoGfj2B+KspWtfMkYfUCQj5cpLP1DVbE4afgE7T4SzwafK+ X-Received: by 2002:ac8:7d41:0:b0:417:d4a4:a90a with SMTP id h1-20020ac87d41000000b00417d4a4a90amr4089741qtb.47.1697750853995; Thu, 19 Oct 2023 14:27:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750853; cv=none; d=google.com; s=arc-20160816; b=m4eQkATvZ+ilqi81srU5r0inyaF8Y0QSCNEk7yaggzb0vPz6ZTgrwEjzEl85bXfGnG 33uo1AoiH0C0PPcHqtUtfAb53so+DR6JXbhjTTSVhdU29Cbb+XIzdhNR9Ro8IaEg7JW6 7QEodW5Ys6tAnn08Iwx3o357cWAX3XdonE9zT1AJ3CIdXNpxhEAMXAWLIiS/3BqZZ3Bw 20mGO+wFJJY4LShx6cUZnAv31aRjZZTm/dYJX+Aqe2GQia1yc0xZNX6mr8RHyFVQcqQ+ EepuSuvxLp49Myii/RnQFbmsoyHiQqJ+XLukB3E2SUC6C5jZ/XSGTKtgn/4K78x5f1PZ BpcQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=1TkahiOfYYlesTz2N92yWSyEJwEKIj0IcIbfbK44s1s=; fh=pu4gC+9R++4XiOr8w2vmQ4WPqb5P+M9CM0qMbNEJ2Ng=; b=BvuIaXVoABEQpQ4Jr9pR8wA1IlwMXFHjgzTJC19kh1+3FIXEm6OabFmToKmJNH7F6v Bk6gPBa0SKEOSXCagUMhdnixjOOBja5r9iLCBiDmbHoddDV4TmKjxrGec4kReiF7rt99 M42/dNU3FdcJ5afRvZplBi8DK/bLbw2llxU488uqdd6XcEPTOefWbZ45YI0vGhKPb8ZS iY4HEOyt2SAaPl4h8TJQrQsI6urPPbr7FP9iv/9gL/I6yC3xjmPy7Ww7OAn+02WBOiiV m1f/7ql5wbAM9cScwzDYgv7EYQf+PLhi9+itrM1GSyv3W4jIxUXUeGRJpqL002CO+BMS kfHg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MKp0xZOu; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id x12-20020a5d650c000000b0032d9a1f2ec3sm228657wru.27.2023.10.19.14.21.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:21:38 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost , =?utf-8?q?Herv=C3=A9_Poussineau?= , Aleksandar Rikalo , Gerd Hoffmann Subject: [PULL 30/46] hw/audio/pcspk: Inline pcspk_init() Date: Thu, 19 Oct 2023 23:17:55 +0200 Message-ID: <20231019211814.30576-31-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=philmd@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pcspk_init() is a legacy init function, inline and remove it. Since the device is realized using &error_fatal, use the same error for setting the "pit" link. Reviewed-by: Mark Cave-Ayland Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20231019073307.99608-1-philmd@linaro.org> --- include/hw/audio/pcspk.h | 10 ---------- hw/i386/pc.c | 4 +++- hw/isa/i82378.c | 5 ++++- hw/mips/jazz.c | 5 ++++- 4 files changed, 11 insertions(+), 13 deletions(-) diff --git a/include/hw/audio/pcspk.h b/include/hw/audio/pcspk.h index 9506179587..6be75a6b86 100644 --- a/include/hw/audio/pcspk.h +++ b/include/hw/audio/pcspk.h @@ -25,16 +25,6 @@ #ifndef HW_PCSPK_H #define HW_PCSPK_H -#include "hw/isa/isa.h" -#include "hw/qdev-properties.h" -#include "qapi/error.h" - #define TYPE_PC_SPEAKER "isa-pcspk" -static inline void pcspk_init(ISADevice *isadev, ISABus *bus, ISADevice *pit) -{ - object_property_set_link(OBJECT(isadev), "pit", OBJECT(pit), NULL); - isa_realize_and_unref(isadev, bus, &error_fatal); -} - #endif /* HW_PCSPK_H */ diff --git a/hw/i386/pc.c b/hw/i386/pc.c index bb3854d1d0..f7ee638bec 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1283,7 +1283,9 @@ void pc_basic_device_init(struct PCMachineState *pcms, /* connect PIT to output control line of the HPET */ qdev_connect_gpio_out(hpet, 0, qdev_get_gpio_in(DEVICE(pit), 0)); } - pcspk_init(pcms->pcspk, isa_bus, pit); + object_property_set_link(OBJECT(pcms->pcspk), "pit", + OBJECT(pit), &error_fatal); + isa_realize_and_unref(pcms->pcspk, isa_bus, &error_fatal); } /* Super I/O */ diff --git a/hw/isa/i82378.c b/hw/isa/i82378.c index 63e0857208..79ffbb52a0 100644 --- a/hw/isa/i82378.c +++ b/hw/isa/i82378.c @@ -67,6 +67,7 @@ static void i82378_realize(PCIDevice *pci, Error **errp) uint8_t *pci_conf; ISABus *isabus; ISADevice *pit; + ISADevice *pcspk; pci_conf = pci->config; pci_set_word(pci_conf + PCI_COMMAND, @@ -102,7 +103,9 @@ static void i82378_realize(PCIDevice *pci, Error **errp) pit = i8254_pit_init(isabus, 0x40, 0, NULL); /* speaker */ - pcspk_init(isa_new(TYPE_PC_SPEAKER), isabus, pit); + pcspk = isa_new(TYPE_PC_SPEAKER); + object_property_set_link(OBJECT(pcspk), "pit", OBJECT(pit), &error_fatal); + isa_realize_and_unref(pcspk, isabus, &error_fatal); /* 2 82C37 (dma) */ isa_create_simple(isabus, "i82374"); diff --git a/hw/mips/jazz.c b/hw/mips/jazz.c index 86dfe05ea8..d33a76ad4d 100644 --- a/hw/mips/jazz.c +++ b/hw/mips/jazz.c @@ -176,6 +176,7 @@ static void mips_jazz_init(MachineState *machine, SysBusDevice *sysbus; ISABus *isa_bus; ISADevice *pit; + ISADevice *pcspk; DriveInfo *fds[MAX_FD]; MemoryRegion *bios = g_new(MemoryRegion, 1); MemoryRegion *bios2 = g_new(MemoryRegion, 1); @@ -278,7 +279,9 @@ static void mips_jazz_init(MachineState *machine, isa_bus_register_input_irqs(isa_bus, i8259); i8257_dma_init(isa_bus, 0); pit = i8254_pit_init(isa_bus, 0x40, 0, NULL); - pcspk_init(isa_new(TYPE_PC_SPEAKER), isa_bus, pit); + pcspk = isa_new(TYPE_PC_SPEAKER); + object_property_set_link(OBJECT(pcspk), "pit", OBJECT(pit), &error_fatal); + isa_realize_and_unref(pcspk, isa_bus, &error_fatal); /* Video card */ switch (jazz_model) { From patchwork Thu Oct 19 21:17:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735612 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1730860wro; Thu, 19 Oct 2023 14:22:52 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGHU4u9hPwrh+nXZMhVJx5NSo29OYc/qs9o5COiiAUlQ4pWw+rHxmphJGfr0iOQtl6bsXbQ X-Received: by 2002:a05:620a:458f:b0:775:7530:cbf8 with SMTP id bp15-20020a05620a458f00b007757530cbf8mr3754458qkb.39.1697750572386; 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id r6-20020a5d6946000000b00318147fd2d3sm222792wrw.41.2023.10.19.14.21.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:21:45 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S . Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost Subject: [PULL 31/46] hw/i386/amd_iommu: Do not use SysBus API to map local MMIO region Date: Thu, 19 Oct 2023 23:17:56 +0200 Message-ID: <20231019211814.30576-32-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Transformation done using the following coccinelle script: @@ expression sbdev; expression index; expression addr; expression subregion; @@ - sysbus_init_mmio(sbdev, subregion); ... when != sbdev - sysbus_mmio_map(sbdev, index, addr); + memory_region_add_subregion(get_system_memory(), addr, subregion); Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Message-Id: <20231018141151.87466-2-philmd@linaro.org> --- hw/i386/amd_iommu.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 8d0f2f99dd..7965415b47 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1579,9 +1579,8 @@ static void amdvi_sysbus_realize(DeviceState *dev, Error **errp) /* set up MMIO */ memory_region_init_io(&s->mmio, OBJECT(s), &mmio_mem_ops, s, "amdvi-mmio", AMDVI_MMIO_SIZE); - - sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->mmio); - sysbus_mmio_map(SYS_BUS_DEVICE(s), 0, AMDVI_BASE_ADDR); + memory_region_add_subregion(get_system_memory(), AMDVI_BASE_ADDR, + &s->mmio); pci_setup_iommu(bus, amdvi_host_dma_iommu, s); amdvi_init(s); } From patchwork Thu Oct 19 21:17:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735646 Delivered-To: patch@linaro.org Received: by 2002:adf:cf01:0:b0:32c:eacc:7fa with SMTP id o1csp1751074wrj; Thu, 19 Oct 2023 14:29:16 -0700 (PDT) X-Google-Smtp-Source: AGHT+IH6gee6cMmCO9feHJ6stTFcMTukm8Fj4T71yWzQyQTtpcV73WI8bKBH6L+nRufCh44zO746 X-Received: by 2002:a05:6214:246b:b0:66d:36fb:474d with SMTP id im11-20020a056214246b00b0066d36fb474dmr123714qvb.1.1697750956065; Thu, 19 Oct 2023 14:29:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750956; cv=none; d=google.com; s=arc-20160816; b=L+LNfqKOUGVjdy/NjDHqkjdwLVxZKmY0cd8kKeepoRseCd1JzcPSk9niY7v4fUSXXW mSOwckV/PPjxmEpWhgEjcJY2iemooSXBII9XuqDI/oJCuGkTXW/+ZU9rX/MgPYhn/kSN rU415hAuEaRoLpTl/fcEKetqhLfSF2M7oJDUEmGAgFs1oYwGfKY/i3BNm8eDTU3Si2WH g61naqdPBeaorwDAZRJECOAJVf7xt0FJ8imBQpanK43nsBoqfa1wBpK7NMNGkebz+BVf NrEqiuckYk+rHg0DMvCFI6bThGUQxf7wAJ9YzTaJEx3iNsbCgR5bt9OEQWUyvVzFzj0A 05cw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=GRoMhCaNSLoeo2bCOvsej90/UgtOEEDsrN+Oqu3oygw=; fh=0n9Ul5Af6CQEypHJkwrx20ZftP3RDkV5SLmcw1OKgCo=; b=fe94Dork/bt1YCadN0IeOmaK+VZJRbxkZkcnTnpYenaRa7RZ7J6QDLLxa14c8mu+kJ yhmCdNpcLq+Na/sfkkSl7lsucnlxfcbBUVxiUAF7NsrS1N890wxEz6+C6GF447yM2VB5 T4Rq/OCWL4XVOzVD8bunEhyDElYyPXrgLMu8MV2USK5So1VYML8bmDTimcNCQhS+aX0g UJdCqSqRO//9NAvS4GMhCLJ68ygxLt7VGLBQhCC6XELplwudNFzCL4M9OGTMUDNauIAj 8CUrcwFdyFkvOdgz2UHgnFcKEaO1DUrGnzcqikNLMUjRiEy2CGGER11pJ29pjkvfxJ2u aMog== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eEzuygD1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id m29-20020a05600c3b1d00b003fe61c33df5sm5415202wms.3.2023.10.19.14.21.50 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:21:51 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S . Tsirkin" , Peter Xu , Jason Wang , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost Subject: [PULL 32/46] hw/i386/intel_iommu: Do not use SysBus API to map local MMIO region Date: Thu, 19 Oct 2023 23:17:57 +0200 Message-ID: <20231019211814.30576-33-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::236; envelope-from=philmd@linaro.org; helo=mail-lj1-x236.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Transformation done using the following coccinelle script: @@ expression sbdev; expression index; expression addr; expression subregion; @@ - sysbus_init_mmio(sbdev, subregion); ... when != sbdev - sysbus_mmio_map(sbdev, index, addr); + memory_region_add_subregion(get_system_memory(), addr, subregion); Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Message-Id: <20231018141151.87466-3-philmd@linaro.org> --- hw/i386/intel_iommu.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 2c832ab68b..e4f6cedcb1 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -4134,6 +4134,8 @@ static void vtd_realize(DeviceState *dev, Error **errp) qemu_mutex_init(&s->iommu_lock); memory_region_init_io(&s->csrmem, OBJECT(s), &vtd_mem_ops, s, "intel_iommu", DMAR_REG_SIZE); + memory_region_add_subregion(get_system_memory(), + Q35_HOST_BRIDGE_IOMMU_ADDR, &s->csrmem); /* Create the shared memory regions by all devices */ memory_region_init(&s->mr_nodmar, OBJECT(s), "vtd-nodmar", @@ -4148,15 +4150,12 @@ static void vtd_realize(DeviceState *dev, Error **errp) memory_region_add_subregion_overlap(&s->mr_nodmar, VTD_INTERRUPT_ADDR_FIRST, &s->mr_ir, 1); - - sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->csrmem); /* No corresponding destroy */ s->iotlb = g_hash_table_new_full(vtd_iotlb_hash, vtd_iotlb_equal, g_free, g_free); s->vtd_address_spaces = g_hash_table_new_full(vtd_as_hash, vtd_as_equal, g_free, g_free); vtd_init(s); - sysbus_mmio_map(SYS_BUS_DEVICE(s), 0, Q35_HOST_BRIDGE_IOMMU_ADDR); pci_setup_iommu(bus, vtd_host_dma_iommu, dev); /* Pseudo address space under root PCI bus. */ x86ms->ioapic_as = vtd_host_dma_iommu(bus, s, Q35_PSEUDO_DEVFN_IOAPIC); From patchwork Thu Oct 19 21:17:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735614 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1731007wro; Thu, 19 Oct 2023 14:23:20 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG6nQ9fAJL3Z4sRWCfGOXxbMKnH475Ja5GW20ZhFPIrg4CQCq8JhfkcCbq4HGt46ceZc8Bc X-Received: by 2002:a05:620a:44c4:b0:775:ce76:474a with SMTP id y4-20020a05620a44c400b00775ce76474amr3857121qkp.52.1697750600612; Thu, 19 Oct 2023 14:23:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750600; cv=none; d=google.com; s=arc-20160816; b=LXY1te+MBlYC4Pw2OKlwNSEIh1lNVCAyd5lVnhLWfYWDvAxizPdNgDIbbvaP+d23Yj Db3YxDeBSThJq9KD9BDIgAcJhz2Ekel0yg0jgVycjUcJczw2XJd7HMI81ULsmRZs5HXP jGyDbzTR8aKre9tp0dQuk6CneJYvRtzXyk5xPCvHhLLWrKxzvAUN1Wuq+zNqES4EMxQE 92602jSUlx1k+8Hcudfzmd6oQW523nNdY1Oh4G8wO3w0NR8ExAHJlR5JbmVCMcnfl//F EH13QDtNErfqUcP6hF6Ex3KooRlEeVL3S+TExSbGOOeY5mt7NqgH45xrr/LXyS9b9S6R cKTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=RctKb6lJoE4fPKPR7iwErgm5ApYF3Oq0zyKJn1rvnek=; fh=dmOCqvos1g3r1RzW1CO0kfggl2PD3Dx25NFBbr1xQIo=; b=cfKtW3HVBat8NEEOYRI41fmhhRmQuDczpIWupoeZ7oxMuZupcALMSUN6xSyRuQfaSD gJZKnzuMX+MJgubBuxvz2AU30jICwnU4bWNhhUPb6o7jyNaS7aBDZ35IGvmzJQZfMlOx umh3lfjEcGn95cXhK4QFZgMFc3Wq64tnWoAHV5bomBHeAh7Z2MMilza3LKKbcQ1xvO6A QZk6ybnZgGbm5xvLrt7XvnEXqQcGFVFO3cxA1WPbrDFGItegWR3BtYcaOwyt8PQlds/r t44jOhFKPnqyURdFR08NJaKeDdVMyvww6mSJpimg7h8Y1qQJi0adCF1o3/bCWcynXwW+ /voA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=q0CfCjC+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id t18-20020a5d6a52000000b0032db8cccd3asm210876wrw.114.2023.10.19.14.21.57 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:21:58 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Beniamino Galvani , Peter Maydell , Strahinja Jankovic Subject: [PULL 33/46] hw/misc/allwinner-dramc: Move sysbus_mmio_map call from init -> realize Date: Thu, 19 Oct 2023 23:17:58 +0200 Message-ID: <20231019211814.30576-34-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::130; envelope-from=philmd@linaro.org; helo=mail-lf1-x130.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In order to make the next commit trivial, move the sysbus_init_mmio() call in allwinner_r40_dramc_init() just before the corresponding sysbus_mmio_map_overlap() call in allwinner_r40_dramc_realize(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Message-Id: <20231019071611.98885-4-philmd@linaro.org> --- hw/misc/allwinner-r40-dramc.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/hw/misc/allwinner-r40-dramc.c b/hw/misc/allwinner-r40-dramc.c index 6944f84455..2cc0254a55 100644 --- a/hw/misc/allwinner-r40-dramc.c +++ b/hw/misc/allwinner-r40-dramc.c @@ -414,6 +414,7 @@ static void allwinner_r40_dramc_reset(DeviceState *dev) static void allwinner_r40_dramc_realize(DeviceState *dev, Error **errp) { AwR40DramCtlState *s = AW_R40_DRAMC(dev); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); if (!get_match_ddr(s->ram_size)) { error_report("%s: ram-size %u MiB is not supported", @@ -421,8 +422,12 @@ static void allwinner_r40_dramc_realize(DeviceState *dev, Error **errp) exit(1); } - /* detect_cells */ - sysbus_mmio_map_overlap(SYS_BUS_DEVICE(s), 3, s->ram_addr, 10); + /* R40 support max 2G memory but we only support up to 1G now. index 3 */ + memory_region_init_io(&s->detect_cells, OBJECT(s), + &allwinner_r40_detect_ops, s, + "DRAMCELLS", 1 * GiB); + sysbus_init_mmio(sbd, &s->detect_cells); + sysbus_mmio_map_overlap(sbd, 3, s->ram_addr, 10); memory_region_set_enabled(&s->detect_cells, false); /* @@ -458,12 +463,6 @@ static void allwinner_r40_dramc_init(Object *obj) &allwinner_r40_dramphy_ops, s, "DRAMPHY", 4 * KiB); sysbus_init_mmio(sbd, &s->dramphy_iomem); - - /* R40 support max 2G memory but we only support up to 1G now. index 3 */ - memory_region_init_io(&s->detect_cells, OBJECT(s), - &allwinner_r40_detect_ops, s, - "DRAMCELLS", 1 * GiB); - sysbus_init_mmio(sbd, &s->detect_cells); } static Property allwinner_r40_dramc_properties[] = { From patchwork Thu Oct 19 21:17:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735637 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1732336wro; Thu, 19 Oct 2023 14:27:12 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEksXbXD+Q7hi+Ybg22VWuYinQRQJt9bj2iUAbEbLOd8MfoI/vMUwMgV6t4nPqKXMoRyTt7 X-Received: by 2002:a05:620a:40c1:b0:778:8ce0:221a with SMTP id g1-20020a05620a40c100b007788ce0221amr3801344qko.63.1697750832149; Thu, 19 Oct 2023 14:27:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750832; cv=none; d=google.com; s=arc-20160816; b=XcbFoVDu1BurF/6eBjs6UoTLNIQ9LfRiVFQUOruao6wzGn3FBt5tdkrEUWtxzNDUsO mSGw1f3o+ekA0tnc7NmMnor+1HJJyA3dd5jUQ5Kg+S8XNwoVZgfja3etXeIBPjqcczPu 73lvrPNFM0J9iBV+TCTDBxwD40DQmUgIXOCeVlcrJtSDHBJU76By8woroC2KxH1kA91R eBtxhozl+DtiH6DsVwNpNNHa47HQQGjjVm9XtLY2o2oiCGJNEjqMPaYpTXRGSsyA8Kpa x7gd8ABmFJeHXrI4HjAsCO4TjiRxCxCGasTXInFceyeZAEN63hB3AZUrpG6l99OfFsW7 Vy5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=mySmSJOrGLyGZadXYNDWy1G5mj7NTLtIFHeDWQ7Xcwk=; fh=dmOCqvos1g3r1RzW1CO0kfggl2PD3Dx25NFBbr1xQIo=; b=lnb9IfeMflMOZvOxsv5NAdI/eTp4WOqQng9tbRRYBYd1YVhHnDg61vBsb921aGa4W6 /Ut4XzY25YtA4o0Kk7S0mmbfMs7/bn/IufPNn/lAFzZDUSGYdCON6K9cobk9GcxDO0xa iqq92wjahBwcWiErsJC+5md0Krrq9cNP43IusWg/oblLGEDORUBMWui8RRTpNBvml1L3 j6CN/6KOxf21fClhbnmy1V/S47yRXMvzgsklDHsDt4EM5Koc0XAU0LerVUUNGdCc3x6B Y2pJW00CUgG1T2HJ7F0DuVji419NH/CxypQrbqpWZi6wpVdvb6w6zHPmkbTgbYgw6dEa X8vQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Keu3ui6X; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id h12-20020adff18c000000b0032d402f816csm213757wro.98.2023.10.19.14.22.03 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:22:05 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Beniamino Galvani , Peter Maydell , Strahinja Jankovic Subject: [PULL 34/46] hw/misc/allwinner-dramc: Do not use SysBus API to map local MMIO region Date: Thu, 19 Oct 2023 23:17:59 +0200 Message-ID: <20231019211814.30576-35-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12b; envelope-from=philmd@linaro.org; helo=mail-lf1-x12b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Transformation done using the following coccinelle script: @@ expression sbdev; expression index; expression addr; expression subregion; @@ - sysbus_init_mmio(sbdev, subregion); ... when != sbdev - sysbus_mmio_map(sbdev, index, addr); + memory_region_add_subregion(get_system_memory(), + addr, subregion); @@ expression priority; @@ - sysbus_init_mmio(sbdev, subregion); ... when != sbdev - sysbus_mmio_map_overlap(sbdev, index, addr, priority); + memory_region_add_subregion_overlap(get_system_memory(), + addr, + subregion, priority); Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Message-Id: <20231019071611.98885-5-philmd@linaro.org> --- hw/misc/allwinner-r40-dramc.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/hw/misc/allwinner-r40-dramc.c b/hw/misc/allwinner-r40-dramc.c index 2cc0254a55..3d81ddb2e1 100644 --- a/hw/misc/allwinner-r40-dramc.c +++ b/hw/misc/allwinner-r40-dramc.c @@ -414,7 +414,6 @@ static void allwinner_r40_dramc_reset(DeviceState *dev) static void allwinner_r40_dramc_realize(DeviceState *dev, Error **errp) { AwR40DramCtlState *s = AW_R40_DRAMC(dev); - SysBusDevice *sbd = SYS_BUS_DEVICE(dev); if (!get_match_ddr(s->ram_size)) { error_report("%s: ram-size %u MiB is not supported", @@ -422,23 +421,23 @@ static void allwinner_r40_dramc_realize(DeviceState *dev, Error **errp) exit(1); } - /* R40 support max 2G memory but we only support up to 1G now. index 3 */ + /* R40 support max 2G memory but we only support up to 1G now. */ memory_region_init_io(&s->detect_cells, OBJECT(s), &allwinner_r40_detect_ops, s, "DRAMCELLS", 1 * GiB); - sysbus_init_mmio(sbd, &s->detect_cells); - sysbus_mmio_map_overlap(sbd, 3, s->ram_addr, 10); + memory_region_add_subregion_overlap(get_system_memory(), s->ram_addr, + &s->detect_cells, 10); memory_region_set_enabled(&s->detect_cells, false); /* * We only support DRAM size up to 1G now, so prepare a high memory page - * after 1G for dualrank detect. index = 4 + * after 1G for dualrank detect. */ memory_region_init_io(&s->dram_high, OBJECT(s), &allwinner_r40_dualrank_detect_ops, s, "DRAMHIGH", KiB); - sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->dram_high); - sysbus_mmio_map(SYS_BUS_DEVICE(s), 4, s->ram_addr + GiB); + memory_region_add_subregion(get_system_memory(), s->ram_addr + GiB, + &s->dram_high); } static void allwinner_r40_dramc_init(Object *obj) From patchwork Thu Oct 19 21:18:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735638 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1732384wro; Thu, 19 Oct 2023 14:27:20 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEwCQyERstk13sRV0u/RG5VO/OaReQ1W9UfuGMJjJT9mNB+ukwLpSjJ+pH3MbbR5U17HiAS X-Received: by 2002:a0c:e403:0:b0:65b:227a:d7d5 with SMTP id o3-20020a0ce403000000b0065b227ad7d5mr115008qvl.11.1697750839917; Thu, 19 Oct 2023 14:27:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750839; cv=none; d=google.com; s=arc-20160816; b=r+qXgjcoDzitILXpfOMr//Cc4uUvxQhBKP93ewfzxhNB7xZLuM6qdnggrxlqkWICe0 8SIJ7JnBwZwKx8CjIsMO2IR196YR8yMosvVwslhJUKUDyIQncoNqQ1kpbhP6xiZ+MTUs 915q3ilWfkIkitz3t3Zfhe5iS1oKcB3Mi1ff4FMb6cGeZOt6+KI5dA5g0fax60PFR26L fFvobiZuchR7z9OBDmKA/l7CG3J/v9KMEghJTDeWlSnkhrKWbkn2itbIEFidUxITRT7h iGFABklYL5ZRdxeuArKNgeVkZN1EkBfJCKo0F9YyAJR7j7goXPPXq7z+4nu57uo8BQBK OA4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ix2iKalM6rt+N1evpv/75s+6JhZMBmTdvoofTWM57FQ=; fh=qMjUddqfpzS3CLmi1TepSrweTKjgMI6Dnk5cfZAeKbg=; b=KU082O2V8rZZmarcLCRhfjxSlhwdNdUVRpokRI5S38HY9wbX2QyibQZrq59sUlK1Ep HboLWkE/8GMITq2A/OK6ouiidc/ldhHq9wc/fSG3M+gfCD77q90+HBDBLvE190wtljNN Zk9+a51LMUhwaDOSZNERU9Z0ncUHNxHQT1cZSbS4zVRnR5U+z2vTlpENTV3EIQN2gMuW UPXTN2cQrRyaIoZhe01p5yCLkzMFDZ+8Xu+4C10AKMHLboxdm7O1QznEnt0ofwRAqxTR hOkGpEDY5Onr7cqpXNPWrfWD254p76UXVQ6z7dBZLjQts9ZmYBihmtF0z7LVw8/gOoUO /p/g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="U/syFgfF"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id az20-20020a05600c601400b004054dcbf92asm519972wmb.20.2023.10.19.14.22.10 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:22:11 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Huacai Chen , Jiaxun Yang Subject: [PULL 35/46] hw/pci-host/bonito: Do not use SysBus API to map local MMIO region Date: Thu, 19 Oct 2023 23:18:00 +0200 Message-ID: <20231019211814.30576-36-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22d; envelope-from=philmd@linaro.org; helo=mail-lj1-x22d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Transformation done using the following coccinelle script: @@ expression sbdev; expression index; expression addr; expression subregion; @@ - sysbus_init_mmio(sbdev, subregion); ... when != sbdev - sysbus_mmio_map(sbdev, index, addr); + memory_region_add_subregion(get_system_memory(), addr, subregion); and manually adding the local 'host_mem' variable to avoid multiple calls to get_system_memory(). Reviewed-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20231019071611.98885-6-philmd@linaro.org> --- hw/pci-host/bonito.c | 30 +++++++++++++----------------- 1 file changed, 13 insertions(+), 17 deletions(-) diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index ee6cb85e97..bab661f3ce 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -654,7 +654,7 @@ static void bonito_host_realize(DeviceState *dev, Error **errp) static void bonito_pci_realize(PCIDevice *dev, Error **errp) { PCIBonitoState *s = PCI_BONITO(dev); - SysBusDevice *sysbus = SYS_BUS_DEVICE(s->pcihost); + MemoryRegion *host_mem = get_system_memory(); PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost); BonitoState *bs = s->pcihost; MemoryRegion *pcimem_alias = g_new(MemoryRegion, 1); @@ -668,48 +668,45 @@ static void bonito_pci_realize(PCIDevice *dev, Error **errp) /* set the north bridge register mapping */ memory_region_init_io(&s->iomem, OBJECT(s), &bonito_ops, s, "north-bridge-register", BONITO_INTERNAL_REG_SIZE); - sysbus_init_mmio(sysbus, &s->iomem); - sysbus_mmio_map(sysbus, 0, BONITO_INTERNAL_REG_BASE); + memory_region_add_subregion(host_mem, BONITO_INTERNAL_REG_BASE, &s->iomem); /* set the north bridge pci configure mapping */ memory_region_init_io(&phb->conf_mem, OBJECT(s), &bonito_pciconf_ops, s, "north-bridge-pci-config", BONITO_PCICONFIG_SIZE); - sysbus_init_mmio(sysbus, &phb->conf_mem); - sysbus_mmio_map(sysbus, 1, BONITO_PCICONFIG_BASE); + memory_region_add_subregion(host_mem, BONITO_PCICONFIG_BASE, + &phb->conf_mem); /* set the south bridge pci configure mapping */ memory_region_init_io(&phb->data_mem, OBJECT(s), &bonito_spciconf_ops, s, "south-bridge-pci-config", BONITO_SPCICONFIG_SIZE); - sysbus_init_mmio(sysbus, &phb->data_mem); - sysbus_mmio_map(sysbus, 2, BONITO_SPCICONFIG_BASE); + memory_region_add_subregion(host_mem, BONITO_SPCICONFIG_BASE, + &phb->data_mem); create_unimplemented_device("bonito", BONITO_REG_BASE, BONITO_REG_SIZE); memory_region_init_io(&s->iomem_ldma, OBJECT(s), &bonito_ldma_ops, s, "ldma", 0x100); - sysbus_init_mmio(sysbus, &s->iomem_ldma); - sysbus_mmio_map(sysbus, 3, 0x1fe00200); + memory_region_add_subregion(host_mem, 0x1fe00200, &s->iomem_ldma); /* PCI copier */ memory_region_init_io(&s->iomem_cop, OBJECT(s), &bonito_cop_ops, s, "cop", 0x100); - sysbus_init_mmio(sysbus, &s->iomem_cop); - sysbus_mmio_map(sysbus, 4, 0x1fe00300); + memory_region_add_subregion(host_mem, 0x1fe00300, &s->iomem_cop); create_unimplemented_device("ROMCS", BONITO_FLASH_BASE, 60 * MiB); /* Map PCI IO Space 0x1fd0 0000 - 0x1fd1 0000 */ memory_region_init_alias(&s->bonito_pciio, OBJECT(s), "isa_mmio", get_system_io(), 0, BONITO_PCIIO_SIZE); - sysbus_init_mmio(sysbus, &s->bonito_pciio); - sysbus_mmio_map(sysbus, 5, BONITO_PCIIO_BASE); + memory_region_add_subregion(host_mem, BONITO_PCIIO_BASE, + &s->bonito_pciio); /* add pci local io mapping */ memory_region_init_alias(&s->bonito_localio, OBJECT(s), "IOCS[0]", get_system_io(), 0, 256 * KiB); - sysbus_init_mmio(sysbus, &s->bonito_localio); - sysbus_mmio_map(sysbus, 6, BONITO_DEV_BASE); + memory_region_add_subregion(host_mem, BONITO_DEV_BASE, + &s->bonito_localio); create_unimplemented_device("IOCS[1]", BONITO_DEV_BASE + 1 * 256 * KiB, 256 * KiB); create_unimplemented_device("IOCS[2]", BONITO_DEV_BASE + 2 * 256 * KiB, @@ -719,8 +716,7 @@ static void bonito_pci_realize(PCIDevice *dev, Error **errp) memory_region_init_alias(pcimem_alias, NULL, "pci.mem.alias", &bs->pci_mem, 0, BONITO_PCIHI_SIZE); - memory_region_add_subregion(get_system_memory(), - BONITO_PCIHI_BASE, pcimem_alias); + memory_region_add_subregion(host_mem, BONITO_PCIHI_BASE, pcimem_alias); create_unimplemented_device("PCI_2", (hwaddr)BONITO_PCIHI_BASE + BONITO_PCIHI_SIZE, 2 * GiB); From patchwork Thu Oct 19 21:18:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735623 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1731403wro; Thu, 19 Oct 2023 14:24:26 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEfq1yfK/fsPfZsi7c/SAxzRum2AMXiEkDbpzDZ5IqbwGu9rGKqRNWzc3UaRbq9DkbBztZv X-Received: by 2002:a9d:7cd5:0:b0:6c4:e81f:59b8 with SMTP id r21-20020a9d7cd5000000b006c4e81f59b8mr727otn.22.1697750666389; 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id u3-20020a05600c138300b003fc0505be19sm519161wmf.37.2023.10.19.14.22.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:22:18 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , "Michael S . Tsirkin" , Peter Maydell , Sergio Lopez , Paolo Bonzini , Richard Henderson , Eduardo Habkost , Marcel Apfelbaum , Song Gao Subject: [PULL 36/46] hw/acpi: Realize ACPI_GED sysbus device before accessing it Date: Thu, 19 Oct 2023 23:18:01 +0200 Message-ID: <20231019211814.30576-37-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org sysbus_mmio_map() should not be called on unrealized device. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Michael S. Tsirkin Message-Id: <20231018141151.87466-7-philmd@linaro.org> --- hw/arm/virt.c | 3 +-- hw/i386/microvm.c | 2 +- hw/loongarch/virt.c | 2 +- 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 15e74249f9..02c7a7ff3c 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -647,13 +647,12 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms) dev = qdev_new(TYPE_ACPI_GED); qdev_prop_set_uint32(dev, "ged-event", event); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_ACPI_GED].base); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, vms->memmap[VIRT_PCDIMM_ACPI].base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(vms->gic, irq)); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - return dev; } diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c index b9c93039e2..ca55aecc3b 100644 --- a/hw/i386/microvm.c +++ b/hw/i386/microvm.c @@ -206,12 +206,12 @@ static void microvm_devices_init(MicrovmMachineState *mms) if (x86_machine_is_acpi_enabled(x86ms)) { DeviceState *dev = qdev_new(TYPE_ACPI_GED); qdev_prop_set_uint32(dev, "ged-event", ACPI_GED_PWR_DOWN_EVT); + sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, GED_MMIO_BASE); /* sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, GED_MMIO_BASE_MEMHP); */ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, GED_MMIO_BASE_REGS); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, x86ms->gsi[GED_MMIO_IRQ]); - sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); x86ms->acpi_dev = HOTPLUG_HANDLER(dev); } diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 2952fe452e..4b7dc67a2d 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -412,6 +412,7 @@ static DeviceState *create_acpi_ged(DeviceState *pch_pic, LoongArchMachineState } dev = qdev_new(TYPE_ACPI_GED); qdev_prop_set_uint32(dev, "ged-event", event); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* ged event */ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, VIRT_GED_EVT_ADDR); @@ -422,7 +423,6 @@ static DeviceState *create_acpi_ged(DeviceState *pch_pic, LoongArchMachineState sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(pch_pic, VIRT_SCI_IRQ - VIRT_GSI_BASE)); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); return dev; } From patchwork Thu Oct 19 21:18:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735620 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1731350wro; Thu, 19 Oct 2023 14:24:18 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFWsnYDPXDrZgTBa5wI7A6WEWr4y8Go1e4D02RT3nv6QiGsQ64oQp4cRutgAx7ADO0M5I5B X-Received: by 2002:a05:622a:1305:b0:417:a974:889e with SMTP id v5-20020a05622a130500b00417a974889emr4118355qtk.2.1697750657892; Thu, 19 Oct 2023 14:24:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750657; cv=none; d=google.com; s=arc-20160816; b=zZE8o/y6GBzDLFzH+nVk75OgQ+LS4RODztrJ1HftO6cqNlZkUX3upISSqTYtZy0Qx5 ztZNYavdvD4v6XLip+ZkJyBjyFRTW9Bx7ez2/hC5mcIz7RaESDLlmMK7moBa7UGOsbI1 ZweKUpVzvaH72flvucVnp0ZfbBbblxL0XE4T5YIVMOTtnm0MeVVC/P9coo1QEtJ0Bo6P hEf6NuePZAi/tuQ+VicJrnQEubZ6kp54Bk0zsoOIguROPk67WPiHqKHi3P0/9XNaQFd3 CHyIK7wnBa9M3+X+RozMckYRg9xRqhyJHNQYysbdYW3s//gunYYgy2vufAEIDv/pwXKw zOcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=8655uhkf4Iv3nGM9fMF2CltwIDAJNWHol1jKSBeCR8A=; fh=Uj8HDrldIoYWHqqMC7Rg3wRXZjU4364GbB0sXdwIGXY=; b=n3RLu3ucNGcORUT7vJmgCc/Oskw4ijT7KtInExAuHRyO6KkX+xJZu7Q1fEa/mzlTC4 YQ4o2viA0E2gw9iOkjNhIcUwp5QJB9vAoqpmkuKKSco5n15CJX9fSZfjBGeR7FdiE2cD 6H48xrrvQwGOWL/p8Y4BmI7ynbwX6u3eXWC0BiGn/RwHD5I3fbg7MtTi9Lat7bFbFf0v IawHmNTG9cFGqRu+UbsZTbHImmAchifMa9rJYlRwKIwg9h7/Mt9gHHTJTE45Tqi3+lMw EI4adC0WbB4qHlwT0E6CLx/RjHkwUlIrXVr+O3NSrl3I1+kQCUfAgsNctyIP/bhP1t9S 9+Qg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="X+UUb/6U"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id q11-20020a056000136b00b0032dc74c093dsm215583wrz.103.2023.10.19.14.22.23 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:22:24 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Peter Maydell Subject: [PULL 37/46] hw/arm/virt: Realize ARM_GICV2M sysbus device before accessing it Date: Thu, 19 Oct 2023 23:18:02 +0200 Message-ID: <20231019211814.30576-38-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org sysbus_mmio_map() should not be called on unrealized device. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Message-Id: <20231018141151.87466-8-philmd@linaro.org> --- hw/arm/virt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 02c7a7ff3c..5b08a98f07 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -690,10 +690,10 @@ static void create_v2m(VirtMachineState *vms) DeviceState *dev; dev = qdev_new("arm-gicv2m"); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_GIC_V2M].base); qdev_prop_set_uint32(dev, "base-spi", irq); qdev_prop_set_uint32(dev, "num-spi", NUM_GICV2M_SPIS); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_GIC_V2M].base); for (i = 0; i < NUM_GICV2M_SPIS; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, From patchwork Thu Oct 19 21:18:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735616 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1731103wro; Thu, 19 Oct 2023 14:23:36 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFpcpcDKghrrPbcDr7b30ddkSWgvcpvoUpj01jl7T+dJ6rWjbIahBmwalefqwkn6BQCDorl X-Received: by 2002:a25:258c:0:b0:d9a:d78f:a007 with SMTP id l134-20020a25258c000000b00d9ad78fa007mr3540000ybl.46.1697750616329; Thu, 19 Oct 2023 14:23:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750616; cv=none; d=google.com; s=arc-20160816; b=uU+z2wpThfMSdOjVaacsR01j4HLxUQJqDZNollzEBp9vjLG493qpaTLH+Kjs3jeH42 BzPajWB4sYTarB+HEFYNmvBmYzuTWQJYIvgga/qCj4BG3fD541e5YAxeuhxTbkH+HgwI HQUQ1xfSGqQ2LZIbe//pPtYeRz33t1HRNfY7ASggumsK0xAAeTNJyq0Mg2GvuGBCfIAh jOxka7prE9UsC/VvmhqmsAW+Wy3v7tiX4KMjQZn0+aF3X6b8Tijmed6N1z9zbQzC5kGO RtM2Gc426U5Mdp0ePF1LVHy5mT0vEXCGXq4rcNG4VginTCab2zTIp/a/VvWIQmAdH0Va amEQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=QiDSBb1U1Y6ntpHTs6MX3TQXj3gIN80QBkiJrswp04U=; fh=/VuZmIqr4bR18HTgg1hSyedIsQzndzO0C0UCJ5egpbw=; b=E50hTx3qzuOJMq5RiUCQ+Rv9xAQDTHblMQl0kQa7SYX8hGBVtrnZLvP+iIlr48AL8Y uSKPelQVcsSpXTvsMNXX8oZ15XVFiLZCrcC4i/ZrOVQy+2r/90lHteRoOviFiCUHUjKa QKvYAtFUCWVaWdTKs7cRvnC16IMH/zo66XqYeEz7zdlhCNgnnKDKPQevESIoqsgFre72 sh4DDwANHrAQYmIGQGQmsYCQ6Xwvk3piw6NMxZa55qXZQ+GGFdm8+vqeTAJwolumg7uZ zOuB3dUrgjrl7OPh8m9SknvIk8HDNZhH3C4UqBSNJVc9u969A7NVH0A8IKx36BPhGpp2 dRQw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UeTn10uh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id r9-20020a05600c158900b0040776008abdsm508640wmf.40.2023.10.19.14.22.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:22:31 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S . Tsirkin" Subject: [PULL 38/46] hw/isa: Realize ISA bridge device before accessing it Date: Thu, 19 Oct 2023 23:18:03 +0200 Message-ID: <20231019211814.30576-39-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22b; envelope-from=philmd@linaro.org; helo=mail-lj1-x22b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org qbus_new() should not be called on unrealized device. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Message-Id: <20231019071611.98885-9-philmd@linaro.org> --- hw/isa/isa-bus.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index a289eccfb1..f1e0f14007 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -52,18 +52,25 @@ static const TypeInfo isa_bus_info = { ISABus *isa_bus_new(DeviceState *dev, MemoryRegion* address_space, MemoryRegion *address_space_io, Error **errp) { + DeviceState *bridge = NULL; + if (isabus) { error_setg(errp, "Can't create a second ISA bus"); return NULL; } if (!dev) { - dev = qdev_new("isabus-bridge"); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + bridge = qdev_new("isabus-bridge"); + dev = bridge; } isabus = ISA_BUS(qbus_new(TYPE_ISA_BUS, dev, NULL)); isabus->address_space = address_space; isabus->address_space_io = address_space_io; + + if (bridge) { + sysbus_realize_and_unref(SYS_BUS_DEVICE(bridge), &error_fatal); + } + return isabus; } From patchwork Thu Oct 19 21:18:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735642 Delivered-To: patch@linaro.org Received: by 2002:adf:cf01:0:b0:32c:eacc:7fa with SMTP id o1csp1750654wrj; Thu, 19 Oct 2023 14:28:10 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE3l0s/ED0RSAFdMnlIIvFWC5DQqyBR8DgtNzZAomXQBX2K+uEE3WS8VyWBvPpxToqkjZJp X-Received: by 2002:a05:6808:1a8e:b0:3a7:57a6:e077 with SMTP id bm14-20020a0568081a8e00b003a757a6e077mr8907oib.37.1697750890589; Thu, 19 Oct 2023 14:28:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750890; cv=none; d=google.com; s=arc-20160816; b=HS4C6/qUTSDHE2LbCDw6k5UT1pdhSnlrZearjp3Mj0DTJFIlj3J+a6EZ92R7sK/fTO d882gauda8NsNkHKxMbNVEsxIPe7cnWeXuCbYAUc7/NkQft+J3L5NLXMPJmYVqUz7bXk znulshm6lWqevfQ4zudFuP8yrW9lDPmJs8yUiTWouf/krXKt3E0e30xCnfc9sG/69DmN mc7NYn4JubtSFfAUf2dtyBzORpDSl2JUPE4Ya6w4X058zNvfE8t6F940hPlcNHkjIGzH lS0m35P9gbeHFs50uWfsndvf+xX0L1Of9nhbpWebeNbaY7EA97a25jFjX/lVfWusPK/0 1/tQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=vJ9ZaPpfbPcFNzI45afXvQgHQre2Ry4Lwlv0pUnRA5c=; fh=JLjM+ZivWFloiA3k3jGy42N5chpzH2pnh8CUmPxHY0w=; b=dubrHedr640PTYFcPp6bwt82NYgtqCNgg1NQF6D6X29utKRUzBwliKJT7Jlho3Y/fy WD0RO2szpeMYVQJxs6mvsupjw6+URjF/u4BShKSZDi7aN6L7+QS9hUOsuMxERUNmMhjU wAK0GeWM9YxWZdF9NRIe0gGI044CnPJ51mZiHveopLqevZM39YzXr+DtxCKFmypp+aCe ivX2LR2+9bx/+ihD3eVcUiSgcdMWW2tix4TSDwK0ZYODYDSFm37qSB4z/IN0f9ggWfpj NvYy1IFxmaa5j7pfizeia8YO/wZsra1Rwo33gYOzkpgdNS6mGk1eTanyaiyTwEu4DRFt /XUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mootwnur; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id az15-20020a05600c600f00b00406447b798bsm5381485wmb.37.2023.10.19.14.22.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:22:37 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Halil Pasic , Christian Borntraeger , Eric Farman , Richard Henderson , David Hildenbrand , Ilya Leoshkevich Subject: [PULL 39/46] hw/s390x/css-bridge: Realize sysbus device before accessing it Date: Thu, 19 Oct 2023 23:18:04 +0200 Message-ID: <20231019211814.30576-40-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org qbus_new() should not be called on unrealized device. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Message-Id: <20231019071611.98885-10-philmd@linaro.org> --- hw/s390x/css-bridge.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/s390x/css-bridge.c b/hw/s390x/css-bridge.c index 4017081d49..15d26efc95 100644 --- a/hw/s390x/css-bridge.c +++ b/hw/s390x/css-bridge.c @@ -95,7 +95,6 @@ static const TypeInfo virtual_css_bus_info = { VirtualCssBus *virtual_css_bus_init(void) { - VirtualCssBus *cbus; BusState *bus; DeviceState *dev; @@ -103,19 +102,19 @@ VirtualCssBus *virtual_css_bus_init(void) dev = qdev_new(TYPE_VIRTUAL_CSS_BRIDGE); object_property_add_child(qdev_get_machine(), TYPE_VIRTUAL_CSS_BRIDGE, OBJECT(dev)); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Create bus on bridge device */ bus = qbus_new(TYPE_VIRTUAL_CSS_BUS, dev, "virtual-css"); - cbus = VIRTUAL_CSS_BUS(bus); /* Enable hotplugging */ qbus_set_hotplug_handler(bus, OBJECT(dev)); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + css_register_io_adapters(CSS_IO_ADAPTER_VIRTIO, true, false, 0, &error_abort); - return cbus; + return VIRTUAL_CSS_BUS(bus); } /***************** Virtual-css Bus Bridge Device ********************/ From patchwork Thu Oct 19 21:18:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735641 Delivered-To: patch@linaro.org Received: by 2002:adf:cf01:0:b0:32c:eacc:7fa with SMTP id o1csp1750496wrj; Thu, 19 Oct 2023 14:27:46 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFH7HziF/HqHvEJmgFuYyi6JDfXCsunyGfz4tVlionPaX78h4c3rM15EqLJBnAv0O0nkmZH X-Received: by 2002:a05:620a:4050:b0:777:73d3:1f55 with SMTP id i16-20020a05620a405000b0077773d31f55mr4091839qko.6.1697750866086; Thu, 19 Oct 2023 14:27:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750866; cv=none; d=google.com; s=arc-20160816; b=uYO5fqxCnpjT5CtxpBiIhPQgMLa2+C8944OL/plIDV1lkScH8VqtWBdUox14o5eWpn KZy+IdTcc/aWynoNbLBvQ3DY1u6Pdco3XBt47c64zAauB1bm5+1BvxSm75IKlmJo9Nq3 ZRTNbGxTyxF4pa6MDxM7YdONg9Gp4FvpLNnyz/wGTLzD9BX8Wf/ErfL6kH2Br8X6fZ+F rM9mwOqz4qT7NSOS1nRpxdAoCh85JWwkHbKBxh7qTZr5Jo6Gx9yOZKicDsKkG48xpaaz aNK2rmA97gb3gPOkZMNAcQeSFe1TiPdf3s7scQ+6h0AxX2rAv2W5yBjUWJXMSpYDfYOR L0nA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=lLXDjIaupUgxBWcovEKwWLwxqxZJkA8MyfX0vWTG4sA=; fh=BkeVh2ZoOUivqTXz/LJJ+iU6gkF7ecRTByI6XgWob40=; b=KNiUQHy1TQ7uLhXCySjx7XNjlLLoutPriEHmXgObGpA2VJWZ4LeBRqxDZGR1ErG0H5 dmbGGTmnhh60OlFiJ4sjnQB1C+fOxFFZDGAS1No9QRl1Nq0RbRwD+O+tY+LhUZD2O2rF BrJZmuwd6IgUas3yvkhhAnSeUsKp0f3u9R4qdngvxixe8w+NU3AP91GTM5WhWaJ791J5 WsBtfQKPeaM4JQhIopd5oyQgyuMVto6muoh88nsZt86zpkBqn+SL/+ELeeoOFn7XN4Qm g7LSNRQyxkMfXQgedwJBV5gbF1wtes5/1d6xN4679eD402PXlFbwgo6bFKtvgHWnGaAu Hzxw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=W8U7RJuT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id j13-20020a5d452d000000b0032d8eecf901sm233470wra.3.2023.10.19.14.22.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:22:44 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S . Tsirkin" , Manos Pitsidianakis Subject: [PULL 40/46] hw/virtio/virtio-pmem: Replace impossible check by assertion Date: Thu, 19 Oct 2023 23:18:05 +0200 Message-ID: <20231019211814.30576-41-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The get_memory_region() handler is used when (un)plugging the device, which can only occur *after* it is realized. virtio_pmem_realize() ensure the instance can not be realized without 'memdev'. Remove the superfluous check, replacing it by an assertion. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Reviewed-by: Manos Pitsidianakis Message-Id: <20231017140150.44995-2-philmd@linaro.org> --- hw/virtio/virtio-pmem.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/hw/virtio/virtio-pmem.c b/hw/virtio/virtio-pmem.c index c3512c2dae..cc24812d2e 100644 --- a/hw/virtio/virtio-pmem.c +++ b/hw/virtio/virtio-pmem.c @@ -147,10 +147,7 @@ static void virtio_pmem_fill_device_info(const VirtIOPMEM *pmem, static MemoryRegion *virtio_pmem_get_memory_region(VirtIOPMEM *pmem, Error **errp) { - if (!pmem->memdev) { - error_setg(errp, "'%s' property must be set", VIRTIO_PMEM_MEMDEV_PROP); - return NULL; - } + assert(pmem->memdev); return &pmem->memdev->mr; } From patchwork Thu Oct 19 21:18:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735630 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1732063wro; Thu, 19 Oct 2023 14:26:21 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEs7Cm8NPB75gQuHudX2Mbub+iOfDSAhfJvG8MPxhAwWAv1OxlCTF0uJbwmdhlBBrXN40PD X-Received: by 2002:a05:6214:29e5:b0:647:406b:4b06 with SMTP id jv5-20020a05621429e500b00647406b4b06mr70183qvb.57.1697750781628; Thu, 19 Oct 2023 14:26:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750781; cv=none; d=google.com; s=arc-20160816; b=V6R2r6Mfav+cehiEH5sHZ0Mh8/0XtBVYqDQfKY7WOQLX02OIvAz1GnIyUCdPVF0RxP vdRQW2Qv/coFjMlfHl2AVdknj739PEt6UnGa2nXl2WhkZAK2m9g0t4S901M5f8tUX9CZ OtbWeWRteTqZbgdqP+NrTgrtnT+sdUswJ9C8Fc21jIUWCT5gUqkSdDXAgADZ5Ow+nslM 7JG7Z7pzNMY47CCnwfOpfszTwjM0SbDqRBYPpirqkR7QIJ7qixFeDYpCh0JwNMtjdA4D EnKee/qVVHdZAfkC3kLQRIuBVTfJWHMJuuWRkBb90ntR65bSfXm8j1zsGhbZZmI3JDL7 tUEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=EAIq9fwE+HBUXOdrKkuK6NI9pJuWSCDleAybIfCpGM4=; fh=PURj5iNFTT2Ys+ENrL2QLsGUVEWEE2wiUjVhZOrMPtg=; b=mB2xXKv8yxwiOr3S4B/U9KI4hXgS3VW+7XkDMvvNyvPwxUs/XLVKHf87wNa9iL9VQN 5ayq/UmGfWODskcM79SIfpvtg/irsMKtZMsjrhokSbO5Gl/hhnuymvnFfUAHO6r6yfeC gEL4Tk25DXwnZ2EVC7A18SjFJqImV2oBbeZg+Rs9SuNnP0y9PiTNYCCrwaSLA+hyieGZ LFoHXGLTWLt2XNrvsYyphnVYycv4Zqe/aSuRsxPjgBZkQAj++bff8eQwvNrfXvUCf+KD p3Q41oJlHHDHxd/FwYd+47daQh2JoEkYKKHeGT9GYB2xrxMutaSF9lEjmXquyMzJIx/5 BsOQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PSuRZZvt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id b12-20020a05600c150c00b0040586360a36sm5254311wmg.17.2023.10.19.14.22.49 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:22:51 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , Mark Cave-Ayland , Raphael Norwitz , "Michael S. Tsirkin" , Kevin Wolf , Hanna Reitz Subject: [PULL 41/46] hw/block/vhost-user-blk: Use DEVICE() / VIRTIO_DEVICE() macros Date: Thu, 19 Oct 2023 23:18:06 +0200 Message-ID: <20231019211814.30576-42-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::233; envelope-from=philmd@linaro.org; helo=mail-lj1-x233.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Access QOM parent with the proper QOM [VIRTIO_]DEVICE() macros. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Mark Cave-Ayland Message-Id: <20231017140150.44995-3-philmd@linaro.org> --- hw/block/vhost-user-blk.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/block/vhost-user-blk.c b/hw/block/vhost-user-blk.c index eecf3f7a81..4b37e26120 100644 --- a/hw/block/vhost-user-blk.c +++ b/hw/block/vhost-user-blk.c @@ -405,7 +405,7 @@ static void vhost_user_blk_event(void *opaque, QEMUChrEvent event) static int vhost_user_blk_realize_connect(VHostUserBlk *s, Error **errp) { - DeviceState *dev = &s->parent_obj.parent_obj; + DeviceState *dev = DEVICE(s); int ret; s->connected = false; @@ -423,7 +423,7 @@ static int vhost_user_blk_realize_connect(VHostUserBlk *s, Error **errp) assert(s->connected); ret = vhost_dev_get_config(&s->dev, (uint8_t *)&s->blkcfg, - s->parent_obj.config_len, errp); + VIRTIO_DEVICE(s)->config_len, errp); if (ret < 0) { qemu_chr_fe_disconnect(&s->chardev); vhost_dev_cleanup(&s->dev); From patchwork Thu Oct 19 21:18:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735629 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1731863wro; Thu, 19 Oct 2023 14:25:45 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEpw8p0qhXfX61O0xdxfjpMe2n2B7LooV54TewswdEtooqaqLJonxv11x17GCAd5b0jV9+B X-Received: by 2002:a05:6808:a86:b0:3a8:432a:ea13 with SMTP id q6-20020a0568080a8600b003a8432aea13mr5300oij.46.1697750745427; Thu, 19 Oct 2023 14:25:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750745; cv=none; d=google.com; s=arc-20160816; b=sYWHOTi/lJRrjiA2t3VfpcPL5QAqv55My63CD82K5ie+HtKWCW9DXQoNPBXCrQFUWP pMEzt5Uaae4PhtFPxXlh9ha4nQYy5njeu+9gtJTyFXWvBgTs8cFmYTx1KxKGA1DhLaM+ tgSAdGcyY5G8rUEQIWjDzNWGAXtUP/0x2hk/nZQlt17n3SOnI67g2g8woBehaGnqWT2G hbs+1OUy3wWMQPRKK9QdJqzcnHSBpjCmj97OBVRaIJ/hXLDs94dQiSc8Iq8sxU/IKDCO /ftrRWaIiCwjAf0b0hZWRYWIfouwlzdk+hzlytyMV5io5g78iKgRMBYDRGOMWw/SUDPB I/Mw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Nv3oXKxb944zUzl3WXXH7IJvjD+TPF87yEqv4BjuzRw=; fh=xpOvQqV4QvwdzK3O+/SB3uc42SM/PHqvazLR3cdZTdE=; b=U1oS7W91WBLOmHByCfAJ8AgvNmdG7PxX4uVXIGd/foL63RNb1barZpIQjxi8n5Iopa bITPtmaB9yiKUNF4Y0FLVWfo2RrgRUQkD2MdcUFyc6EwxSWjZg4Rm3jACaFWrFyFr0lc HoRt6QXRFaBrfuNhD3iDuZHGhAxfLNjBSV/mRqN0pZmluStY4sKcZfEg689Jv0XueMFY CMwRJZqiOHqdAdATd4wDvkDUktolfS7dhbdvnLbr26oreLvIlE3vD7CGVaVkALynAO+3 lvXXjaWMYx/bfgqixStt6ZRRmME5I80QPsCjTbCblOmT4CS1zjALBz1yY3Mv8YSJOaZ1 HfQA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BeRAsNlf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id j6-20020a05600c488600b004080f0376a0sm497964wmp.42.2023.10.19.14.22.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:22:57 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S . Tsirkin" , Manos Pitsidianakis , Mark Cave-Ayland , Gerd Hoffmann Subject: [PULL 42/46] hw/display/virtio-gpu: Use VIRTIO_DEVICE() macro Date: Thu, 19 Oct 2023 23:18:07 +0200 Message-ID: <20231019211814.30576-43-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::229; envelope-from=philmd@linaro.org; helo=mail-lj1-x229.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Access QOM parent with the proper QOM VIRTIO_DEVICE() macro. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Reviewed-by: Manos Pitsidianakis Reviewed-by: Mark Cave-Ayland Message-Id: <20231017140150.44995-4-philmd@linaro.org> --- hw/display/virtio-gpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 6efd15b6ae..4265316cbb 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1128,7 +1128,7 @@ static void virtio_gpu_ctrl_bh(void *opaque) VirtIOGPU *g = opaque; VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g); - vgc->handle_ctrl(&g->parent_obj.parent_obj, g->ctrl_vq); + vgc->handle_ctrl(VIRTIO_DEVICE(g), g->ctrl_vq); } static void virtio_gpu_handle_cursor(VirtIODevice *vdev, VirtQueue *vq) From patchwork Thu Oct 19 21:18:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735633 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1732192wro; Thu, 19 Oct 2023 14:26:45 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE0LqIgPVSymnGAQQEDyJhH54eLs4JFGPxBIGsg8rCQGPysD0elS3bSJkXBvwPzZQ2kOu3m X-Received: by 2002:a05:6214:c25:b0:65b:2660:f58b with SMTP id a5-20020a0562140c2500b0065b2660f58bmr84107qvd.12.1697750805271; Thu, 19 Oct 2023 14:26:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750805; cv=none; d=google.com; s=arc-20160816; b=GRY813MEUAdJalgSsn6Imfgo9sLMbv/v5WmdzENFBm6jXZYA+stbjCHqGzBOEubCHN qPr+c1ErmtZ8hwDqpTXVwiLLE29DLlC/7URRuyXeFEzdA/t4SYAlR5ar/fcD3TqO2zAT yCjjPj5CePUZ1IMkkk5BNorNds4JFspHMEL894/TWnrPRG6pCfGSZRpCFfBUCchgNcYH x3b1GRjk0v5yRRmq9M2Rgovy2zvGKKXNgJ8gH71Qpn4k5rs+wmw4kw3Xdq1oKqdlgtf+ Qvktt2089xyBTIQLE+DZ12f4cjIHKJYIeyuWAVD7AGfemok6GlxDumZ50Rly4dpgT4UO KWDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=uPCUA2oPZ2wdqytvwya118q0tpbF9WOJR99LmJrLuIo=; fh=6LDSn8tOctq2kJKzBiR4RrCDKZ5BeHk+sXTCVi8lj2U=; b=AaZapdGxULPHgiQ3CKLMD+6ttaCpbGpgxlCIHpfETa42sOlEhIY9qV1PYob3+yvitm V+voYDvHl6OWYCudgA9Ow4vaGKjC/zJA3p7R9PeR//DN27a0NCvlFx3iUld909xP03oX RBL/K1OUDbvR7nXqbNe3e/U0CPUe4VEs4WgXeafmhpIsi1EKp+p03qwlUiHUjcYdSgOc XE+J3I6DUSxO3C+KYXaH2KJVgNB6SG5oRzcGALtb32DLSDKKed9E287utld05FG7C1+M XQcABre5206wfIf4MZMqDC3ut3DFxHTc4wi7HvHb6vLZXmGG2z/OBTLvOyw0HLEXZX68 ca5g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JP4C1oN+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id j20-20020a05600c1c1400b004065daba6casm5434839wms.46.2023.10.19.14.23.02 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:23:03 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S . Tsirkin" , Manos Pitsidianakis , Mark Cave-Ayland , Paolo Bonzini , Fam Zheng Subject: [PULL 43/46] hw/scsi/virtio-scsi: Use VIRTIO_SCSI_COMMON() macro Date: Thu, 19 Oct 2023 23:18:08 +0200 Message-ID: <20231019211814.30576-44-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::234; envelope-from=philmd@linaro.org; helo=mail-lj1-x234.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Access QOM parent with the proper QOM VIRTIO_SCSI_COMMON() macro. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Reviewed-by: Manos Pitsidianakis Reviewed-by: Mark Cave-Ayland Message-Id: <20231017140150.44995-5-philmd@linaro.org> --- hw/scsi/virtio-scsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/scsi/virtio-scsi.c b/hw/scsi/virtio-scsi.c index 45b95ea070..fa53f0902c 100644 --- a/hw/scsi/virtio-scsi.c +++ b/hw/scsi/virtio-scsi.c @@ -761,7 +761,7 @@ static void virtio_scsi_fail_cmd_req(VirtIOSCSIReq *req) static int virtio_scsi_handle_cmd_req_prepare(VirtIOSCSI *s, VirtIOSCSIReq *req) { - VirtIOSCSICommon *vs = &s->parent_obj; + VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(s); SCSIDevice *d; int rc; From patchwork Thu Oct 19 21:18:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735621 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1731355wro; Thu, 19 Oct 2023 14:24:18 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHbe6i4zOChxmmBJcASRQMgcWGzWFQ5F5MCZa2j/dybdlGML/8dr3BQcjACke+3Hv9ghWJM X-Received: by 2002:a9d:73d2:0:b0:6c0:9e24:6eab with SMTP id m18-20020a9d73d2000000b006c09e246eabmr3996925otk.33.1697750658591; Thu, 19 Oct 2023 14:24:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697750658; cv=none; d=google.com; s=arc-20160816; b=X8D+lFwesdnH7ioim8up1f9jzMrVJEG0ZrKuYfxQ7hTJqTW6LsavJB/tZGqN+vJbUP l3ruD4oZbOf+p8vM0kA3I60JtK3mEetkgmj92HdTw2z7SKAs1RXamhFwkpyt0mdYAZRg t/3UTRTXsdxEbCY7DD2KER39Vv30NLX4p0/eAAvGVLgJ84rLCps5ofMLswYJh9ykhEJH 9m3Yhc+FbGNMvCFMkcAi/rBDLg0JSR+pPr+YvSuODxlWB9go/OSi30pbGB0M2Ktv60QW sqvc5f46AyGI5VwJFr7LivgpNkHRCjI9QxNoHRBX38pWEprZ9eC9jO23Kn2nQhIW7nkw 6X3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=e1KVZlIcRQGW0XDbXXS/PkAkK9AJc9io1ITINi4/pEc=; fh=em90avnwZxAZh3y74ofYEsa5+N2lx1xWbpCcLvXEFo0=; b=hvidLMyaLdNlC0nPtrtmFewZzi+/USGEK56W70E9t1RarNKGm06T4oG8tXQJgCSvsl 7VZPV5ya6GzMfCKOe2XsXJxPeTNbXYjSwPxe9FWYosYR2ia8urFBs022QwkrAfaMy/52 BHGNbRi/hpKQ0b6VuhO0ARntct5SQGuRJHz+zN1bcS6xkdO24TUSySqk7XioaKG8MJC+ v7qXyCAspG1aMNMymTG0CQQ58we+Nyh1ByGSwAV7UD5gUGb9RAuL7Xv4KfKcymBE9V1R NcM2o67As7TkgzE7RK7/Hk99VeGm+bWtMnPPjDtS7nVakNRUh+Y4f+TB+xg5ksLE17LG RsKg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PlyfPiR7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id o12-20020a05600c4fcc00b0040775501256sm530184wmq.16.2023.10.19.14.23.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:23:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , "Edgar E. Iglesias" , Alistair Francis , Peter Maydell Subject: [PULL 44/46] hw/dma: Declare link using static DEFINE_PROP_LINK() macro Date: Thu, 19 Oct 2023 23:18:09 +0200 Message-ID: <20231019211814.30576-45-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Declare link statically using DEFINE_PROP_LINK(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland Message-Id: <20231017140150.44995-6-philmd@linaro.org> --- hw/dma/xilinx_axidma.c | 6 ++---- hw/dma/xlnx-zdma.c | 7 ++----- hw/dma/xlnx_csu_dma.c | 13 ++++--------- 3 files changed, 8 insertions(+), 18 deletions(-) diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index 12c90267df..0ae056ed06 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -577,10 +577,6 @@ static void xilinx_axidma_init(Object *obj) object_initialize_child(OBJECT(s), "axistream-control-connected-target", &s->rx_control_dev, TYPE_XILINX_AXI_DMA_CONTROL_STREAM); - object_property_add_link(obj, "dma", TYPE_MEMORY_REGION, - (Object **)&s->dma_mr, - qdev_prop_allow_set_link_before_realize, - OBJ_PROP_LINK_STRONG); sysbus_init_irq(sbd, &s->streams[0].irq); sysbus_init_irq(sbd, &s->streams[1].irq); @@ -596,6 +592,8 @@ static Property axidma_properties[] = { tx_data_dev, TYPE_STREAM_SINK, StreamSink *), DEFINE_PROP_LINK("axistream-control-connected", XilinxAXIDMA, tx_control_dev, TYPE_STREAM_SINK, StreamSink *), + DEFINE_PROP_LINK("dma", XilinxAXIDMA, dma_mr, + TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/dma/xlnx-zdma.c b/hw/dma/xlnx-zdma.c index 4eb7f66e9f..84c0083013 100644 --- a/hw/dma/xlnx-zdma.c +++ b/hw/dma/xlnx-zdma.c @@ -795,11 +795,6 @@ static void zdma_init(Object *obj) TYPE_XLNX_ZDMA, ZDMA_R_MAX * 4); sysbus_init_mmio(sbd, &s->iomem); sysbus_init_irq(sbd, &s->irq_zdma_ch_imr); - - object_property_add_link(obj, "dma", TYPE_MEMORY_REGION, - (Object **)&s->dma_mr, - qdev_prop_allow_set_link_before_realize, - OBJ_PROP_LINK_STRONG); } static const VMStateDescription vmstate_zdma = { @@ -817,6 +812,8 @@ static const VMStateDescription vmstate_zdma = { static Property zdma_props[] = { DEFINE_PROP_UINT32("bus-width", XlnxZDMA, cfg.bus_width, 64), + DEFINE_PROP_LINK("dma", XlnxZDMA, dma_mr, + TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/dma/xlnx_csu_dma.c b/hw/dma/xlnx_csu_dma.c index 88002698a1..e89089821a 100644 --- a/hw/dma/xlnx_csu_dma.c +++ b/hw/dma/xlnx_csu_dma.c @@ -702,6 +702,10 @@ static Property xlnx_csu_dma_properties[] = { * which channel the device is connected to. */ DEFINE_PROP_BOOL("is-dst", XlnxCSUDMA, is_dst, true), + DEFINE_PROP_LINK("stream-connected-dma", XlnxCSUDMA, tx_dev, + TYPE_STREAM_SINK, StreamSink *), + DEFINE_PROP_LINK("dma", XlnxCSUDMA, dma_mr, + TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_END_OF_LIST(), }; @@ -728,15 +732,6 @@ static void xlnx_csu_dma_init(Object *obj) memory_region_init(&s->iomem, obj, TYPE_XLNX_CSU_DMA, XLNX_CSU_DMA_R_MAX * 4); - - object_property_add_link(obj, "stream-connected-dma", TYPE_STREAM_SINK, - (Object **)&s->tx_dev, - qdev_prop_allow_set_link_before_realize, - OBJ_PROP_LINK_STRONG); - object_property_add_link(obj, "dma", TYPE_MEMORY_REGION, - (Object **)&s->dma_mr, - qdev_prop_allow_set_link_before_realize, - OBJ_PROP_LINK_STRONG); } static const TypeInfo xlnx_csu_dma_info = { From patchwork Thu Oct 19 21:18:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735639 Delivered-To: patch@linaro.org Received: by 2002:adf:cf01:0:b0:32c:eacc:7fa with SMTP id o1csp1750410wrj; Thu, 19 Oct 2023 14:27:32 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF/apMTjsCW4g2LVqSNyz7g9otH31he1xxx6bfjfJobj0mwTgdYlaYA5zwTg0PhjqjSUwgK X-Received: by 2002:a67:ef50:0:b0:457:a003:2d26 with SMTP id k16-20020a67ef50000000b00457a0032d26mr188549vsr.32.1697750851862; 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id o12-20020a05600c4fcc00b0040775501256sm530314wmq.16.2023.10.19.14.23.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 14:23:15 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , "Edgar E. Iglesias" , Alistair Francis , Peter Maydell , Jason Wang Subject: [PULL 45/46] hw/net: Declare link using static DEFINE_PROP_LINK() macro Date: Thu, 19 Oct 2023 23:18:10 +0200 Message-ID: <20231019211814.30576-46-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019211814.30576-1-philmd@linaro.org> References: <20231019211814.30576-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Declare link statically using DEFINE_PROP_LINK(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland Message-Id: <20231017140150.44995-7-philmd@linaro.org> --- hw/net/cadence_gem.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index f445d8bb5e..37e209cda6 100644 --- a/hw/net/cadence_gem.c +++ b/hw/net/cadence_gem.c @@ -1654,11 +1654,6 @@ static void gem_init(Object *obj) "enet", sizeof(s->regs)); sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem); - - object_property_add_link(obj, "dma", TYPE_MEMORY_REGION, - (Object **)&s->dma_mr, - qdev_prop_allow_set_link_before_realize, - OBJ_PROP_LINK_STRONG); } static const VMStateDescription vmstate_cadence_gem = { @@ -1691,6 +1686,8 @@ static Property gem_properties[] = { num_type2_screeners, 4), DEFINE_PROP_UINT16("jumbo-max-len", CadenceGEMState, jumbo_max_len, 10240), + DEFINE_PROP_LINK("dma", CadenceGEMState, dma_mr, + TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_END_OF_LIST(), };