From patchwork Thu Aug 8 21:22:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 170845 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp9115629ile; Thu, 8 Aug 2019 14:25:26 -0700 (PDT) X-Google-Smtp-Source: APXvYqwSE2hNjiZ5R35C3z/t/Z7Ii6jpBrlANmyD8ExaCXUbIRkHMfuwbLHyCJiskNfCPE7TH7A0 X-Received: by 2002:a17:902:3363:: with SMTP id a90mr14972876plc.119.1565299525876; Thu, 08 Aug 2019 14:25:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565299525; cv=none; d=google.com; s=arc-20160816; b=rSMiAGvMqvNb7v4KWKIQC+U5hI5pvCX0hqLjNrdcwfBWcnMU7w4IYGd29BG6/4AbFb D5dV2wpDWgUzn+PXKmkuU+5S6w41weNIQz/DA3sh1ioarYKis+V45HgBDSYyuMqoMBEo 9SSPVg45hbzDVJIdHcgx3XvxGZWB8UYbtx8fPJlAAP5jeEIyhHiagr3wI5TAdPtmdK8y FfIODRPqIDXGyFJB6Ov7/HxYnOZsGi4AUt3zZCob8+U3h2kXIQIv4K2la5c/zW5rdS7j JEYQhuooSE7XUotALNrjE83drr7CAD5nZ8pzc1l7Ja5gsECCQ4RPIOpSwvYZPiFCR8x9 i0Pw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=x7qo6K/gQ3oC6p2eakgZ63VAku/emaSrywGwhbfeimw=; b=LH/j1GGpC9CNqcVHOlA0/G6sqj1oCcqNjHe5UoCfDSUJJ56erY5eDEqeFvZ98RWayA gM0qsHBPOsflSlA2H/xhVYaFrnUz6ESLcSET5Th/RjIXDvSOPkjQcizCuUdgLgOT0q0s Sh3InYVMsIWs1V2jSsrrSEuTePOLKPiDxF74PAY2ZFndVIesah/UFNcgFuS1LdVNYnJh x2eFVfNeWmU0kmfmovEyCFinxbX4pGLjsDo/7Pyi+9+9HA5JW7uKpI2EB3pf4s3qFjdV tbuPe7pk3zk2JxdhKYPDHRu9P80GJuUDEQiNn1UbVGHAc1uOnEoChX9qG9RHbuXNvPgY BERw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t5si53911279pgr.172.2019.08.08.14.25.25; Thu, 08 Aug 2019 14:25:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404065AbfHHVZY (ORCPT + 28 others); Thu, 8 Aug 2019 17:25:24 -0400 Received: from mout.kundenserver.de ([212.227.126.135]:52775 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732327AbfHHVZY (ORCPT ); Thu, 8 Aug 2019 17:25:24 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1MFb38-1i6JUE4714-00HBDf; Thu, 08 Aug 2019 23:25:05 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Alan Stern , Greg Kroah-Hartman Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , Russell King , linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Subject: [PATCH 03/22] ARM: omap1: move omap15xx local bus handling to usb.c Date: Thu, 8 Aug 2019 23:22:12 +0200 Message-Id: <20190808212234.2213262-4-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:rmObN8c4em3z6MADtDn1dH5ygzXHXH23QHeCylcVTnOlhY+ZPCt 9JTDbQhYBjlZCOji0YTVOOiNozPUOmVyu5bSGp5FjvGiqwdn2EjM1DB7Lvl9z8kzYoi0GIi sAsiPqAf3BGfCbkvHO6Xq9hcge9WjUUn9Wt6WXok8Z/6R6Ij7XkWeZ7NqDBuuQY0FACvFTq mg1JUQO8HGF+l4UgCpwXA== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:mbk8i9bIm40=:m8WNxBYOf+mHNwotPmsJTT bVT0EiIA51AJzcxHr109cLxi1Hz3cezAl8cww4l+fLfdIxu0AJbeUwvkcsyMSRLV+7u0DxlT0 WIM+cSIqflSXl2MdNK5ga13JeFyevwSJdBTJhZzgtRnZoFco5BVGrDZ2+XU/IJcyjP9IG1AW6 Gq7FRGvHhl5EezehOB1IwI1flNqBP1EJPQpfG0/xt4XhWm/t47YhuqA7Rw+PnPPWvsDHUtBH9 dW5xi+BdytYUnjMVpM/N5SqgWZH23xzUVLM7OuQwHp2vjgR9yMSSDDqGfHwCs28yUQiSLF2BA KXcneZ5opCMNRhjEA+ix48uERHEvH2AZb8OarN6qcej78qRNV5i+U+NoALIRntHrhdA0ShLbR CXYJv4g1K+WQlC9YjRgYT7+QlqokNLPoDwsvVEC1d9214PTZ2Bdau5CpdoXL6M4E63mIxC8R0 yenYakopWppiLWGUqPkx7zUQl/JvEMFYnNZuEMDTG9e+0zkCmVu47yyGJadhMhqSWKUbujafH ZrhlTJAfXtkDhNOmE3aa3ZnmPBfrDzp8/5+yVa2ZKR1mbpZ7OC9Gs5ZKSgPwyQ3XLuuV9aW9h Yvp6kZKzYG5aXKHwoPyBCwPArFNnSjStculNF2U0V1OSSIgY5ESRZzIcdYVnjSbtXxFF6FY1l NQUXU2k7WC1F1Or6Ld7HspeYxGz4i7VUKdyNSbtqKPgE1JwsHijsg2tidql05vVd/mR/kXV2O fkdq1gvHPb21UOw6JDQwRGwEp6o2qIckoxnloQ== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The mach/memory.h file only exists to implement a dma offset for "Local Bus" devices, and that consists of the OHCI USB controller for practical purposes. The generic dma-mapping interface has gained this exact feature some years ago and can do it much more efficiently, so replace the complex __arch_virt_to_dma/__arch_dma_to_pfn/... logic with a much simpler boot time initialization. This should also make any code that performs dma mapping calls at runtime much more efficient, by eliminating the strcmp() along with the computation. Similar, a portion of the ohci-omap driver is just there for configuring the memory translation, this too can get moved into usb.c Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/include/mach/memory.h | 43 ----------- arch/arm/mach-omap1/include/mach/omap1510.h | 1 - arch/arm/mach-omap1/usb.c | 79 +++++++++++++++++++++ drivers/usb/host/ohci-omap.c | 72 +------------------ include/linux/platform_data/usb-omap1.h | 2 + 5 files changed, 83 insertions(+), 114 deletions(-) -- 2.20.0 diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h index 1142560e0078..ba3a350479c8 100644 --- a/arch/arm/mach-omap1/include/mach/memory.h +++ b/arch/arm/mach-omap1/include/mach/memory.h @@ -9,47 +9,4 @@ /* REVISIT: omap1 legacy drivers still rely on this */ #include -/* - * Bus address is physical address, except for OMAP-1510 Local Bus. - * OMAP-1510 bus address is translated into a Local Bus address if the - * OMAP bus type is lbus. We do the address translation based on the - * device overriding the defaults used in the dma-mapping API. - * Note that the is_lbus_device() test is not very efficient on 1510 - * because of the strncmp(). - */ -#if defined(CONFIG_ARCH_OMAP15XX) && !defined(__ASSEMBLER__) - -/* - * OMAP-1510 Local Bus address offset - */ -#define OMAP1510_LB_OFFSET UL(0x30000000) - -#define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) -#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) -#define is_lbus_device(dev) (cpu_is_omap15xx() && dev && (strncmp(dev_name(dev), "ohci", 4) == 0)) - -#define __arch_pfn_to_dma(dev, pfn) \ - ({ dma_addr_t __dma = __pfn_to_phys(pfn); \ - if (is_lbus_device(dev)) \ - __dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \ - __dma; }) - -#define __arch_dma_to_pfn(dev, addr) \ - ({ dma_addr_t __dma = addr; \ - if (is_lbus_device(dev)) \ - __dma += PHYS_OFFSET - OMAP1510_LB_OFFSET; \ - __phys_to_pfn(__dma); \ - }) - -#define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \ - lbus_to_virt(addr) : \ - __phys_to_virt(addr)); }) - -#define __arch_virt_to_dma(dev, addr) ({ unsigned long __addr = (unsigned long)(addr); \ - (dma_addr_t) (is_lbus_device(dev) ? \ - virt_to_lbus(__addr) : \ - __virt_to_phys(__addr)); }) - -#endif /* CONFIG_ARCH_OMAP15XX */ - #endif diff --git a/arch/arm/mach-omap1/include/mach/omap1510.h b/arch/arm/mach-omap1/include/mach/omap1510.h index 3d235244bf5c..7af9c0c7c5ab 100644 --- a/arch/arm/mach-omap1/include/mach/omap1510.h +++ b/arch/arm/mach-omap1/include/mach/omap1510.h @@ -159,4 +159,3 @@ #define OMAP1510_INT_FPGA23 (OMAP_FPGA_IRQ_BASE + 23) #endif /* __ASM_ARCH_OMAP15XX_H */ - diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c index d8e9bbda8f7b..740c876ae46b 100644 --- a/arch/arm/mach-omap1/usb.c +++ b/arch/arm/mach-omap1/usb.c @@ -10,6 +10,7 @@ #include #include #include +#include #include @@ -127,6 +128,7 @@ omap_otg_init(struct omap_usb_config *config) syscon &= ~HST_IDLE_EN; ohci_device->dev.platform_data = config; + status = platform_device_register(ohci_device); if (status) pr_debug("can't register OHCI device, %d\n", status); @@ -533,6 +535,80 @@ static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup) } #ifdef CONFIG_ARCH_OMAP15XX +/* OMAP-1510 OHCI has its own MMU for DMA */ +#define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */ +#define OMAP1510_LB_CLOCK_DIV 0xfffec10c +#define OMAP1510_LB_MMU_CTL 0xfffec208 +#define OMAP1510_LB_MMU_LCK 0xfffec224 +#define OMAP1510_LB_MMU_LD_TLB 0xfffec228 +#define OMAP1510_LB_MMU_CAM_H 0xfffec22c +#define OMAP1510_LB_MMU_CAM_L 0xfffec230 +#define OMAP1510_LB_MMU_RAM_H 0xfffec234 +#define OMAP1510_LB_MMU_RAM_L 0xfffec238 + +/* + * Bus address is physical address, except for OMAP-1510 Local Bus. + * OMAP-1510 bus address is translated into a Local Bus address if the + * OMAP bus type is lbus. + */ +#define OMAP1510_LB_OFFSET UL(0x30000000) +#define OMAP1510_LB_DMA_PFN_OFFSET ((OMAP1510_LB_OFFSET - PAGE_OFFSET) >> PAGE_SHIFT) + +/* + * OMAP-1510 specific Local Bus clock on/off + */ +static int omap_1510_local_bus_power(int on) +{ + if (on) { + omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL); + udelay(200); + } else { + omap_writel(0, OMAP1510_LB_MMU_CTL); + } + + return 0; +} + +/* + * OMAP-1510 specific Local Bus initialization + * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE. + * See also arch/mach-omap/memory.h for __virt_to_dma() and + * __dma_to_virt() which need to match with the physical + * Local Bus address below. + */ +static int omap_1510_local_bus_init(void) +{ + unsigned int tlb; + unsigned long lbaddr, physaddr; + + omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4, + OMAP1510_LB_CLOCK_DIV); + + /* Configure the Local Bus MMU table */ + for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) { + lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET; + physaddr = tlb * 0x00100000 + PHYS_OFFSET; + omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H); + omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc, + OMAP1510_LB_MMU_CAM_L); + omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H); + omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L); + omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK); + omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB); + } + + /* Enable the walking table */ + omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL); + udelay(200); + + return 0; +} + +static void omap_1510_local_bus_reset(void) +{ + omap_1510_local_bus_power(1); + omap_1510_local_bus_init(); +} /* ULPD_DPLL_CTRL */ #define DPLL_IOB (1 << 13) @@ -601,11 +677,14 @@ static void __init omap_1510_usb_init(struct omap_usb_config *config) int status; ohci_device.dev.platform_data = config; + ohci_device.dev.dma_pfn_offset = OMAP1510_LB_DMA_PFN_OFFSET; status = platform_device_register(&ohci_device); if (status) pr_debug("can't register OHCI device, %d\n", status); /* hcd explicitly gates 48MHz */ } + + config->lb_reset = omap_1510_local_bus_reset; #endif } diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c index d8d35d456456..f7efe65f01c5 100644 --- a/drivers/usb/host/ohci-omap.c +++ b/drivers/usb/host/ohci-omap.c @@ -40,17 +40,6 @@ #include -/* OMAP-1510 OHCI has its own MMU for DMA */ -#define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */ -#define OMAP1510_LB_CLOCK_DIV 0xfffec10c -#define OMAP1510_LB_MMU_CTL 0xfffec208 -#define OMAP1510_LB_MMU_LCK 0xfffec224 -#define OMAP1510_LB_MMU_LD_TLB 0xfffec228 -#define OMAP1510_LB_MMU_CAM_H 0xfffec22c -#define OMAP1510_LB_MMU_CAM_L 0xfffec230 -#define OMAP1510_LB_MMU_RAM_H 0xfffec234 -#define OMAP1510_LB_MMU_RAM_L 0xfffec238 - #define DRIVER_DESC "OHCI OMAP driver" #ifdef CONFIG_TPS65010 @@ -113,61 +102,6 @@ static int omap_ohci_transceiver_power(int on) return 0; } -#ifdef CONFIG_ARCH_OMAP15XX -/* - * OMAP-1510 specific Local Bus clock on/off - */ -static int omap_1510_local_bus_power(int on) -{ - if (on) { - omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL); - udelay(200); - } else { - omap_writel(0, OMAP1510_LB_MMU_CTL); - } - - return 0; -} - -/* - * OMAP-1510 specific Local Bus initialization - * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE. - * See also arch/mach-omap/memory.h for __virt_to_dma() and - * __dma_to_virt() which need to match with the physical - * Local Bus address below. - */ -static int omap_1510_local_bus_init(void) -{ - unsigned int tlb; - unsigned long lbaddr, physaddr; - - omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4, - OMAP1510_LB_CLOCK_DIV); - - /* Configure the Local Bus MMU table */ - for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) { - lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET; - physaddr = tlb * 0x00100000 + PHYS_OFFSET; - omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H); - omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc, - OMAP1510_LB_MMU_CAM_L); - omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H); - omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L); - omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK); - omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB); - } - - /* Enable the walking table */ - omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL); - udelay(200); - - return 0; -} -#else -#define omap_1510_local_bus_power(x) {} -#define omap_1510_local_bus_init() {} -#endif - #ifdef CONFIG_USB_OTG static void start_hnp(struct ohci_hcd *ohci) @@ -237,10 +171,8 @@ static int ohci_omap_reset(struct usb_hcd *hcd) omap_ohci_clock_power(1); - if (cpu_is_omap15xx()) { - omap_1510_local_bus_power(1); - omap_1510_local_bus_init(); - } + if (config->lb_reset) + config->lb_reset(); ret = ohci_setup(hcd); if (ret < 0) diff --git a/include/linux/platform_data/usb-omap1.h b/include/linux/platform_data/usb-omap1.h index 43b5ce139c37..878e572a78bf 100644 --- a/include/linux/platform_data/usb-omap1.h +++ b/include/linux/platform_data/usb-omap1.h @@ -48,6 +48,8 @@ struct omap_usb_config { u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup); int (*ocpi_enable)(void); + + void (*lb_reset)(void); }; #endif /* __LINUX_USB_OMAP1_H */ From patchwork Thu Aug 8 21:22:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 170846 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp9116212ile; Thu, 8 Aug 2019 14:26:04 -0700 (PDT) X-Google-Smtp-Source: APXvYqypkJVDH+h/MpBCriKUQnh/cDhvoNuH85pVfrEHO+Kxk7B7c6k9nkXLjy0fQg8N5qOadI8c X-Received: by 2002:a63:1749:: with SMTP id 9mr14795784pgx.0.1565299564083; Thu, 08 Aug 2019 14:26:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565299564; cv=none; d=google.com; s=arc-20160816; b=vtKmV26fTmPx+Ehsu5t1gK6kvE1stF0GPsIfmGH08seO70FfeE8kK2e8CFFqaHzZk7 R3vc4sH0PWnH5PtmZoyKrZTHRXPRZuO6LTUuI6WNcBpILVdMEcvOQqIcz3ZwsZm2ZaL/ l2cCT1OnGL+aEXlmzRN3Su99f+C/FQDM5j3KMlfvUQrpqpaXpTJr3OXaiMn9oKQrdSgR OC0shdLIogRurIo5nMe13uczH8gzUMgcTJqqs/HEtCG4Yop0YAdwf8WD0XsNRTgOSoT2 HnwKYGMXFdkMhccAYqngPqmBUj3vrUP0GR9UX3hA1VKDp1dORNxRlkT5wllz4PsNgOJp 1otw== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id s66si57037900pfs.120.2019.08.08.14.26.03; Thu, 08 Aug 2019 14:26:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404223AbfHHV0C (ORCPT + 28 others); Thu, 8 Aug 2019 17:26:02 -0400 Received: from mout.kundenserver.de ([212.227.126.130]:55247 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732327AbfHHV0C (ORCPT ); Thu, 8 Aug 2019 17:26:02 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1Mw9oq-1iCGs209Ey-00s26z; Thu, 08 Aug 2019 23:25:38 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Alan Stern , Greg Kroah-Hartman Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Subject: [PATCH 04/22] ARM: omap1: move ohci phy power handling to board files Date: Thu, 8 Aug 2019 23:22:13 +0200 Message-Id: <20190808212234.2213262-5-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:JOVFoCl4IruBbAq2/W1OlJMnj12jnk0BHfRQXLRVUPvFZ/BkWjI uD870aw7Nu4aFsXKVZbyOS2BCbOqI07ZhFAWvSwi4NG4uZ1+QamwJP0M6iA8Jg5QY+yKiJ9 FFGQEDAlfr7xfXu1qdu6NG5x3iX8cZp+MSbat54QEbZgActZKFxkdfnbAn/mrCp0j7TFIgV ut/HF1/KnWdMc3jRtw0bQ== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:Jn6kNrwoVF4=:pCDRiVB9Isdg8kO0ofwjp2 soKcsJ+YtWwpsoePvFK1hEhCFfG56WIGFwrUfTlQeOfHiZdg9FMCwe4dEEmrZFIfWtSXwLYZc WumvnzBi1xjf75bSlL4sAxaGa8HwBy8H53910AwuWPrsax6RHBLYdxL1ptcCd+w7ba1HxGvsA 5nxXrpTUYNKeo7ZiW09lDNQpFPGgWbpr/AQMvPAl14ocFTTgKL1XPramCztSH2CB/LtyGesCZ 7Osuk84eDaQ4mK4VJJq1wnJLZRSp7Z8hrK0RuzIuCq68iyJO94QOdfX6EG+QzmQrj0L9LlAkO nKQ3ikWxui4qBk+L1m/LM5NDm5YI2hAAZsSjO2PGCyBa6UFAW4z438Db0iETqhFul4zdi2tdG EfAniHmbEJwIMUZVz/4ECg2KqpPdfYkadSr82eHYTup/SM9skbd1b5cY6Icz7GIXwOXrx8tIy 2qRpX8J25iLXTVN+N5Dk0v4UQ8AOYJSf9qi1afc4IMCNeVbMRHw4ZXxCEM9lMI2tDHEKJD18d /THATWQ/ZJNHp0TAk7HNXwum++xETK3EoAtWNonxczmYFVpM//uB2LZe6u3VzyByA3r2essjt pPhcw9L1rBZmthSiIfGfGqcPOC+CvOd0vCVB01+3BYD/xjzOB3KeCLnWlVZ+UqKaTePFFi+Hv 80npCWaPfK8bSnEF5dgXWnwbLLKVbzfDiwaM2dGp/f5xKmLD16Ma/iO7L25I4r5xxQa/Icebm 4Bx5L+EzhOBSXP8MutPHKlSKQDG63P9nKXRO2A== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Two boards require a a special handler to control their transceiver power. Move the corresponding code into the board files and out of the common code. The osk board already has a dependency on TPS65010, this adds another one, with the same hack to get it to compile with CONFIG_TPS65010=m. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/board-innovator.c | 19 +++++++++++++++++ arch/arm/mach-omap1/board-osk.c | 19 +++++++++++++++++ drivers/usb/host/ohci-omap.c | 28 ++----------------------- include/linux/platform_data/usb-omap1.h | 2 ++ 4 files changed, 42 insertions(+), 26 deletions(-) -- 2.20.0 diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 2425f1bacb33..653af63320a8 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -290,6 +290,23 @@ static void __init innovator_init_smc91x(void) } #ifdef CONFIG_ARCH_OMAP15XX +/* + * Board specific gang-switched transceiver power on/off. + */ +static int innovator_omap_ohci_transceiver_power(int on) +{ + if (on) + __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) + | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), + INNOVATOR_FPGA_CAM_USB_CONTROL); + else + __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) + & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), + INNOVATOR_FPGA_CAM_USB_CONTROL); + + return 0; +} + static struct omap_usb_config innovator1510_usb_config __initdata = { /* for bundled non-standard host and peripheral cables */ .hmc_mode = 4, @@ -300,6 +317,8 @@ static struct omap_usb_config innovator1510_usb_config __initdata = { .register_dev = 1, .pins[0] = 2, + + .transceiver_power = innovator_omap_ohci_transceiver_power, }; static const struct omap_lcd_config innovator1510_lcd_config __initconst = { diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 4df15e693b6e..3be7b3b580d3 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -278,6 +278,23 @@ static void __init osk_init_cf(void) irq_set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING); } +/* + * Board specific gang-switched transceiver power on/off. + * NOTE: OSK supplies power from DC, not battery. + */ +static int osk_omap_ohci_transceiver_power(int on) +{ + if (!IS_BUILTIN(CONFIG_TPS65010)) + return -ENXIO; + + if (on) + tps65010_set_gpio_out_value(GPIO1, LOW); + else + tps65010_set_gpio_out_value(GPIO1, HIGH); + + return 0; +} + static struct omap_usb_config osk_usb_config __initdata = { /* has usb host connector (A) ... for development it can also * be used, with a NONSTANDARD gender-bending cable/dongle, as @@ -292,6 +309,8 @@ static struct omap_usb_config osk_usb_config __initdata = { .rwc = 1, #endif .pins[0] = 2, + + .transceiver_power = osk_omap_ohci_transceiver_power, }; #ifdef CONFIG_OMAP_OSK_MISTRAL diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c index f7efe65f01c5..e92ef3231f2c 100644 --- a/drivers/usb/host/ohci-omap.c +++ b/drivers/usb/host/ohci-omap.c @@ -77,31 +77,6 @@ static void omap_ohci_clock_power(int on) } } -/* - * Board specific gang-switched transceiver power on/off. - * NOTE: OSK supplies power from DC, not battery. - */ -static int omap_ohci_transceiver_power(int on) -{ - if (on) { - if (machine_is_omap_innovator() && cpu_is_omap1510()) - __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) - | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), - INNOVATOR_FPGA_CAM_USB_CONTROL); - else if (machine_is_omap_osk()) - tps65010_set_gpio_out_value(GPIO1, LOW); - } else { - if (machine_is_omap_innovator() && cpu_is_omap1510()) - __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) - & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), - INNOVATOR_FPGA_CAM_USB_CONTROL); - else if (machine_is_omap_osk()) - tps65010_set_gpio_out_value(GPIO1, HIGH); - } - - return 0; -} - #ifdef CONFIG_USB_OTG static void start_hnp(struct ohci_hcd *ohci) @@ -213,7 +188,8 @@ static int ohci_omap_reset(struct usb_hcd *hcd) } /* FIXME hub_wq hub requests should manage power switching */ - omap_ohci_transceiver_power(1); + if (config->transceiver_power) + config->transceiver_power(1); /* board init will have already handled HMC and mux setup. * any external transceiver should already be initialized diff --git a/include/linux/platform_data/usb-omap1.h b/include/linux/platform_data/usb-omap1.h index 878e572a78bf..e7b8dc92a269 100644 --- a/include/linux/platform_data/usb-omap1.h +++ b/include/linux/platform_data/usb-omap1.h @@ -50,6 +50,8 @@ struct omap_usb_config { int (*ocpi_enable)(void); void (*lb_reset)(void); + + int (*transceiver_power)(int on); }; #endif /* __LINUX_USB_OMAP1_H */ From patchwork Thu Aug 8 21:22:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 170848 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp9118152ile; Thu, 8 Aug 2019 14:28:23 -0700 (PDT) X-Google-Smtp-Source: APXvYqyZtZGiBCqKBfOQn8MJSL2LBt71vjZoRCVB7Z3KBPcRjZaTQayGe+nBTRDDOfZD/hg8ZSij X-Received: by 2002:a62:f250:: with SMTP id y16mr17675800pfl.50.1565299703851; Thu, 08 Aug 2019 14:28:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565299703; cv=none; d=google.com; s=arc-20160816; b=i/691g4ACMSnX/V8E9z5SCZEt+DPHfC6RQhLYs+u0FamrVop92Iv370NawlAKWCTOx CuxMvY7rrQKn7ySldlGP1empEY2kW2ZLvJJ4NyBlZDwZldeDSIOZyrDQE0VSG7RtQBS8 mj/dOdx6QARvy/+AaDTVg3g3FuRQWUP/L7a3Jzaxe41oxTHGeygT/Dt8v5u2Dhs1Hpju CDp/NZw6C17hT9kYcs7KiA27co25G6Nm3o/or7wJKkTjA4kB85TLCo34uhPwaCY5B3Sn +TleS4uq3xOl4HX1WSYtm3yEK0Pxo7g0kpv4QJzL6GFmgcXgZlHhU0xnLJfH1GdY6vvD 0FwQ== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id s18si48389791plp.128.2019.08.08.14.28.23; Thu, 08 Aug 2019 14:28:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404392AbfHHV2W (ORCPT + 28 others); Thu, 8 Aug 2019 17:28:22 -0400 Received: from mout.kundenserver.de ([212.227.126.131]:44225 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732609AbfHHV2W (ORCPT ); Thu, 8 Aug 2019 17:28:22 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1MFb38-1i6JXW47cE-00HBDf; Thu, 08 Aug 2019 23:28:05 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH 06/22] ARM: omap1: move some headers to include/linux/soc Date: Thu, 8 Aug 2019 23:22:15 +0200 Message-Id: <20190808212234.2213262-7-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:idy6Lea7UmTcnlNgoyrbiJS0Zc9hIIsd5pglu6VTK4FC+iaziM5 Nc1rIHCO8XUywBBgSTYOy22ka2vrty2w4E+3N9N4rx4ncj3X6khdWIngzEI2LfHiwYDkiII TMw40jRvfpPXQqUpKGydTJXa3i4IdGLlXkT78pbmOND5dPyfDvs5Di+8qEgAbZTPNRx86Cg Ypw2o19fyGadsikDFkhgQ== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:CTXJZb33Cbw=:zqaiPZVfWdY+l2xNafnb8c gWlI2SzVJqyhyHQhAkq0kR3nlH+15Ja8anM3jY8FW5/lkrJdEuSgok/5AUQcMPdxVnOmJXHRH R6QPOY+8+ZGPU0Dc+MNbGcqPn0biNAclDq8pq0BKnt4O0cv1C1dyDU7PTB3qGyyiwPqGitg14 y08xA8wCOlbQ7esCgJ6roV4ewc/IevN89s903L+Ke24I3Kyid2JyhRBJo4Y41tpMzOmiH84qG FB2ohRuTW34/53eptQpfTklllvGKeiPLyeUAOsLASq1zSKBbsoQ6ku0lPLWDNmkcMmHDKid99 n6s8+cwzbvTq+eRLLuySIJXkpjJ1NNA6xcbujlNsf5U3CjunH0fo64XiEiQmLWbagDnHXcQUP 1OxY5cv2S9MK3cU0rBcFm64WoPTf9FBtNYPK4T/0FHQcQf+iEPnoJWYE0kP5X/lSGlLuM5UAt 4DgE9VbuWtjYT+UboEx3aooozEzygn1XH9aBrnRQ83C7XhFU2wiszV2/DAXijeb+XV71X2NGB Zo3vChf2+HSFUg9Vm9rfDNdBUsVWizTMxFpbGH2OnakhNcYyr0No3fBCPTj2DiH2LgSKgrnWm vxoZRMC/IEkgGxeNWaEBi78+ZWdW3fotwaxOQCcrcCRk0b+Ldu0q99sfDOF68sk2KHIjC0Zpn mX48YCoj4homHcBzYGXB0H0OD7q5pNibEoFpbLgXaFgglSoxn6U03t/YR2pcFp1419V4OLCQj zJyBdW2suKB5jjWf468pBJUxZVumwjFPmUv4tQ== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There are three remaining header files that are used by omap1 specific device drivers: - mach/soc.h provides cpu_is_omapXXX abstractions - mach/hardware.h provides omap_read/omap_write functions and physical addresses - mach/mux.h provides an omap specific pinctrl abstraction This is generally not how we do platform abstractions today, and it would be good to completely get rid of these in favor of passing information through platform devices and the pinctrl subsystem. However, given that nobody is working on that, just move it one step forward by splitting out the header files that are used by drivers today from the machine headers that are only used internally. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/include/mach/hardware.h | 128 +------ arch/arm/mach-omap1/include/mach/memory.h | 2 +- arch/arm/mach-omap1/include/mach/mux.h | 299 +---------------- arch/arm/mach-omap1/soc.h | 6 +- arch/arm/plat-omap/dma.c | 4 +- include/linux/soc/ti/omap1-io.h | 143 ++++++++ include/linux/soc/ti/omap1-mux.h | 311 ++++++++++++++++++ .../soc.h => include/linux/soc/ti/omap1-soc.h | 22 -- 8 files changed, 466 insertions(+), 449 deletions(-) create mode 100644 include/linux/soc/ti/omap1-io.h create mode 100644 include/linux/soc/ti/omap1-mux.h rename arch/arm/mach-omap1/include/mach/soc.h => include/linux/soc/ti/omap1-soc.h (90%) -- 2.20.0 diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h index e7c8ac7d83e3..05c5cd3e95f4 100644 --- a/arch/arm/mach-omap1/include/mach/hardware.h +++ b/arch/arm/mach-omap1/include/mach/hardware.h @@ -37,19 +37,10 @@ #define __ASM_ARCH_OMAP_HARDWARE_H #include +#include #ifndef __ASSEMBLER__ #include -#include - -/* - * NOTE: Please use ioremap + __raw_read/write where possible instead of these - */ -extern u8 omap_readb(u32 pa); -extern u16 omap_readw(u32 pa); -extern u32 omap_readl(u32 pa); -extern void omap_writeb(u8 v, u32 pa); -extern void omap_writew(u16 v, u32 pa); -extern void omap_writel(u32 v, u32 pa); +#include #include @@ -98,66 +89,6 @@ static inline u32 omap_cs3_phys(void) #define MPU_TIMER_AR (1 << 1) #define MPU_TIMER_ST (1 << 0) -/* - * ---------------------------------------------------------------------------- - * Clocks - * ---------------------------------------------------------------------------- - */ -#define CLKGEN_REG_BASE (0xfffece00) -#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0) -#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4) -#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) -#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC) -#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10) -#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14) -#define ARM_SYSST (CLKGEN_REG_BASE + 0x18) -#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24) - -#define CK_RATEF 1 -#define CK_IDLEF 2 -#define CK_ENABLEF 4 -#define CK_SELECTF 8 -#define SETARM_IDLE_SHIFT - -/* DPLL control registers */ -#define DPLL_CTL (0xfffecf00) - -/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */ -#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000) -#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) -#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) -#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) -#define DSP_RSTCT2 (DSP_CONFIG_REG_BASE + 0x14) - -/* - * --------------------------------------------------------------------------- - * UPLD - * --------------------------------------------------------------------------- - */ -#define ULPD_REG_BASE (0xfffe0800) -#define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) -#define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) -#define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) -# define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */ -# define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */ -#define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) -# define SOFT_UDC_REQ (1 << 4) -# define SOFT_USB_CLK_REQ (1 << 3) -# define SOFT_DPLL_REQ (1 << 0) -#define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) -#define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) -#define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) -#define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) -#define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68) -# define DIS_MMC2_DPLL_REQ (1 << 11) -# define DIS_MMC1_DPLL_REQ (1 << 10) -# define DIS_UART3_DPLL_REQ (1 << 9) -# define DIS_UART2_DPLL_REQ (1 << 8) -# define DIS_UART1_DPLL_REQ (1 << 7) -# define DIS_USB_HOST_DPLL_REQ (1 << 6) -#define ULPD_SDW_CLK_DIV_CTRL_SEL (ULPD_REG_BASE + 0x74) -#define ULPD_CAM_CLK_CTRL (ULPD_REG_BASE + 0x7c) - /* * --------------------------------------------------------------------------- * Watchdog timer @@ -213,52 +144,6 @@ static inline u32 omap_cs3_phys(void) #endif -/* - * ---------------------------------------------------------------------------- - * System control registers - * ---------------------------------------------------------------------------- - */ -#define MOD_CONF_CTRL_0 0xfffe1080 -#define MOD_CONF_CTRL_1 0xfffe1110 - -/* - * ---------------------------------------------------------------------------- - * Pin multiplexing registers - * ---------------------------------------------------------------------------- - */ -#define FUNC_MUX_CTRL_0 0xfffe1000 -#define FUNC_MUX_CTRL_1 0xfffe1004 -#define FUNC_MUX_CTRL_2 0xfffe1008 -#define COMP_MODE_CTRL_0 0xfffe100c -#define FUNC_MUX_CTRL_3 0xfffe1010 -#define FUNC_MUX_CTRL_4 0xfffe1014 -#define FUNC_MUX_CTRL_5 0xfffe1018 -#define FUNC_MUX_CTRL_6 0xfffe101C -#define FUNC_MUX_CTRL_7 0xfffe1020 -#define FUNC_MUX_CTRL_8 0xfffe1024 -#define FUNC_MUX_CTRL_9 0xfffe1028 -#define FUNC_MUX_CTRL_A 0xfffe102C -#define FUNC_MUX_CTRL_B 0xfffe1030 -#define FUNC_MUX_CTRL_C 0xfffe1034 -#define FUNC_MUX_CTRL_D 0xfffe1038 -#define PULL_DWN_CTRL_0 0xfffe1040 -#define PULL_DWN_CTRL_1 0xfffe1044 -#define PULL_DWN_CTRL_2 0xfffe1048 -#define PULL_DWN_CTRL_3 0xfffe104c -#define PULL_DWN_CTRL_4 0xfffe10ac - -/* OMAP-1610 specific multiplexing registers */ -#define FUNC_MUX_CTRL_E 0xfffe1090 -#define FUNC_MUX_CTRL_F 0xfffe1094 -#define FUNC_MUX_CTRL_10 0xfffe1098 -#define FUNC_MUX_CTRL_11 0xfffe109c -#define FUNC_MUX_CTRL_12 0xfffe10a0 -#define PU_PD_SEL_0 0xfffe10b4 -#define PU_PD_SEL_1 0xfffe10b8 -#define PU_PD_SEL_2 0xfffe10bc -#define PU_PD_SEL_3 0xfffe10c0 -#define PU_PD_SEL_4 0xfffe10c4 - /* Timer32K for 1610 and 1710*/ #define OMAP_TIMER32K_BASE 0xFFFBC400 @@ -299,15 +184,6 @@ static inline u32 omap_cs3_phys(void) #define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00) #define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04) -/* - * ---------------------------------------------------------------------------- - * Pulse-Width Light - * ---------------------------------------------------------------------------- - */ -#define OMAP_PWL_BASE 0xfffb5800 -#define OMAP_PWL_ENABLE (OMAP_PWL_BASE + 0x00) -#define OMAP_PWL_CLK_ENABLE (OMAP_PWL_BASE + 0x04) - /* * --------------------------------------------------------------------------- * Processor specific defines diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h index ba3a350479c8..ee91a6cb548d 100644 --- a/arch/arm/mach-omap1/include/mach/memory.h +++ b/arch/arm/mach-omap1/include/mach/memory.h @@ -7,6 +7,6 @@ #define __ASM_ARCH_MEMORY_H /* REVISIT: omap1 legacy drivers still rely on this */ -#include +#include #endif diff --git a/arch/arm/mach-omap1/include/mach/mux.h b/arch/arm/mach-omap1/include/mach/mux.h index adfe1f6bd0c5..362abb9f1dcf 100644 --- a/arch/arm/mach-omap1/include/mach/mux.h +++ b/arch/arm/mach-omap1/include/mach/mux.h @@ -20,6 +20,8 @@ #ifndef __ASM_ARCH_MUX_H #define __ASM_ARCH_MUX_H +#include + #define PU_PD_SEL_NA 0 /* No pu_pd reg available */ #define PULL_DWN_CTRL_NA 0 /* No pull-down control needed */ @@ -124,301 +126,6 @@ struct pin_config { }; -enum omap7xx_index { - /* OMAP 730 keyboard */ - E2_7XX_KBR0, - J7_7XX_KBR1, - E1_7XX_KBR2, - F3_7XX_KBR3, - D2_7XX_KBR4, - C2_7XX_KBC0, - D3_7XX_KBC1, - E4_7XX_KBC2, - F4_7XX_KBC3, - E3_7XX_KBC4, - - /* USB */ - AA17_7XX_USB_DM, - W16_7XX_USB_PU_EN, - W17_7XX_USB_VBUSI, - W18_7XX_USB_DMCK_OUT, - W19_7XX_USB_DCRST, - - /* MMC */ - MMC_7XX_CMD, - MMC_7XX_CLK, - MMC_7XX_DAT0, - - /* I2C */ - I2C_7XX_SCL, - I2C_7XX_SDA, - - /* SPI */ - SPI_7XX_1, - SPI_7XX_2, - SPI_7XX_3, - SPI_7XX_4, - SPI_7XX_5, - SPI_7XX_6, - - /* UART */ - UART_7XX_1, - UART_7XX_2, -}; - -enum omap1xxx_index { - /* UART1 (BT_UART_GATING)*/ - UART1_TX = 0, - UART1_RTS, - - /* UART2 (COM_UART_GATING)*/ - UART2_TX, - UART2_RX, - UART2_CTS, - UART2_RTS, - - /* UART3 (GIGA_UART_GATING) */ - UART3_TX, - UART3_RX, - UART3_CTS, - UART3_RTS, - UART3_CLKREQ, - UART3_BCLK, /* 12MHz clock out */ - Y15_1610_UART3_RTS, - - /* PWT & PWL */ - PWT, - PWL, - - /* USB master generic */ - R18_USB_VBUS, - R18_1510_USB_GPIO0, - W4_USB_PUEN, - W4_USB_CLKO, - W4_USB_HIGHZ, - W4_GPIO58, - - /* USB1 master */ - USB1_SUSP, - USB1_SEO, - W13_1610_USB1_SE0, - USB1_TXEN, - USB1_TXD, - USB1_VP, - USB1_VM, - USB1_RCV, - USB1_SPEED, - R13_1610_USB1_SPEED, - R13_1710_USB1_SE0, - - /* USB2 master */ - USB2_SUSP, - USB2_VP, - USB2_TXEN, - USB2_VM, - USB2_RCV, - USB2_SEO, - USB2_TXD, - - /* OMAP-1510 GPIO */ - R18_1510_GPIO0, - R19_1510_GPIO1, - M14_1510_GPIO2, - - /* OMAP1610 GPIO */ - P18_1610_GPIO3, - Y15_1610_GPIO17, - - /* OMAP-1710 GPIO */ - R18_1710_GPIO0, - V2_1710_GPIO10, - N21_1710_GPIO14, - W15_1710_GPIO40, - - /* MPUIO */ - MPUIO2, - N15_1610_MPUIO2, - MPUIO4, - MPUIO5, - T20_1610_MPUIO5, - W11_1610_MPUIO6, - V10_1610_MPUIO7, - W11_1610_MPUIO9, - V10_1610_MPUIO10, - W10_1610_MPUIO11, - E20_1610_MPUIO13, - U20_1610_MPUIO14, - E19_1610_MPUIO15, - - /* MCBSP2 */ - MCBSP2_CLKR, - MCBSP2_CLKX, - MCBSP2_DR, - MCBSP2_DX, - MCBSP2_FSR, - MCBSP2_FSX, - - /* MCBSP3 */ - MCBSP3_CLKX, - - /* Misc ballouts */ - BALLOUT_V8_ARMIO3, - N20_HDQ, - - /* OMAP-1610 MMC2 */ - W8_1610_MMC2_DAT0, - V8_1610_MMC2_DAT1, - W15_1610_MMC2_DAT2, - R10_1610_MMC2_DAT3, - Y10_1610_MMC2_CLK, - Y8_1610_MMC2_CMD, - V9_1610_MMC2_CMDDIR, - V5_1610_MMC2_DATDIR0, - W19_1610_MMC2_DATDIR1, - R18_1610_MMC2_CLKIN, - - /* OMAP-1610 External Trace Interface */ - M19_1610_ETM_PSTAT0, - L15_1610_ETM_PSTAT1, - L18_1610_ETM_PSTAT2, - L19_1610_ETM_D0, - J19_1610_ETM_D6, - J18_1610_ETM_D7, - - /* OMAP16XX GPIO */ - P20_1610_GPIO4, - V9_1610_GPIO7, - W8_1610_GPIO9, - N20_1610_GPIO11, - N19_1610_GPIO13, - P10_1610_GPIO22, - V5_1610_GPIO24, - AA20_1610_GPIO_41, - W19_1610_GPIO48, - M7_1610_GPIO62, - V14_16XX_GPIO37, - R9_16XX_GPIO18, - L14_16XX_GPIO49, - - /* OMAP-1610 uWire */ - V19_1610_UWIRE_SCLK, - U18_1610_UWIRE_SDI, - W21_1610_UWIRE_SDO, - N14_1610_UWIRE_CS0, - P15_1610_UWIRE_CS3, - N15_1610_UWIRE_CS1, - - /* OMAP-1610 SPI */ - U19_1610_SPIF_SCK, - U18_1610_SPIF_DIN, - P20_1610_SPIF_DIN, - W21_1610_SPIF_DOUT, - R18_1610_SPIF_DOUT, - N14_1610_SPIF_CS0, - N15_1610_SPIF_CS1, - T19_1610_SPIF_CS2, - P15_1610_SPIF_CS3, - - /* OMAP-1610 Flash */ - L3_1610_FLASH_CS2B_OE, - M8_1610_FLASH_CS2B_WE, - - /* First MMC */ - MMC_CMD, - MMC_DAT1, - MMC_DAT2, - MMC_DAT0, - MMC_CLK, - MMC_DAT3, - - /* OMAP-1710 MMC CMDDIR and DATDIR0 */ - M15_1710_MMC_CLKI, - P19_1710_MMC_CMDDIR, - P20_1710_MMC_DATDIR0, - - /* OMAP-1610 USB0 alternate pin configuration */ - W9_USB0_TXEN, - AA9_USB0_VP, - Y5_USB0_RCV, - R9_USB0_VM, - V6_USB0_TXD, - W5_USB0_SE0, - V9_USB0_SPEED, - V9_USB0_SUSP, - - /* USB2 */ - W9_USB2_TXEN, - AA9_USB2_VP, - Y5_USB2_RCV, - R9_USB2_VM, - V6_USB2_TXD, - W5_USB2_SE0, - - /* 16XX UART */ - R13_1610_UART1_TX, - V14_16XX_UART1_RX, - R14_1610_UART1_CTS, - AA15_1610_UART1_RTS, - R9_16XX_UART2_RX, - L14_16XX_UART3_RX, - - /* I2C OMAP-1610 */ - I2C_SCL, - I2C_SDA, - - /* Keypad */ - F18_1610_KBC0, - D20_1610_KBC1, - D19_1610_KBC2, - E18_1610_KBC3, - C21_1610_KBC4, - G18_1610_KBR0, - F19_1610_KBR1, - H14_1610_KBR2, - E20_1610_KBR3, - E19_1610_KBR4, - N19_1610_KBR5, - - /* Power management */ - T20_1610_LOW_PWR, - - /* MCLK Settings */ - V5_1710_MCLK_ON, - V5_1710_MCLK_OFF, - R10_1610_MCLK_ON, - R10_1610_MCLK_OFF, - - /* CompactFlash controller */ - P11_1610_CF_CD2, - R11_1610_CF_IOIS16, - V10_1610_CF_IREQ, - W10_1610_CF_RESET, - W11_1610_CF_CD1, - - /* parallel camera */ - J15_1610_CAM_LCLK, - J18_1610_CAM_D7, - J19_1610_CAM_D6, - J14_1610_CAM_D5, - K18_1610_CAM_D4, - K19_1610_CAM_D3, - K15_1610_CAM_D2, - K14_1610_CAM_D1, - L19_1610_CAM_D0, - L18_1610_CAM_VS, - L15_1610_CAM_HS, - M19_1610_CAM_RSTZ, - Y15_1610_CAM_OUTCLK, - - /* serial camera */ - H19_1610_CAM_EXCLK, - Y12_1610_CCP_CLKP, - W13_1610_CCP_CLKM, - W14_1610_CCP_DATAP, - Y14_1610_CCP_DATAM, - -}; - struct omap_mux_cfg { struct pin_config *pins; unsigned long size; @@ -429,11 +136,9 @@ struct omap_mux_cfg { /* setup pin muxing in Linux */ extern int omap1_mux_init(void); extern int omap_mux_register(struct omap_mux_cfg *); -extern int omap_cfg_reg(unsigned long reg_cfg); #else /* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */ static inline int omap1_mux_init(void) { return 0; } -static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; } #endif extern int omap2_mux_init(void); diff --git a/arch/arm/mach-omap1/soc.h b/arch/arm/mach-omap1/soc.h index 69daf0187b1d..22931839a666 100644 --- a/arch/arm/mach-omap1/soc.h +++ b/arch/arm/mach-omap1/soc.h @@ -1,4 +1,6 @@ /* - * We can move mach/soc.h here once the drivers are fixed + * We can move linux/soc/ti/omap1-soc.h here once the drivers are fixed */ -#include +#include +#include +#include diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 79f43acf9acb..749d3cae15c0 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -35,7 +35,9 @@ #include #ifdef CONFIG_ARCH_OMAP1 -#include +#include +#include +#include #endif /* diff --git a/include/linux/soc/ti/omap1-io.h b/include/linux/soc/ti/omap1-io.h new file mode 100644 index 000000000000..9a60f45899d3 --- /dev/null +++ b/include/linux/soc/ti/omap1-io.h @@ -0,0 +1,143 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef __ASM_ARCH_OMAP_IO_H +#define __ASM_ARCH_OMAP_IO_H + +#ifndef __ASSEMBLER__ +#include + +#ifdef CONFIG_ARCH_OMAP1 +/* + * NOTE: Please use ioremap + __raw_read/write where possible instead of these + */ +extern u8 omap_readb(u32 pa); +extern u16 omap_readw(u32 pa); +extern u32 omap_readl(u32 pa); +extern void omap_writeb(u8 v, u32 pa); +extern void omap_writew(u16 v, u32 pa); +extern void omap_writel(u32 v, u32 pa); +#elif defined(CONFIG_COMPILE_TEST) +static inline u8 omap_readb(u32 pa) { return 0; } +static inline u16 omap_readw(u32 pa) { return 0; } +static inline u32 omap_readl(u32 pa) { return 0; } +static inline void omap_writeb(u8 v, u32 pa) { } +static inline void omap_writew(u16 v, u32 pa) { } +static inline void omap_writel(u32 v, u32 pa) { } +#endif +#endif + +/* + * ---------------------------------------------------------------------------- + * System control registers + * ---------------------------------------------------------------------------- + */ +#define MOD_CONF_CTRL_0 0xfffe1080 +#define MOD_CONF_CTRL_1 0xfffe1110 + +/* + * --------------------------------------------------------------------------- + * UPLD + * --------------------------------------------------------------------------- + */ +#define ULPD_REG_BASE (0xfffe0800) +#define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) +#define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) +#define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) +# define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */ +# define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */ +#define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) +# define SOFT_UDC_REQ (1 << 4) +# define SOFT_USB_CLK_REQ (1 << 3) +# define SOFT_DPLL_REQ (1 << 0) +#define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) +#define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) +#define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) +#define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) +#define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68) +# define DIS_MMC2_DPLL_REQ (1 << 11) +# define DIS_MMC1_DPLL_REQ (1 << 10) +# define DIS_UART3_DPLL_REQ (1 << 9) +# define DIS_UART2_DPLL_REQ (1 << 8) +# define DIS_UART1_DPLL_REQ (1 << 7) +# define DIS_USB_HOST_DPLL_REQ (1 << 6) +#define ULPD_SDW_CLK_DIV_CTRL_SEL (ULPD_REG_BASE + 0x74) +#define ULPD_CAM_CLK_CTRL (ULPD_REG_BASE + 0x7c) + +/* + * ---------------------------------------------------------------------------- + * Clocks + * ---------------------------------------------------------------------------- + */ +#define CLKGEN_REG_BASE (0xfffece00) +#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0) +#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4) +#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) +#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC) +#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10) +#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14) +#define ARM_SYSST (CLKGEN_REG_BASE + 0x18) +#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24) + +#define CK_RATEF 1 +#define CK_IDLEF 2 +#define CK_ENABLEF 4 +#define CK_SELECTF 8 +#define SETARM_IDLE_SHIFT + +/* DPLL control registers */ +#define DPLL_CTL (0xfffecf00) + +/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */ +#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000) +#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) +#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) +#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) +#define DSP_RSTCT2 (DSP_CONFIG_REG_BASE + 0x14) + +/* + * ---------------------------------------------------------------------------- + * Pulse-Width Light + * ---------------------------------------------------------------------------- + */ +#define OMAP_PWL_BASE 0xfffb5800 +#define OMAP_PWL_ENABLE (OMAP_PWL_BASE + 0x00) +#define OMAP_PWL_CLK_ENABLE (OMAP_PWL_BASE + 0x04) + +/* + * ---------------------------------------------------------------------------- + * Pin multiplexing registers + * ---------------------------------------------------------------------------- + */ +#define FUNC_MUX_CTRL_0 0xfffe1000 +#define FUNC_MUX_CTRL_1 0xfffe1004 +#define FUNC_MUX_CTRL_2 0xfffe1008 +#define COMP_MODE_CTRL_0 0xfffe100c +#define FUNC_MUX_CTRL_3 0xfffe1010 +#define FUNC_MUX_CTRL_4 0xfffe1014 +#define FUNC_MUX_CTRL_5 0xfffe1018 +#define FUNC_MUX_CTRL_6 0xfffe101C +#define FUNC_MUX_CTRL_7 0xfffe1020 +#define FUNC_MUX_CTRL_8 0xfffe1024 +#define FUNC_MUX_CTRL_9 0xfffe1028 +#define FUNC_MUX_CTRL_A 0xfffe102C +#define FUNC_MUX_CTRL_B 0xfffe1030 +#define FUNC_MUX_CTRL_C 0xfffe1034 +#define FUNC_MUX_CTRL_D 0xfffe1038 +#define PULL_DWN_CTRL_0 0xfffe1040 +#define PULL_DWN_CTRL_1 0xfffe1044 +#define PULL_DWN_CTRL_2 0xfffe1048 +#define PULL_DWN_CTRL_3 0xfffe104c +#define PULL_DWN_CTRL_4 0xfffe10ac + +/* OMAP-1610 specific multiplexing registers */ +#define FUNC_MUX_CTRL_E 0xfffe1090 +#define FUNC_MUX_CTRL_F 0xfffe1094 +#define FUNC_MUX_CTRL_10 0xfffe1098 +#define FUNC_MUX_CTRL_11 0xfffe109c +#define FUNC_MUX_CTRL_12 0xfffe10a0 +#define PU_PD_SEL_0 0xfffe10b4 +#define PU_PD_SEL_1 0xfffe10b8 +#define PU_PD_SEL_2 0xfffe10bc +#define PU_PD_SEL_3 0xfffe10c0 +#define PU_PD_SEL_4 0xfffe10c4 + +#endif diff --git a/include/linux/soc/ti/omap1-mux.h b/include/linux/soc/ti/omap1-mux.h new file mode 100644 index 000000000000..59c239b5569c --- /dev/null +++ b/include/linux/soc/ti/omap1-mux.h @@ -0,0 +1,311 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#ifndef __SOC_TI_OMAP1_MUX_H +#define __SOC_TI_OMAP1_MUX_H +/* + * This should not really be a global header, it reflects the + * traditional way that omap1 does pin muxing without the + * pinctrl subsystem. + */ + +enum omap7xx_index { + /* OMAP 730 keyboard */ + E2_7XX_KBR0, + J7_7XX_KBR1, + E1_7XX_KBR2, + F3_7XX_KBR3, + D2_7XX_KBR4, + C2_7XX_KBC0, + D3_7XX_KBC1, + E4_7XX_KBC2, + F4_7XX_KBC3, + E3_7XX_KBC4, + + /* USB */ + AA17_7XX_USB_DM, + W16_7XX_USB_PU_EN, + W17_7XX_USB_VBUSI, + W18_7XX_USB_DMCK_OUT, + W19_7XX_USB_DCRST, + + /* MMC */ + MMC_7XX_CMD, + MMC_7XX_CLK, + MMC_7XX_DAT0, + + /* I2C */ + I2C_7XX_SCL, + I2C_7XX_SDA, + + /* SPI */ + SPI_7XX_1, + SPI_7XX_2, + SPI_7XX_3, + SPI_7XX_4, + SPI_7XX_5, + SPI_7XX_6, + + /* UART */ + UART_7XX_1, + UART_7XX_2, +}; + +enum omap1xxx_index { + /* UART1 (BT_UART_GATING)*/ + UART1_TX = 0, + UART1_RTS, + + /* UART2 (COM_UART_GATING)*/ + UART2_TX, + UART2_RX, + UART2_CTS, + UART2_RTS, + + /* UART3 (GIGA_UART_GATING) */ + UART3_TX, + UART3_RX, + UART3_CTS, + UART3_RTS, + UART3_CLKREQ, + UART3_BCLK, /* 12MHz clock out */ + Y15_1610_UART3_RTS, + + /* PWT & PWL */ + PWT, + PWL, + + /* USB master generic */ + R18_USB_VBUS, + R18_1510_USB_GPIO0, + W4_USB_PUEN, + W4_USB_CLKO, + W4_USB_HIGHZ, + W4_GPIO58, + + /* USB1 master */ + USB1_SUSP, + USB1_SEO, + W13_1610_USB1_SE0, + USB1_TXEN, + USB1_TXD, + USB1_VP, + USB1_VM, + USB1_RCV, + USB1_SPEED, + R13_1610_USB1_SPEED, + R13_1710_USB1_SE0, + + /* USB2 master */ + USB2_SUSP, + USB2_VP, + USB2_TXEN, + USB2_VM, + USB2_RCV, + USB2_SEO, + USB2_TXD, + + /* OMAP-1510 GPIO */ + R18_1510_GPIO0, + R19_1510_GPIO1, + M14_1510_GPIO2, + + /* OMAP1610 GPIO */ + P18_1610_GPIO3, + Y15_1610_GPIO17, + + /* OMAP-1710 GPIO */ + R18_1710_GPIO0, + V2_1710_GPIO10, + N21_1710_GPIO14, + W15_1710_GPIO40, + + /* MPUIO */ + MPUIO2, + N15_1610_MPUIO2, + MPUIO4, + MPUIO5, + T20_1610_MPUIO5, + W11_1610_MPUIO6, + V10_1610_MPUIO7, + W11_1610_MPUIO9, + V10_1610_MPUIO10, + W10_1610_MPUIO11, + E20_1610_MPUIO13, + U20_1610_MPUIO14, + E19_1610_MPUIO15, + + /* MCBSP2 */ + MCBSP2_CLKR, + MCBSP2_CLKX, + MCBSP2_DR, + MCBSP2_DX, + MCBSP2_FSR, + MCBSP2_FSX, + + /* MCBSP3 */ + MCBSP3_CLKX, + + /* Misc ballouts */ + BALLOUT_V8_ARMIO3, + N20_HDQ, + + /* OMAP-1610 MMC2 */ + W8_1610_MMC2_DAT0, + V8_1610_MMC2_DAT1, + W15_1610_MMC2_DAT2, + R10_1610_MMC2_DAT3, + Y10_1610_MMC2_CLK, + Y8_1610_MMC2_CMD, + V9_1610_MMC2_CMDDIR, + V5_1610_MMC2_DATDIR0, + W19_1610_MMC2_DATDIR1, + R18_1610_MMC2_CLKIN, + + /* OMAP-1610 External Trace Interface */ + M19_1610_ETM_PSTAT0, + L15_1610_ETM_PSTAT1, + L18_1610_ETM_PSTAT2, + L19_1610_ETM_D0, + J19_1610_ETM_D6, + J18_1610_ETM_D7, + + /* OMAP16XX GPIO */ + P20_1610_GPIO4, + V9_1610_GPIO7, + W8_1610_GPIO9, + N20_1610_GPIO11, + N19_1610_GPIO13, + P10_1610_GPIO22, + V5_1610_GPIO24, + AA20_1610_GPIO_41, + W19_1610_GPIO48, + M7_1610_GPIO62, + V14_16XX_GPIO37, + R9_16XX_GPIO18, + L14_16XX_GPIO49, + + /* OMAP-1610 uWire */ + V19_1610_UWIRE_SCLK, + U18_1610_UWIRE_SDI, + W21_1610_UWIRE_SDO, + N14_1610_UWIRE_CS0, + P15_1610_UWIRE_CS3, + N15_1610_UWIRE_CS1, + + /* OMAP-1610 SPI */ + U19_1610_SPIF_SCK, + U18_1610_SPIF_DIN, + P20_1610_SPIF_DIN, + W21_1610_SPIF_DOUT, + R18_1610_SPIF_DOUT, + N14_1610_SPIF_CS0, + N15_1610_SPIF_CS1, + T19_1610_SPIF_CS2, + P15_1610_SPIF_CS3, + + /* OMAP-1610 Flash */ + L3_1610_FLASH_CS2B_OE, + M8_1610_FLASH_CS2B_WE, + + /* First MMC */ + MMC_CMD, + MMC_DAT1, + MMC_DAT2, + MMC_DAT0, + MMC_CLK, + MMC_DAT3, + + /* OMAP-1710 MMC CMDDIR and DATDIR0 */ + M15_1710_MMC_CLKI, + P19_1710_MMC_CMDDIR, + P20_1710_MMC_DATDIR0, + + /* OMAP-1610 USB0 alternate pin configuration */ + W9_USB0_TXEN, + AA9_USB0_VP, + Y5_USB0_RCV, + R9_USB0_VM, + V6_USB0_TXD, + W5_USB0_SE0, + V9_USB0_SPEED, + V9_USB0_SUSP, + + /* USB2 */ + W9_USB2_TXEN, + AA9_USB2_VP, + Y5_USB2_RCV, + R9_USB2_VM, + V6_USB2_TXD, + W5_USB2_SE0, + + /* 16XX UART */ + R13_1610_UART1_TX, + V14_16XX_UART1_RX, + R14_1610_UART1_CTS, + AA15_1610_UART1_RTS, + R9_16XX_UART2_RX, + L14_16XX_UART3_RX, + + /* I2C OMAP-1610 */ + I2C_SCL, + I2C_SDA, + + /* Keypad */ + F18_1610_KBC0, + D20_1610_KBC1, + D19_1610_KBC2, + E18_1610_KBC3, + C21_1610_KBC4, + G18_1610_KBR0, + F19_1610_KBR1, + H14_1610_KBR2, + E20_1610_KBR3, + E19_1610_KBR4, + N19_1610_KBR5, + + /* Power management */ + T20_1610_LOW_PWR, + + /* MCLK Settings */ + V5_1710_MCLK_ON, + V5_1710_MCLK_OFF, + R10_1610_MCLK_ON, + R10_1610_MCLK_OFF, + + /* CompactFlash controller */ + P11_1610_CF_CD2, + R11_1610_CF_IOIS16, + V10_1610_CF_IREQ, + W10_1610_CF_RESET, + W11_1610_CF_CD1, + + /* parallel camera */ + J15_1610_CAM_LCLK, + J18_1610_CAM_D7, + J19_1610_CAM_D6, + J14_1610_CAM_D5, + K18_1610_CAM_D4, + K19_1610_CAM_D3, + K15_1610_CAM_D2, + K14_1610_CAM_D1, + L19_1610_CAM_D0, + L18_1610_CAM_VS, + L15_1610_CAM_HS, + M19_1610_CAM_RSTZ, + Y15_1610_CAM_OUTCLK, + + /* serial camera */ + H19_1610_CAM_EXCLK, + Y12_1610_CCP_CLKP, + W13_1610_CCP_CLKM, + W14_1610_CCP_DATAP, + Y14_1610_CCP_DATAM, + +}; + +#ifdef CONFIG_OMAP_MUX +extern int omap_cfg_reg(unsigned long reg_cfg); +#else +static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; } +#endif + +#endif diff --git a/arch/arm/mach-omap1/include/mach/soc.h b/include/linux/soc/ti/omap1-soc.h similarity index 90% rename from arch/arm/mach-omap1/include/mach/soc.h rename to include/linux/soc/ti/omap1-soc.h index 1897cbabfc93..81008d400bb6 100644 --- a/arch/arm/mach-omap1/include/mach/soc.h +++ b/include/linux/soc/ti/omap1-soc.h @@ -14,14 +14,6 @@ #ifndef __ASM_ARCH_OMAP_CPU_H #define __ASM_ARCH_OMAP_CPU_H -#include -#include -#include - -#ifndef __ASSEMBLY__ - -#include - /* * Test if multicore OMAP support is needed */ @@ -176,20 +168,7 @@ IS_OMAP_TYPE(1710, 0x1710) #define cpu_is_omap1621() 0 #define cpu_is_omap1710() 0 -/* These are needed to compile common code */ -#ifdef CONFIG_ARCH_OMAP1 -#define cpu_is_omap242x() 0 -#define cpu_is_omap2430() 0 -#define cpu_is_omap243x() 0 -#define cpu_is_omap24xx() 0 -#define cpu_is_omap34xx() 0 -#define cpu_is_omap44xx() 0 -#define soc_is_omap54xx() 0 -#define soc_is_dra7xx() 0 -#define soc_is_am33xx() 0 #define cpu_class_is_omap1() 1 -#define cpu_class_is_omap2() 0 -#endif /* * Whether we have MULTI_OMAP1 or not, we still need to distinguish @@ -216,5 +195,4 @@ IS_OMAP_TYPE(1710, 0x1710) # define cpu_is_omap1710() is_omap1710() #endif -#endif /* __ASSEMBLY__ */ #endif From patchwork Thu Aug 8 21:22:16 2019 Content-Type: text/plain; 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[209.132.180.67]) by mx.google.com with ESMTP id f10si56946969pfq.194.2019.08.08.14.29.16; Thu, 08 Aug 2019 14:29:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404482AbfHHV3P (ORCPT + 28 others); Thu, 8 Aug 2019 17:29:15 -0400 Received: from mout.kundenserver.de ([212.227.126.131]:51859 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2404251AbfHHV3O (ORCPT ); Thu, 8 Aug 2019 17:29:14 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1Mxpqo-1iF0VT3dks-00zD7L; Thu, 08 Aug 2019 23:28:57 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Mark Brown Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , Boris Brezillon , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org Subject: [PATCH 07/22] ARM: omap1: move perseus spi pinconf to board file Date: Thu, 8 Aug 2019 23:22:16 +0200 Message-Id: <20190808212234.2213262-8-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:OUywYjmUvR4CggfZfvVTBOs6Wqw61X7ANdp+0I65+P8MCPSSa41 5GvGcAmYjU2DGOzqYVYCAn/KSoqrC1TXd4CnESq/PgpAi3GqLbpTe3IptCS8caaxMlQ7MWB qspivVS8oe8TFvFiGP+yhn+TNtbQ31DZqvBQMB8LsgaAzHiS6rwCdV2Wa5fHzpxxGDK29H2 oVjrpRiT3l+OAdxjzkEqg== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:HTgsHXt4VYg=:wv/3Tz08gC4O1xmYtn1lnv 0DQVchC6pJEpqwK+9CzLoTkrnBsAxE7wZ+elRXgafIIObsfCNN/YIgTQ1GdzAShuaQlhVUAiI x2put5/QNp+CQKco+ufIo3WHRGRBqey6WIpXX3I0vYqr5zrSFImTvDEr26dWXewa8Mge4eIl9 1zandRW0JCIG0L7TtDX6UFCokfvoWtQFPzY3zsIR/U9cFbYboSkaJl1xb6m8LmTMz1Fy+r3Xo 3IxwAXhdJ539LXs1RLtojMfFqgTVwmfhY2aiC4Mu1N4VhBJRVMUU39ySLQZi7LVc/eOT7qiOt mbUIg0pOs3W84yVSI/V/2eEOCoxIhMCWtiQ8UYSmcrk3HumNFJCiB0TJn2lnbrIByn4XAm24E WznZoc38kwirw1rzqsFaDVwfSRvHkB5IOK392edCP0d7AgSYWCrBKpTvLVWew9EfVojJI/WHc 2mVDRcJiU4P/xzA3rN8j7ED727y6zXc0KrWLV+OLt27wntOZxNuwOIjm9oDiicsH1bvFm7OUC SNkSxxwqlJeNQXllVKUrLsRfTT5UGPZIqVy5go2ubH3J6RHBC1w0pP+0w5WqBW8Cm89usEALa iKtMuH4jjEzc/yH9jf4lu9GQ05158U+qlSFKhqq27BtihJNJhdr4cG8OTguF49oF/z3GoUZbz 0zk3AiGWMmw/7SdHAJ8JjCbDR6tL1hq0xnwyrGxON2pNn9j7RW51LxD6sg3MZJxWqMNYZ+1WU sY7/qqbeEDI/viciS0gwy5RjMHG7ffieopLw0A== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The driver has always had a FIXME about this, and it seems like this trivial code move avoids a mach header inclusion, so just do it. With that out of the way, and the header file inclusions changed to global files, the driver can also be compile-tested on other platforms. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/board-perseus2.c | 6 ++++++ drivers/spi/Kconfig | 2 +- drivers/spi/spi-omap-uwire.c | 15 +++------------ 3 files changed, 10 insertions(+), 13 deletions(-) -- 2.20.0 diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 1aeeb7337d29..da0155107d85 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -289,6 +289,12 @@ static void __init omap_perseus2_init(void) omap_cfg_reg(F4_7XX_KBC3); omap_cfg_reg(E3_7XX_KBC4); + if (IS_ENABLED(CONFIG_SPI_OMAP_UWIRE)) { + /* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */ + int val = omap_readl(OMAP7XX_IO_CONF_9) & ~0x00EEE000; + omap_writel(val | 0x00AAA000, OMAP7XX_IO_CONF_9); + } + platform_add_devices(devices, ARRAY_SIZE(devices)); omap_serial_init(); diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 949b18ed9d6b..4e67c155229e 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -464,7 +464,7 @@ config SPI_OCTEON config SPI_OMAP_UWIRE tristate "OMAP1 MicroWire" - depends on ARCH_OMAP1 + depends on ARCH_OMAP1 || (ARM && COMPILE_TEST) select SPI_BITBANG help This hooks up to the MicroWire controller on OMAP1 chips. diff --git a/drivers/spi/spi-omap-uwire.c b/drivers/spi/spi-omap-uwire.c index ce8dbdbce312..278d42a2ec49 100644 --- a/drivers/spi/spi-omap-uwire.c +++ b/drivers/spi/spi-omap-uwire.c @@ -44,13 +44,10 @@ #include #include -#include #include - -#include - -#include /* OMAP7XX_IO_CONF registers */ - +#include +#include +#include /* FIXME address is now a platform device resource, * and irqs should show there too... @@ -541,12 +538,6 @@ static int __init omap_uwire_init(void) omap_cfg_reg(N14_1610_UWIRE_CS0); omap_cfg_reg(N15_1610_UWIRE_CS1); } - if (machine_is_omap_perseus2()) { - /* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */ - int val = omap_readl(OMAP7XX_IO_CONF_9) & ~0x00EEE000; - omap_writel(val | 0x00AAA000, OMAP7XX_IO_CONF_9); - } - return platform_driver_register(&uwire_driver); } From patchwork Thu Aug 8 21:22:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 170855 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp9122610ile; Thu, 8 Aug 2019 14:33:11 -0700 (PDT) X-Google-Smtp-Source: APXvYqxgJWofPCtRRTGSt+A9fhmAy5X05tgXIcvEjOO/dcih6cM27VXRvVups9pGEVxHu9XNoxkf X-Received: by 2002:a17:902:f089:: with SMTP id go9mr15672503plb.81.1565299991611; Thu, 08 Aug 2019 14:33:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565299991; cv=none; d=google.com; s=arc-20160816; b=P9Q9XfqjfERALG5j4byK72oM6iFYMj0UzIQlj7Mhp2BVsEUqLatqeNRuaQw0r/REue rxIeDqhdd3cukqSqwrJceBoUnYaUX36xmvywMhIT7A8JXjxpvjmu9MgEZSt3U6OH2O6X NiwYWczLQoLKs6HbCb5l3St+6XJNV7gX9Dtzm4DcY/wUGyY2aWHomj3xLtSQSjiF7L55 iau/p4HZAw4+tHWslOVIRkUKE7skXoCveCu9u8QYiR6LEULqJVA4U/kAkWyxZxwnOutp rjzp1uvA2Osk0P+TTyZslYKMBy6Yn+DycNH/fsuwiVUsxZHojhTSyDKPCC9JdHoIgo47 I0qg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=994Jx9nftSgAMQ9AHDaX3JW9y+CKBIfN4UcqUGq7jVo=; b=sFGd0FL2DxbfRoDBNdANnfbF/wbM+OkIS4xYWc3eypwQGRjh5iIjMC9oqxfu2/OkFv z3jFu+ncAQMhnjlMpva759iTr1MWLSxC6EN5f01gGIKxGmbrnCN4w3OspwFRJgOZ6s8n 7zUZVofmvM2KES10E+Fvx+RDwINrldauQt6KfF/EhJTYc9utUqYeo6LELFLbFfaMbMh8 YIZeL9noRMUd/t1gA6CXMLw+QIJ0CwRaUUjK1H4RLrc1URMXriEmeTYV3icbW2rr1ZK6 mQX6oHhKtxmBK0zAXKE/X5CCGc8lT+bZFKYpWk0upiqsFq2fmQJYvPSNZZRNpVEbg6AH Wklw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 4si55654404pfo.266.2019.08.08.14.33.11; Thu, 08 Aug 2019 14:33:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404467AbfHHVdK (ORCPT + 28 others); Thu, 8 Aug 2019 17:33:10 -0400 Received: from mout.kundenserver.de ([212.227.126.131]:39043 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730768AbfHHVdI (ORCPT ); Thu, 8 Aug 2019 17:33:08 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1N2SXX-1iJjYP1UhL-013u5K; Thu, 08 Aug 2019 23:32:46 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Dmitry Torokhov Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-input@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 13/22] input: omap: void using mach/*.h headers Date: Thu, 8 Aug 2019 23:22:22 +0200 Message-Id: <20190808212234.2213262-14-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:0qwRTzGn4JfIF8ObhfLNMcpu9yXXizpeKZ8JtVuzRlduJYrIrTu owiYK1M1BeeoZObfRphHoHoFwE+LOiX1ZpIVXkWVJtlA88FwZOwAIEAQbxkA8rw8748tobB L9R6rqG2/KIub8SMBItoK1omiDtfLnP875ZN5v9Eufa/Mx0BciFuGxuBgBOUg7D8lrz107Y qJOAe4I7l7LshByQ3Mdow== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:JgEEBB+Nyt4=:+ecHhOdRNmpMi0QmvTk9tX AfQJzmotHNEyy9KCrM19P66/zQDazl3bg2tJ+M+2ZhB3w0Pfi5F2qVquAQWHyea8B6OmOZPJJ rMrn2zHs8MJkdSocphIKI+d+42gnDD/CyqvQygING4qU3VnKlyS9aSPz+DHiPY45H5yrXLm4R HGhliXsHWLBfBCLLdHBsQBG9Fn7nb9shKsdKUd0RCTc9H+NL0+jvam/J4a/H+wAnaujdU7WkV 4XjuRJWohQzkqQ2KINCjT11dKquWKHrIDji21hm7+2UL474wQXwVQntB+ITNN2b8MFNzUVZmC UzRqTr4p7HYT5+84yk/XS3iOc51ornjSVYNWtH/cl8KUbxTLmKxrej8ueDXXiSeUkdI7Jp2F9 C8H9xT5Tyu0s/jS8SdeGRPBZaybm2E1MDTXAlAU3xVjqBwTGHtY8955JUx9ZMtj7rj0sbLzEF O5hT3csOX0aeCQnPolpQoAYxL4hfwcqxfb+S2tTn86UspX2zS5u08CxVOrMih2QmL3bXFlExH +GItpsT+J32ExrxVkIgvPttP0pMM6usCnylxJ0moUaHDYy64nITYpqSLMrMzuSjQt3Od+cqg0 lbbtxxfp5L2Hm/EcUBx+kjv3Z3UMMWpJlkOAtvoJGRxpFnc7TP0rgTCTE6fFPUNEEE8WtUlyb oM6GcEl4frLnerFpxkYM7OPEFP/EzV6XTValbc7jE8p/dVKnk8AyKUhD5CpIQaJsfZX62abRe Hnt62LZOJIQW6SH5yDCE75jMXH1QZzmGtmfZNA== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org By using the new linux/soc/ti/omap1-io.h header instead, compile-testing can be enabled, and a CONFIG_ARCH_MULTIPLATFORM conversion of omap1 may eventually be possible. The warning in the header file gets removed in order to allow CONFIG_COMPILE_TEST. Signed-off-by: Arnd Bergmann --- drivers/input/keyboard/Kconfig | 2 +- drivers/input/keyboard/omap-keypad.c | 1 + include/linux/platform_data/keypad-omap.h | 5 ----- 3 files changed, 2 insertions(+), 6 deletions(-) -- 2.20.0 diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig index 5f1a3b3ee0fb..b454d262906b 100644 --- a/drivers/input/keyboard/Kconfig +++ b/drivers/input/keyboard/Kconfig @@ -658,7 +658,7 @@ config KEYBOARD_IPAQ_MICRO config KEYBOARD_OMAP tristate "TI OMAP keypad support" - depends on ARCH_OMAP1 + depends on ARCH_OMAP1 || COMPILE_TEST select INPUT_MATRIXKMAP help Say Y here if you want to use the OMAP keypad. diff --git a/drivers/input/keyboard/omap-keypad.c b/drivers/input/keyboard/omap-keypad.c index 5fe7a5633e33..31da8e878535 100644 --- a/drivers/input/keyboard/omap-keypad.c +++ b/drivers/input/keyboard/omap-keypad.c @@ -24,6 +24,7 @@ #include #include #include +#include #undef NEW_BOARD_LEARNING_MODE diff --git a/include/linux/platform_data/keypad-omap.h b/include/linux/platform_data/keypad-omap.h index 3e7c64c854f4..6f058eb188c4 100644 --- a/include/linux/platform_data/keypad-omap.h +++ b/include/linux/platform_data/keypad-omap.h @@ -5,11 +5,6 @@ #ifndef __KEYPAD_OMAP_H #define __KEYPAD_OMAP_H -#ifndef CONFIG_ARCH_OMAP1 -#warning Please update the board to use matrix-keypad driver -#define omap_readw(reg) 0 -#define omap_writew(val, reg) do {} while (0) -#endif #include struct omap_kp_platform_data { From patchwork Thu Aug 8 21:41:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 170857 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp9130686ile; Thu, 8 Aug 2019 14:43:16 -0700 (PDT) X-Google-Smtp-Source: APXvYqzCl/gDfeIomjvs9akCTze3gRuij7QAgnp3KiVrvinh817EcVUm31W6CeDsU4Sc2UI33Lby X-Received: by 2002:a63:4c21:: with SMTP id z33mr14662854pga.418.1565300596395; Thu, 08 Aug 2019 14:43:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565300596; cv=none; d=google.com; s=arc-20160816; b=hbX7ExW8S6b/ln19HS3/mvscysfiDDZ1DhBgS5dXah5fk9EOSqbHGJ2iqN/DV3rQ1k Ua2DD6sPcwRXTifJeiSSHKB0NqMgnBEIhvQgF9H074E0oDs3czNT734U/Met71Dy/E6K Wb9tVtXJJGYounqF+h5ExyNSGFMKbn+s31VF3MT2d6Kyjm8WCsJ0wIw6Dj2h5XgK8lA5 HFbQsm9fpezRmdJYT7B1vQkt4hDnPTmTpY/eeT9ndk+SZ3/h2EC/A/FgM/xtaY2zBHhF pGnvIKh46zHmQwkFCvqNHuNryap1fQOqfa11UZAaNS+cJ4JK1OWVmq4SpP7SHC0Qn89h KEEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=4d2O9jWB+o3xoWsCN7sAyCsIAeEpPUGptZmKAJF/XVI=; b=Rzx7eDjnGzIrRVcaUvQw/GThpKAZyiE6+BQ7f0fU+Rck4q0HyA9Fka241CMmPnbt5f Tn5zD89SVuL26cvtMK5pjx26wcVmV3a7PO+B+d2dT/K1OJdJkKY01FbV2zIcHURbZUVB QQOCxCcTVojXfpYPYyN4uCblRf92BhjZq8t+lsyV4xySaNUpDWIk2u3le/h9PoNMSUSe vgCvMhQa2qmukfnUQIwr9EKvRS1gGKUdAT2JIKBx0JeIzLgssgCFaFAVQTua5NZ4NgV/ G8Mz8sF+utsiqQ7ytbTHUr9T5gWPisV2GVHL111IvRwELVr8YraV6LdC9JF7s9Myhy0C QCDw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p27si48670728pli.411.2019.08.08.14.43.16; Thu, 08 Aug 2019 14:43:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390486AbfHHVnO (ORCPT + 28 others); Thu, 8 Aug 2019 17:43:14 -0400 Received: from mout.kundenserver.de ([217.72.192.74]:46923 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733295AbfHHVnM (ORCPT ); Thu, 8 Aug 2019 17:43:12 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue107 [212.227.15.145]) with ESMTPA (Nemesis) id 1MA88C-1i31ze2V7C-00BeaO; Thu, 08 Aug 2019 23:42:40 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Paul Walmsley , Kevin Hilman Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Subject: [PATCH 15/22] ARM: omap1: move mach/*.h into mach directory Date: Thu, 8 Aug 2019 23:41:25 +0200 Message-Id: <20190808214232.2798396-1-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808212234.2213262-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:0NtHFICYaisIsOL4SLfQ5PnSC40jDWA56cpBCTEaGu/+fYmGvz3 Q0HsNoC6tgm755p1Z8c/MAYXN+ogEOBUuDidEX4OW4EQDv8Z6e0vEsEendSnrGUojWa0giR z2v+fBbyBakCeDbzJ+YvCHVmhWYBuimycrt6wpGFT5ObxSG/Ls8EA3pcgf8ly6USL2qcVdQ nGxjOmzSwBI5jNV5U6w6w== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:FzN6doZzEkw=:5I1+kCwLJe+7dA7XZWRopu x9RqtUOyw6Y0BEKvCWromcwYw6UXXLVRm6MrFZKKlGA8KsqSB/2WPHd5RbpwBW67uMeXprX7p EDSXSfaXmMGbkvxole5mupFF0ruwLn2pPMFdoQgEb33dXyH51qNGdIPFdvcb6agYk2hPbndgL TfEl5sTpPE9CofTZ8xWi7qm4S4zcySAPm/lH5/hXiRAZuAXsTfqEcd6lphZiF2nbZ+hBeW+Uq z6+NCbmeu5nf/KUHjYa4md897ggNyJwAA29mcCHTyf2uUXFItvMS0bQBl9vn20RFaBVH1dnRd irNbYB+rBK6/KcM9hHR6poviIGz40+omkfKQmDNeabRxkLlqCoKWzcQQ4oPTbUaeDgYr9WKxF 23llxRDIQAU5CxTsKu8OAujDZIuN+/y7OypunV8j0HifMLEQ/VCPUD+GrurND1ZQlsZdT9z2B ERUyOgq5mZL0/WjYl528/HWiwwRCJomSTi1QtAeI+M4q0MdNg0LXNsVvPeHJHVmupxLa9GIgN nBGTqc5hMdKYWCer+AGyE9YhpDYw2ZGxXdL83pZbl4NZuWWbYHKEtYT0axvKgLovDDZvr9YVI RIuVihZkIzErp/TY/nnnGQzAjD7hJvLKi8RgGxv8F6QW1jhWlKGv1z2wJXtJaYzayzDJZAMzh sES9P7LZO5z8Bp9RQZpX6gkgkyn6A6mgU5U4N8xG9mw+l74TD1rKY6+/JkYx+tDaOCphndfrb 5GVrAdcwvEaW+4yGPkqUTirFj37akcP9HHqenQ== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Most of the header files are no longer referenced from outside arch/arm/mach-omap1, so move them all to that place directly and change their users to use the new location. The exceptions are: - mach/tc.h is used by arch/arm/plat-omap/dma.c - mach/compress.h is used by the core architecture code - mach/serial.h is used by mach/compress.h The mach/memory.h is empty and gets removed in the process, avoiding the need for CONFIG_NEED_MACH_MEMORY_H. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig | 1 - arch/arm/mach-omap1/ams-delta-fiq-handler.S | 3 ++- arch/arm/mach-omap1/ams-delta-fiq.c | 2 ++ arch/arm/mach-omap1/ams-delta-fiq.h | 2 +- arch/arm/mach-omap1/board-ams-delta.c | 5 ++--- arch/arm/mach-omap1/board-fsample.c | 10 ++++----- arch/arm/mach-omap1/board-generic.c | 6 ++---- arch/arm/mach-omap1/board-h2.c | 10 ++++----- arch/arm/mach-omap1/board-h3.c | 12 +++++------ arch/arm/mach-omap1/board-htcherald.c | 8 +++---- arch/arm/mach-omap1/board-innovator.c | 10 ++++----- arch/arm/mach-omap1/board-nokia770.c | 6 ++---- arch/arm/mach-omap1/board-osk.c | 9 ++++---- arch/arm/mach-omap1/board-palmte.c | 12 +++++------ arch/arm/mach-omap1/board-palmtt.c | 12 +++++------ arch/arm/mach-omap1/board-palmz71.c | 12 +++++------ arch/arm/mach-omap1/board-perseus2.c | 7 +++---- arch/arm/mach-omap1/board-sx1-mmc.c | 3 +-- arch/arm/mach-omap1/board-sx1.c | 10 ++++----- arch/arm/mach-omap1/clock.c | 4 ++-- arch/arm/mach-omap1/clock_data.c | 5 ++--- arch/arm/mach-omap1/common.h | 3 +-- arch/arm/mach-omap1/devices.c | 8 +++---- arch/arm/mach-omap1/fb.c | 2 +- arch/arm/mach-omap1/flash.c | 3 ++- arch/arm/mach-omap1/fpga.c | 3 +-- arch/arm/mach-omap1/gpio15xx.c | 3 ++- arch/arm/mach-omap1/gpio16xx.c | 5 +++-- arch/arm/mach-omap1/gpio7xx.c | 3 +-- .../mach-omap1/{include/mach => }/hardware.h | 2 -- arch/arm/mach-omap1/i2c.c | 3 ++- arch/arm/mach-omap1/id.c | 5 ++--- arch/arm/mach-omap1/include/mach/memory.h | 12 ----------- arch/arm/mach-omap1/io.c | 5 ++--- arch/arm/mach-omap1/irq.c | 4 +--- arch/arm/mach-omap1/{include/mach => }/irqs.h | 2 -- arch/arm/mach-omap1/mcbsp.c | 9 ++++---- .../mach-omap1/{include/mach => }/mtd-xip.h | 3 ++- arch/arm/mach-omap1/mux.c | 6 +++--- arch/arm/mach-omap1/{include/mach => }/mux.h | 2 -- arch/arm/mach-omap1/ocpi.c | 4 ++-- .../mach-omap1/{include/mach => }/omap1510.h | 0 .../mach-omap1/{include/mach => }/omap16xx.h | 0 .../mach-omap1/{include/mach => }/omap7xx.h | 0 arch/arm/mach-omap1/pm.c | 7 ++++--- arch/arm/mach-omap1/pm.h | 2 ++ arch/arm/mach-omap1/reset.c | 3 +-- arch/arm/mach-omap1/serial.c | 3 ++- arch/arm/mach-omap1/sleep.S | 2 +- arch/arm/mach-omap1/soc.h | 4 ++-- arch/arm/mach-omap1/sram.S | 4 ++-- arch/arm/mach-omap1/time.c | 2 +- arch/arm/mach-omap1/timer.c | 1 + arch/arm/mach-omap1/timer32k.c | 3 +-- arch/arm/mach-omap1/usb.c | 6 +++--- arch/arm/plat-omap/dma.c | 2 +- arch/arm/plat-omap/include/plat/cpu.h | 21 ------------------- 57 files changed, 118 insertions(+), 178 deletions(-) rename arch/arm/mach-omap1/{include/mach => }/hardware.h (99%) delete mode 100644 arch/arm/mach-omap1/include/mach/memory.h rename arch/arm/mach-omap1/{include/mach => }/irqs.h (99%) rename arch/arm/mach-omap1/{include/mach => }/mtd-xip.h (97%) rename arch/arm/mach-omap1/{include/mach => }/mux.h (98%) rename arch/arm/mach-omap1/{include/mach => }/omap1510.h (100%) rename arch/arm/mach-omap1/{include/mach => }/omap16xx.h (100%) rename arch/arm/mach-omap1/{include/mach => }/omap7xx.h (100%) delete mode 100644 arch/arm/plat-omap/include/plat/cpu.h -- 2.20.0 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 8263fe7a5e64..0febd7a1d65f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -503,7 +503,6 @@ config ARCH_OMAP1 select GPIOLIB select HAVE_IDE select IRQ_DOMAIN - select NEED_MACH_MEMORY_H select SPARSE_IRQ help Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx) diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S index 81159af44862..d2c9481aadba 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S +++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S @@ -15,11 +15,12 @@ #include #include +#include +#include "hardware.h" #include "ams-delta-fiq.h" #include "board-ams-delta.h" #include "iomap.h" -#include "soc.h" /* * OMAP1510 GPIO related symbol copied from arch/arm/mach-omap1/gpio15xx.c. diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c index 43899fa56674..1f62b3de4f87 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.c +++ b/arch/arm/mach-omap1/ams-delta-fiq.c @@ -21,7 +21,9 @@ #include #include +#include +#include "hardware.h" #include "ams-delta-fiq.h" #include "board-ams-delta.h" diff --git a/arch/arm/mach-omap1/ams-delta-fiq.h b/arch/arm/mach-omap1/ams-delta-fiq.h index fd76df3cce37..7f843caedb7c 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.h +++ b/arch/arm/mach-omap1/ams-delta-fiq.h @@ -16,7 +16,7 @@ #ifndef __AMS_DELTA_FIQ_H #define __AMS_DELTA_FIQ_H -#include +#include "irqs.h" /* * Interrupt number used for passing control from FIQ to IRQ. diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 2d63db557792..c937b2f3204b 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -35,12 +35,11 @@ #include #include -#include -#include +#include "mux.h" +#include "hardware.h" #include "camera.h" #include "usb.h" - #include "ams-delta-fiq.h" #include "board-ams-delta.h" #include "iomap.h" diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index c3aa6f2e5546..501567930a37 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -23,13 +23,13 @@ #include #include -#include -#include -#include "flash.h" +#include #include +#include -#include - +#include "mux.h" +#include "flash.h" +#include "hardware.h" #include "iomap.h" #include "common.h" #include "fpga.h" diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index 8ef0a9b17e92..3b2bcaf4bb01 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c @@ -14,15 +14,13 @@ #include #include -#include #include #include #include -#include - +#include "hardware.h" +#include "mux.h" #include "usb.h" - #include "common.h" /* assume no Mini-AB port */ diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 92a31727a069..3dcb50aff749 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -27,22 +27,20 @@ #include #include #include +#include #include +#include #include #include #include #include -#include -#include #include -#include +#include "mux.h" #include "flash.h" - -#include +#include "hardware.h" #include "usb.h" - #include "common.h" #include "board-h2.h" diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 86260498c344..305d17fa2a8a 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -29,6 +29,8 @@ #include #include #include +#include +#include #include #include @@ -37,16 +39,12 @@ #include #include -#include #include -#include -#include +#include "mux.h" #include "flash.h" - -#include -#include +#include "hardware.h" +#include "irqs.h" #include "usb.h" - #include "common.h" #include "board-h3.h" diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index f7220b60eb61..f8d93d79d5fb 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c @@ -23,16 +23,16 @@ #include #include #include +#include #include #include -#include +#include "hardware.h" +#include "omap7xx.h" #include "mmc.h" - -#include +#include "irqs.h" #include "usb.h" - #include "common.h" /* LCD register definition */ diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index f169e172421d..ab5f5fc9fa36 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -23,19 +23,17 @@ #include #include #include +#include #include #include #include -#include -#include "flash.h" #include -#include - -#include +#include "mux.h" +#include "flash.h" +#include "hardware.h" #include "usb.h" - #include "iomap.h" #include "common.h" #include "mmc.h" diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index e43c852103f5..8e0e58495023 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -28,11 +28,9 @@ #include #include -#include - -#include +#include "mux.h" +#include "hardware.h" #include "usb.h" - #include "common.h" #include "clock.h" #include "mmc.h" diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 38d73da5d13d..627f44350c36 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -41,18 +41,17 @@ #include #include #include +#include #include #include #include -#include "flash.h" -#include #include - -#include +#include "flash.h" +#include "mux.h" +#include "hardware.h" #include "usb.h" - #include "common.h" /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 4ac981c5cf74..0a54cfc2f78d 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -25,21 +25,19 @@ #include #include #include +#include +#include #include #include #include #include -#include "flash.h" -#include #include -#include -#include - -#include +#include "flash.h" +#include "mux.h" +#include "hardware.h" #include "usb.h" - #include "mmc.h" #include "common.h" diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index e48ae5fbe1b1..b0e64915f103 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -24,22 +24,20 @@ #include #include #include +#include #include #include +#include #include #include #include -#include "flash.h" -#include -#include #include -#include - -#include +#include "flash.h" +#include "mux.h" +#include "hardware.h" #include "usb.h" - #include "common.h" #define PALMTT_USBDETECT_GPIO 0 diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 37db0ab31528..f6ff582eda2e 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -28,20 +28,18 @@ #include #include #include +#include +#include #include #include #include -#include "flash.h" -#include -#include #include -#include - -#include +#include "flash.h" +#include "mux.h" +#include "hardware.h" #include "usb.h" - #include "common.h" #define PALMZ71_USBDETECT_GPIO 0 diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index da0155107d85..a91775c62b7b 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -19,17 +19,16 @@ #include #include #include +#include #include #include #include #include -#include +#include "mux.h" #include "flash.h" - -#include - +#include "hardware.h" #include "iomap.h" #include "common.h" #include "fpga.h" diff --git a/arch/arm/mach-omap1/board-sx1-mmc.c b/arch/arm/mach-omap1/board-sx1-mmc.c index 6192b1da75cb..f1c160924dfe 100644 --- a/arch/arm/mach-omap1/board-sx1-mmc.c +++ b/arch/arm/mach-omap1/board-sx1-mmc.c @@ -12,9 +12,8 @@ #include #include -#include +#include "hardware.h" #include "board-sx1.h" - #include "mmc.h" #if IS_ENABLED(CONFIG_MMC_OMAP) diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 0965b1b689ec..01a47fc68a55 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -26,20 +26,18 @@ #include #include #include +#include +#include #include #include #include #include "flash.h" -#include -#include -#include +#include "mux.h" #include "board-sx1.h" - -#include +#include "hardware.h" #include "usb.h" - #include "common.h" /* Write to I2C device */ diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index bd5be82101f3..24db9b723a6f 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -16,11 +16,11 @@ #include #include #include +#include #include -#include - +#include "hardware.h" #include "soc.h" #include "iomap.h" #include "clock.h" diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index ef46c5f67cf9..36f04da4b939 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -16,14 +16,13 @@ #include #include #include +#include #include /* for machine_is_* */ #include "soc.h" - -#include +#include "hardware.h" #include "usb.h" /* for OTG_BASE */ - #include "iomap.h" #include "clock.h" #include "sram.h" diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h index 504b959ba5cf..5ceff05e15c0 100644 --- a/arch/arm/mach-omap1/common.h +++ b/arch/arm/mach-omap1/common.h @@ -31,8 +31,7 @@ #include -#include - +#include "irqs.h" #include "soc.h" #include "i2c.h" diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 3c4900ac72fc..36b03410b210 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -14,16 +14,16 @@ #include #include +#include #include #include -#include +#include "mux.h" -#include +#include "omap7xx.h" #include "camera.h" -#include - +#include "hardware.h" #include "common.h" #include "clock.h" #include "mmc.h" diff --git a/arch/arm/mach-omap1/fb.c b/arch/arm/mach-omap1/fb.c index b093375afc27..a4538c231f66 100644 --- a/arch/arm/mach-omap1/fb.c +++ b/arch/arm/mach-omap1/fb.c @@ -21,7 +21,7 @@ #include -#include +#include "irqs.h" #if IS_ENABLED(CONFIG_FB_OMAP) diff --git a/arch/arm/mach-omap1/flash.c b/arch/arm/mach-omap1/flash.c index 40e43ce5329f..5e5b20f73c1b 100644 --- a/arch/arm/mach-omap1/flash.c +++ b/arch/arm/mach-omap1/flash.c @@ -6,11 +6,12 @@ #include #include #include +#include #include + #include "flash.h" -#include void omap1_set_vpp(struct platform_device *pdev, int enable) { diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c index f03ed523f20f..4c71a195969f 100644 --- a/arch/arm/mach-omap1/fpga.c +++ b/arch/arm/mach-omap1/fpga.c @@ -24,8 +24,7 @@ #include #include -#include - +#include "hardware.h" #include "iomap.h" #include "common.h" #include "fpga.h" diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c index 312a0924d786..fa0a285c40b4 100644 --- a/arch/arm/mach-omap1/gpio15xx.c +++ b/arch/arm/mach-omap1/gpio15xx.c @@ -18,8 +18,9 @@ #include #include +#include -#include +#include "irqs.h" #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE #define OMAP1510_GPIO_BASE 0xFFFCE000 diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c index 5b7a29b294d4..4787bf281eae 100644 --- a/arch/arm/mach-omap1/gpio16xx.c +++ b/arch/arm/mach-omap1/gpio16xx.c @@ -18,9 +18,10 @@ #include #include +#include -#include - +#include "hardware.h" +#include "irqs.h" #include "soc.h" #define OMAP1610_GPIO1_BASE 0xfffbe400 diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c index 0e5f68de23bf..c97c74aa8756 100644 --- a/arch/arm/mach-omap1/gpio7xx.c +++ b/arch/arm/mach-omap1/gpio7xx.c @@ -19,8 +19,7 @@ #include #include -#include - +#include "irqs.h" #include "soc.h" #define OMAP7XX_GPIO1_BASE 0xfffbc000 diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/hardware.h similarity index 99% rename from arch/arm/mach-omap1/include/mach/hardware.h rename to arch/arm/mach-omap1/hardware.h index 05c5cd3e95f4..2cfc342c069c 100644 --- a/arch/arm/mach-omap1/include/mach/hardware.h +++ b/arch/arm/mach-omap1/hardware.h @@ -1,6 +1,4 @@ /* - * arch/arm/mach-omap1/include/mach/hardware.h - * * Hardware definitions for TI OMAP processors and boards * * NOTE: Please put device driver specific defines into a separate header diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c index 5e6d81b1624c..f574eb0bcc0b 100644 --- a/arch/arm/mach-omap1/i2c.c +++ b/arch/arm/mach-omap1/i2c.c @@ -7,7 +7,8 @@ #include #include -#include + +#include "mux.h" #include "soc.h" #define OMAP_I2C_SIZE 0x3f diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c index 91556e374152..c3bb1b71fdf3 100644 --- a/arch/arm/mach-omap1/id.c +++ b/arch/arm/mach-omap1/id.c @@ -12,12 +12,11 @@ #include #include #include +#include #include #include "soc.h" - -#include - +#include "hardware.h" #include "common.h" #define OMAP_DIE_ID_0 0xfffe1800 diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h deleted file mode 100644 index ee91a6cb548d..000000000000 --- a/arch/arm/mach-omap1/include/mach/memory.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * arch/arm/mach-omap1/include/mach/memory.h - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* REVISIT: omap1 legacy drivers still rely on this */ -#include - -#endif diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 5a173fc2a1ca..cf425aeeb240 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -9,14 +9,13 @@ #include #include #include +#include #include #include -#include #include -#include - +#include "mux.h" #include "iomap.h" #include "common.h" #include "clock.h" diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index b11edc8a46f0..6b51387b27ac 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -47,9 +47,7 @@ #include #include "soc.h" - -#include - +#include "hardware.h" #include "common.h" #define IRQ_BANK(irq) ((irq) >> 5) diff --git a/arch/arm/mach-omap1/include/mach/irqs.h b/arch/arm/mach-omap1/irqs.h similarity index 99% rename from arch/arm/mach-omap1/include/mach/irqs.h rename to arch/arm/mach-omap1/irqs.h index 30bf007700cf..2851acfe5ff3 100644 --- a/arch/arm/mach-omap1/include/mach/irqs.h +++ b/arch/arm/mach-omap1/irqs.h @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ /* - * arch/arm/plat-omap/include/mach/irqs.h - * * Copyright (C) Greg Lonnon 2001 * Updated for OMAP-1610 by Tony Lindgren * diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index f36c34f47f11..b7bc7e4b426c 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -15,14 +15,13 @@ #include #include #include - #include -#include -#include "soc.h" +#include #include -#include - +#include "mux.h" +#include "soc.h" +#include "irqs.h" #include "iomap.h" #define DPS_RSTCT2_PER_EN (1 << 0) diff --git a/arch/arm/mach-omap1/include/mach/mtd-xip.h b/arch/arm/mach-omap1/mtd-xip.h similarity index 97% rename from arch/arm/mach-omap1/include/mach/mtd-xip.h rename to arch/arm/mach-omap1/mtd-xip.h index d09b2bc4920f..b675d501b13d 100644 --- a/arch/arm/mach-omap1/include/mach/mtd-xip.h +++ b/arch/arm/mach-omap1/mtd-xip.h @@ -14,7 +14,8 @@ #ifndef __ARCH_OMAP_MTD_XIP_H__ #define __ARCH_OMAP_MTD_XIP_H__ -#include +#include "hardware.h" +#include #define OMAP_MPU_TIMER_BASE (0xfffec500) #define OMAP_MPU_TIMER_OFFSET 0x100 diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 972665bf52d6..2d9458ff1d29 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c @@ -12,10 +12,10 @@ #include #include #include +#include -#include - -#include +#include "hardware.h" +#include "mux.h" #ifdef CONFIG_OMAP_MUX diff --git a/arch/arm/mach-omap1/include/mach/mux.h b/arch/arm/mach-omap1/mux.h similarity index 98% rename from arch/arm/mach-omap1/include/mach/mux.h rename to arch/arm/mach-omap1/mux.h index 362abb9f1dcf..46e5b94e27a2 100644 --- a/arch/arm/mach-omap1/include/mach/mux.h +++ b/arch/arm/mach-omap1/mux.h @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ /* - * arch/arm/plat-omap/include/mach/mux.h - * * Table of the Omap register configurations for the FUNC_MUX and * PULL_DWN combinations. * diff --git a/arch/arm/mach-omap1/ocpi.c b/arch/arm/mach-omap1/ocpi.c index 380ea2de58c1..c4a33ace4a8b 100644 --- a/arch/arm/mach-omap1/ocpi.c +++ b/arch/arm/mach-omap1/ocpi.c @@ -20,9 +20,9 @@ #include #include #include +#include -#include - +#include "hardware.h" #include "common.h" #define OCPI_BASE 0xfffec320 diff --git a/arch/arm/mach-omap1/include/mach/omap1510.h b/arch/arm/mach-omap1/omap1510.h similarity index 100% rename from arch/arm/mach-omap1/include/mach/omap1510.h rename to arch/arm/mach-omap1/omap1510.h diff --git a/arch/arm/mach-omap1/include/mach/omap16xx.h b/arch/arm/mach-omap1/omap16xx.h similarity index 100% rename from arch/arm/mach-omap1/include/mach/omap16xx.h rename to arch/arm/mach-omap1/omap16xx.h diff --git a/arch/arm/mach-omap1/include/mach/omap7xx.h b/arch/arm/mach-omap1/omap7xx.h similarity index 100% rename from arch/arm/mach-omap1/include/mach/omap7xx.h rename to arch/arm/mach-omap1/omap7xx.h diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index d068958d6f8a..dd3743c891b7 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c @@ -52,13 +52,14 @@ #include #include +#include #include -#include #include #include -#include - +#include "hardware.h" +#include "mux.h" +#include "irqs.h" #include "iomap.h" #include "clock.h" #include "pm.h" diff --git a/arch/arm/mach-omap1/pm.h b/arch/arm/mach-omap1/pm.h index cd926dcb5e7f..d9165709c532 100644 --- a/arch/arm/mach-omap1/pm.h +++ b/arch/arm/mach-omap1/pm.h @@ -34,6 +34,8 @@ #ifndef __ARCH_ARM_MACH_OMAP1_PM_H #define __ARCH_ARM_MACH_OMAP1_PM_H +#include + /* * ---------------------------------------------------------------------------- * Register and offset definitions to be used in PM assembler code diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c index af2c120b0c4e..2eee6a6965ff 100644 --- a/arch/arm/mach-omap1/reset.c +++ b/arch/arm/mach-omap1/reset.c @@ -6,8 +6,7 @@ #include #include -#include - +#include "hardware.h" #include "iomap.h" #include "common.h" diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 9eb591fbfd89..d6d1843337a5 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -19,8 +19,9 @@ #include -#include +#include +#include "mux.h" #include "pm.h" #include "soc.h" diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S index a908c51839a4..f111b79512ce 100644 --- a/arch/arm/mach-omap1/sleep.S +++ b/arch/arm/mach-omap1/sleep.S @@ -36,7 +36,7 @@ #include -#include +#include "hardware.h" #include "iomap.h" #include "pm.h" diff --git a/arch/arm/mach-omap1/soc.h b/arch/arm/mach-omap1/soc.h index 22931839a666..5fb57fdd9c2b 100644 --- a/arch/arm/mach-omap1/soc.h +++ b/arch/arm/mach-omap1/soc.h @@ -1,6 +1,6 @@ /* * We can move linux/soc/ti/omap1-soc.h here once the drivers are fixed */ -#include -#include +#include "hardware.h" +#include "irqs.h" #include diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S index 37f34fcd65fb..89f4dc1b70f0 100644 --- a/arch/arm/mach-omap1/sram.S +++ b/arch/arm/mach-omap1/sram.S @@ -6,11 +6,11 @@ */ #include +#include #include -#include - +#include "hardware.h" #include "iomap.h" .text diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index 524977a31a49..7cc1a968230e 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c @@ -47,10 +47,10 @@ #include -#include #include #include +#include "hardware.h" #include "iomap.h" #include "common.h" diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c index 4447210c9b0d..39e40ca40246 100644 --- a/arch/arm/mach-omap1/timer.c +++ b/arch/arm/mach-omap1/timer.c @@ -26,6 +26,7 @@ #include #include #include +#include #include diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c index 0ae6c52a7d70..c884508a8c9f 100644 --- a/arch/arm/mach-omap1/timer32k.c +++ b/arch/arm/mach-omap1/timer32k.c @@ -52,8 +52,7 @@ #include -#include - +#include "hardware.h" #include "common.h" /* diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c index a9deda073822..fda1322bcc1b 100644 --- a/arch/arm/mach-omap1/usb.c +++ b/arch/arm/mach-omap1/usb.c @@ -11,13 +11,13 @@ #include #include #include +#include #include -#include - +#include "hardware.h" +#include "mux.h" #include "usb.h" - #include "common.h" /* These routines should handle the standard chip-specific modes diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 749d3cae15c0..38e5773fbb86 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -35,9 +35,9 @@ #include #ifdef CONFIG_ARCH_OMAP1 -#include #include #include +#include #endif /* diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h deleted file mode 100644 index 36f4c352cc66..000000000000 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * OMAP cpu type detection - * - * Copyright (C) 2004, 2008 Nokia Corporation - * - * Copyright (C) 2009-11 Texas Instruments. - * - * Written by Tony Lindgren - * - * Added OMAP4/5 specific defines - Santosh Shilimkar - */ - -#ifndef __ASM_ARCH_OMAP_CPU_H -#define __ASM_ARCH_OMAP_CPU_H - -#ifdef CONFIG_ARCH_OMAP1 -#include -#endif - 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[209.132.180.67]) by mx.google.com with ESMTP id d9si54193182pgv.577.2019.08.08.14.43.49; Thu, 08 Aug 2019 14:43:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390521AbfHHVns (ORCPT + 28 others); Thu, 8 Aug 2019 17:43:48 -0400 Received: from mout.kundenserver.de ([212.227.17.13]:40427 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390501AbfHHVnq (ORCPT ); Thu, 8 Aug 2019 17:43:46 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue107 [212.227.15.145]) with ESMTPA (Nemesis) id 1MMFdY-1hdko81SK6-00JGNw; Thu, 08 Aug 2019 23:43:14 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Paul Walmsley Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH 17/22] ARM: omap1: remove some dead clock code Date: Thu, 8 Aug 2019 23:41:27 +0200 Message-Id: <20190808214232.2798396-3-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808214232.2798396-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> <20190808214232.2798396-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:KdAcg2K45cxcjuD+1lFeNverRo4wXC0I14A27oYzWwByGkUvdgD vgZ+L0u5wbdpPGYYDwPJ/H40AlNMGIz1ibgpmA8P3fTW5xOoYQKmUQSupknlxbIsUtWhSnJ nNxplpZBZZP33tRvr15RIKPraRMb3EU1cX89bVwOIHnjowCrv/f64BcUojWaeUd6Q4Qs+dj z2ttP+fjjsWmXBTnruKaQ== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:3M7oiyDqC7s=:PEtu9MAbpidC5/3nYSU/0H 5sIq4f/RRmodYDyj6F21P5UzP2rI6LzKX6i+wtRm1Sqns2piFrCI/SRERZU9S84gUD09RaOrE e46PaujwKyjD1INZ62xn9/ngq3XN++6L1gukUkGncyzDs2SW624dpFvaXS6v4PZ34qcvtuPgh U+dy7GLGrAWlNr4xwyZDGcTdPF1cktO7zMQ3qds6P2L3A+DPqPGzBo9mGZI4eRemm3R6KWb/d 41kLB1/7nygfK1o220NvQdf/7+RT0wtEbNNgSXF+sBRfzCCQZwVGW9ZHjcomM9osmAR76+7+A DX7CKj3okGq5ixUxsB3coUQgiNARBh6LU8hvBy+30k+T/GnyioB3oTgp1itapERzoNZpsYtL4 Wdp2MTM3dOgsD75YFGZ7oJxqEYvOmKjqfoN/NXMoh4OYdk/d484ZG8ZLaDcicew/49yF8GE8S A+o992UxQQCAm8aSoJTyPKHW+pei3qKuNAIHRN6vI32qqJCsFo2TuGqGRMdwV5YILnKMILnLO Gjtb0CpBiIo7nug/p/mqkmgLepK0FmJc0xVycmAQQHImn9DlgUELEvkWJRoDsFWdiv68yU0Cj zmvY10tVXYDqg7a9uIXzR0VKVWwzttR6ZW64IlA6yEiWoeVglUrmi4h5BSneu/Hmvfcr+XBK1 ttMRFdmz1gJhFAOAbu4+PoI9Rr9pERtmOKEfZ7eXMLM7ZC0H6X7wvfATNmGrHXImYRwDVI57J GalzMQGefyoEyaguKsivjffAWvz6pVkDt/Y6Qw== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Mark all internal functions as 'static', remove forward declarations and those functions that have no caller, as well as any unused macros or struct fields. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/clock.c | 409 +++++++++--------------------------- 1 file changed, 96 insertions(+), 313 deletions(-) -- 2.20.0 diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index bc51d5e24a9e..b2b0355fae4c 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -28,7 +28,6 @@ #include "sram.h" #include "usb.h" -struct module; struct clk; struct omap_clk { @@ -53,25 +52,14 @@ struct omap_clk { #define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */ #define CK_1710 (1 << 4) /* 1710 extra for rate selection */ - -/* Temporary, needed during the common clock framework conversion */ -#define __clk_get_name(clk) (clk->name) -#define __clk_get_parent(clk) (clk->parent) -#define __clk_get_rate(clk) (clk->rate) - /** * struct clkops - some clock function pointers * @enable: fn ptr that enables the current clock in hardware * @disable: fn ptr that enables the current clock in hardware - * @find_idlest: function returning the IDLEST register for the clock's IP blk - * @find_companion: function returning the "companion" clk reg for the clock - * @allow_idle: fn ptr that enables autoidle for the current clock in hardware - * @deny_idle: fn ptr that disables autoidle for the current clock in hardware * * A "companion" clk is an accompanying clock to the one being queried * that must be enabled for the IP module connected to the clock to * become accessible by the hardware. Neither @find_idlest nor - * @find_companion should be needed; that information is IP * block-specific; the hwmod code has been created to handle this, but * until hwmod data is ready and drivers have been converted to use PM * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and @@ -80,12 +68,6 @@ struct omap_clk { struct clkops { int (*enable)(struct clk *); void (*disable)(struct clk *); - void (*find_idlest)(struct clk *, void __iomem **, - u8 *, u8 *); - void (*find_companion)(struct clk *, void __iomem **, - u8 *); - void (*allow_idle)(struct clk *); - void (*deny_idle)(struct clk *); }; /* @@ -93,19 +75,10 @@ struct clkops { * * XXX document the rest of the clock flags here * - * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL - * bits share the same register. This flag allows the - * omap4_dpllmx*() code to determine which GATE_CTRL bit field - * should be used. This is a temporary solution - a better approach - * would be to associate clock type-specific data with the clock, - * similar to the struct dpll_data approach. */ #define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */ #define CLOCK_IDLE_CONTROL (1 << 1) #define CLOCK_NO_IDLE_PARENT (1 << 2) -#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */ -#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */ -#define CLOCK_CLKOUTX2 (1 << 5) /** * struct clk - OMAP struct clk @@ -126,9 +99,8 @@ struct clkops { * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div * @flags: see "struct clk.flags possibilities" above * @rate_offset: bitshift for rate selection bitfield (OMAP1 only) - * @src_offset: bitshift for source selection bitfield (OMAP1 only) * - * XXX @rate_offset, @src_offset should probably be removed and OMAP1 + * XXX @rate_offset, should probably be removed and OMAP1 * clock code converted to use clksel. * * XXX @usecount is poorly named. It should be "enable_count" or @@ -166,67 +138,11 @@ struct clk { u8 fixed_div; u8 flags; u8 rate_offset; - u8 src_offset; #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) struct dentry *dent; /* For visible tree hierarchy */ #endif }; -struct clk_functions { - int (*clk_enable)(struct clk *clk); - void (*clk_disable)(struct clk *clk); - long (*clk_round_rate)(struct clk *clk, unsigned long rate); - int (*clk_set_rate)(struct clk *clk, unsigned long rate); - int (*clk_set_parent)(struct clk *clk, struct clk *parent); - void (*clk_allow_idle)(struct clk *clk); - void (*clk_deny_idle)(struct clk *clk); - void (*clk_disable_unused)(struct clk *clk); -}; - -extern int clk_init(struct clk_functions *custom_clocks); -extern void clk_preinit(struct clk *clk); -extern int clk_register(struct clk *clk); -extern void clk_reparent(struct clk *child, struct clk *parent); -extern void clk_unregister(struct clk *clk); -extern void propagate_rate(struct clk *clk); -extern void recalculate_root_clocks(void); -extern unsigned long followparent_recalc(struct clk *clk); -extern void clk_enable_init_clocks(void); -unsigned long omap_fixed_divisor_recalc(struct clk *clk); -extern struct clk *omap_clk_get_by_name(const char *name); -extern int omap_clk_enable_autoidle_all(void); -extern int omap_clk_disable_autoidle_all(void); - -extern const struct clkops clkops_null; - -extern struct clk dummy_ck; - -extern int omap1_clk_enable(struct clk *clk); -extern void omap1_clk_disable(struct clk *clk); -extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate); -extern int omap1_clk_set_rate(struct clk *clk, unsigned long rate); -extern unsigned long omap1_ckctl_recalc(struct clk *clk); -extern int omap1_set_sossi_rate(struct clk *clk, unsigned long rate); -extern unsigned long omap1_sossi_recalc(struct clk *clk); -extern unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk); -extern int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate); -extern int omap1_set_uart_rate(struct clk *clk, unsigned long rate); -extern unsigned long omap1_uart_recalc(struct clk *clk); -extern int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate); -extern long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate); -extern void omap1_init_ext_clk(struct clk *clk); -extern int omap1_select_table_rate(struct clk *clk, unsigned long rate); -extern long omap1_round_to_table_rate(struct clk *clk, unsigned long rate); -extern int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate); -extern long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate); -extern unsigned long omap1_watchdog_recalc(struct clk *clk); - -#ifdef CONFIG_OMAP_RESET_CLOCKS -extern void omap1_clk_disable_unused(struct clk *clk); -#else -#define omap1_clk_disable_unused NULL -#endif - struct uart_clk { struct clk clk; unsigned long sysc_addr; @@ -286,16 +202,9 @@ struct arm_idlect1_clk { #define SOFT_REQ_REG2 0xfffe0880 extern __u32 arm_idlect1_mask; -extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; - -extern const struct clkops clkops_dspck; -extern const struct clkops clkops_dummy; -extern const struct clkops clkops_uart_16xx; -extern const struct clkops clkops_generic; /* used for passing SoC type to omap1_{select,round_to}_table_rate() */ -extern u32 cpu_mask; - +static u32 cpu_mask; /* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */ #define IDL_CLKOUT_ARM_SHIFT 12 @@ -337,9 +246,8 @@ extern u32 cpu_mask; #define SOFT_COM_REQ_SHIFT 1 /* sys_ck gate for com proc? */ #define SOFT_DPLL_REQ_SHIFT 0 - __u32 arm_idlect1_mask; -struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; +static struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; static LIST_HEAD(clocks); static DEFINE_MUTEX(clocks_mutex); @@ -349,13 +257,13 @@ static DEFINE_SPINLOCK(clockfw_lock); * Omap1 specific clock functions */ -unsigned long omap1_uart_recalc(struct clk *clk) +static unsigned long omap1_uart_recalc(struct clk *clk) { unsigned int val = __raw_readl(clk->enable_reg); return val & clk->enable_bit ? 48000000 : 12000000; } -unsigned long omap1_sossi_recalc(struct clk *clk) +static unsigned long omap1_sossi_recalc(struct clk *clk) { u32 div = omap_readl(MOD_CONF_CTRL_1); @@ -472,7 +380,7 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) return dsor_exp; } -unsigned long omap1_ckctl_recalc(struct clk *clk) +static unsigned long omap1_ckctl_recalc(struct clk *clk) { /* Calculate divisor encoded as 2-bit exponent */ int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); @@ -480,24 +388,6 @@ unsigned long omap1_ckctl_recalc(struct clk *clk) return clk->parent->rate / dsor; } -unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) -{ - int dsor; - - /* Calculate divisor encoded as 2-bit exponent - * - * The clock control bits are in DSP domain, - * so api_ck is needed for access. - * Note that DSP_CKCTL virt addr = phys addr, so - * we must use __raw_readw() instead of omap_readw(). - */ - omap1_clk_enable(api_ck_p); - dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); - omap1_clk_disable(api_ck_p); - - return clk->parent->rate / dsor; -} - /*------------------------------------------------------------------------- * Omap1 MPU rate table *-------------------------------------------------------------------------*/ @@ -510,7 +400,7 @@ struct mpu_rate { u32 flags; }; -struct mpu_rate omap1_rate_table[] = { +static struct mpu_rate omap1_rate_table[] = { /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL * NOTE: Comment order here is different from bits in CKCTL value: * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv @@ -547,7 +437,7 @@ struct mpu_rate omap1_rate_table[] = { }; /* MPU virtual clock functions */ -int omap1_select_table_rate(struct clk *clk, unsigned long rate) +static int omap1_select_table_rate(struct clk *clk, unsigned long rate) { /* Find the highest supported frequency <= rate and switch to it */ struct mpu_rate * ptr; @@ -582,7 +472,7 @@ int omap1_select_table_rate(struct clk *clk, unsigned long rate) return 0; } -int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) +static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) { int dsor_exp; u16 regval; @@ -602,7 +492,7 @@ int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) return 0; } -long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate) +static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate) { int dsor_exp = calc_dsor_exp(clk, rate); if (dsor_exp < 0) @@ -612,7 +502,7 @@ long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate) return clk->parent->rate / (1 << dsor_exp); } -int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate) +static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate) { int dsor_exp; u16 regval; @@ -632,7 +522,7 @@ int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate) return 0; } -long omap1_round_to_table_rate(struct clk *clk, unsigned long rate) +static long omap1_round_to_table_rate(struct clk *clk, unsigned long rate) { /* Find the highest supported frequency <= rate */ struct mpu_rate * ptr; @@ -683,7 +573,7 @@ static unsigned calc_ext_dsor(unsigned long rate) } /* XXX Only needed on 1510 */ -int omap1_set_uart_rate(struct clk *clk, unsigned long rate) +static int omap1_set_uart_rate(struct clk *clk, unsigned long rate) { unsigned int val; @@ -701,7 +591,7 @@ int omap1_set_uart_rate(struct clk *clk, unsigned long rate) } /* External clock (MCLK & BCLK) functions */ -int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate) +static int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate) { unsigned dsor; __u16 ratio_bits; @@ -719,7 +609,7 @@ int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate) return 0; } -int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) +static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) { u32 l; int div; @@ -742,12 +632,12 @@ int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) return 0; } -long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate) +static long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate) { return 96000000 / calc_ext_dsor(rate); } -void omap1_init_ext_clk(struct clk *clk) +static void omap1_init_ext_clk(struct clk *clk) { unsigned dsor; __u16 ratio_bits; @@ -765,7 +655,19 @@ void omap1_init_ext_clk(struct clk *clk) clk-> rate = 96000000 / dsor; } -int omap1_clk_enable(struct clk *clk) +static void omap1_clk_disable(struct clk *clk) +{ + if (clk->usecount > 0 && !(--clk->usecount)) { + clk->ops->disable(clk); + if (likely(clk->parent)) { + omap1_clk_disable(clk->parent); + if (clk->flags & CLOCK_NO_IDLE_PARENT) + omap1_clk_allow_idle(clk->parent); + } + } +} + +static omap1_clk_enable(struct clk *clk) { int ret = 0; @@ -793,18 +695,6 @@ int omap1_clk_enable(struct clk *clk) return ret; } -void omap1_clk_disable(struct clk *clk) -{ - if (clk->usecount > 0 && !(--clk->usecount)) { - clk->ops->disable(clk); - if (likely(clk->parent)) { - omap1_clk_disable(clk->parent); - if (clk->flags & CLOCK_NO_IDLE_PARENT) - omap1_clk_allow_idle(clk->parent); - } - } -} - static int omap1_clk_enable_generic(struct clk *clk) { __u16 regval16; @@ -848,11 +738,29 @@ static void omap1_clk_disable_generic(struct clk *clk) } } -const struct clkops clkops_generic = { +static const struct clkops clkops_generic = { .enable = omap1_clk_enable_generic, .disable = omap1_clk_disable_generic, }; +static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) +{ + int dsor; + + /* Calculate divisor encoded as 2-bit exponent + * + * The clock control bits are in DSP domain, + * so api_ck is needed for access. + * Note that DSP_CKCTL virt addr = phys addr, so + * we must use __raw_readw() instead of omap_readw(). + */ + omap1_clk_enable(api_ck_p); + dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); + omap1_clk_disable(api_ck_p); + + return clk->parent->rate / dsor; +} + static int omap1_clk_enable_dsp_domain(struct clk *clk) { int retval; @@ -874,7 +782,7 @@ static void omap1_clk_disable_dsp_domain(struct clk *clk) } } -const struct clkops clkops_dspck = { +static const struct clkops clkops_dspck = { .enable = omap1_clk_enable_dsp_domain, .disable = omap1_clk_disable_dsp_domain, }; @@ -909,12 +817,12 @@ static void omap1_clk_disable_uart_functional_16xx(struct clk *clk) } /* XXX SYSC register handling does not belong in the clock framework */ -const struct clkops clkops_uart_16xx = { +static const struct clkops clkops_uart_16xx = { .enable = omap1_clk_enable_uart_functional_16xx, .disable = omap1_clk_disable_uart_functional_16xx, }; -long omap1_clk_round_rate(struct clk *clk, unsigned long rate) +static long omap1_clk_round_rate(struct clk *clk, unsigned long rate) { if (clk->round_rate != NULL) return clk->round_rate(clk, rate); @@ -922,7 +830,7 @@ long omap1_clk_round_rate(struct clk *clk, unsigned long rate) return clk->rate; } -int omap1_clk_set_rate(struct clk *clk, unsigned long rate) +static int omap1_clk_set_rate(struct clk *clk, unsigned long rate) { int ret = -EINVAL; @@ -931,40 +839,21 @@ int omap1_clk_set_rate(struct clk *clk, unsigned long rate) return ret; } -/* - * Omap1 clock reset and init functions - */ - -#ifdef CONFIG_OMAP_RESET_CLOCKS - -void omap1_clk_disable_unused(struct clk *clk) +/* Propagate rate to children */ +static void propagate_rate(struct clk *tclk) { - __u32 regval32; + struct clk *clkp; - /* Clocks in the DSP domain need api_ck. Just assume bootloader - * has not enabled any DSP clocks */ - if (clk->enable_reg == DSP_IDLECT2) { - pr_info("Skipping reset check for DSP domain clock \"%s\"\n", - clk->name); - return; + list_for_each_entry(clkp, &tclk->children, sibling) { + if (clkp->recalc) + clkp->rate = clkp->recalc(clkp); + propagate_rate(clkp); } - - /* Is the clock already disabled? */ - if (clk->flags & ENABLE_REG_32BIT) - regval32 = __raw_readl(clk->enable_reg); - else - regval32 = __raw_readw(clk->enable_reg); - - if ((regval32 & (1 << clk->enable_bit)) == 0) - return; - - printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name); - clk->ops->disable(clk); - printk(" done\n"); } -#endif - +/* + * Omap1 clock reset and init functions + */ int clk_enable(struct clk *clk) { @@ -1077,7 +966,7 @@ EXPORT_SYMBOL(clk_get_parent); */ /* Used for clocks that always have same value as the parent clock */ -unsigned long followparent_recalc(struct clk *clk) +static unsigned long followparent_recalc(struct clk *clk) { return clk->parent->rate; } @@ -1086,56 +975,13 @@ unsigned long followparent_recalc(struct clk *clk) * Used for clocks that have the same value as the parent clock, * divided by some factor */ -unsigned long omap_fixed_divisor_recalc(struct clk *clk) +static unsigned long omap_fixed_divisor_recalc(struct clk *clk) { WARN_ON(!clk->fixed_div); return clk->parent->rate / clk->fixed_div; } -void clk_reparent(struct clk *child, struct clk *parent) -{ - list_del_init(&child->sibling); - if (parent) - list_add(&child->sibling, &parent->children); - child->parent = parent; - - /* now do the debugfs renaming to reattach the child - to the proper parent */ -} - -/* Propagate rate to children */ -void propagate_rate(struct clk *tclk) -{ - struct clk *clkp; - - list_for_each_entry(clkp, &tclk->children, sibling) { - if (clkp->recalc) - clkp->rate = clkp->recalc(clkp); - propagate_rate(clkp); - } -} - -static LIST_HEAD(root_clks); - -/** - * recalculate_root_clocks - recalculate and propagate all root clocks - * - * Recalculates all root clocks (clocks with no parent), which if the - * clock's .recalc is set correctly, should also propagate their rates. - * Called at init. - */ -void recalculate_root_clocks(void) -{ - struct clk *clkp; - - list_for_each_entry(clkp, &root_clks, sibling) { - if (clkp->recalc) - clkp->rate = clkp->recalc(clkp); - propagate_rate(clkp); - } -} - /** * clk_preinit - initialize any fields in the struct clk before clk init * @clk: struct clk * to initialize @@ -1143,12 +989,12 @@ void recalculate_root_clocks(void) * Initialize any struct clk fields needed before normal clk initialization * can run. No return value. */ -void clk_preinit(struct clk *clk) +static void clk_preinit(struct clk *clk) { INIT_LIST_HEAD(&clk->children); } -int clk_register(struct clk *clk) +static int clk_register(struct clk *clk) { if (clk == NULL || IS_ERR(clk)) return -EINVAL; @@ -1162,8 +1008,6 @@ int clk_register(struct clk *clk) mutex_lock(&clocks_mutex); if (clk->parent) list_add(&clk->sibling, &clk->parent->children); - else - list_add(&clk->sibling, &root_clks); list_add(&clk->node, &clocks); if (clk->init) @@ -1172,87 +1016,6 @@ int clk_register(struct clk *clk) return 0; } -EXPORT_SYMBOL(clk_register); - -void clk_unregister(struct clk *clk) -{ - if (clk == NULL || IS_ERR(clk)) - return; - - mutex_lock(&clocks_mutex); - list_del(&clk->sibling); - list_del(&clk->node); - mutex_unlock(&clocks_mutex); -} -EXPORT_SYMBOL(clk_unregister); - -void clk_enable_init_clocks(void) -{ - struct clk *clkp; - - list_for_each_entry(clkp, &clocks, node) - if (clkp->flags & ENABLE_ON_INIT) - clk_enable(clkp); -} - -/** - * omap_clk_get_by_name - locate OMAP struct clk by its name - * @name: name of the struct clk to locate - * - * Locate an OMAP struct clk by its name. Assumes that struct clk - * names are unique. Returns NULL if not found or a pointer to the - * struct clk if found. - */ -struct clk *omap_clk_get_by_name(const char *name) -{ - struct clk *c; - struct clk *ret = NULL; - - mutex_lock(&clocks_mutex); - - list_for_each_entry(c, &clocks, node) { - if (!strcmp(c->name, name)) { - ret = c; - break; - } - } - - mutex_unlock(&clocks_mutex); - - return ret; -} - -int omap_clk_enable_autoidle_all(void) -{ - struct clk *c; - unsigned long flags; - - spin_lock_irqsave(&clockfw_lock, flags); - - list_for_each_entry(c, &clocks, node) - if (c->ops->allow_idle) - c->ops->allow_idle(c); - - spin_unlock_irqrestore(&clockfw_lock, flags); - - return 0; -} - -int omap_clk_disable_autoidle_all(void) -{ - struct clk *c; - unsigned long flags; - - spin_lock_irqsave(&clockfw_lock, flags); - - list_for_each_entry(c, &clocks, node) - if (c->ops->deny_idle) - c->ops->deny_idle(c); - - spin_unlock_irqrestore(&clockfw_lock, flags); - - return 0; -} /* * Low level helpers @@ -1266,7 +1029,7 @@ static void clkll_disable_null(struct clk *clk) { } -const struct clkops clkops_null = { +static const struct clkops clkops_null = { .enable = clkll_enable_null, .disable = clkll_disable_null, }; @@ -1276,7 +1039,7 @@ const struct clkops clkops_null = { * * Used for clock aliases that are needed on some OMAPs, but not others */ -struct clk dummy_ck = { +static struct clk dummy_ck = { .name = "dummy", .ops = &clkops_null, }; @@ -1289,6 +1052,32 @@ struct clk dummy_ck = { /* * Disable any unused clocks left on by the bootloader */ +static void omap1_clk_disable_unused(struct clk *clk) +{ + __u32 regval32; + + /* Clocks in the DSP domain need api_ck. Just assume bootloader + * has not enabled any DSP clocks */ + if (clk->enable_reg == DSP_IDLECT2) { + pr_info("Skipping reset check for DSP domain clock \"%s\"\n", + clk->name); + return; + } + + /* Is the clock already disabled? */ + if (clk->flags & ENABLE_REG_32BIT) + regval32 = __raw_readl(clk->enable_reg); + else + regval32 = __raw_readw(clk->enable_reg); + + if ((regval32 & (1 << clk->enable_bit)) == 0) + return; + + printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name); + clk->ops->disable(clk); + printk(" done\n"); +} + static int __init clk_disable_unused(void) { struct clk *ck; @@ -1311,7 +1100,6 @@ static int __init clk_disable_unused(void) return 0; } late_initcall(clk_disable_unused); -late_initcall(omap_clk_enable_autoidle_all); #endif #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) @@ -1414,8 +1202,7 @@ static struct arm_idlect1_clk ck_dpll1out = { .name = "ck_dpll1out", .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT | - ENABLE_ON_INIT, + .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_CKOUT_ARM, .recalc = &followparent_recalc, @@ -1468,7 +1255,6 @@ static struct clk arm_gpio_ck = { .name = "ick", .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = ENABLE_ON_INIT, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_GPIOCK, .recalc = &followparent_recalc, @@ -1638,7 +1424,6 @@ static struct clk tc2_ck = { .name = "tc2_ck", .ops = &clkops_generic, .parent = &tc_ck.clk, - .flags = ENABLE_ON_INIT, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_TC2_CK, .recalc = &followparent_recalc, @@ -2079,8 +1864,6 @@ static void __init omap1_show_rates(void) arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); } -u32 cpu_mask; - int __init omap1_clk_init(void) { struct omap_clk *c; From patchwork Thu Aug 8 21:41:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 170861 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp9131266ile; Thu, 8 Aug 2019 14:43:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqwGTiyGoq9bZbQUn9FbV/WsVp6a8Sb17mr0/ZGgi7W5YA/tzeviPngK/OzqLtTiFjH0VsQV X-Received: by 2002:a17:90a:d791:: with SMTP id z17mr5835466pju.40.1565300637625; Thu, 08 Aug 2019 14:43:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565300637; cv=none; d=google.com; s=arc-20160816; b=FZrHf8DUIUhAYtuOnbyv6uusF5C9lig1gnEclD6TmgqkSsAdxNCYr6aCuSwXnNYVmR qQmXZvgP36qW7ulGGynVAi18rNjWXL24bApXLLQdZwAiD9tsp2WBkQnwYZE6HA9tpjaQ XENBlh3pl3Ur4qGcnQmrDOKnd6luKSNEmyAA97p5Yzcgzp4huZw3ccMGdHCPGOAZ6imS /A+NGWUF/YI1eWXFT0mGE6MITXN9jQBgKtlE0XrpklzrWAL+RPDUlUA2UWnScYGsm1a4 dZhUfC7swb6b1k6VsBBugBBwtqNSqT/KBOfS59YzpojA/3lHmkMpiLMFBiYj/ZDIjYPy L/dA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=IY1dJ/4IlXVXjlnXiJY5lMHT6XAG0ltudrwDdwE9KhA=; b=saWQiE99ASbFFJ0svoQHspD7+MptqPSIQjSg9O0dW6Gn7ASZMV+d63SVvTRocSCURa ubIa/aVynsJ3wz8OrlHUJcjWaLlpAg0ei2dfw/7TKyeQ2SB9baPucNnGJQjuCSkbUj0Z q9meWtJvWi+U/0O+aBiq+AvakAie5iThQ8cqpnTefxSVHBVoXOqshfYXrU07yNrzjCfj V9qAj/p3Dp74j0sv1Ydd5Qdj+2nlWxJ2QeeTUX9DwLD4XTlkCCmSJEx3Zl2wfVnTq7gO jAqfJT5ofcEqmC/r3zFP+cXjRhzGSmr+7MDnk6e7fMBxW3MOFlAqHkdahC7P8zJMfWQY EfSg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l14si56052783pga.567.2019.08.08.14.43.57; Thu, 08 Aug 2019 14:43:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390539AbfHHVn4 (ORCPT + 28 others); Thu, 8 Aug 2019 17:43:56 -0400 Received: from mout.kundenserver.de ([212.227.17.10]:44535 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390510AbfHHVnw (ORCPT ); Thu, 8 Aug 2019 17:43:52 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue107 [212.227.15.145]) with ESMTPA (Nemesis) id 1MXYAj-1hp3Kg2zJ1-00YytR; Thu, 08 Aug 2019 23:43:21 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Paul Walmsley Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH 18/22] ARM: omap1: clk: rework 'struct clk' Date: Thu, 8 Aug 2019 23:41:28 +0200 Message-Id: <20190808214232.2798396-4-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808214232.2798396-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> <20190808214232.2798396-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:F1b8+uHEy5radsEKMgXla6olW2Kqfyge+cZDihAIBDh3TRLHR5R gSorV8P6RQiQhUgQ1sMWIgTIGZsB2qiuAS+U6tovqQoNZLGbtuPd6WkSpHr3frzSKq0yH8S r5lu+RLy8zqPsu26Ieoc5gk6gpUQcyi4Q7pTh1MjSBwvO+mrHXhQV4eZHoE++kFjZlBuUW0 9UOryq6i591QEDC8+rAZQ== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:OKEy0Y5Am+s=:m1VP6DQbuBve5wUr011IvC btOCW/hpzrEoTeTOGRmj/EBIIJJlNw0GCrWawllPJygdd3soRvSIelDM+Wh59x3lCl+viJ0DE 3R9phVeaQ7utF375qAyoY2dQLI2oV5xpPGbpps8U71dqt797pgPjFdgdaEURQHcsi0yjOz2Ue ISmrbTTydW0a0UgwdHBtKI/2JsDOA63IICTiJ3fbZK2N2PbA2geRcV83HPHbsFrADHzsOpgQ8 u/rqY2QQhX6myo7j8zg+71+qJz1bpliOmEFlTKhknTWPHzcI+QWpWuI5BmrECZlZrFLFw2IMd N9q38tNFfAlqgINREw4mEbNvCqQELE8pFQUsWLMnauVT/05lazj0JOlZ4rivtiOQKDM/n+eOE 8WtP3WPB/4UuWsp/yVGhX20TRzPgwlZGbfsQ6O95JyEWned1x5Oo3ObNkPyy8tXoU5AacO14h fCBwR7pMn++EpSuBKkO8L6qfdx0MOe351fC4i0JEYa7G0yMKkpd5YaKrxb4ubaSw8sV1bQYwa GO5gbOLWBfon5pAClBhel1Ky9Cbn1xLKNUscIu0Y8fsHPxKD8nhaPYu2TNsbKUfGIxX81yzis eYdqt3fuaoAwM2Fhv0IsCKVKOjLKQN63AjlvodXKxbwjsD3GhXEvvhscvUVJcqoSvL1oWgJQv 9Ra8wTyO8S12JF+C0GI2dVr60AdE7iT3zCCqSCdVnioP7nWsPUhitc9sPtSfFawTrj22PLBm5 MsDwjN2cfEItC1OKRMqGTmDAvfKJBY5J6fdaBQ== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To get closer to the way the common_clk code works, rename the omap1 struct clk to 'omap1_clk', and add trivial 'clk_hw' and 'clk' wrapper to work like the generic counterparts. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/clock.c | 364 ++++++++++++++++++++---------------- 1 file changed, 205 insertions(+), 159 deletions(-) -- 2.20.0 diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index b2b0355fae4c..577686f61b3b 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -28,20 +28,20 @@ #include "sram.h" #include "usb.h" -struct clk; +struct omap1_clk; -struct omap_clk { +struct omap1_clk_lookup { u16 cpu; struct clk_lookup lk; }; #define CLK(dev, con, ck, cp) \ { \ - .cpu = cp, \ + .cpu = cp, \ .lk = { \ + .clk_hw = (&(ck)->clk_hw), \ .dev_id = dev, \ .con_id = con, \ - .clk = ck, \ }, \ } @@ -53,7 +53,7 @@ struct omap_clk { #define CK_1710 (1 << 4) /* 1710 extra for rate selection */ /** - * struct clkops - some clock function pointers + * struct clk_ops - some clock function pointers * @enable: fn ptr that enables the current clock in hardware * @disable: fn ptr that enables the current clock in hardware * @@ -65,13 +65,13 @@ struct omap_clk { * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and * @find_companion must, unfortunately, remain. */ -struct clkops { - int (*enable)(struct clk *); - void (*disable)(struct clk *); +struct clk_ops { + int (*enable)(struct clk_hw *); + void (*disable)(struct clk_hw *); }; /* - * struct clk.flags possibilities + * struct omap1_clk.flags possibilities * * XXX document the rest of the clock flags here * @@ -81,7 +81,7 @@ struct clkops { #define CLOCK_NO_IDLE_PARENT (1 << 2) /** - * struct clk - OMAP struct clk + * struct omap1_clk - OMAP struct clk * @node: list_head connecting this clock into the full clock list * @ops: struct clkops * for this clock * @name: the name of the clock in the hardware (used in hwmod data and debug) @@ -121,18 +121,27 @@ struct clkops { * separated from the clock's target rate. */ struct clk { + struct clk_hw *clk_hw; +}; + +struct clk_hw { + struct clk clk; +}; + +struct omap1_clk { + struct clk_hw clk_hw; struct list_head node; - const struct clkops *ops; + const struct clk_ops *ops; const char *name; - struct clk *parent; + struct omap1_clk *parent; struct list_head children; struct list_head sibling; /* node for children */ unsigned long rate; void __iomem *enable_reg; - unsigned long (*recalc)(struct clk *); - int (*set_rate)(struct clk *, unsigned long); - long (*round_rate)(struct clk *, unsigned long); - void (*init)(struct clk *); + unsigned long (*recalc)(struct clk_hw *); + int (*set_rate)(struct clk_hw *, unsigned long); + long (*round_rate)(struct clk_hw *, unsigned long); + void (*init)(struct clk_hw *); u8 enable_bit; s8 usecount; u8 fixed_div; @@ -143,14 +152,16 @@ struct clk { #endif }; +#define to_omap1_clk(__hw) container_of((__hw), struct omap1_clk, clk_hw) + struct uart_clk { - struct clk clk; + struct omap1_clk clk; unsigned long sysc_addr; }; /* Provide a method for preventing idling some ARM IDLECT clocks */ struct arm_idlect1_clk { - struct clk clk; + struct omap1_clk clk; unsigned long no_idle_count; __u8 idlect_shift; }; @@ -217,20 +228,20 @@ static u32 cpu_mask; #define IDLXORP_ARM_SHIFT 1 #define IDLWDT_ARM_SHIFT 0 -/* Some MOD_CONF_CTRL_0 bit shifts - used in struct clk.enable_bit */ +/* Some MOD_CONF_CTRL_0 bit shifts - used in struct omap1_clk.enable_bit */ #define CONF_MOD_UART3_CLK_MODE_R 31 #define CONF_MOD_UART2_CLK_MODE_R 30 #define CONF_MOD_UART1_CLK_MODE_R 29 #define CONF_MOD_MMC_SD_CLK_REQ_R 23 #define CONF_MOD_MCBSP3_AUXON 20 -/* Some MOD_CONF_CTRL_1 bit shifts - used in struct clk.enable_bit */ +/* Some MOD_CONF_CTRL_1 bit shifts - used in struct omap1_clk.enable_bit */ #define CONF_MOD_SOSSI_CLK_EN_R 16 /* Some OTG_SYSCON_2-specific bit fields */ #define OTG_SYSCON_2_UHOST_EN_SHIFT 8 -/* Some SOFT_REQ_REG bit fields - used in struct clk.enable_bit */ +/* Some SOFT_REQ_REG bit fields - used in struct omap1_clk.enable_bit */ #define SOFT_MMC2_DPLL_REQ_SHIFT 13 #define SOFT_MMC_DPLL_REQ_SHIFT 12 #define SOFT_UART3_DPLL_REQ_SHIFT 11 @@ -247,7 +258,7 @@ static u32 cpu_mask; #define SOFT_DPLL_REQ_SHIFT 0 __u32 arm_idlect1_mask; -static struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; +static struct clk_hw *api_ck_p, *ck_dpll1_p, *ck_ref_p; static LIST_HEAD(clocks); static DEFINE_MUTEX(clocks_mutex); @@ -257,14 +268,16 @@ static DEFINE_SPINLOCK(clockfw_lock); * Omap1 specific clock functions */ -static unsigned long omap1_uart_recalc(struct clk *clk) +static unsigned long omap1_uart_recalc(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); unsigned int val = __raw_readl(clk->enable_reg); return val & clk->enable_bit ? 48000000 : 12000000; } -static unsigned long omap1_sossi_recalc(struct clk *clk) +static unsigned long omap1_sossi_recalc(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); u32 div = omap_readl(MOD_CONF_CTRL_1); div = (div >> 17) & 0x7; @@ -273,9 +286,10 @@ static unsigned long omap1_sossi_recalc(struct clk *clk) return clk->parent->rate / div; } -static void omap1_clk_allow_idle(struct clk *clk) +static void omap1_clk_allow_idle(struct clk_hw *clk_hw) { - struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk; + struct omap1_clk *clk = to_omap1_clk(clk_hw); + struct arm_idlect1_clk * iclk = container_of(clk, struct arm_idlect1_clk, clk); if (!(clk->flags & CLOCK_IDLE_CONTROL)) return; @@ -284,9 +298,10 @@ static void omap1_clk_allow_idle(struct clk *clk) arm_idlect1_mask |= 1 << iclk->idlect_shift; } -static void omap1_clk_deny_idle(struct clk *clk) +static void omap1_clk_deny_idle(struct clk_hw *clk_hw) { - struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk; + struct omap1_clk *clk = to_omap1_clk(clk_hw); + struct arm_idlect1_clk * iclk = container_of(clk, struct arm_idlect1_clk, clk); if (!(clk->flags & CLOCK_IDLE_CONTROL)) return; @@ -348,7 +363,7 @@ static __u16 verify_ckctl_value(__u16 newval) return newval; } -static int calc_dsor_exp(struct clk *clk, unsigned long rate) +static int calc_dsor_exp(struct omap1_clk *clk, unsigned long rate) { /* Note: If target frequency is too low, this function will return 4, * which is invalid value. Caller must check for this value and act @@ -362,7 +377,7 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) * DSPMMU_CK >= TC_CK */ unsigned long realrate; - struct clk * parent; + struct omap1_clk * parent; unsigned dsor_exp; parent = clk->parent; @@ -380,8 +395,9 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) return dsor_exp; } -static unsigned long omap1_ckctl_recalc(struct clk *clk) +static unsigned long omap1_ckctl_recalc(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); /* Calculate divisor encoded as 2-bit exponent */ int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); @@ -437,13 +453,13 @@ static struct mpu_rate omap1_rate_table[] = { }; /* MPU virtual clock functions */ -static int omap1_select_table_rate(struct clk *clk, unsigned long rate) +static int omap1_select_table_rate(struct clk_hw *clk_hw, unsigned long rate) { /* Find the highest supported frequency <= rate and switch to it */ struct mpu_rate * ptr; unsigned long ref_rate; - ref_rate = ck_ref_p->rate; + ref_rate = to_omap1_clk(ck_ref_p)->rate; for (ptr = omap1_rate_table; ptr->rate; ptr++) { if (!(ptr->flags & cpu_mask)) @@ -467,13 +483,14 @@ static int omap1_select_table_rate(struct clk *clk, unsigned long rate) omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val); /* XXX Do we need to recalculate the tree below DPLL1 at this point? */ - ck_dpll1_p->rate = ptr->pll_rate; + to_omap1_clk(ck_dpll1_p)->rate = ptr->pll_rate; return 0; } -static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) +static int omap1_clk_set_rate_dsp_domain(struct clk_hw *clk_hw, unsigned long rate) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); int dsor_exp; u16 regval; @@ -492,8 +509,9 @@ static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) return 0; } -static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate) +static long omap1_clk_round_rate_ckctl_arm(struct clk_hw *clk_hw, unsigned long rate) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); int dsor_exp = calc_dsor_exp(clk, rate); if (dsor_exp < 0) return dsor_exp; @@ -502,8 +520,9 @@ static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate) return clk->parent->rate / (1 << dsor_exp); } -static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate) +static int omap1_clk_set_rate_ckctl_arm(struct clk_hw *clk_hw, unsigned long rate) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); int dsor_exp; u16 regval; @@ -522,14 +541,14 @@ static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate) return 0; } -static long omap1_round_to_table_rate(struct clk *clk, unsigned long rate) +static long omap1_round_to_table_rate(struct clk_hw *clk_hw, unsigned long rate) { /* Find the highest supported frequency <= rate */ struct mpu_rate * ptr; long highest_rate; unsigned long ref_rate; - ref_rate = ck_ref_p->rate; + ref_rate = to_omap1_clk(ck_ref_p)->rate; highest_rate = -EINVAL; @@ -573,8 +592,9 @@ static unsigned calc_ext_dsor(unsigned long rate) } /* XXX Only needed on 1510 */ -static int omap1_set_uart_rate(struct clk *clk, unsigned long rate) +static int omap1_set_uart_rate(struct clk_hw *clk_hw, unsigned long rate) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); unsigned int val; val = __raw_readl(clk->enable_reg); @@ -591,8 +611,9 @@ static int omap1_set_uart_rate(struct clk *clk, unsigned long rate) } /* External clock (MCLK & BCLK) functions */ -static int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate) +static int omap1_set_ext_clk_rate(struct clk_hw *clk_hw, unsigned long rate) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); unsigned dsor; __u16 ratio_bits; @@ -609,8 +630,9 @@ static int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate) return 0; } -static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) +static int omap1_set_sossi_rate(struct clk_hw *clk_hw, unsigned long rate) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); u32 l; int div; unsigned long p_rate; @@ -632,13 +654,14 @@ static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) return 0; } -static long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate) +static long omap1_round_ext_clk_rate(struct clk_hw *clk_hw, unsigned long rate) { return 96000000 / calc_ext_dsor(rate); } -static void omap1_init_ext_clk(struct clk *clk) +static void omap1_init_ext_clk(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); unsigned dsor; __u16 ratio_bits; @@ -655,36 +678,39 @@ static void omap1_init_ext_clk(struct clk *clk) clk-> rate = 96000000 / dsor; } -static void omap1_clk_disable(struct clk *clk) +static void omap1_clk_disable(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); + if (clk->usecount > 0 && !(--clk->usecount)) { - clk->ops->disable(clk); + clk->ops->disable(&clk->clk_hw); if (likely(clk->parent)) { - omap1_clk_disable(clk->parent); + omap1_clk_disable(&clk->parent->clk_hw); if (clk->flags & CLOCK_NO_IDLE_PARENT) - omap1_clk_allow_idle(clk->parent); + omap1_clk_allow_idle(&clk->parent->clk_hw); } } } -static omap1_clk_enable(struct clk *clk) +static omap1_clk_enable(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); int ret = 0; if (clk->usecount++ == 0) { if (clk->parent) { - ret = omap1_clk_enable(clk->parent); + ret = omap1_clk_enable(&clk->parent->clk_hw); if (ret) goto err; if (clk->flags & CLOCK_NO_IDLE_PARENT) - omap1_clk_deny_idle(clk->parent); + omap1_clk_deny_idle(&clk->parent->clk_hw); } - ret = clk->ops->enable(clk); + ret = clk->ops->enable(&clk->clk_hw); if (ret) { if (clk->parent) - omap1_clk_disable(clk->parent); + omap1_clk_disable(&clk->parent->clk_hw); goto err; } } @@ -695,8 +721,9 @@ static omap1_clk_enable(struct clk *clk) return ret; } -static int omap1_clk_enable_generic(struct clk *clk) +static int omap1_clk_enable_generic(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); __u16 regval16; __u32 regval32; @@ -719,8 +746,9 @@ static int omap1_clk_enable_generic(struct clk *clk) return 0; } -static void omap1_clk_disable_generic(struct clk *clk) +static void omap1_clk_disable_generic(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); __u16 regval16; __u32 regval32; @@ -738,13 +766,14 @@ static void omap1_clk_disable_generic(struct clk *clk) } } -static const struct clkops clkops_generic = { +static const struct clk_ops clkops_generic = { .enable = omap1_clk_enable_generic, .disable = omap1_clk_disable_generic, }; -static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) +static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); int dsor; /* Calculate divisor encoded as 2-bit exponent @@ -761,42 +790,44 @@ static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) return clk->parent->rate / dsor; } -static int omap1_clk_enable_dsp_domain(struct clk *clk) +static int omap1_clk_enable_dsp_domain(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); int retval; retval = omap1_clk_enable(api_ck_p); if (!retval) { - retval = omap1_clk_enable_generic(clk); + retval = omap1_clk_enable_generic(&clk->clk_hw); omap1_clk_disable(api_ck_p); } return retval; } -static void omap1_clk_disable_dsp_domain(struct clk *clk) +static void omap1_clk_disable_dsp_domain(struct clk_hw *clk_hw) { if (omap1_clk_enable(api_ck_p) == 0) { - omap1_clk_disable_generic(clk); + omap1_clk_disable_generic(clk_hw); omap1_clk_disable(api_ck_p); } } -static const struct clkops clkops_dspck = { +static const struct clk_ops clkops_dspck = { .enable = omap1_clk_enable_dsp_domain, .disable = omap1_clk_disable_dsp_domain, }; /* XXX SYSC register handling does not belong in the clock framework */ -static int omap1_clk_enable_uart_functional_16xx(struct clk *clk) +static int omap1_clk_enable_uart_functional_16xx(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); int ret; struct uart_clk *uclk; - ret = omap1_clk_enable_generic(clk); + ret = omap1_clk_enable_generic(&clk->clk_hw); if (ret == 0) { /* Set smart idle acknowledgement mode */ - uclk = (struct uart_clk *)clk; + uclk = container_of(clk, struct uart_clk, clk); omap_writeb((omap_readb(uclk->sysc_addr) & ~0x10) | 8, uclk->sysc_addr); } @@ -805,48 +836,52 @@ static int omap1_clk_enable_uart_functional_16xx(struct clk *clk) } /* XXX SYSC register handling does not belong in the clock framework */ -static void omap1_clk_disable_uart_functional_16xx(struct clk *clk) +static void omap1_clk_disable_uart_functional_16xx(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); struct uart_clk *uclk; /* Set force idle acknowledgement mode */ - uclk = (struct uart_clk *)clk; + uclk = container_of(clk, struct uart_clk, clk); omap_writeb((omap_readb(uclk->sysc_addr) & ~0x18), uclk->sysc_addr); - omap1_clk_disable_generic(clk); + omap1_clk_disable_generic(clk_hw); } /* XXX SYSC register handling does not belong in the clock framework */ -static const struct clkops clkops_uart_16xx = { +static const struct clk_ops clkops_uart_16xx = { .enable = omap1_clk_enable_uart_functional_16xx, .disable = omap1_clk_disable_uart_functional_16xx, }; -static long omap1_clk_round_rate(struct clk *clk, unsigned long rate) +static long omap1_clk_round_rate(struct clk_hw *clk_hw, unsigned long rate) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); + if (clk->round_rate != NULL) - return clk->round_rate(clk, rate); + return clk->round_rate(clk_hw, rate); return clk->rate; } -static int omap1_clk_set_rate(struct clk *clk, unsigned long rate) +static int omap1_clk_set_rate(struct clk_hw *clk_hw, unsigned long rate) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); int ret = -EINVAL; if (clk->set_rate) - ret = clk->set_rate(clk, rate); + ret = clk->set_rate(clk_hw, rate); return ret; } /* Propagate rate to children */ -static void propagate_rate(struct clk *tclk) +static void propagate_rate(struct omap1_clk *tclk) { - struct clk *clkp; + struct omap1_clk *clkp; list_for_each_entry(clkp, &tclk->children, sibling) { if (clkp->recalc) - clkp->rate = clkp->recalc(clkp); + clkp->rate = clkp->recalc(&clkp->clk_hw); propagate_rate(clkp); } } @@ -864,7 +899,7 @@ int clk_enable(struct clk *clk) return -EINVAL; spin_lock_irqsave(&clockfw_lock, flags); - ret = omap1_clk_enable(clk); + ret = omap1_clk_enable(clk->clk_hw); spin_unlock_irqrestore(&clockfw_lock, flags); return ret; @@ -874,19 +909,20 @@ EXPORT_SYMBOL(clk_enable); void clk_disable(struct clk *clk) { unsigned long flags; + struct omap1_clk *_clk = to_omap1_clk(clk->clk_hw); if (clk == NULL || IS_ERR(clk)) return; spin_lock_irqsave(&clockfw_lock, flags); - if (clk->usecount == 0) { + if (_clk->usecount == 0) { pr_err("Trying disable clock %s with 0 usecount\n", - clk->name); + _clk->name); WARN_ON(1); goto out; } - omap1_clk_disable(clk); + omap1_clk_disable(clk->clk_hw); out: spin_unlock_irqrestore(&clockfw_lock, flags); @@ -902,7 +938,7 @@ unsigned long clk_get_rate(struct clk *clk) return 0; spin_lock_irqsave(&clockfw_lock, flags); - ret = clk->rate; + ret = to_omap1_clk(clk->clk_hw)->rate; spin_unlock_irqrestore(&clockfw_lock, flags); return ret; @@ -922,7 +958,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate) return 0; spin_lock_irqsave(&clockfw_lock, flags); - ret = omap1_clk_round_rate(clk, rate); + ret = omap1_clk_round_rate(clk->clk_hw, rate); spin_unlock_irqrestore(&clockfw_lock, flags); return ret; @@ -938,9 +974,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate) return ret; spin_lock_irqsave(&clockfw_lock, flags); - ret = omap1_clk_set_rate(clk, rate); + ret = omap1_clk_set_rate(clk->clk_hw, rate); if (ret == 0) - propagate_rate(clk); + propagate_rate(to_omap1_clk(clk->clk_hw)); spin_unlock_irqrestore(&clockfw_lock, flags); return ret; @@ -957,7 +993,9 @@ EXPORT_SYMBOL(clk_set_parent); struct clk *clk_get_parent(struct clk *clk) { - return clk->parent; + struct omap1_clk *parent = to_omap1_clk(clk->clk_hw)->parent; + + return &parent->clk_hw.clk; } EXPORT_SYMBOL(clk_get_parent); @@ -966,8 +1004,10 @@ EXPORT_SYMBOL(clk_get_parent); */ /* Used for clocks that always have same value as the parent clock */ -static unsigned long followparent_recalc(struct clk *clk) +static unsigned long followparent_recalc(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); + return clk->parent->rate; } @@ -975,27 +1015,31 @@ static unsigned long followparent_recalc(struct clk *clk) * Used for clocks that have the same value as the parent clock, * divided by some factor */ -static unsigned long omap_fixed_divisor_recalc(struct clk *clk) +static unsigned long omap_fixed_divisor_recalc(struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); + WARN_ON(!clk->fixed_div); return clk->parent->rate / clk->fixed_div; } /** - * clk_preinit - initialize any fields in the struct clk before clk init - * @clk: struct clk * to initialize + * clk_preinit - initialize any fields in the struct omap1_clk before clk init + * @clk: struct omap1_clk * to initialize * - * Initialize any struct clk fields needed before normal clk initialization + * Initialize any struct omap1_clk fields needed before normal clk initialization * can run. No return value. */ -static void clk_preinit(struct clk *clk) +static void clk_preinit(struct omap1_clk *clk) { INIT_LIST_HEAD(&clk->children); } -static int clk_register(struct clk *clk) +static int clk_register(struct device *dev, struct clk_hw *clk_hw) { + struct omap1_clk *clk = to_omap1_clk(clk_hw); + if (clk == NULL || IS_ERR(clk)) return -EINVAL; @@ -1005,13 +1049,15 @@ static int clk_register(struct clk *clk) if (clk->node.next || clk->node.prev) return 0; + clk_hw->clk.clk_hw = clk_hw; + mutex_lock(&clocks_mutex); if (clk->parent) list_add(&clk->sibling, &clk->parent->children); list_add(&clk->node, &clocks); if (clk->init) - clk->init(clk); + clk->init(&clk->clk_hw); mutex_unlock(&clocks_mutex); return 0; @@ -1020,16 +1066,16 @@ static int clk_register(struct clk *clk) /* * Low level helpers */ -static int clkll_enable_null(struct clk *clk) +static int clkll_enable_null(struct clk_hw *clk_hw) { return 0; } -static void clkll_disable_null(struct clk *clk) +static void clkll_disable_null(struct clk_hw *clk_hw) { } -static const struct clkops clkops_null = { +static const struct clk_ops clkops_null = { .enable = clkll_enable_null, .disable = clkll_disable_null, }; @@ -1039,7 +1085,7 @@ static const struct clkops clkops_null = { * * Used for clock aliases that are needed on some OMAPs, but not others */ -static struct clk dummy_ck = { +static struct omap1_clk dummy_ck = { .name = "dummy", .ops = &clkops_null, }; @@ -1052,7 +1098,7 @@ static struct clk dummy_ck = { /* * Disable any unused clocks left on by the bootloader */ -static void omap1_clk_disable_unused(struct clk *clk) +static void omap1_clk_disable_unused(struct omap1_clk *clk) { __u32 regval32; @@ -1074,13 +1120,13 @@ static void omap1_clk_disable_unused(struct clk *clk) return; printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name); - clk->ops->disable(clk); + clk->ops->disable(&clk->clk_hw); printk(" done\n"); } static int __init clk_disable_unused(void) { - struct clk *ck; + struct omap1_clk *ck; unsigned long flags; pr_info("clock: disabling unused clocks to save power\n"); @@ -1114,8 +1160,8 @@ static struct dentry *clk_debugfs_root; static int debug_clock_show(struct seq_file *s, void *unused) { - struct clk *c; - struct clk *pa; + struct omap1_clk *c; + struct omap1_clk *pa; mutex_lock(&clocks_mutex); seq_printf(s, "%-30s %-30s %-10s %s\n", @@ -1134,10 +1180,10 @@ static int debug_clock_show(struct seq_file *s, void *unused) DEFINE_SHOW_ATTRIBUTE(debug_clock); -static void clk_debugfs_register_one(struct clk *c) +static void clk_debugfs_register_one(struct omap1_clk *c) { struct dentry *d; - struct clk *pa = c->parent; + struct omap1_clk *pa = c->parent; d = debugfs_create_dir(c->name, pa ? pa->dent : clk_debugfs_root); c->dent = d; @@ -1147,9 +1193,9 @@ static void clk_debugfs_register_one(struct clk *c) debugfs_create_x8("flags", S_IRUGO, c->dent, &c->flags); } -static void clk_debugfs_register(struct clk *c) +static void clk_debugfs_register(struct omap1_clk *c) { - struct clk *pa = c->parent; + struct omap1_clk *pa = c->parent; if (pa && !pa->dent) clk_debugfs_register(pa); @@ -1160,7 +1206,7 @@ static void clk_debugfs_register(struct clk *c) static int __init clk_debugfs_init(void) { - struct clk *c; + struct omap1_clk *c; struct dentry *d; d = debugfs_create_dir("clock", NULL); @@ -1181,13 +1227,13 @@ late_initcall(clk_debugfs_init); * Omap1 clocks */ -static struct clk ck_ref = { +static struct omap1_clk ck_ref = { .name = "ck_ref", .ops = &clkops_null, .rate = 12000000, }; -static struct clk ck_dpll1 = { +static struct omap1_clk ck_dpll1 = { .name = "ck_dpll1", .ops = &clkops_null, .parent = &ck_ref, @@ -1210,7 +1256,7 @@ static struct arm_idlect1_clk ck_dpll1out = { .idlect_shift = IDL_CLKOUT_ARM_SHIFT, }; -static struct clk sossi_ck = { +static struct omap1_clk sossi_ck = { .name = "ck_sossi", .ops = &clkops_generic, .parent = &ck_dpll1out.clk, @@ -1221,7 +1267,7 @@ static struct clk sossi_ck = { .set_rate = &omap1_set_sossi_rate, }; -static struct clk arm_ck = { +static struct omap1_clk arm_ck = { .name = "arm_ck", .ops = &clkops_null, .parent = &ck_dpll1, @@ -1251,7 +1297,7 @@ static struct arm_idlect1_clk armper_ck = { * FIXME: This clock seems to be necessary but no-one has asked for its * activation. [ GPIO code for 1510 ] */ -static struct clk arm_gpio_ck = { +static struct omap1_clk arm_gpio_ck = { .name = "ick", .ops = &clkops_generic, .parent = &ck_dpll1, @@ -1300,7 +1346,7 @@ static struct arm_idlect1_clk armwdt_ck = { .idlect_shift = IDLWDT_ARM_SHIFT, }; -static struct clk arminth_ck16xx = { +static struct omap1_clk arminth_ck16xx = { .name = "arminth_ck", .ops = &clkops_null, .parent = &arm_ck, @@ -1312,7 +1358,7 @@ static struct clk arminth_ck16xx = { */ }; -static struct clk dsp_ck = { +static struct omap1_clk dsp_ck = { .name = "dsp_ck", .ops = &clkops_generic, .parent = &ck_dpll1, @@ -1324,7 +1370,7 @@ static struct clk dsp_ck = { .set_rate = omap1_clk_set_rate_ckctl_arm, }; -static struct clk dspmmu_ck = { +static struct omap1_clk dspmmu_ck = { .name = "dspmmu_ck", .ops = &clkops_null, .parent = &ck_dpll1, @@ -1334,7 +1380,7 @@ static struct clk dspmmu_ck = { .set_rate = omap1_clk_set_rate_ckctl_arm, }; -static struct clk dspper_ck = { +static struct omap1_clk dspper_ck = { .name = "dspper_ck", .ops = &clkops_dspck, .parent = &ck_dpll1, @@ -1346,7 +1392,7 @@ static struct clk dspper_ck = { .set_rate = &omap1_clk_set_rate_dsp_domain, }; -static struct clk dspxor_ck = { +static struct omap1_clk dspxor_ck = { .name = "dspxor_ck", .ops = &clkops_dspck, .parent = &ck_ref, @@ -1355,7 +1401,7 @@ static struct clk dspxor_ck = { .recalc = &followparent_recalc, }; -static struct clk dsptim_ck = { +static struct omap1_clk dsptim_ck = { .name = "dsptim_ck", .ops = &clkops_dspck, .parent = &ck_ref, @@ -1378,7 +1424,7 @@ static struct arm_idlect1_clk tc_ck = { .idlect_shift = IDLIF_ARM_SHIFT, }; -static struct clk arminth_ck1510 = { +static struct omap1_clk arminth_ck1510 = { .name = "arminth_ck", .ops = &clkops_null, .parent = &tc_ck.clk, @@ -1389,7 +1435,7 @@ static struct clk arminth_ck1510 = { */ }; -static struct clk tipb_ck = { +static struct omap1_clk tipb_ck = { /* No-idle controlled by "tc_ck" */ .name = "tipb_ck", .ops = &clkops_null, @@ -1397,7 +1443,7 @@ static struct clk tipb_ck = { .recalc = &followparent_recalc, }; -static struct clk l3_ocpi_ck = { +static struct omap1_clk l3_ocpi_ck = { /* No-idle controlled by "tc_ck" */ .name = "l3_ocpi_ck", .ops = &clkops_generic, @@ -1407,7 +1453,7 @@ static struct clk l3_ocpi_ck = { .recalc = &followparent_recalc, }; -static struct clk tc1_ck = { +static struct omap1_clk tc1_ck = { .name = "tc1_ck", .ops = &clkops_generic, .parent = &tc_ck.clk, @@ -1420,7 +1466,7 @@ static struct clk tc1_ck = { * FIXME: This clock seems to be necessary but no-one has asked for its * activation. [ pm.c (SRAM), CCP, Camera ] */ -static struct clk tc2_ck = { +static struct omap1_clk tc2_ck = { .name = "tc2_ck", .ops = &clkops_generic, .parent = &tc_ck.clk, @@ -1429,7 +1475,7 @@ static struct clk tc2_ck = { .recalc = &followparent_recalc, }; -static struct clk dma_ck = { +static struct omap1_clk dma_ck = { /* No-idle controlled by "tc_ck" */ .name = "dma_ck", .ops = &clkops_null, @@ -1437,7 +1483,7 @@ static struct clk dma_ck = { .recalc = &followparent_recalc, }; -static struct clk dma_lcdfree_ck = { +static struct omap1_clk dma_lcdfree_ck = { .name = "dma_lcdfree_ck", .ops = &clkops_null, .parent = &tc_ck.clk, @@ -1470,21 +1516,21 @@ static struct arm_idlect1_clk lb_ck = { .idlect_shift = IDLLB_ARM_SHIFT, }; -static struct clk rhea1_ck = { +static struct omap1_clk rhea1_ck = { .name = "rhea1_ck", .ops = &clkops_null, .parent = &tc_ck.clk, .recalc = &followparent_recalc, }; -static struct clk rhea2_ck = { +static struct omap1_clk rhea2_ck = { .name = "rhea2_ck", .ops = &clkops_null, .parent = &tc_ck.clk, .recalc = &followparent_recalc, }; -static struct clk lcd_ck_16xx = { +static struct omap1_clk lcd_ck_16xx = { .name = "lcd_ck", .ops = &clkops_generic, .parent = &ck_dpll1, @@ -1518,7 +1564,7 @@ static struct arm_idlect1_clk lcd_ck_1510 = { * * XXX does this need SYSC register handling? */ -static struct clk uart1_1510 = { +static struct omap1_clk uart1_1510 = { .name = "uart1_ck", .ops = &clkops_null, /* Direct from ULPD, no real parent */ @@ -1557,7 +1603,7 @@ static struct uart_clk uart1_16xx = { * * XXX does this need SYSC register handling? */ -static struct clk uart2_ck = { +static struct omap1_clk uart2_ck = { .name = "uart2_ck", .ops = &clkops_null, /* Direct from ULPD, no real parent */ @@ -1576,7 +1622,7 @@ static struct clk uart2_ck = { * * XXX does this need SYSC register handling? */ -static struct clk uart3_1510 = { +static struct omap1_clk uart3_1510 = { .name = "uart3_ck", .ops = &clkops_null, /* Direct from ULPD, no real parent */ @@ -1609,7 +1655,7 @@ static struct uart_clk uart3_16xx = { .sysc_addr = 0xfffb9854, }; -static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ +static struct omap1_clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ .name = "usb_clko", .ops = &clkops_generic, /* Direct from ULPD, no parent */ @@ -1619,7 +1665,7 @@ static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ .enable_bit = USB_MCLK_EN_BIT, }; -static struct clk usb_hhc_ck1510 = { +static struct omap1_clk usb_hhc_ck1510 = { .name = "usb_hhc_ck", .ops = &clkops_generic, /* Direct from ULPD, no parent */ @@ -1629,7 +1675,7 @@ static struct clk usb_hhc_ck1510 = { .enable_bit = USB_HOST_HHC_UHOST_EN, }; -static struct clk usb_hhc_ck16xx = { +static struct omap1_clk usb_hhc_ck16xx = { .name = "usb_hhc_ck", .ops = &clkops_generic, /* Direct from ULPD, no parent */ @@ -1640,7 +1686,7 @@ static struct clk usb_hhc_ck16xx = { .enable_bit = OTG_SYSCON_2_UHOST_EN_SHIFT }; -static struct clk usb_dc_ck = { +static struct omap1_clk usb_dc_ck = { .name = "usb_dc_ck", .ops = &clkops_generic, /* Direct from ULPD, no parent */ @@ -1649,7 +1695,7 @@ static struct clk usb_dc_ck = { .enable_bit = SOFT_USB_OTG_DPLL_REQ_SHIFT, }; -static struct clk uart1_7xx = { +static struct omap1_clk uart1_7xx = { .name = "uart1_ck", .ops = &clkops_generic, /* Direct from ULPD, no parent */ @@ -1658,7 +1704,7 @@ static struct clk uart1_7xx = { .enable_bit = 9, }; -static struct clk uart2_7xx = { +static struct omap1_clk uart2_7xx = { .name = "uart2_ck", .ops = &clkops_generic, /* Direct from ULPD, no parent */ @@ -1667,7 +1713,7 @@ static struct clk uart2_7xx = { .enable_bit = 11, }; -static struct clk mclk_1510 = { +static struct omap1_clk mclk_1510 = { .name = "mclk", .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ @@ -1676,7 +1722,7 @@ static struct clk mclk_1510 = { .enable_bit = SOFT_COM_MCKO_REQ_SHIFT, }; -static struct clk mclk_16xx = { +static struct omap1_clk mclk_16xx = { .name = "mclk", .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ @@ -1687,14 +1733,14 @@ static struct clk mclk_16xx = { .init = &omap1_init_ext_clk, }; -static struct clk bclk_1510 = { +static struct omap1_clk bclk_1510 = { .name = "bclk", .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ .rate = 12000000, }; -static struct clk bclk_16xx = { +static struct omap1_clk bclk_16xx = { .name = "bclk", .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ @@ -1705,7 +1751,7 @@ static struct clk bclk_16xx = { .init = &omap1_init_ext_clk, }; -static struct clk mmc1_ck = { +static struct omap1_clk mmc1_ck = { .name = "mmc1_ck", .ops = &clkops_generic, /* Functional clock is direct from ULPD, interface clock is ARMPER */ @@ -1720,7 +1766,7 @@ static struct clk mmc1_ck = { * XXX MOD_CONF_CTRL_0 bit 20 is defined in the 1510 TRM as * CONF_MOD_MCBSP3_AUXON ?? */ -static struct clk mmc2_ck = { +static struct omap1_clk mmc2_ck = { .name = "mmc2_ck", .ops = &clkops_generic, /* Functional clock is direct from ULPD, interface clock is ARMPER */ @@ -1731,7 +1777,7 @@ static struct clk mmc2_ck = { .enable_bit = 20, }; -static struct clk mmc3_ck = { +static struct omap1_clk mmc3_ck = { .name = "mmc3_ck", .ops = &clkops_generic, /* Functional clock is direct from ULPD, interface clock is ARMPER */ @@ -1742,7 +1788,7 @@ static struct clk mmc3_ck = { .enable_bit = SOFT_MMC_DPLL_REQ_SHIFT, }; -static struct clk virtual_ck_mpu = { +static struct omap1_clk virtual_ck_mpu = { .name = "mpu", .ops = &clkops_null, .parent = &arm_ck, /* Is smarter alias for */ @@ -1753,7 +1799,7 @@ static struct clk virtual_ck_mpu = { /* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK remains active during MPU idle whenever this is enabled */ -static struct clk i2c_fck = { +static struct omap1_clk i2c_fck = { .name = "i2c_fck", .ops = &clkops_null, .flags = CLOCK_NO_IDLE_PARENT, @@ -1761,7 +1807,7 @@ static struct clk i2c_fck = { .recalc = &followparent_recalc, }; -static struct clk i2c_ick = { +static struct omap1_clk i2c_ick = { .name = "i2c_ick", .ops = &clkops_null, .flags = CLOCK_NO_IDLE_PARENT, @@ -1773,7 +1819,7 @@ static struct clk i2c_ick = { * clkdev integration */ -static struct omap_clk omap_clks[] = { +static struct omap1_clk_lookup omap_clks[] = { /* non-ULPD clocks */ CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310 | CK_7XX), CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310 | CK_7XX), @@ -1866,7 +1912,7 @@ static void __init omap1_show_rates(void) int __init omap1_clk_init(void) { - struct omap_clk *c; + struct omap1_clk_lookup *c; int crystal_type = 0; /* Default 12 MHz */ u32 reg; @@ -1888,7 +1934,7 @@ int __init omap1_clk_init(void) arm_idlect1_mask = ~0; for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) - clk_preinit(c->lk.clk); + clk_preinit(to_omap1_clk(c->lk.clk_hw)); cpu_mask = 0; if (cpu_is_omap1710()) @@ -1905,13 +1951,13 @@ int __init omap1_clk_init(void) for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) if (c->cpu & cpu_mask) { clkdev_add(&c->lk); - clk_register(c->lk.clk); + clk_register(NULL, c->lk.clk_hw); } /* Pointers to these clocks are needed by code in clock.c */ - api_ck_p = clk_get(NULL, "api_ck"); - ck_dpll1_p = clk_get(NULL, "ck_dpll1"); - ck_ref_p = clk_get(NULL, "ck_ref"); + api_ck_p = &api_ck.clk.clk_hw; + ck_dpll1_p = &ck_dpll1.clk_hw; + ck_ref_p = &ck_ref.clk_hw; if (cpu_is_omap7xx()) ck_ref.rate = 13000000; @@ -1994,12 +2040,12 @@ int __init omap1_clk_init(void) * Only enable those clocks we will need, let the drivers * enable other clocks as necessary */ - clk_enable(&armper_ck.clk); - clk_enable(&armxor_ck.clk); - clk_enable(&armtim_ck.clk); /* This should be done by timer code */ + omap1_clk_enable(&armper_ck.clk.clk_hw); + omap1_clk_enable(&armxor_ck.clk.clk_hw); + omap1_clk_enable(&armtim_ck.clk.clk_hw); /* This should be done by timer code */ if (cpu_is_omap15xx()) - clk_enable(&arm_gpio_ck); + omap1_clk_enable(&arm_gpio_ck.clk_hw); return 0; } @@ -2011,7 +2057,7 @@ void __init omap1_clk_late_init(void) unsigned long rate = ck_dpll1.rate; /* Find the highest supported frequency and enable it */ - if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { + if (omap1_select_table_rate(&virtual_ck_mpu.clk_hw, ~0)) { pr_err("System frequencies not set, using default. Check your config.\n"); /* * Reprogramming the DPLL is tricky, it must be done from SRAM. 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[209.132.180.67]) by mx.google.com with ESMTP id l14si56052783pga.567.2019.08.08.14.43.53; Thu, 08 Aug 2019 14:43:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390531AbfHHVnw (ORCPT + 28 others); Thu, 8 Aug 2019 17:43:52 -0400 Received: from mout.kundenserver.de ([212.227.17.10]:38005 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390518AbfHHVnu (ORCPT ); Thu, 8 Aug 2019 17:43:50 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue107 [212.227.15.145]) with ESMTPA (Nemesis) id 1McYP5-1iRsYj0bOf-00cz43; Thu, 08 Aug 2019 23:43:32 +0200 From: Arnd Bergmann To: Tony Lindgren , Aaro Koskinen , Paul Walmsley Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman , Linus Walleij , Bartlomiej Zolnierkiewicz , Tomi Valkeinen , Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH 19/22] ARM: omap1: clk: use common_clk-like callbacks Date: Thu, 8 Aug 2019 23:41:29 +0200 Message-Id: <20190808214232.2798396-5-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190808214232.2798396-1-arnd@arndb.de> References: <20190808212234.2213262-1-arnd@arndb.de> <20190808214232.2798396-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:b8HK2EMT9di2Sk43vdvnOawkYOp4+8v9GbqhcSS03u02KK+6+yD ZvARKg+Caebq0d2G3lGLXvAyIscd6p1c4vlg7nexbhuZLpBciDZtN+uGa1rV1S2m4X5dn81 EooW7qRUoeert+lMdPaXv0iX+VCEXNy2jb57+FLXRCZlc1ft7BVejVsgWJygB4fJ8Fxr/XX mqj8o7MLHgTqW2zLGU58g== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:TRx5sjOPgLU=:3g39GEv2uh8hz/FAhj98fW s8T+TyzvT/C/FT3V3avoZojNMbcmbNLx+ywat+023VcLQYh0bQWKpPDcEcM0MxDPrhrgXBZsU XKct7HdunUKjgpxpc3uOT6nLRaAqxRR51xtlFEwtsNmBs9XVfXgQ9CwxvorTKRBQFvEjPeM2F OWaisCF60n/2KP8IgySO4rIiruAnihTu33qWeSS8TmRx1ix0i+eHZ551cf+yFZga4JF0Ugmyu GozsaDeIqZQyErbPV7TiaGErKv7/GX2WzOPORI/mAW00R62TjwdvQinQL8MersYKI//hl9GkJ ochxhRnPXtp/mRD756oAlztAH4PnEblW0qmc8HLkh8Px657Hh8cFWX9p6jw/v6P/ZwWkFNT/M OOCVsH+XHnyQRD2iR57JinMGvS2qZn0Q5rSvHLdgBpz7kEQ03oUmMnTfhzzagNVSCD++a1hhZ WW3yfXYPhhl/rK0zQwtU3RXrEQgyTjLCahi6ef03NxijQTLjtVXyKQVDtZFjbCt6y49ORJT0Z sVEVLZvfnHBGGJB3ZzpQTN+efYPQXI/zwTedq7u5DcBei1KzE26CD5AuNQ+6rRZQrxpH43YmA 2kMrmKKPo0dfiG0mdVelvigg9FYzsZhQuL8lj4RQiqvEahUQix/agZQbkZXMJQClBq+ZawyRa azkdvMrtKnBZkzl/XHbdvWnHzuDakvepLQyOgkRFc8VDlO/3SHezxqjb1ohQUL2UcLjYmC31V tXNVeDvLeXdaUIXXpqk034184IQVJ1UYpcJklQ== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The callbacks for clocks are almost the same as those used on common_clk, now reduce the number of remaining differences: - make .recalc_rate and .round_rate take a parent_rate argument - move .recalc_rate/.set_rate/.round_rate/.init from 'struct clk_hw' into 'struct clk_ops'. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/clock.c | 368 ++++++++++++++++++++---------------- 1 file changed, 200 insertions(+), 168 deletions(-) -- 2.20.0 diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 577686f61b3b..8b4d5ee13ba0 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -56,6 +56,10 @@ struct omap1_clk_lookup { * struct clk_ops - some clock function pointers * @enable: fn ptr that enables the current clock in hardware * @disable: fn ptr that enables the current clock in hardware + * @recalc_rate: fn ptr that returns the clock's current rate + * @set_rate: fn ptr that can change the clock's current rate + * @round_rate: fn ptr that can round the clock's current rate + * @init: fn ptr to do clock-specific initialization * * A "companion" clk is an accompanying clock to the one being queried * that must be enabled for the IP module connected to the clock to @@ -66,8 +70,12 @@ struct omap1_clk_lookup { * @find_companion must, unfortunately, remain. */ struct clk_ops { - int (*enable)(struct clk_hw *); - void (*disable)(struct clk_hw *); + int (*enable)(struct clk_hw *); + void (*disable)(struct clk_hw *); + unsigned long (*recalc_rate)(struct clk_hw *, unsigned long); + int (*set_rate)(struct clk_hw *, unsigned long, unsigned long); + long (*round_rate)(struct clk_hw *, unsigned long, unsigned long *); + void (*init)(struct clk_hw *); }; /* @@ -90,10 +98,6 @@ struct clk_ops { * @sibling: list_head connecting this clk to its parent clk's @children * @rate: current clock rate * @enable_reg: register to write to enable the clock (see @enable_bit) - * @recalc: fn ptr that returns the clock's current rate - * @set_rate: fn ptr that can change the clock's current rate - * @round_rate: fn ptr that can round the clock's current rate - * @init: fn ptr to do clock-specific initialization * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg) * @usecount: number of users that have requested this clock to be enabled * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div @@ -138,10 +142,6 @@ struct omap1_clk { struct list_head sibling; /* node for children */ unsigned long rate; void __iomem *enable_reg; - unsigned long (*recalc)(struct clk_hw *); - int (*set_rate)(struct clk_hw *, unsigned long); - long (*round_rate)(struct clk_hw *, unsigned long); - void (*init)(struct clk_hw *); u8 enable_bit; s8 usecount; u8 fixed_div; @@ -268,22 +268,21 @@ static DEFINE_SPINLOCK(clockfw_lock); * Omap1 specific clock functions */ -static unsigned long omap1_uart_recalc(struct clk_hw *clk_hw) +static unsigned long omap1_uart_recalc(struct clk_hw *clk_hw, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); unsigned int val = __raw_readl(clk->enable_reg); return val & clk->enable_bit ? 48000000 : 12000000; } -static unsigned long omap1_sossi_recalc(struct clk_hw *clk_hw) +static unsigned long omap1_sossi_recalc(struct clk_hw *clk_hw, unsigned long parent_rate) { - struct omap1_clk *clk = to_omap1_clk(clk_hw); u32 div = omap_readl(MOD_CONF_CTRL_1); div = (div >> 17) & 0x7; div++; - return clk->parent->rate / div; + return parent_rate / div; } static void omap1_clk_allow_idle(struct clk_hw *clk_hw) @@ -363,7 +362,7 @@ static __u16 verify_ckctl_value(__u16 newval) return newval; } -static int calc_dsor_exp(struct omap1_clk *clk, unsigned long rate) +static int calc_dsor_exp(struct omap1_clk *clk, unsigned long rate, unsigned long parent_rate) { /* Note: If target frequency is too low, this function will return 4, * which is invalid value. Caller must check for this value and act @@ -377,14 +376,9 @@ static int calc_dsor_exp(struct omap1_clk *clk, unsigned long rate) * DSPMMU_CK >= TC_CK */ unsigned long realrate; - struct omap1_clk * parent; unsigned dsor_exp; - parent = clk->parent; - if (unlikely(parent == NULL)) - return -EIO; - - realrate = parent->rate; + realrate = parent_rate; for (dsor_exp=0; dsor_exp<4; dsor_exp++) { if (realrate <= rate) break; @@ -395,13 +389,13 @@ static int calc_dsor_exp(struct omap1_clk *clk, unsigned long rate) return dsor_exp; } -static unsigned long omap1_ckctl_recalc(struct clk_hw *clk_hw) +static unsigned long omap1_ckctl_recalc(struct clk_hw *clk_hw, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); /* Calculate divisor encoded as 2-bit exponent */ int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); - return clk->parent->rate / dsor; + return parent_rate / dsor; } /*------------------------------------------------------------------------- @@ -453,7 +447,7 @@ static struct mpu_rate omap1_rate_table[] = { }; /* MPU virtual clock functions */ -static int omap1_select_table_rate(struct clk_hw *clk_hw, unsigned long rate) +static int omap1_select_table_rate(struct clk_hw *clk_hw, unsigned long rate, unsigned long parent_rate) { /* Find the highest supported frequency <= rate and switch to it */ struct mpu_rate * ptr; @@ -488,13 +482,13 @@ static int omap1_select_table_rate(struct clk_hw *clk_hw, unsigned long rate) return 0; } -static int omap1_clk_set_rate_dsp_domain(struct clk_hw *clk_hw, unsigned long rate) +static int omap1_clk_set_rate_dsp_domain(struct clk_hw *clk_hw, unsigned long rate, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); int dsor_exp; u16 regval; - dsor_exp = calc_dsor_exp(clk, rate); + dsor_exp = calc_dsor_exp(clk, rate, parent_rate); if (dsor_exp > 3) dsor_exp = -EINVAL; if (dsor_exp < 0) @@ -504,29 +498,29 @@ static int omap1_clk_set_rate_dsp_domain(struct clk_hw *clk_hw, unsigned long ra regval &= ~(3 << clk->rate_offset); regval |= dsor_exp << clk->rate_offset; __raw_writew(regval, DSP_CKCTL); - clk->rate = clk->parent->rate / (1 << dsor_exp); + clk->rate = parent_rate / (1 << dsor_exp); return 0; } -static long omap1_clk_round_rate_ckctl_arm(struct clk_hw *clk_hw, unsigned long rate) +static long omap1_clk_round_rate_ckctl_arm(struct clk_hw *clk_hw, unsigned long rate, unsigned long *parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); - int dsor_exp = calc_dsor_exp(clk, rate); + int dsor_exp = calc_dsor_exp(clk, rate, *parent_rate); if (dsor_exp < 0) return dsor_exp; if (dsor_exp > 3) dsor_exp = 3; - return clk->parent->rate / (1 << dsor_exp); + return *parent_rate / (1 << dsor_exp); } -static int omap1_clk_set_rate_ckctl_arm(struct clk_hw *clk_hw, unsigned long rate) +static int omap1_clk_set_rate_ckctl_arm(struct clk_hw *clk_hw, unsigned long rate, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); int dsor_exp; u16 regval; - dsor_exp = calc_dsor_exp(clk, rate); + dsor_exp = calc_dsor_exp(clk, rate, parent_rate); if (dsor_exp > 3) dsor_exp = -EINVAL; if (dsor_exp < 0) @@ -537,11 +531,11 @@ static int omap1_clk_set_rate_ckctl_arm(struct clk_hw *clk_hw, unsigned long rat regval |= dsor_exp << clk->rate_offset; regval = verify_ckctl_value(regval); omap_writew(regval, ARM_CKCTL); - clk->rate = clk->parent->rate / (1 << dsor_exp); + clk->rate = parent_rate / (1 << dsor_exp); return 0; } -static long omap1_round_to_table_rate(struct clk_hw *clk_hw, unsigned long rate) +static long omap1_round_to_table_rate(struct clk_hw *clk_hw, unsigned long rate, unsigned long *parent_rate) { /* Find the highest supported frequency <= rate */ struct mpu_rate * ptr; @@ -592,7 +586,7 @@ static unsigned calc_ext_dsor(unsigned long rate) } /* XXX Only needed on 1510 */ -static int omap1_set_uart_rate(struct clk_hw *clk_hw, unsigned long rate) +static int omap1_set_uart_rate(struct clk_hw *clk_hw, unsigned long rate, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); unsigned int val; @@ -611,7 +605,7 @@ static int omap1_set_uart_rate(struct clk_hw *clk_hw, unsigned long rate) } /* External clock (MCLK & BCLK) functions */ -static int omap1_set_ext_clk_rate(struct clk_hw *clk_hw, unsigned long rate) +static int omap1_set_ext_clk_rate(struct clk_hw *clk_hw, unsigned long rate, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); unsigned dsor; @@ -630,16 +624,14 @@ static int omap1_set_ext_clk_rate(struct clk_hw *clk_hw, unsigned long rate) return 0; } -static int omap1_set_sossi_rate(struct clk_hw *clk_hw, unsigned long rate) +static int omap1_set_sossi_rate(struct clk_hw *clk_hw, unsigned long rate, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); u32 l; int div; - unsigned long p_rate; - p_rate = clk->parent->rate; /* Round towards slower frequency */ - div = (p_rate + rate - 1) / rate; + div = (parent_rate + rate - 1) / rate; div--; if (div < 0 || div > 7) return -EINVAL; @@ -649,12 +641,12 @@ static int omap1_set_sossi_rate(struct clk_hw *clk_hw, unsigned long rate) l |= div << 17; omap_writel(l, MOD_CONF_CTRL_1); - clk->rate = p_rate / (div + 1); + clk->rate = parent_rate / (div + 1); return 0; } -static long omap1_round_ext_clk_rate(struct clk_hw *clk_hw, unsigned long rate) +static long omap1_round_ext_clk_rate(struct clk_hw *clk_hw, unsigned long rate, unsigned long *parent_rate) { return 96000000 / calc_ext_dsor(rate); } @@ -678,16 +670,27 @@ static void omap1_init_ext_clk(struct clk_hw *clk_hw) clk-> rate = 96000000 / dsor; } +struct clk_hw *clk_hw_get_parent(const struct clk_hw *clk_hw) +{ + struct omap1_clk *clk = to_omap1_clk(clk_hw); + + if (!clk->parent) + return NULL; + + return &clk->parent->clk_hw; +} + static void omap1_clk_disable(struct clk_hw *clk_hw) { struct omap1_clk *clk = to_omap1_clk(clk_hw); + struct clk_hw *parent = clk_hw_get_parent(clk_hw); if (clk->usecount > 0 && !(--clk->usecount)) { - clk->ops->disable(&clk->clk_hw); - if (likely(clk->parent)) { - omap1_clk_disable(&clk->parent->clk_hw); + clk->ops->disable(clk_hw); + if (likely(parent)) { + omap1_clk_disable(parent); if (clk->flags & CLOCK_NO_IDLE_PARENT) - omap1_clk_allow_idle(&clk->parent->clk_hw); + omap1_clk_allow_idle(parent); } } } @@ -695,22 +698,23 @@ static void omap1_clk_disable(struct clk_hw *clk_hw) static omap1_clk_enable(struct clk_hw *clk_hw) { struct omap1_clk *clk = to_omap1_clk(clk_hw); + struct clk_hw *parent = clk_hw_get_parent(clk_hw); int ret = 0; if (clk->usecount++ == 0) { - if (clk->parent) { - ret = omap1_clk_enable(&clk->parent->clk_hw); + if (parent) { + ret = omap1_clk_enable(parent); if (ret) goto err; if (clk->flags & CLOCK_NO_IDLE_PARENT) - omap1_clk_deny_idle(&clk->parent->clk_hw); + omap1_clk_deny_idle(parent); } ret = clk->ops->enable(&clk->clk_hw); if (ret) { - if (clk->parent) - omap1_clk_disable(&clk->parent->clk_hw); + if (parent) + omap1_clk_disable(parent); goto err; } } @@ -771,7 +775,7 @@ static const struct clk_ops clkops_generic = { .disable = omap1_clk_disable_generic, }; -static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk_hw *clk_hw) +static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk_hw *clk_hw, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); int dsor; @@ -787,7 +791,7 @@ static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk_hw *clk_hw) dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); omap1_clk_disable(api_ck_p); - return clk->parent->rate / dsor; + return parent_rate / dsor; } static int omap1_clk_enable_dsp_domain(struct clk_hw *clk_hw) @@ -812,11 +816,6 @@ static void omap1_clk_disable_dsp_domain(struct clk_hw *clk_hw) } } -static const struct clk_ops clkops_dspck = { - .enable = omap1_clk_enable_dsp_domain, - .disable = omap1_clk_disable_dsp_domain, -}; - /* XXX SYSC register handling does not belong in the clock framework */ static int omap1_clk_enable_uart_functional_16xx(struct clk_hw *clk_hw) { @@ -857,9 +856,20 @@ static const struct clk_ops clkops_uart_16xx = { static long omap1_clk_round_rate(struct clk_hw *clk_hw, unsigned long rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); + struct clk_hw *parent = clk_hw_get_parent(clk_hw); + struct omap1_clk *parent_clk; + unsigned long parent_rate = 0; + + if (parent) { + parent_clk = to_omap1_clk(parent); + parent_rate = parent_clk->rate; + } + + if (clk->ops->round_rate != NULL) + return clk->ops->round_rate(clk_hw, rate, &parent_rate); - if (clk->round_rate != NULL) - return clk->round_rate(clk_hw, rate); + if (parent) + parent_clk->rate = parent_rate; return clk->rate; } @@ -867,10 +877,15 @@ static long omap1_clk_round_rate(struct clk_hw *clk_hw, unsigned long rate) static int omap1_clk_set_rate(struct clk_hw *clk_hw, unsigned long rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); + struct clk_hw *parent = clk_hw_get_parent(clk_hw); + unsigned long parent_rate = 0; int ret = -EINVAL; - if (clk->set_rate) - ret = clk->set_rate(clk_hw, rate); + if (parent) + parent_rate = to_omap1_clk(parent)->rate; + + if (clk->ops->set_rate) + ret = clk->ops->set_rate(clk_hw, rate, parent_rate); return ret; } @@ -880,8 +895,8 @@ static void propagate_rate(struct omap1_clk *tclk) struct omap1_clk *clkp; list_for_each_entry(clkp, &tclk->children, sibling) { - if (clkp->recalc) - clkp->rate = clkp->recalc(&clkp->clk_hw); + if (clkp->ops->recalc_rate) + clkp->rate = clkp->ops->recalc_rate(&clkp->clk_hw, tclk->rate); propagate_rate(clkp); } } @@ -993,9 +1008,12 @@ EXPORT_SYMBOL(clk_set_parent); struct clk *clk_get_parent(struct clk *clk) { - struct omap1_clk *parent = to_omap1_clk(clk->clk_hw)->parent; + struct clk_hw *parent = clk_hw_get_parent(clk->clk_hw); + + if (!parent) + return NULL; - return &parent->clk_hw.clk; + return &parent->clk; } EXPORT_SYMBOL(clk_get_parent); @@ -1004,24 +1022,22 @@ EXPORT_SYMBOL(clk_get_parent); */ /* Used for clocks that always have same value as the parent clock */ -static unsigned long followparent_recalc(struct clk_hw *clk_hw) +static unsigned long followparent_recalc(struct clk_hw *clk_hw, unsigned long parent_rate) { - struct omap1_clk *clk = to_omap1_clk(clk_hw); - - return clk->parent->rate; + return parent_rate; } /* * Used for clocks that have the same value as the parent clock, * divided by some factor */ -static unsigned long omap_fixed_divisor_recalc(struct clk_hw *clk_hw) +static unsigned long omap_fixed_divisor_recalc(struct clk_hw *clk_hw, unsigned long parent_rate) { struct omap1_clk *clk = to_omap1_clk(clk_hw); WARN_ON(!clk->fixed_div); - return clk->parent->rate / clk->fixed_div; + return parent_rate / clk->fixed_div; } /** @@ -1056,8 +1072,8 @@ static int clk_register(struct device *dev, struct clk_hw *clk_hw) list_add(&clk->sibling, &clk->parent->children); list_add(&clk->node, &clocks); - if (clk->init) - clk->init(&clk->clk_hw); + if (clk->ops->init) + clk->ops->init(&clk->clk_hw); mutex_unlock(&clocks_mutex); return 0; @@ -1080,6 +1096,12 @@ static const struct clk_ops clkops_null = { .disable = clkll_disable_null, }; +static const struct clk_ops clkops_followparent = { + .enable = clkll_enable_null, + .disable = clkll_disable_null, + .recalc_rate = followparent_recalc, +}; + /* * Dummy clock * @@ -1239,6 +1261,12 @@ static struct omap1_clk ck_dpll1 = { .parent = &ck_ref, }; +static const struct clk_ops clkops_generic_followparent = { + .enable = omap1_clk_enable_generic, + .disable = omap1_clk_disable_generic, + .recalc_rate = followparent_recalc, +}; + /* * FIXME: This clock seems to be necessary but no-one has asked for its * activation. [ FIX: SoSSI, SSR ] @@ -1246,33 +1274,50 @@ static struct omap1_clk ck_dpll1 = { static struct arm_idlect1_clk ck_dpll1out = { .clk = { .name = "ck_dpll1out", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &ck_dpll1, .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_CKOUT_ARM, - .recalc = &followparent_recalc, }, .idlect_shift = IDL_CLKOUT_ARM_SHIFT, }; +static const struct clk_ops clkops_sossi = { + .enable = omap1_clk_enable_generic, + .disable = omap1_clk_disable_generic, + .recalc_rate = &omap1_sossi_recalc, + .set_rate = &omap1_set_sossi_rate, +}; + static struct omap1_clk sossi_ck = { .name = "ck_sossi", - .ops = &clkops_generic, + .ops = &clkops_sossi, .parent = &ck_dpll1out.clk, .flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1), .enable_bit = CONF_MOD_SOSSI_CLK_EN_R, - .recalc = &omap1_sossi_recalc, - .set_rate = &omap1_set_sossi_rate, +}; + +struct clk_ops clkops_null_ckctl = { + .enable = clkll_enable_null, + .disable = clkll_disable_null, + .recalc_rate = omap1_ckctl_recalc, + .round_rate = omap1_clk_round_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_ckctl_arm, }; static struct omap1_clk arm_ck = { .name = "arm_ck", - .ops = &clkops_null, + .ops = &clkops_null_ckctl, .parent = &ck_dpll1, .rate_offset = CKCTL_ARMDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, +}; + +struct clk_ops clkops_generic_ckctl = { + .enable = omap1_clk_enable_generic, + .disable = omap1_clk_disable_generic, + .recalc_rate = omap1_ckctl_recalc, .round_rate = omap1_clk_round_rate_ckctl_arm, .set_rate = omap1_clk_set_rate_ckctl_arm, }; @@ -1280,15 +1325,12 @@ static struct omap1_clk arm_ck = { static struct arm_idlect1_clk armper_ck = { .clk = { .name = "armper_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_ckctl, .parent = &ck_dpll1, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_PERCK, .rate_offset = CKCTL_PERDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, }, .idlect_shift = IDLPER_ARM_SHIFT, }; @@ -1299,22 +1341,20 @@ static struct arm_idlect1_clk armper_ck = { */ static struct omap1_clk arm_gpio_ck = { .name = "ick", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &ck_dpll1, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_GPIOCK, - .recalc = &followparent_recalc, }; static struct arm_idlect1_clk armxor_ck = { .clk = { .name = "armxor_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &ck_ref, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_XORPCK, - .recalc = &followparent_recalc, }, .idlect_shift = IDLXORP_ARM_SHIFT, }; @@ -1322,16 +1362,21 @@ static struct arm_idlect1_clk armxor_ck = { static struct arm_idlect1_clk armtim_ck = { .clk = { .name = "armtim_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &ck_ref, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_TIMCK, - .recalc = &followparent_recalc, }, .idlect_shift = IDLTIM_ARM_SHIFT, }; +static const struct clk_ops clkops_fixed_divisor = { + .enable = omap1_clk_enable_generic, + .disable = omap1_clk_disable_generic, + .recalc_rate = omap_fixed_divisor_recalc, +}; + static struct arm_idlect1_clk armwdt_ck = { .clk = { .name = "armwdt_ck", @@ -1341,16 +1386,14 @@ static struct arm_idlect1_clk armwdt_ck = { .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_WDTCK, .fixed_div = 14, - .recalc = &omap_fixed_divisor_recalc, }, .idlect_shift = IDLWDT_ARM_SHIFT, }; static struct omap1_clk arminth_ck16xx = { .name = "arminth_ck", - .ops = &clkops_null, + .ops = &clkops_followparent, .parent = &arm_ck, - .recalc = &followparent_recalc, /* Note: On 16xx the frequency can be divided by 2 by programming * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1 * @@ -1360,24 +1403,26 @@ static struct omap1_clk arminth_ck16xx = { static struct omap1_clk dsp_ck = { .name = "dsp_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_ckctl, .parent = &ck_dpll1, .enable_reg = OMAP1_IO_ADDRESS(ARM_CKCTL), .enable_bit = EN_DSPCK, .rate_offset = CKCTL_DSPDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, }; static struct omap1_clk dspmmu_ck = { .name = "dspmmu_ck", - .ops = &clkops_null, + .ops = &clkops_null_ckctl, .parent = &ck_dpll1, .rate_offset = CKCTL_DSPMMUDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, +}; + +static const struct clk_ops clkops_dspck = { + .enable = omap1_clk_enable_dsp_domain, + .disable = omap1_clk_disable_dsp_domain, + .recalc_rate = omap1_ckctl_recalc_dsp_domain, .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, + .set_rate = omap1_clk_set_rate_dsp_domain, }; static struct omap1_clk dspper_ck = { @@ -1387,48 +1432,45 @@ static struct omap1_clk dspper_ck = { .enable_reg = DSP_IDLECT2, .enable_bit = EN_PERCK, .rate_offset = CKCTL_PERDIV_OFFSET, - .recalc = &omap1_ckctl_recalc_dsp_domain, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = &omap1_clk_set_rate_dsp_domain, +}; + +static const struct clk_ops clkops_dspck_followparent = { + .enable = omap1_clk_enable_dsp_domain, + .disable = omap1_clk_disable_dsp_domain, + .recalc_rate = followparent_recalc, }; static struct omap1_clk dspxor_ck = { .name = "dspxor_ck", - .ops = &clkops_dspck, + .ops = &clkops_dspck_followparent, .parent = &ck_ref, .enable_reg = DSP_IDLECT2, .enable_bit = EN_XORPCK, - .recalc = &followparent_recalc, }; static struct omap1_clk dsptim_ck = { .name = "dsptim_ck", - .ops = &clkops_dspck, + .ops = &clkops_dspck_followparent, .parent = &ck_ref, .enable_reg = DSP_IDLECT2, .enable_bit = EN_DSPTIMCK, - .recalc = &followparent_recalc, }; static struct arm_idlect1_clk tc_ck = { .clk = { .name = "tc_ck", - .ops = &clkops_null, + .ops = &clkops_null_ckctl, .parent = &ck_dpll1, .flags = CLOCK_IDLE_CONTROL, .rate_offset = CKCTL_TCDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, }, .idlect_shift = IDLIF_ARM_SHIFT, }; static struct omap1_clk arminth_ck1510 = { .name = "arminth_ck", - .ops = &clkops_null, + .ops = &clkops_followparent, .parent = &tc_ck.clk, - .recalc = &followparent_recalc, /* Note: On 1510 the frequency follows TC_CK * * 16xx version is in MPU clocks. @@ -1438,28 +1480,25 @@ static struct omap1_clk arminth_ck1510 = { static struct omap1_clk tipb_ck = { /* No-idle controlled by "tc_ck" */ .name = "tipb_ck", - .ops = &clkops_null, + .ops = &clkops_followparent, .parent = &tc_ck.clk, - .recalc = &followparent_recalc, }; static struct omap1_clk l3_ocpi_ck = { /* No-idle controlled by "tc_ck" */ .name = "l3_ocpi_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &tc_ck.clk, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_OCPI_CK, - .recalc = &followparent_recalc, }; static struct omap1_clk tc1_ck = { .name = "tc1_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &tc_ck.clk, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_TC1_CK, - .recalc = &followparent_recalc, }; /* @@ -1468,37 +1507,33 @@ static struct omap1_clk tc1_ck = { */ static struct omap1_clk tc2_ck = { .name = "tc2_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &tc_ck.clk, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_TC2_CK, - .recalc = &followparent_recalc, }; static struct omap1_clk dma_ck = { /* No-idle controlled by "tc_ck" */ .name = "dma_ck", - .ops = &clkops_null, + .ops = &clkops_followparent, .parent = &tc_ck.clk, - .recalc = &followparent_recalc, }; static struct omap1_clk dma_lcdfree_ck = { .name = "dma_lcdfree_ck", - .ops = &clkops_null, + .ops = &clkops_followparent, .parent = &tc_ck.clk, - .recalc = &followparent_recalc, }; static struct arm_idlect1_clk api_ck = { .clk = { .name = "api_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &tc_ck.clk, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_APICK, - .recalc = &followparent_recalc, }, .idlect_shift = IDLAPI_ARM_SHIFT, }; @@ -1506,58 +1541,56 @@ static struct arm_idlect1_clk api_ck = { static struct arm_idlect1_clk lb_ck = { .clk = { .name = "lb_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_followparent, .parent = &tc_ck.clk, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_LBCK, - .recalc = &followparent_recalc, }, .idlect_shift = IDLLB_ARM_SHIFT, }; static struct omap1_clk rhea1_ck = { .name = "rhea1_ck", - .ops = &clkops_null, + .ops = &clkops_followparent, .parent = &tc_ck.clk, - .recalc = &followparent_recalc, }; static struct omap1_clk rhea2_ck = { .name = "rhea2_ck", - .ops = &clkops_null, + .ops = &clkops_followparent, .parent = &tc_ck.clk, - .recalc = &followparent_recalc, }; static struct omap1_clk lcd_ck_16xx = { .name = "lcd_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_ckctl, .parent = &ck_dpll1, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_LCDCK, .rate_offset = CKCTL_LCDDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, }; static struct arm_idlect1_clk lcd_ck_1510 = { .clk = { .name = "lcd_ck", - .ops = &clkops_generic, + .ops = &clkops_generic_ckctl, .parent = &ck_dpll1, .flags = CLOCK_IDLE_CONTROL, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_LCDCK, .rate_offset = CKCTL_LCDDIV_OFFSET, - .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, }, .idlect_shift = OMAP1510_IDLLCD_ARM_SHIFT, }; +static const struct clk_ops clkops_uart = { + .enable = clkll_enable_null, + .disable = clkll_disable_null, + .set_rate = omap1_set_uart_rate, + .recalc_rate = omap1_uart_recalc, +}; + /* * XXX The enable_bit here is misused - it simply switches between 12MHz * and 48MHz. Reimplement with clksel. @@ -1566,15 +1599,13 @@ static struct arm_idlect1_clk lcd_ck_1510 = { */ static struct omap1_clk uart1_1510 = { .name = "uart1_ck", - .ops = &clkops_null, + .ops = &clkops_uart, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 12000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = CONF_MOD_UART1_CLK_MODE_R, - .set_rate = &omap1_set_uart_rate, - .recalc = &omap1_uart_recalc, }; /* @@ -1605,15 +1636,13 @@ static struct uart_clk uart1_16xx = { */ static struct omap1_clk uart2_ck = { .name = "uart2_ck", - .ops = &clkops_null, + .ops = &clkops_uart, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 12000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = CONF_MOD_UART2_CLK_MODE_R, - .set_rate = &omap1_set_uart_rate, - .recalc = &omap1_uart_recalc, }; /* @@ -1624,15 +1653,13 @@ static struct omap1_clk uart2_ck = { */ static struct omap1_clk uart3_1510 = { .name = "uart3_ck", - .ops = &clkops_null, + .ops = &clkops_uart, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 12000000, .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), .enable_bit = CONF_MOD_UART3_CLK_MODE_R, - .set_rate = &omap1_set_uart_rate, - .recalc = &omap1_uart_recalc, }; /* @@ -1722,15 +1749,20 @@ static struct omap1_clk mclk_1510 = { .enable_bit = SOFT_COM_MCKO_REQ_SHIFT, }; +static const struct clk_ops clkops_ext_clk = { + .enable = omap1_clk_enable_generic, + .disable = omap1_clk_disable_generic, + .set_rate = omap1_set_ext_clk_rate, + .round_rate = omap1_round_ext_clk_rate, + .init = omap1_init_ext_clk, +}; + static struct omap1_clk mclk_16xx = { .name = "mclk", - .ops = &clkops_generic, + .ops = &clkops_ext_clk, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ .enable_reg = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL), .enable_bit = COM_ULPD_PLL_CLK_REQ, - .set_rate = &omap1_set_ext_clk_rate, - .round_rate = &omap1_round_ext_clk_rate, - .init = &omap1_init_ext_clk, }; static struct omap1_clk bclk_1510 = { @@ -1742,13 +1774,10 @@ static struct omap1_clk bclk_1510 = { static struct omap1_clk bclk_16xx = { .name = "bclk", - .ops = &clkops_generic, + .ops = &clkops_ext_clk, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ .enable_reg = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL), .enable_bit = SWD_ULPD_PLL_CLK_REQ, - .set_rate = &omap1_set_ext_clk_rate, - .round_rate = &omap1_round_ext_clk_rate, - .init = &omap1_init_ext_clk, }; static struct omap1_clk mmc1_ck = { @@ -1788,31 +1817,34 @@ static struct omap1_clk mmc3_ck = { .enable_bit = SOFT_MMC_DPLL_REQ_SHIFT, }; +static const struct clk_ops clkops_mpu = { + .enable = clkll_enable_null, + .disable = clkll_disable_null, + .recalc_rate = followparent_recalc, + .set_rate = omap1_select_table_rate, + .round_rate = omap1_round_to_table_rate, +}; + static struct omap1_clk virtual_ck_mpu = { .name = "mpu", - .ops = &clkops_null, + .ops = &clkops_mpu, .parent = &arm_ck, /* Is smarter alias for */ - .recalc = &followparent_recalc, - .set_rate = &omap1_select_table_rate, - .round_rate = &omap1_round_to_table_rate, }; /* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK remains active during MPU idle whenever this is enabled */ static struct omap1_clk i2c_fck = { .name = "i2c_fck", - .ops = &clkops_null, + .ops = &clkops_followparent, .flags = CLOCK_NO_IDLE_PARENT, .parent = &armxor_ck.clk, - .recalc = &followparent_recalc, }; static struct omap1_clk i2c_ick = { .name = "i2c_ick", - .ops = &clkops_null, + .ops = &clkops_followparent, .flags = CLOCK_NO_IDLE_PARENT, .parent = &armper_ck.clk, - .recalc = &followparent_recalc, }; /* @@ -2057,7 +2089,7 @@ void __init omap1_clk_late_init(void) unsigned long rate = ck_dpll1.rate; /* Find the highest supported frequency and enable it */ - if (omap1_select_table_rate(&virtual_ck_mpu.clk_hw, ~0)) { + if (omap1_select_table_rate(&virtual_ck_mpu.clk_hw, ~0, 0)) { pr_err("System frequencies not set, using default. Check your config.\n"); /* * Reprogramming the DPLL is tricky, it must be done from SRAM.