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[176.171.218.149]) by smtp.gmail.com with ESMTPSA id r13-20020a5d498d000000b0032da40fd7bdsm2139621wrq.24.2023.10.18.06.31.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 18 Oct 2023 06:31:08 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Gibson , =?utf-8?b?RnLDqWTDqXJpYyBC?= =?utf-8?b?YXJyYXQ=?= , =?utf-8?q?C=C3=A9dric_Le_Goat?= =?utf-8?q?er?= , Harsh Prateek Bora , Nicholas Piggin , Daniel Henrique Barboza , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 1/6] hw/ppc/pnv_xscom: Rename pnv_xscom_realize(Error **) -> pnv_xscom_init() Date: Wed, 18 Oct 2023 15:30:54 +0200 Message-ID: <20231018133059.85765-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231018133059.85765-1-philmd@linaro.org> References: <20231018133059.85765-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12a; envelope-from=philmd@linaro.org; helo=mail-lf1-x12a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pnv_xscom_realize() is not used to *realize* QDev object, rename it as pnv_xscom_init(). The Error** argument is unused: remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- include/hw/ppc/pnv_xscom.h | 2 +- hw/ppc/pnv.c | 18 +++--------------- hw/ppc/pnv_xscom.c | 2 +- 3 files changed, 5 insertions(+), 17 deletions(-) diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 9bc6463547..41671001da 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -170,7 +170,7 @@ struct PnvXScomInterfaceClass { #define PNV10_XSCOM_PEC_PCI_BASE 0x8010800 /* index goes upwards ... */ #define PNV10_XSCOM_PEC_PCI_SIZE 0x200 -void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp); +void pnv_xscom_init(PnvChip *chip, uint64_t size); int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset, uint64_t xscom_base, uint64_t xscom_size, const char *compat, int compat_size); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index eb54f93986..456631c9dc 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1249,11 +1249,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) assert(chip8->xics); /* XSCOM bridge is first */ - pnv_xscom_realize(chip, PNV_XSCOM_SIZE, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } + pnv_xscom_init(chip, PNV_XSCOM_SIZE); sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); @@ -1512,11 +1508,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp) Error *local_err = NULL; /* XSCOM bridge is first */ - pnv_xscom_realize(chip, PNV9_XSCOM_SIZE, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } + pnv_xscom_init(chip, PNV9_XSCOM_SIZE); sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV9_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); @@ -1727,11 +1719,7 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) Error *local_err = NULL; /* XSCOM bridge is first */ - pnv_xscom_realize(chip, PNV10_XSCOM_SIZE, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } + pnv_xscom_init(chip, PNV10_XSCOM_SIZE); sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV10_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index d820e05e40..af57b55863 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -221,7 +221,7 @@ const MemoryRegionOps pnv_xscom_ops = { .endianness = DEVICE_BIG_ENDIAN, }; -void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp) +void pnv_xscom_init(PnvChip *chip, uint64_t size) { SysBusDevice *sbd = SYS_BUS_DEVICE(chip); char *name; From patchwork Wed Oct 18 13:30:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735054 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp994125wro; Wed, 18 Oct 2023 06:31:52 -0700 (PDT) X-Google-Smtp-Source: AGHT+IH8g/xDKneg5H8At5i5q4VBlJBXrUzjhqIzWP01dwzX/rAVqmw2cEg8Xs1JfK1kqz+yihVE X-Received: by 2002:a67:c309:0:b0:457:e44d:c624 with SMTP id r9-20020a67c309000000b00457e44dc624mr6133996vsj.2.1697635912121; Wed, 18 Oct 2023 06:31:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697635912; cv=none; d=google.com; s=arc-20160816; b=oOah7ISyBxi1C5xU5kWZFBRBgbBCIaTM50euDUq0VNB5gZ5iVWjtBjbfIEa5LFnn9+ Wa8LFVyc4cC1ST6BP7aWIQJtDqSO4V/l3F4un88tK07CzgcWNf7ZaRvGzWfeVFBJqXis Oa4AC1YoREg1sQk7ysuTQbfHZsYAhkmZcm7Nb4+z8eMlpHORG7l/sPv3xOfpFS7lov/K Z2lu7G9UerPXfRxUmeMhvg5kYCyvjM7eQYxmankgfHLzb84LcBXGwtFhki7/pe+xB14N TI7jUKL7xpiP1k37eDdfvWp/f1HqbWxxmpAirp1E0xeUtq0pVeIzDgR9TjSqiBRfJzP1 /PSw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=4JzNT1BOnEa9xt/v/nMXe1GFFvZS33OkSi1pdN0E7RE=; fh=i/WIozb1pGRSSAvN281CL0P9xvW88xHKKqLcdnHBUKw=; b=zIjTlIcg8EkPnT/75n1BZzVnkdJMgs1AYKmJMqtbkHwpwiHPq+bF2Vrk0PRJ2fFt75 AbzmVcvDNjqdC3IPFecTZFbbPIV1EQL6P2WMnpxHmq0xqeY2fSGbxG91XgcRzyfQRW1X KXmmIix+XfU7gb3cng5R4YKEOZtPrifX/OcmaXLAF1oezlyDu5u7kUtPCdEP1wEWfjVr ueiogqYO6IKSpwDOpSA5xhG3Y1Olbd4AQit0dLKNQCEZWCKE5tkN8klGYyVzOEtb3gD8 DUYTjap9XDC16piD0YC8d+JF1RjpbpEFGyjZVb0S5A33tRWl690H+yXRsSLKzFXMLBy1 g56w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iqiTj8zu; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.171.218.149]) by smtp.gmail.com with ESMTPSA id z3-20020a5d6403000000b0032db430fb9bsm2114410wru.68.2023.10.18.06.31.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 18 Oct 2023 06:31:15 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Gibson , =?utf-8?b?RnLDqWTDqXJpYyBC?= =?utf-8?b?YXJyYXQ=?= , =?utf-8?q?C=C3=A9dric_Le_Goat?= =?utf-8?q?er?= , Harsh Prateek Bora , Nicholas Piggin , Daniel Henrique Barboza , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 2/6] hw/ppc/pnv_xscom: Move sysbus_mmio_map() call within pnv_xscom_init() Date: Wed, 18 Oct 2023 15:30:55 +0200 Message-ID: <20231018133059.85765-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231018133059.85765-1-philmd@linaro.org> References: <20231018133059.85765-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::135; envelope-from=philmd@linaro.org; helo=mail-lf1-x135.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In order to make the next commit trivial, move sysbus_init_mmio() calls just before the corresponding sysbus_mmio_map() calls. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- include/hw/ppc/pnv_xscom.h | 2 +- hw/ppc/pnv.c | 9 +++------ hw/ppc/pnv_xscom.c | 3 ++- 3 files changed, 6 insertions(+), 8 deletions(-) diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 41671001da..35b19610f7 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -170,7 +170,7 @@ struct PnvXScomInterfaceClass { #define PNV10_XSCOM_PEC_PCI_BASE 0x8010800 /* index goes upwards ... */ #define PNV10_XSCOM_PEC_PCI_SIZE 0x200 -void pnv_xscom_init(PnvChip *chip, uint64_t size); +void pnv_xscom_init(PnvChip *chip, uint64_t size, hwaddr addr); int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset, uint64_t xscom_base, uint64_t xscom_size, const char *compat, int compat_size); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 456631c9dc..10158f7684 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1249,8 +1249,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) assert(chip8->xics); /* XSCOM bridge is first */ - pnv_xscom_init(chip, PNV_XSCOM_SIZE); - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip)); + pnv_xscom_init(chip, PNV_XSCOM_SIZE, PNV_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); if (local_err) { @@ -1508,8 +1507,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp) Error *local_err = NULL; /* XSCOM bridge is first */ - pnv_xscom_init(chip, PNV9_XSCOM_SIZE); - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV9_XSCOM_BASE(chip)); + pnv_xscom_init(chip, PNV9_XSCOM_SIZE, PNV9_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); if (local_err) { @@ -1719,8 +1717,7 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) Error *local_err = NULL; /* XSCOM bridge is first */ - pnv_xscom_init(chip, PNV10_XSCOM_SIZE); - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV10_XSCOM_BASE(chip)); + pnv_xscom_init(chip, PNV10_XSCOM_SIZE, PNV10_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); if (local_err) { diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index af57b55863..cf892c9fe8 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -221,7 +221,7 @@ const MemoryRegionOps pnv_xscom_ops = { .endianness = DEVICE_BIG_ENDIAN, }; -void pnv_xscom_init(PnvChip *chip, uint64_t size) +void pnv_xscom_init(PnvChip *chip, uint64_t size, hwaddr addr) { SysBusDevice *sbd = SYS_BUS_DEVICE(chip); char *name; @@ -230,6 +230,7 @@ void pnv_xscom_init(PnvChip *chip, uint64_t size) memory_region_init_io(&chip->xscom_mmio, OBJECT(chip), &pnv_xscom_ops, chip, name, size); sysbus_init_mmio(sbd, &chip->xscom_mmio); + sysbus_mmio_map(sbd, 0, addr); memory_region_init(&chip->xscom, OBJECT(chip), name, size); address_space_init(&chip->xscom_as, &chip->xscom, name); From patchwork Wed Oct 18 13:30:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735058 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp997004wro; Wed, 18 Oct 2023 06:37:25 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGT+0fk5W8LaTIlb6YkRaLRlt3ocPQfKdJQUu73TGaZprwvWdZq7C7bvkomJfSFwbaYKtg9 X-Received: by 2002:a25:ab4a:0:b0:d80:a9d:aeae with SMTP id u68-20020a25ab4a000000b00d800a9daeaemr5010908ybi.44.1697636245121; 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[176.171.218.149]) by smtp.gmail.com with ESMTPSA id p14-20020adfcc8e000000b0032db1d741a6sm2128974wrj.99.2023.10.18.06.31.20 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 18 Oct 2023 06:31:21 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Gibson , =?utf-8?b?RnLDqWTDqXJpYyBC?= =?utf-8?b?YXJyYXQ=?= , =?utf-8?q?C=C3=A9dric_Le_Goat?= =?utf-8?q?er?= , Harsh Prateek Bora , Nicholas Piggin , Daniel Henrique Barboza , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 3/6] hw/ppc/pnv_xscom: Do not use SysBus API to map local MMIO region Date: Wed, 18 Oct 2023 15:30:56 +0200 Message-ID: <20231018133059.85765-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231018133059.85765-1-philmd@linaro.org> References: <20231018133059.85765-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- hw/ppc/pnv_xscom.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index cf892c9fe8..805b1d0c87 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -223,14 +223,12 @@ const MemoryRegionOps pnv_xscom_ops = { void pnv_xscom_init(PnvChip *chip, uint64_t size, hwaddr addr) { - SysBusDevice *sbd = SYS_BUS_DEVICE(chip); char *name; name = g_strdup_printf("xscom-%x", chip->chip_id); memory_region_init_io(&chip->xscom_mmio, OBJECT(chip), &pnv_xscom_ops, chip, name, size); - sysbus_init_mmio(sbd, &chip->xscom_mmio); - sysbus_mmio_map(sbd, 0, addr); + memory_region_add_subregion(get_system_memory(), addr, &chip->xscom_mmio); memory_region_init(&chip->xscom, OBJECT(chip), name, size); address_space_init(&chip->xscom_as, &chip->xscom, name); From patchwork Wed Oct 18 13:30:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735056 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp994373wro; Wed, 18 Oct 2023 06:32:16 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGN70/FUM5MGZOsi7HCZ1v/oE78iWODYVyslApFhzEFDMd7Kzg0xwdDk3SgwQ5YlfUwriNe X-Received: by 2002:ad4:4c12:0:b0:651:800d:ffc9 with SMTP id bz18-20020ad44c12000000b00651800dffc9mr6489796qvb.22.1697635936015; Wed, 18 Oct 2023 06:32:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697635935; cv=none; d=google.com; s=arc-20160816; b=sNtatZ9cdQyUERMSH+qQ8P30fdiD/e391zgLwT+TsStrjrdr+6zSwHZxDpGibEIeEM /YAXdBMVfQhMIORIU3q8+g+gO8GyTwU66ktgGDKMT91r3gjYaV19tqz8S+FEnw7rXXXx rdpp3kwkmNW0MNykOC0ka5PqLdxOKVvzhutjWEfs2AzqTRHCS/1UIv4kLK0gaxa2Tv1u L5nOYW0QTAQQFUgoIX9jBtLh8kiF4m9RwRt5a1zOKCE4zQ1aHxK7P2xqMNPgJCANBtM8 xz/c2e0JALDFluQwAHSmV7YQKiRNZzQvJiBJw3wvyZNvjryq/xbZzOygro0jS27+Ob4v JtdQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=lu/LAV3gHNQX3jkZpzINwdsDxIlwSvdZerkbZ9OixCM=; fh=i/WIozb1pGRSSAvN281CL0P9xvW88xHKKqLcdnHBUKw=; b=cNoGJFBrNttV22ITPzJ2PKyXrOePoQQCk+Z6A9GKxsP99ksXAYxsM6JQ0gJvk2jhqj kHnSf7Z2PutKXXZviER9UHtbBOIb55GVQmrzCKFqHilHqfTYmFatX08ybSy8u4psA9P2 fGAZJ73S/k3DfkTu1rxGJajhWvsryH4B+/IQsnpWQfjV1/ggwMtiROhCC/JrZDxwwREd eOS7Lv2ffu7ENgHz90yZxpfS85+sQuoZpxz5EhrqDIIdWSaZu/PGHEs3RvHabn5tumkm epi754V/4Pc5/Bbl9ifRt8neUYlrZq8qQCPeNQRW7oB4lKbMV2jCCTw8iTz9T16A5qtw oTog== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Flwtg+G3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.171.218.149]) by smtp.gmail.com with ESMTPSA id j20-20020a05600c1c1400b004065daba6casm1709424wms.46.2023.10.18.06.31.26 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 18 Oct 2023 06:31:27 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Gibson , =?utf-8?b?RnLDqWTDqXJpYyBC?= =?utf-8?b?YXJyYXQ=?= , =?utf-8?q?C=C3=A9dric_Le_Goat?= =?utf-8?q?er?= , Harsh Prateek Bora , Nicholas Piggin , Daniel Henrique Barboza , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 4/6] hw/ppc/pnv: Do not use SysBus API to map local MMIO region Date: Wed, 18 Oct 2023 15:30:57 +0200 Message-ID: <20231018133059.85765-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231018133059.85765-1-philmd@linaro.org> References: <20231018133059.85765-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::235; envelope-from=philmd@linaro.org; helo=mail-lj1-x235.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- hw/ppc/pnv.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 10158f7684..c0e34fffbc 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1217,10 +1217,9 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp) name = g_strdup_printf("icp-%x", chip->chip_id); memory_region_init(&chip8->icp_mmio, OBJECT(chip), name, PNV_ICP_SIZE); - sysbus_init_mmio(SYS_BUS_DEVICE(chip), &chip8->icp_mmio); g_free(name); - - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 1, PNV_ICP_BASE(chip)); + memory_region_add_subregion(get_system_memory(), PNV_ICP_BASE(chip), + &chip8->icp_mmio); /* Map the ICP registers for each thread */ for (i = 0; i < chip->nr_cores; i++) { From patchwork Wed Oct 18 13:30:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735055 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp994172wro; Wed, 18 Oct 2023 06:31:56 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGk9Zheg95cKV+vMBDZVz1VOu5n4WylMSQAmpCmrnYQ9b72mJVnAYPK6TFoM1cQG5tmIPOQ X-Received: by 2002:a9d:7a45:0:b0:6cc:cc02:6ea4 with SMTP id z5-20020a9d7a45000000b006cccc026ea4mr4942958otm.38.1697635916381; Wed, 18 Oct 2023 06:31:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697635916; cv=none; d=google.com; s=arc-20160816; b=1ANpC0DLz2E/cLcjKLaD09v4HIdjTFfzpkOOb7/rj7l6i6LRFMThSotmswaVPkVLsP n/6AkiL5EDQKRdjUrNdNofUlZTUtnEgn8sjwcfdqMsQLeC2uSyTq8/UzkBA3D8Ub1p8r xJ/JYihFVICxqcbMo7QL174q7m5i5zQUBxMNqs++TlMlPcmfkdAVDW3ZKb97GQH4lHu7 JPPYG36w4JE4ry8Z/fyW30uHUprROpMpHIJRd/H6j2QsoFnvIRI3mWo8yq91HXWQC/K0 aF3z619N6cajKo03nTBHz1Zm7SOtDlY1fodg0dVE7xEmdiBeB80prCJ4w2DyAngnsMfp +G5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=3LiT9JTo43Z+vjp2dLyhikt+0rMd61MGWoGcd0rivsU=; fh=i/WIozb1pGRSSAvN281CL0P9xvW88xHKKqLcdnHBUKw=; b=G308kPLvaEQZ/NSX6FOxBq59FELWNUzmWOUV/MkzEkGx97AL+Hb8v9IYjhBlILboAd Uy13XVhNmgIQQm5KxWewnzTepbEsrM3vjDL6du+kin88/ecPy1+hV9hFiLWxKrdmfi8M 1GgLiJbC9bJcuKFsoh8nheb7RaH3B0L/sdMYNrNaoAPDYwKMDCxY+PwtE0LAXDrJnuSp /0W3njwPL64p3IPr1qFxjQDLbaEwFOieW2i/TpeaOb8dDsrGvVi3vXB/+YxHaQKx/5gW C9DD/Bt7Xv6Zs72MjLZucTAZh0fcvw3QnWAjRN6xHQtTCEppO6B6APvtt0VEBfo10uBl sCbA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VBgNqKbZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.171.218.149]) by smtp.gmail.com with ESMTPSA id p14-20020adfcc8e000000b0032db1d741a6sm2129389wrj.99.2023.10.18.06.31.32 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 18 Oct 2023 06:31:33 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Gibson , =?utf-8?b?RnLDqWTDqXJpYyBC?= =?utf-8?b?YXJyYXQ=?= , =?utf-8?q?C=C3=A9dric_Le_Goat?= =?utf-8?q?er?= , Harsh Prateek Bora , Nicholas Piggin , Daniel Henrique Barboza , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 5/6] hw/intc/spapr_xive: Move sysbus_init_mmio() calls around Date: Wed, 18 Oct 2023 15:30:58 +0200 Message-ID: <20231018133059.85765-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231018133059.85765-1-philmd@linaro.org> References: <20231018133059.85765-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In order to make the next commit trivial, move sysbus_init_mmio() calls just before the corresponding sysbus_mmio_map() calls. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- hw/intc/spapr_xive.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 7f701d414b..12057ffe5b 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -316,7 +316,6 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) if (!qdev_realize(DEVICE(xsrc), NULL, errp)) { return; } - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xsrc->esb_mmio); /* * Initialize the END ESB source @@ -328,7 +327,6 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) if (!qdev_realize(DEVICE(end_xsrc), NULL, errp)) { return; } - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &end_xsrc->esb_mmio); /* Set the mapping address of the END ESB pages after the source ESBs */ xive->end_base = xive->vc_base + xive_source_esb_len(xsrc); @@ -347,14 +345,16 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) /* TIMA initialization */ memory_region_init_io(&xive->tm_mmio, OBJECT(xive), &spapr_xive_tm_ops, xive, "xive.tima", 4ull << TM_SHIFT); - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xive->tm_mmio); /* * Map all regions. These will be enabled or disabled at reset and * can also be overridden by KVM memory regions if active */ + sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xsrc->esb_mmio); sysbus_mmio_map(SYS_BUS_DEVICE(xive), 0, xive->vc_base); + sysbus_init_mmio(SYS_BUS_DEVICE(xive), &end_xsrc->esb_mmio); sysbus_mmio_map(SYS_BUS_DEVICE(xive), 1, xive->end_base); + sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xive->tm_mmio); sysbus_mmio_map(SYS_BUS_DEVICE(xive), 2, xive->tm_base); } From patchwork Wed Oct 18 13:30:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735057 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp996027wro; Wed, 18 Oct 2023 06:35:30 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFjtJRwJd5wL5SLx7YXOXSIg1XQSTqNr5t5p09lD+rtESt1rBECbruNfskfSDFsmbq3aoZ6 X-Received: by 2002:a05:620a:2a07:b0:776:fad0:cc3c with SMTP id o7-20020a05620a2a0700b00776fad0cc3cmr6015939qkp.4.1697636130542; Wed, 18 Oct 2023 06:35:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697636130; cv=none; d=google.com; s=arc-20160816; b=bzmqKz2K+N9NUdNSfJx+5WVBEcrRVodNxKVIGIKal3d4sGRVcDe+xIaK3zzDbSFZFM GpO2dx8vIAroxW8Sp42erQ379mImBZQvHLYFRWP8e33/bF+e72ZTQZ/My6M3qqxiQvzA J61Nijqt9kpTsHGQfYeVCETZjTMxwfvzUhw2wCoZClEP8SbuUpME9/fvLfENaa6SCThV scAjTHtKOI21Y0hq8uC6llUNj/nlqxaG5FsSvvnwZSCf2U7nynTkJ6RuWnig4A5c+CsC EKzS+ClSWIbCP79VR3au8AcGSlyKN8OkBjeuxNQGTbwull7CpFejBekHdbnG1HJjnylQ Rj6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=2n8IpqQIL5F84eyb1MGuQCyy0ZKYgEpFAxkwPCfg6VQ=; fh=i/WIozb1pGRSSAvN281CL0P9xvW88xHKKqLcdnHBUKw=; b=yvylQ9LyhZvjLZly3i/QnYda2va8ROLdGM68+5Ta+g960SUSM0/RdOdhK6wZJSPfXY Rq6gKSOWTKJF7QPZsykK381WdHuLI/GpVB6RtA0Ls6GYV6L99RMWdxJGZXAq9GXEdLQv NOZMnDZUIk0VbzBNBC4ZNmSmKf8sTsuwrTdlOEDMyJfM4LzTBc/S8hCM74nom1/z1Pf0 ZNrZGOqGvgLCuSrlko8hKzJagpoxTuEwzASbZywwnAZjs3Fg3kLM9lblJRPpVcTL6v7P DGfoyAwrrAoCwOf8rJahbpwtNw48hQ3hho+59nrSNVgiHdb8ZFxVhcKPZSiSyoWChzK/ Pfuw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zQwo1Cmz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.171.218.149]) by smtp.gmail.com with ESMTPSA id q1-20020adffec1000000b00326b8a0e817sm2126646wrs.84.2023.10.18.06.31.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 18 Oct 2023 06:31:38 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Gibson , =?utf-8?b?RnLDqWTDqXJpYyBC?= =?utf-8?b?YXJyYXQ=?= , =?utf-8?q?C=C3=A9dric_Le_Goat?= =?utf-8?q?er?= , Harsh Prateek Bora , Nicholas Piggin , Daniel Henrique Barboza , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 6/6] hw/intc/spapr_xive: Do not use SysBus API to map local MMIO region Date: Wed, 18 Oct 2023 15:30:59 +0200 Message-ID: <20231018133059.85765-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231018133059.85765-1-philmd@linaro.org> References: <20231018133059.85765-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- hw/intc/spapr_xive.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 12057ffe5b..199c261b07 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -350,12 +350,12 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) * Map all regions. These will be enabled or disabled at reset and * can also be overridden by KVM memory regions if active */ - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xsrc->esb_mmio); - sysbus_mmio_map(SYS_BUS_DEVICE(xive), 0, xive->vc_base); - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &end_xsrc->esb_mmio); - sysbus_mmio_map(SYS_BUS_DEVICE(xive), 1, xive->end_base); - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xive->tm_mmio); - sysbus_mmio_map(SYS_BUS_DEVICE(xive), 2, xive->tm_base); + memory_region_add_subregion(get_system_memory(), xive->vc_base, + &xsrc->esb_mmio); + memory_region_add_subregion(get_system_memory(), xive->end_base, + &end_xsrc->esb_mmio); + memory_region_add_subregion(get_system_memory(), xive->tm_base, + &xive->tm_mmio); } static int spapr_xive_get_eas(XiveRouter *xrtr, uint8_t eas_blk,