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Thu, 12 Oct 2023 23:23:36 -0500 From: Tanmay Shah To: , , , , , , , CC: , , , Subject: [PATCH v6 2/4] dts: zynqmp: add properties for TCM in remoteproc Date: Thu, 12 Oct 2023 21:22:27 -0700 Message-ID: <20231013042229.3954527-3-tanmay.shah@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231013042229.3954527-1-tanmay.shah@amd.com> References: <20231013042229.3954527-1-tanmay.shah@amd.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A108:EE_|SN7PR12MB8130:EE_ X-MS-Office365-Filtering-Correlation-Id: 76cfa671-70eb-4493-3756-08dbcba42c4c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: AN/WKbNlGJXqGF9rVaN8zGoQ1LTBJa+MF4VpvM+9GWRRAsxgtia6o4ecYV9QR6G/QX60F7xnb/6MjyFgj2qaBIv2ywOZ63yjGcLN8w2GGV2mA+GUZ5y7O5Rpni+ygKNArQVGPVMoU57WbhfkOE4OYkQ21Z+d77WrjZtnkCnKyiN7fGJWOGF0TmrWoY5Kx5K+85TCVArbXnbpsC6nlMApO8v8zPA2sYdsEvJRcrPqDr/QVturS3hUU2br9KG5dO8aAX7YwepwmprHlRmKsRzITIZx7XsWOpRHkFT+SlG4v8UuSDXPsONmHXGbNA+fECnvj8maBMtsaWVRH6zlF4k1uHuvPVV06LEYphbwdQ4jEqFMhiVbbYB3AlmAiD2f4uUQ4g286No4jfIpies4QvGq6I6J4qLAuImUZ7PISG3c2UXvVW0PAfcadSM8WrUEbuS6HxhjCqrEtRL7XcDNc7tSNDXiMlcNE+vX1ixZ/vAo4oXeLvVC7Vd+zFd5weL7EddEOnV/8AdW6uq4ERBmysXJrwQC8ab9Y0oD8j6uttaGiS9H+rHF3DQ+knS9Zjo1Lk/I/b4SbITds5vRivEBLjsAGO/Y/KFYU7JCAzu4QniveN//w1ePvksEvN/Y1OBFVYTrdTlURjRNr6fEo23j6LcIYfXFniGGcUotGkFjdyrfGiMV4vQlREcvrekN97t+8SCM5SQa+lmRAJDO3AeKOmMd857RovmlY+OHjQhRoEpkv/v7kI7WhNxNXK/rX+xO1gTDgcJQS1y57+ICy5Nol0d28w== X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A108.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB8130 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Add properties as per new bindings in zynqmp remoteproc node to represent TCM address and size. This patch also adds alternative remoteproc node to represent remoteproc cluster in split mode. By default lockstep mode is enabled and users should disable it before using split mode dts. Both device-tree nodes can't be used simultaneously one of them must be disabled. For zcu102-1.0 and zcu102-1.1 board remoteproc split mode dts node is enabled and lockstep mode dts is disabled. Signed-off-by: Tanmay Shah --- Changes in v6: - Introduce new node entry for r5f cluster split mode dts and keep it disabled by default. - Keep remoteproc lockstep mode enabled by default to maintian back compatibility. - Enable split mode only for zcu102 board to demo split mode use .../boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts | 8 +++ arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 60 +++++++++++++++++-- 2 files changed, 63 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts index c8f71a1aec89..495ca94b45db 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts @@ -14,6 +14,14 @@ / { compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp"; }; +&rproc_split { + status = "okay"; +}; + +&rproc_lockstep { + status = "disabled"; +}; + &eeprom { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index b61fc99cd911..602e6aba7ac5 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -247,19 +247,69 @@ fpga_full: fpga-full { ranges; }; - remoteproc { + rproc_lockstep: remoteproc@ffe00000 { compatible = "xlnx,zynqmp-r5fss"; xlnx,cluster-mode = <1>; - r5f-0 { + #address-cells = <2>; + #size-cells = <2>; + + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x20000>, + <0x0 0x20000 0x0 0xffe20000 0x0 0x20000>, + <0x1 0x0 0x0 0xffe90000 0x0 0x10000>, + <0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>; + + r5f@0 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x0 0x0 0x0 0x20000>, <0x0 0x20000 0x0 0x20000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_0>, + <&zynqmp_firmware PD_R5_0_ATCM>, + <&zynqmp_firmware PD_R5_0_BTCM>; + memory-region = <&rproc_0_fw_image>; + }; + + r5f@1 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_1>, + <&zynqmp_firmware PD_R5_1_ATCM>, + <&zynqmp_firmware PD_R5_1_BTCM>; + memory-region = <&rproc_1_fw_image>; + }; + }; + + rproc_split: remoteproc-split@ffe00000 { + status = "disabled"; + compatible = "xlnx,zynqmp-r5fss"; + xlnx,cluster-mode = <0>; + + #address-cells = <2>; + #size-cells = <2>; + + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>, + <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>, + <0x1 0x0 0x0 0xffe90000 0x0 0x10000>, + <0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>; + + r5f@0 { compatible = "xlnx,zynqmp-r5f"; - power-domains = <&zynqmp_firmware PD_RPU_0>; + reg = <0x0 0x0 0x0 0x10000>, <0x0 0x20000 0x0 0x10000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_0>, + <&zynqmp_firmware PD_R5_0_ATCM>, + <&zynqmp_firmware PD_R5_0_BTCM>; memory-region = <&rproc_0_fw_image>; }; - r5f-1 { + r5f@1 { compatible = "xlnx,zynqmp-r5f"; - power-domains = <&zynqmp_firmware PD_RPU_1>; + reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_1>, + <&zynqmp_firmware PD_R5_1_ATCM>, + <&zynqmp_firmware PD_R5_1_BTCM>; memory-region = <&rproc_1_fw_image>; }; }; From patchwork Fri Oct 13 04:22:28 2023 Content-Type: text/plain; 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Thu, 12 Oct 2023 23:23:37 -0500 From: Tanmay Shah To: , , , , , , , CC: , , , Subject: [PATCH v6 3/4] remoteproc: zynqmp: add pm domains support Date: Thu, 12 Oct 2023 21:22:28 -0700 Message-ID: <20231013042229.3954527-4-tanmay.shah@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231013042229.3954527-1-tanmay.shah@amd.com> References: <20231013042229.3954527-1-tanmay.shah@amd.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A107:EE_|BY5PR12MB4965:EE_ X-MS-Office365-Filtering-Correlation-Id: 155f68b3-f6bb-494b-b884-08dbcba42cf3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: MkWXj1kTm7WmapAKZHlgRcFYFlcmFnibZCyA9DOFnEx72D53s78TKKkkwxnvp8WPsI3RAcQGeP3pN3jmhoBlG1BjX+4CnnNj7otVyr1cPOf2s+0JhV++qqCAE6lnKfKgkbCKleZouyZ4HZE2D8rQhPggxXhR8PzD2ztgCnmqSP5y9qOOAcrPs///7j9ghUd2OVBPdDfpDmcWoLj2K4GEwT8jcqCSKTe6XuSYISlFXZwdlK2voHrBvpcUEMmzdiuaBnKyBm49sU69SVsy3eWkEhmTEHy3E59eMQdUjCgNdAfOp0PMgDkGE8Zhf3aNjeh+P/HP21V4j9TkRLbHfNEoE2BHhWYf+FmGF5zA8rcUWr2Ypn57LHrdQkMmNkCBEjWqBD2qKuS2fCvCcdJgWobPeceTj3bdgOZwMAQsGPxD4i8Qz/tMr+ny4ANVaeCDuHIlXeVctNzwnfjjZwr2sUvRBBVd1WKhAdbw/0Z670ys83C9Gg0qGT3w0mwEI3AUEu2Joyx4CZ5n/GsqYJkMTG5XEVDV7vUKTg6OOWk8fARNGo/4tMb0B6S2ce+k+WeKFwyN6JKCREWbVayCIrQHkdy8vZ7A6F2eGJ/FOq4mwgvYaOE1NNRbr9JrYGQAug2EKehHTXyIOcxaZgAv93dYBebsATvkaZeNddgmEzdKr2Q7VcTOzs3IPS14ZYEOdgNUlM1gOAMjq4hWWy+LZgGfAXwH6FyzquPYVszIDIvx6dDfKaeY+Zoqg5cQno5K7iMFxG07f+gkn3TIEAXNByQX9t1Z5A== X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A107.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4965 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Use TCM pm domains extracted from device-tree to power on/off TCM using general pm domain framework. Signed-off-by: Tanmay Shah --- Changes in v6: - Remove spurious change - Handle errors in add_pm_domains function - Remove redundant code to handle errors from remove_pm_domains drivers/remoteproc/xlnx_r5_remoteproc.c | 262 ++++++++++++++++++++++-- 1 file changed, 243 insertions(+), 19 deletions(-) diff --git a/drivers/remoteproc/xlnx_r5_remoteproc.c b/drivers/remoteproc/xlnx_r5_remoteproc.c index 4395edea9a64..04e95d880184 100644 --- a/drivers/remoteproc/xlnx_r5_remoteproc.c +++ b/drivers/remoteproc/xlnx_r5_remoteproc.c @@ -16,6 +16,7 @@ #include #include #include +#include #include "remoteproc_internal.h" @@ -102,6 +103,12 @@ static const struct mem_bank_data zynqmp_tcm_banks_lockstep[] = { * @rproc: rproc handle * @pm_domain_id: RPU CPU power domain id * @ipi: pointer to mailbox information + * @num_pm_dev: number of tcm pm domain devices for this core + * @pm_dev1: pm domain virtual devices for power domain framework + * @pm_dev_link1: pm domain device links after registration + * @pm_dev2: used only in lockstep mode. second core's pm domain virtual devices + * @pm_dev_link2: used only in lockstep mode. second core's pm device links after + * registration */ struct zynqmp_r5_core { struct device *dev; @@ -111,6 +118,11 @@ struct zynqmp_r5_core { struct rproc *rproc; u32 pm_domain_id; struct mbox_info *ipi; + int num_pm_dev; + struct device **pm_dev1; + struct device_link **pm_dev_link1; + struct device **pm_dev2; + struct device_link **pm_dev_link2; }; /** @@ -575,12 +587,21 @@ static int add_tcm_carveout_split_mode(struct rproc *rproc) bank_size = r5_core->tcm_banks[i]->size; pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id; - ret = zynqmp_pm_request_node(pm_domain_id, - ZYNQMP_PM_CAPABILITY_ACCESS, 0, - ZYNQMP_PM_REQUEST_ACK_BLOCKING); - if (ret < 0) { - dev_err(dev, "failed to turn on TCM 0x%x", pm_domain_id); - goto release_tcm_split; + /* + * If TCM information is available in device-tree then + * in that case, pm domain framework will power on/off TCM. + * In that case pm_domain_id is set to 0. If hardcode + * bindings from driver is used, then only this driver will + * use pm_domain_id. + */ + if (pm_domain_id) { + ret = zynqmp_pm_request_node(pm_domain_id, + ZYNQMP_PM_CAPABILITY_ACCESS, 0, + ZYNQMP_PM_REQUEST_ACK_BLOCKING); + if (ret < 0) { + dev_err(dev, "failed to turn on TCM 0x%x", pm_domain_id); + goto release_tcm_split; + } } dev_dbg(dev, "TCM carveout split mode %s addr=%llx, da=0x%x, size=0x%lx", @@ -646,13 +667,16 @@ static int add_tcm_carveout_lockstep_mode(struct rproc *rproc) for (i = 0; i < num_banks; i++) { pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id; - /* Turn on each TCM bank individually */ - ret = zynqmp_pm_request_node(pm_domain_id, - ZYNQMP_PM_CAPABILITY_ACCESS, 0, - ZYNQMP_PM_REQUEST_ACK_BLOCKING); - if (ret < 0) { - dev_err(dev, "failed to turn on TCM 0x%x", pm_domain_id); - goto release_tcm_lockstep; + if (pm_domain_id) { + /* Turn on each TCM bank individually */ + ret = zynqmp_pm_request_node(pm_domain_id, + ZYNQMP_PM_CAPABILITY_ACCESS, 0, + ZYNQMP_PM_REQUEST_ACK_BLOCKING); + if (ret < 0) { + dev_err(dev, "failed to turn on TCM 0x%x", + pm_domain_id); + goto release_tcm_lockstep; + } } bank_size = r5_core->tcm_banks[i]->size; @@ -687,7 +711,8 @@ static int add_tcm_carveout_lockstep_mode(struct rproc *rproc) /* If failed, Turn off all TCM banks turned on before */ for (i--; i >= 0; i--) { pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id; - zynqmp_pm_release_node(pm_domain_id); + if (pm_domain_id) + zynqmp_pm_release_node(pm_domain_id); } return ret; } @@ -758,6 +783,192 @@ static int zynqmp_r5_parse_fw(struct rproc *rproc, const struct firmware *fw) return ret; } +static void zynqmp_r5_remove_pm_domains(struct rproc *rproc) +{ + struct zynqmp_r5_core *r5_core = rproc->priv; + struct device *dev = r5_core->dev; + struct zynqmp_r5_cluster *cluster; + int i; + + cluster = platform_get_drvdata(to_platform_device(dev->parent)); + + for (i = 1; i < r5_core->num_pm_dev; i++) { + device_link_del(r5_core->pm_dev_link1[i]); + dev_pm_domain_detach(r5_core->pm_dev1[i], false); + } + + kfree(r5_core->pm_dev1); + r5_core->pm_dev1 = NULL; + kfree(r5_core->pm_dev_link1); + r5_core->pm_dev_link1 = NULL; + + if (cluster->mode == SPLIT_MODE) { + r5_core->num_pm_dev = 0; + return; + } + + for (i = 1; i < r5_core->num_pm_dev; i++) { + device_link_del(r5_core->pm_dev_link2[i]); + dev_pm_domain_detach(r5_core->pm_dev2[i], false); + } + + kfree(r5_core->pm_dev2); + r5_core->pm_dev2 = NULL; + kfree(r5_core->pm_dev_link2); + r5_core->pm_dev_link2 = NULL; + r5_core->num_pm_dev = 0; +} + +static int zynqmp_r5_add_pm_domains(struct rproc *rproc) +{ + struct zynqmp_r5_core *r5_core = rproc->priv; + struct device *dev = r5_core->dev, *dev2; + struct zynqmp_r5_cluster *cluster; + struct platform_device *pdev; + struct device_node *np; + int i, j, num_pm_dev, ret; + + cluster = dev_get_drvdata(dev->parent); + + /* get number of power-domains */ + num_pm_dev = of_count_phandle_with_args(r5_core->np, "power-domains", + "#power-domain-cells"); + + if (num_pm_dev <= 0) + return -EINVAL; + + r5_core->pm_dev1 = kcalloc(num_pm_dev, + sizeof(struct device *), + GFP_KERNEL); + if (!r5_core->pm_dev1) + ret = -ENOMEM; + + r5_core->pm_dev_link1 = kcalloc(num_pm_dev, + sizeof(struct device_link *), + GFP_KERNEL); + if (!r5_core->pm_dev_link1) { + kfree(r5_core->pm_dev1); + r5_core->pm_dev1 = NULL; + return -ENOMEM; + } + + r5_core->num_pm_dev = num_pm_dev; + + /* + * start from 2nd entry in power-domains property list as + * for zynqmp we only add TCM power domains and not core's power domain. + */ + for (i = 1; i < r5_core->num_pm_dev; i++) { + r5_core->pm_dev1[i] = dev_pm_domain_attach_by_id(dev, i); + if (IS_ERR_OR_NULL(r5_core->pm_dev1[i])) { + dev_dbg(dev, "failed to attach pm domain %d, ret=%ld\n", i, + PTR_ERR(r5_core->pm_dev1[i])); + ret = -EINVAL; + goto fail_add_pm_domains; + } + r5_core->pm_dev_link1[i] = device_link_add(dev, r5_core->pm_dev1[i], + DL_FLAG_STATELESS | + DL_FLAG_RPM_ACTIVE | + DL_FLAG_PM_RUNTIME); + if (!r5_core->pm_dev_link1[i]) { + dev_pm_domain_detach(r5_core->pm_dev1[i], true); + r5_core->pm_dev1[i] = NULL; + ret = -EINVAL; + goto fail_add_pm_domains; + } + } + + if (cluster->mode == SPLIT_MODE) + return 0; + + r5_core->pm_dev2 = kcalloc(num_pm_dev, + sizeof(struct device *), + GFP_KERNEL); + if (!r5_core->pm_dev2) { + ret = -ENOMEM; + goto fail_add_pm_domains; + } + + r5_core->pm_dev_link2 = kcalloc(num_pm_dev, + sizeof(struct device_link *), + GFP_KERNEL); + if (!r5_core->pm_dev_link2) { + kfree(r5_core->pm_dev2); + r5_core->pm_dev2 = NULL; + ret = -ENOMEM; + goto fail_add_pm_domains; + } + + /* get second core's device to detach its power-domains */ + np = of_get_next_child(cluster->dev->of_node, of_node_get(dev->of_node)); + + pdev = of_find_device_by_node(np); + if (!pdev) { + dev_err(cluster->dev, "core1 platform device not available\n"); + kfree(r5_core->pm_dev2); + kfree(r5_core->pm_dev_link2); + r5_core->pm_dev2 = NULL; + r5_core->pm_dev_link2 = NULL; + ret = -EINVAL; + goto fail_add_pm_domains; + } + + dev2 = &pdev->dev; + + /* for zynqmp we only add TCM power domains and not core's power domain */ + for (j = 1; j < r5_core->num_pm_dev; j++) { + r5_core->pm_dev2[j] = dev_pm_domain_attach_by_id(dev2, j); + if (!r5_core->pm_dev2[j]) { + dev_dbg(dev, "can't attach to pm domain %d\n", j); + ret = -EINVAL; + goto fail_add_pm_domains_lockstep; + } else if (IS_ERR(r5_core->pm_dev2[j])) { + dev_dbg(dev, "can't attach to pm domain %d\n", j); + ret = PTR_ERR(r5_core->pm_dev2[j]); + goto fail_add_pm_domains_lockstep; + } + + r5_core->pm_dev_link2[j] = device_link_add(dev, r5_core->pm_dev2[j], + DL_FLAG_STATELESS | + DL_FLAG_RPM_ACTIVE | + DL_FLAG_PM_RUNTIME); + if (!r5_core->pm_dev_link2[j]) { + dev_pm_domain_detach(r5_core->pm_dev2[j], true); + r5_core->pm_dev2[j] = NULL; + ret = -ENODEV; + goto fail_add_pm_domains_lockstep; + } + } + +fail_add_pm_domains_lockstep: + while (j >= 1) { + if (r5_core->pm_dev_link2 && !IS_ERR_OR_NULL(r5_core->pm_dev_link2[j])) + device_link_del(r5_core->pm_dev_link2[j]); + if (r5_core->pm_dev2 && !IS_ERR_OR_NULL(r5_core->pm_dev2[j])) + dev_pm_domain_detach(r5_core->pm_dev2[j], true); + j--; + } + kfree(r5_core->pm_dev2); + r5_core->pm_dev2 = NULL; + kfree(r5_core->pm_dev_link2); + r5_core->pm_dev_link2 = NULL; + +fail_add_pm_domains: + while (i >= 1) { + if (r5_core->pm_dev_link1 && !IS_ERR_OR_NULL(r5_core->pm_dev_link1[i])) + device_link_del(r5_core->pm_dev_link1[i]); + if (r5_core->pm_dev1 && !IS_ERR_OR_NULL(r5_core->pm_dev1[i])) + dev_pm_domain_detach(r5_core->pm_dev1[i], true); + i--; + } + kfree(r5_core->pm_dev1); + r5_core->pm_dev1 = NULL; + kfree(r5_core->pm_dev_link1); + r5_core->pm_dev_link1 = NULL; + + return ret; +} + /** * zynqmp_r5_rproc_prepare() * adds carveouts for TCM bank and reserved memory regions @@ -770,19 +981,30 @@ static int zynqmp_r5_rproc_prepare(struct rproc *rproc) { int ret; + ret = zynqmp_r5_add_pm_domains(rproc); + if (ret) { + dev_err(&rproc->dev, "failed to add pm domains\n"); + return ret; + } + ret = add_tcm_banks(rproc); if (ret) { dev_err(&rproc->dev, "failed to get TCM banks, err %d\n", ret); - return ret; + goto fail_prepare; } ret = add_mem_regions_carveout(rproc); if (ret) { dev_err(&rproc->dev, "failed to get reserve mem regions %d\n", ret); - return ret; + goto fail_prepare; } return 0; + +fail_prepare: + zynqmp_r5_remove_pm_domains(rproc); + + return ret; } /** @@ -801,11 +1023,13 @@ static int zynqmp_r5_rproc_unprepare(struct rproc *rproc) r5_core = rproc->priv; + zynqmp_r5_remove_pm_domains(rproc); + for (i = 0; i < r5_core->tcm_bank_count; i++) { pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id; - if (zynqmp_pm_release_node(pm_domain_id)) - dev_warn(r5_core->dev, - "can't turn off TCM bank 0x%x", pm_domain_id); + if (pm_domain_id && zynqmp_pm_release_node(pm_domain_id)) + dev_dbg(r5_core->dev, + "can't turn off TCM bank 0x%x", pm_domain_id); } return 0;