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[176.170.217.185]) by smtp.gmail.com with ESMTPSA id m22-20020a1709066d1600b009adc77fe165sm6581447ejr.118.2023.10.09.04.02.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 09 Oct 2023 04:02:49 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Hildenbrand , Weiwei Li , qemu-s390x@nongnu.org, Ilya Leoshkevich , Bin Meng , Alistair Francis , Cameron Esfahani , qemu-ppc@nongnu.org, Daniel Henrique Barboza , qemu-riscv@nongnu.org, Max Filippov , Daniel Henrique Barboza , Palmer Dabbelt , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Liu Zhiwei , Richard Henderson , Thomas Huth , Roman Bolshakov , Nicholas Piggin , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 1/6] target/ppc: Use env_archcpu() in helper_book3s_msgsndp() Date: Mon, 9 Oct 2023 13:02:34 +0200 Message-ID: <20231009110239.66778-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231009110239.66778-1-philmd@linaro.org> References: <20231009110239.66778-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=philmd@linaro.org; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When CPUArchState* is available (here CPUPPCState*), we can use the fast env_archcpu() macro to get ArchCPU* (here PowerPCCPU*). The QOM cast POWERPC_CPU() macro will be slower when building with --enable-qom-cast-debug. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel Henrique Barboza Acked-by: Alistair Francis --- target/ppc/excp_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 7926114d5c..a42743a3e0 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -3136,7 +3136,7 @@ void helper_book3s_msgclrp(CPUPPCState *env, target_ulong rb) void helper_book3s_msgsndp(CPUPPCState *env, target_ulong rb) { CPUState *cs = env_cpu(env); - PowerPCCPU *cpu = POWERPC_CPU(cs); + PowerPCCPU *cpu = env_archcpu(env); CPUState *ccs; uint32_t nr_threads = cs->nr_threads; int ttir = rb & PPC_BITMASK(57, 63); From patchwork Mon Oct 9 11:02:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 730998 Delivered-To: patch@linaro.org Received: by 2002:a5d:574c:0:b0:31d:da82:a3b4 with SMTP id q12csp1144187wrw; Mon, 9 Oct 2023 04:05:16 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHGpP1NWOsOKV88VVBMDYyuo1Dcs40YPQFJcQ6lv0y5i9bpX0TtowXxZ4Y7pVOomekT1wOy X-Received: by 2002:a05:622a:511:b0:418:1c31:dada with SMTP id l17-20020a05622a051100b004181c31dadamr19150809qtx.31.1696849515858; Mon, 09 Oct 2023 04:05:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696849515; cv=none; d=google.com; s=arc-20160816; b=JC6cnKrIxbSb6oa2jaUZ2LbRky5Iwiy7Yng9XVZDNKo4bWJ4yWNZJ4gCipudqQMCXx ydmcvfN25KR/sRIHL4c+iTF6vgDGWVo7I1HY8gLQGgf+3UDzEFgJzvBtzuAPD3lkvNy1 GUe9+J2EH5CFPNYJVQh5KRFpbUyha0MkJXEdmu1WK3UOSto8IUfclsULN0RfOBNccG3N 4Q/FQd6tOZDmdOFqiPFgGoRhkBY9A971AVa4ONa44shdauMWGoLknCi/iTo5kMYR7Ghd IE1hv0kd4rvwYyB7Lkcktad1qvtQsGWsqrptslqSrv0WdfvxnnH29rUlkpHZCv9SP8zZ tMuQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Y/GrMBIMGrTYySZAmzh8zKw+DxTy0unUed7WlZuT/J4=; fh=wq6daNeLzc36HdDrkgSBcXIGbQaPjVJAVVw2fTIkOkc=; b=NF3X8XnQtbW2GvwJC39eetcLyvuE+862uCKpXGYL9/GHL/p/k4+dxP/bGsTuaXD1YD Hh9butWAMvrK/2076I69mHix5VmBsD3lJnEGGzPnSy1u7/1ANvsyJcQHeylK+Q0dXWAl dWuAIfirPyH9RNHKT5tsXj8aXW/M3mra/58k11PqTxtNTU82JjKmveMxLbOh0fidguIB Cpe65NZfY772d8a6hq5ue7+R4jw8Le2uDtctLFnjWoTg5LJGMfwL4UYNzWildgxtNDYN wLuRYXkuBAgJyVTVRxd+9o9pOQATrIuNXfAe/Z57nt9NGRt4AnYXXQcJLiZoo7SyaZb4 ovtQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=INvojKDd; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.170.217.185]) by smtp.gmail.com with ESMTPSA id y18-20020a170906559200b009ad75d318ffsm6699191ejp.17.2023.10.09.04.02.53 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 09 Oct 2023 04:02:55 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Hildenbrand , Weiwei Li , qemu-s390x@nongnu.org, Ilya Leoshkevich , Bin Meng , Alistair Francis , Cameron Esfahani , qemu-ppc@nongnu.org, Daniel Henrique Barboza , qemu-riscv@nongnu.org, Max Filippov , Daniel Henrique Barboza , Palmer Dabbelt , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Liu Zhiwei , Richard Henderson , Thomas Huth , Roman Bolshakov , Nicholas Piggin , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Richard W . M . Jones" Subject: [PATCH 2/6] target/riscv: Use env_archcpu() in [check_]nanbox() Date: Mon, 9 Oct 2023 13:02:35 +0200 Message-ID: <20231009110239.66778-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231009110239.66778-1-philmd@linaro.org> References: <20231009110239.66778-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=philmd@linaro.org; helo=mail-ej1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When CPUArchState* is available (here CPURISCVState*), we can use the fast env_archcpu() macro to get ArchCPU* (here RISCVCPU*). The QOM cast RISCV_CPU() macro will be slower when building with --enable-qom-cast-debug. Inspired-by: Richard W.M. Jones Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel Henrique Barboza Reviewed-by: LIU Zhiwei Reviewed-by: Richard W.M. Jones Reviewed-by: Alistair Francis --- target/riscv/internals.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/riscv/internals.h b/target/riscv/internals.h index b5f823c7ec..8239ae83cc 100644 --- a/target/riscv/internals.h +++ b/target/riscv/internals.h @@ -87,7 +87,7 @@ enum { static inline uint64_t nanbox_s(CPURISCVState *env, float32 f) { /* the value is sign-extended instead of NaN-boxing for zfinx */ - if (RISCV_CPU(env_cpu(env))->cfg.ext_zfinx) { + if (env_archcpu(env)->cfg.ext_zfinx) { return (int32_t)f; } else { return f | MAKE_64BIT_MASK(32, 32); @@ -97,7 +97,7 @@ static inline uint64_t nanbox_s(CPURISCVState *env, float32 f) static inline float32 check_nanbox_s(CPURISCVState *env, uint64_t f) { /* Disable NaN-boxing check when enable zfinx */ - if (RISCV_CPU(env_cpu(env))->cfg.ext_zfinx) { + if (env_archcpu(env)->cfg.ext_zfinx) { return (uint32_t)f; } @@ -113,7 +113,7 @@ static inline float32 check_nanbox_s(CPURISCVState *env, uint64_t f) static inline uint64_t nanbox_h(CPURISCVState *env, float16 f) { /* the value is sign-extended instead of NaN-boxing for zfinx */ - if (RISCV_CPU(env_cpu(env))->cfg.ext_zfinx) { + if (env_archcpu(env)->cfg.ext_zfinx) { return (int16_t)f; } else { return f | MAKE_64BIT_MASK(16, 48); @@ -123,7 +123,7 @@ static inline uint64_t nanbox_h(CPURISCVState *env, float16 f) static inline float16 check_nanbox_h(CPURISCVState *env, uint64_t f) { /* Disable nanbox check when enable zfinx */ - if (RISCV_CPU(env_cpu(env))->cfg.ext_zfinx) { + if (env_archcpu(env)->cfg.ext_zfinx) { return (uint16_t)f; } From patchwork Mon Oct 9 11:02:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 730997 Delivered-To: patch@linaro.org Received: by 2002:a5d:574c:0:b0:31d:da82:a3b4 with SMTP id q12csp1144186wrw; Mon, 9 Oct 2023 04:05:15 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEdSZBkImrob5iJfXgpQsu4aChIsP25s9IME2DMVmMfDOFqhSEhtXzDHOA6fvsNygWDvh3+ X-Received: by 2002:a05:6214:448e:b0:647:1a66:181a with SMTP id on14-20020a056214448e00b006471a66181amr16151422qvb.50.1696849515624; Mon, 09 Oct 2023 04:05:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696849515; cv=none; d=google.com; s=arc-20160816; b=f5+q/A1t1NkAo8XBoZwViLmKDy6cTc047Paa3qSf6rwE+9u37MBVyiS2zjZxzKUVUM +uSYUqdhNOlD4gn0/1i3NaHlrC6i/g96RmLxxMlyhIQ6i1Ni5FaDyIDpdSmnSefB89Xt +xpyfXgI28fOkqOOsEj002nTlyrkXj0ReL7INpoT2UOgE7tj+50Abs39AQj79ut0+N7X ZOdGlk0GcjTx/7b0Kll8dgnQVmxMwJOigwRdSSvcspT6C+yg/H9/LR8H6gyD9tZsChie KpFyPw8skWpt87pbjKSpj0NeWABN8r0GJDw6KaAHyCMU/bmJ9/K7qbnZw7NtkXpamb2c D/qg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=/xL54zgpI4nEx7Yl6kW+m7mCJYstREJ1f9hvJxDP1UE=; fh=JT+suEVcDyElyoNkyLRJK+Ua1enxIL+q6FnXD6fdVGI=; b=PI8XOFwKdqw+KiqfYjkOEfJF5niJqxI2ZGjQ5pcyTPSsLDcDGLdbp3FQjPSCzsAICk inovNj6k4ri7oXeXO5+hZhYjts1kOyJoRyp9HlyZlNUOmIhR+nvZUBYmIBN9+aPsG+IM thOVxYQ63+wsbTu/pkz5otLgWsICxdvN5lq1g5efjcG6x3+iMPLhRB25iQoCwgQ6ARbr BiKcwSeS4+B1EEkT3kkA4R9++v569dyDkwWj4ArMbCrz4lkyh5pj19de2DJ4V+dsBmLb A0fh2pg/KBGq4ArShin4B1v4l+fWRAA9dTvs1+f9nZU1TNipn05xpS4IcdMZyQUzJq8y +zMQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=avMliAXb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.170.217.185]) by smtp.gmail.com with ESMTPSA id j17-20020aa7c411000000b0053635409213sm6014873edq.34.2023.10.09.04.03.00 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 09 Oct 2023 04:03:02 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Hildenbrand , Weiwei Li , qemu-s390x@nongnu.org, Ilya Leoshkevich , Bin Meng , Alistair Francis , Cameron Esfahani , qemu-ppc@nongnu.org, Daniel Henrique Barboza , qemu-riscv@nongnu.org, Max Filippov , Daniel Henrique Barboza , Palmer Dabbelt , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Liu Zhiwei , Richard Henderson , Thomas Huth , Roman Bolshakov , Nicholas Piggin , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 3/6] target/s390x: Use env_archcpu() in handle_diag_308() Date: Mon, 9 Oct 2023 13:02:36 +0200 Message-ID: <20231009110239.66778-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231009110239.66778-1-philmd@linaro.org> References: <20231009110239.66778-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::535; envelope-from=philmd@linaro.org; helo=mail-ed1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When CPUArchState* is available (here CPUS390XState*), we can use the fast env_archcpu() macro to get ArchCPU* (here S390CPU*). The QOM cast S390_CPU() macro will be slower when building with --enable-qom-cast-debug. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Alistair Francis --- target/s390x/diag.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/s390x/diag.c b/target/s390x/diag.c index 8ce18e08f3..27ffd48576 100644 --- a/target/s390x/diag.c +++ b/target/s390x/diag.c @@ -77,7 +77,7 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra) { bool valid; CPUState *cs = env_cpu(env); - S390CPU *cpu = S390_CPU(cs); + S390CPU *cpu = env_archcpu(env); uint64_t addr = env->regs[r1]; uint64_t subcode = env->regs[r3]; IplParameterBlock *iplb; From patchwork Mon Oct 9 11:02:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 730995 Delivered-To: patch@linaro.org Received: by 2002:a5d:574c:0:b0:31d:da82:a3b4 with SMTP id q12csp1143607wrw; Mon, 9 Oct 2023 04:04:12 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEWMBeQAGmfjpuIa+40heGIALgdAaaAD8hVzWWkzbnPCg/Ug5qBg/6IoTQaN93FJsR8LmwA X-Received: by 2002:a1f:ca83:0:b0:495:bd61:a184 with SMTP id a125-20020a1fca83000000b00495bd61a184mr8953839vkg.2.1696849452117; Mon, 09 Oct 2023 04:04:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696849452; cv=none; d=google.com; s=arc-20160816; b=rb+1XUISS6ldLXNk2+FFaPIKQz1VXOHMoWcWKPMIWxMGYDGXAazD/3LKpoghTu2EgZ ssWrUcBNbYjFYbltNyinZOcbbY9xtnZFHfibwuH94T+ipQkndQEiMjBWmDWoFAy2fszj y7iMVwrYiCGX20THgONW2JpaG7D10VX01qzwO2lV3D1kZp63RkAeigg/8fn/idtgC92X Toqida42oFR8b8zg7+E7bcynULMLfQgwU06TB1ZnNX+RQpMuZ5/SRdCQBhk2zTbGlqqZ ESvD8iBJNoH/L4P4neeYcCBN5Lgw8v8hM8FWv5JmJMzAFbo3RvCvKIXTH3owEQbJ26LZ +Slg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=V78g9jhuJwuu3XH3up4N6OXq/ULujlSA7fdJ/xZ8gEw=; fh=JT+suEVcDyElyoNkyLRJK+Ua1enxIL+q6FnXD6fdVGI=; b=DkXeto1L2nuA2pEr1IqnUXRuTp2gRi/I9emTFVCre8UBHEYsD4cWXhh4MQFYL0yMSD 36aX2qWQt9IQ3WQBUVp4n8R9JdD3/20JGpLVysuXh6w2RTGFffwWFONYI/QYNZo1Ui/x DPmbQW4apJpBcp4EZ3Z6Dri4CuTaKrdtqhaNiIqL1Nz7W8FnwYm2Szlv7krLpK+EMV5p QGXkp68nhyTl1wAJuEYe/Y8XgREXHBFG894DEQ5CpLFtWbCRCyJfNutSyEXS3lovZuY0 ev8par1n8YU/9KKFjpG7h3FUwjxWQlKBfNwrYlCtMo/2ogaREjnMB6HuGe7yRwcXYm9S uIFQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RQ+OULPH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.170.217.185]) by smtp.gmail.com with ESMTPSA id u16-20020a1709064ad000b009ae54585aebsm6489905ejt.89.2023.10.09.04.03.06 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 09 Oct 2023 04:03:08 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Hildenbrand , Weiwei Li , qemu-s390x@nongnu.org, Ilya Leoshkevich , Bin Meng , Alistair Francis , Cameron Esfahani , qemu-ppc@nongnu.org, Daniel Henrique Barboza , qemu-riscv@nongnu.org, Max Filippov , Daniel Henrique Barboza , Palmer Dabbelt , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Liu Zhiwei , Richard Henderson , Thomas Huth , Roman Bolshakov , Nicholas Piggin , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 4/6] target/xtensa: Use env_archcpu() in update_c[compare|count]() Date: Mon, 9 Oct 2023 13:02:37 +0200 Message-ID: <20231009110239.66778-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231009110239.66778-1-philmd@linaro.org> References: <20231009110239.66778-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=philmd@linaro.org; helo=mail-ej1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When CPUArchState* is available (here CPUXtensaState*), we can use the fast env_archcpu() macro to get ArchCPU* (here XtensaCPU*). The QOM cast XTENSA_CPU() macro will be slower when building with --enable-qom-cast-debug. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Alistair Francis --- target/xtensa/op_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c index 7bb8cd6726..496754ba57 100644 --- a/target/xtensa/op_helper.c +++ b/target/xtensa/op_helper.c @@ -37,7 +37,7 @@ void HELPER(update_ccount)(CPUXtensaState *env) { - XtensaCPU *cpu = XTENSA_CPU(env_cpu(env)); + XtensaCPU *cpu = env_archcpu(env); uint64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); env->ccount_time = now; @@ -58,7 +58,7 @@ void HELPER(wsr_ccount)(CPUXtensaState *env, uint32_t v) void HELPER(update_ccompare)(CPUXtensaState *env, uint32_t i) { - XtensaCPU *cpu = XTENSA_CPU(env_cpu(env)); + XtensaCPU *cpu = env_archcpu(env); uint64_t dcc; qatomic_and(&env->sregs[INTSET], From patchwork Mon Oct 9 11:02:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 730994 Delivered-To: patch@linaro.org Received: by 2002:a5d:574c:0:b0:31d:da82:a3b4 with SMTP id q12csp1143519wrw; Mon, 9 Oct 2023 04:04:04 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHP1eZyfeRj5GUG09nZckfDdRTYfTT8/rXbDvGpr2fmWWxpdLt/QR0nctcX8NeW6cuwr9br X-Received: by 2002:a05:6214:1a4b:b0:65b:1114:f99f with SMTP id fi11-20020a0562141a4b00b0065b1114f99fmr16114692qvb.26.1696849443771; Mon, 09 Oct 2023 04:04:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696849443; cv=none; d=google.com; s=arc-20160816; b=P7XyMfVhHsuBtBWB5gAjKi6tcclbgNb2QdUw3bvK1BaN5z4kHg2Y1Zq9m+1IvqBKjc PVw8mRt4MGXbwZqbdEHWLz+GbWeztbdWeCUNHXCJ9Abg5qipFJZUb6tzVtIjpWtrubeg 8to1x/jjxRepaoqXIMXQXKoWULPaoLEZzqEfBTc9ju3bS/wUflOxjVDLxlCTs1dg1jD4 zRN6J2Wb3hK6rLVy9TkVDdmI4kW7UuySCyrDdixCcATPJTrOPDlGfZh9pmY7ZD8GFpzL XLWXGQUtst6tnlh93FLMSUj9mumqj+FlQ4dalZ5AkEdADkXmEvICHGA8SRNWyNOPB5+x PDaQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=1+J1wI69+igLibXDQf0PHgHIzLfY8D41JYZfyX16+G8=; fh=JT+suEVcDyElyoNkyLRJK+Ua1enxIL+q6FnXD6fdVGI=; b=g5oLmYK3n5PRSJWKMEquN52cAgdQDku0qxGkT0XD3P6BsphkVpDvbbhN24Zt4olCO0 IXg8W0StzpivLhJ4k6cUwgq5QVHycyw1B1E6zpWHHPvl/+lInanhhZ511pxWvBVJ3pJv 1mqqkKAGD3Sb621uI9ZYpM2/zApIvmLd65OIDm8hfqLef5wL0NDnl4GafbkC7BBpYPaJ qU6rnE/eVaMxRkZVZ4BdCrhgOq3AEDwUjufGaIFj+SP83xuLrx0OX5SV5DQb2LHCyBSd 2LmXRWGkA6bL/Uh5wHNoFue8SBekpk23YVsQ3IZ7Sr7xFcPKQcMdfnn4nuFh9OxCZt90 zxVw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ecKA4V1F; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.170.217.185]) by smtp.gmail.com with ESMTPSA id n17-20020a170906379100b009b957d5237asm6543236ejc.80.2023.10.09.04.03.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 09 Oct 2023 04:03:14 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Hildenbrand , Weiwei Li , qemu-s390x@nongnu.org, Ilya Leoshkevich , Bin Meng , Alistair Francis , Cameron Esfahani , qemu-ppc@nongnu.org, Daniel Henrique Barboza , qemu-riscv@nongnu.org, Max Filippov , Daniel Henrique Barboza , Palmer Dabbelt , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Liu Zhiwei , Richard Henderson , Thomas Huth , Roman Bolshakov , Nicholas Piggin , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 5/6] target/i386/hvf: Use x86_cpu in simulate_[rdmsr|wrmsr]() Date: Mon, 9 Oct 2023 13:02:38 +0200 Message-ID: <20231009110239.66778-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231009110239.66778-1-philmd@linaro.org> References: <20231009110239.66778-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=philmd@linaro.org; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We already have 'x86_cpu = X86_CPU(cpu)'. Use the variable instead of doing another QOM cast with X86_CPU(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Roman Bolshakov Reviewed-by: Zhao Liu --- target/i386/hvf/x86_emu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index ccda568478..af1f205ecf 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -676,7 +676,7 @@ void simulate_rdmsr(struct CPUState *cpu) val = rdtscp() + rvmcs(cpu->accel->fd, VMCS_TSC_OFFSET); break; case MSR_IA32_APICBASE: - val = cpu_get_apic_base(X86_CPU(cpu)->apic_state); + val = cpu_get_apic_base(x86_cpu->apic_state); break; case MSR_IA32_UCODE_REV: val = x86_cpu->ucode_rev; @@ -776,7 +776,7 @@ void simulate_wrmsr(struct CPUState *cpu) case MSR_IA32_TSC: break; case MSR_IA32_APICBASE: - cpu_set_apic_base(X86_CPU(cpu)->apic_state, data); + cpu_set_apic_base(x86_cpu->apic_state, data); break; case MSR_FSBASE: wvmcs(cpu->accel->fd, VMCS_GUEST_FS_BASE, data); From patchwork Mon Oct 9 11:02:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 730996 Delivered-To: patch@linaro.org Received: by 2002:a5d:574c:0:b0:31d:da82:a3b4 with SMTP id q12csp1143832wrw; Mon, 9 Oct 2023 04:04:38 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFb1EzrIwJJIkz0O97fNy0cqfajwvYNmWdzE/WJHRm02FnZVtjHF2IEqSubVadpJIEEYz+F X-Received: by 2002:a05:6870:89a5:b0:1bf:77e2:95cc with SMTP id f37-20020a05687089a500b001bf77e295ccmr17046905oaq.17.1696849478028; Mon, 09 Oct 2023 04:04:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696849478; cv=none; d=google.com; s=arc-20160816; b=kbtsMgCrsmRsUL0/bTvQVClOlQS+LmZu5C78axTAAcJjT7QotoxcxgR81vvHMcNblH iGHFOfQ00QU9VjIajob7fo4VWg5Fy3stPM6FmYltorT8DJ07a9YSoEjwLFGWBFfu5aEo 0xlCcUtmvUILOVUZpuaMxhUc4tra0+VJdEWP8XDUKqIt8U1lsq3tFkdYLjL1EdLjBg1K L9UNlnImIh/P0u6TUqjfSLE+3In4ywhee7foUeKW7vs3F8nRbfMQpTeGMs6Qq0uwcfXG nN+jQf+Un20d+/1FSH5C04+8kwIkUHiroCPsjvcPlgfIdIGdYx7vAJB8NyDLYELHAJDY qBDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=w1sigiR4LmduP3UlaMwnqexR3h3qqvWr4C29unZHhf0=; fh=JT+suEVcDyElyoNkyLRJK+Ua1enxIL+q6FnXD6fdVGI=; b=faXscDYlNpxJ0LL51TTjsJ699k/xtf++V4Qd04XiO9dzZX2TVZdbh4BU/53FXlJKnL Rw+xBrQnlWRIG4Uz/puv3Jvcao1fyxvGKEga6NIHCMAiN+So74j3B6i0qbe+4oLls1j4 SarEewHdBTM9apVs95kwz8sGBFutY3BfD2t/6svmYwyY3a9y0KdC99EY0y4FURhv1GT6 uYLVy2cK/qZv7ZOVLsRMyPAFi95x3RCwr+MgfKMCMt6IhobSREXfRGVkxq42nrDF0phs KWS4U0gujtOQn6rvw/pGFDD9omip75KBcTZUMxH+V6G1a9oNCDtzS5OsDhb0A/HR5GMb N2mg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=feS1yhHp; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.170.217.185]) by smtp.gmail.com with ESMTPSA id f22-20020a056402151600b0052febc781bfsm6010828edw.36.2023.10.09.04.03.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 09 Oct 2023 04:03:21 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Hildenbrand , Weiwei Li , qemu-s390x@nongnu.org, Ilya Leoshkevich , Bin Meng , Alistair Francis , Cameron Esfahani , qemu-ppc@nongnu.org, Daniel Henrique Barboza , qemu-riscv@nongnu.org, Max Filippov , Daniel Henrique Barboza , Palmer Dabbelt , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Liu Zhiwei , Richard Henderson , Thomas Huth , Roman Bolshakov , Nicholas Piggin , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 6/6] target/i386: Use env_archcpu() in simulate_[rdmsr/wrmsr]() Date: Mon, 9 Oct 2023 13:02:39 +0200 Message-ID: <20231009110239.66778-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231009110239.66778-1-philmd@linaro.org> References: <20231009110239.66778-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=philmd@linaro.org; helo=mail-ed1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When CPUArchState* is available (here CPUX86State*), we can use the fast env_archcpu() macro to get ArchCPU* (here X86CPU*). The QOM cast X86_CPU() macro will be slower when building with --enable-qom-cast-debug. Pass CPUX86State* as argument to simulate_rdmsr / simulate_wrmsr instead of a CPUState* to avoid an extra cast. simulate_rdmsr/simulate_rdmsr(CPUX86State Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Roman Bolshakov Tested-by: Roman Bolshakov Reviewed-by: Zhao Liu --- RFC: Not even build-tested. --- target/i386/hvf/x86_emu.h | 4 ++-- target/i386/hvf/hvf.c | 4 ++-- target/i386/hvf/x86_emu.c | 21 ++++++++++----------- 3 files changed, 14 insertions(+), 15 deletions(-) diff --git a/target/i386/hvf/x86_emu.h b/target/i386/hvf/x86_emu.h index 640da90b30..4b846ba80e 100644 --- a/target/i386/hvf/x86_emu.h +++ b/target/i386/hvf/x86_emu.h @@ -29,8 +29,8 @@ bool exec_instruction(CPUX86State *env, struct x86_decode *ins); void load_regs(struct CPUState *cpu); void store_regs(struct CPUState *cpu); -void simulate_rdmsr(struct CPUState *cpu); -void simulate_wrmsr(struct CPUState *cpu); +void simulate_rdmsr(CPUX86State *env); +void simulate_wrmsr(CPUX86State *env); target_ulong read_reg(CPUX86State *env, int reg, int size); void write_reg(CPUX86State *env, int reg, target_ulong val, int size); diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index cb2cd0b02f..20b9ca3ef5 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -591,9 +591,9 @@ int hvf_vcpu_exec(CPUState *cpu) { load_regs(cpu); if (exit_reason == EXIT_REASON_RDMSR) { - simulate_rdmsr(cpu); + simulate_rdmsr(env); } else { - simulate_wrmsr(cpu); + simulate_wrmsr(env); } env->eip += ins_len; store_regs(cpu); diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index af1f205ecf..b1f8a685d1 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -663,11 +663,10 @@ static void exec_lods(CPUX86State *env, struct x86_decode *decode) env->eip += decode->len; } -void simulate_rdmsr(struct CPUState *cpu) +void simulate_rdmsr(CPUX86State *env) { - X86CPU *x86_cpu = X86_CPU(cpu); - CPUX86State *env = &x86_cpu->env; - CPUState *cs = env_cpu(env); + X86CPU *x86_cpu = env_archcpu(env); + CPUState *cpu = env_cpu(env); uint32_t msr = ECX(env); uint64_t val = 0; @@ -746,8 +745,8 @@ void simulate_rdmsr(struct CPUState *cpu) val = env->mtrr_deftype; break; case MSR_CORE_THREAD_COUNT: - val = cs->nr_threads * cs->nr_cores; /* thread count, bits 15..0 */ - val |= ((uint32_t)cs->nr_cores << 16); /* core count, bits 31..16 */ + val = cpu->nr_threads * cpu->nr_cores; /* thread count, bits 15..0 */ + val |= ((uint32_t)cpu->nr_cores << 16); /* core count, bits 31..16 */ break; default: /* fprintf(stderr, "%s: unknown msr 0x%x\n", __func__, msr); */ @@ -761,14 +760,14 @@ void simulate_rdmsr(struct CPUState *cpu) static void exec_rdmsr(CPUX86State *env, struct x86_decode *decode) { - simulate_rdmsr(env_cpu(env)); + simulate_rdmsr(env); env->eip += decode->len; } -void simulate_wrmsr(struct CPUState *cpu) +void simulate_wrmsr(CPUX86State *env) { - X86CPU *x86_cpu = X86_CPU(cpu); - CPUX86State *env = &x86_cpu->env; + X86CPU *x86_cpu = env_archcpu(env); + CPUState *cpu = env_cpu(env); uint32_t msr = ECX(env); uint64_t data = ((uint64_t)EDX(env) << 32) | EAX(env); @@ -856,7 +855,7 @@ void simulate_wrmsr(struct CPUState *cpu) static void exec_wrmsr(CPUX86State *env, struct x86_decode *decode) { - simulate_wrmsr(env_cpu(env)); + simulate_wrmsr(env); env->eip += decode->len; }