From patchwork Fri Oct 6 00:33:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 730791 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EF9A9629 for ; Fri, 6 Oct 2023 00:33:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="flpVkiNZ" Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 094C3D8 for ; Thu, 5 Oct 2023 17:33:30 -0700 (PDT) Received: from svr-chch-seg1.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id A32C72C0596; Fri, 6 Oct 2023 13:33:28 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1696552408; bh=z5Ulpz8hd9vRm5+9CQamJ7SN/jCUcsm99YX0+edYC84=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=flpVkiNZ2Mbuwhghchke+/kIOzBtei53ZV196V1GjIMuz+Brr+eK/we8msd10s/sB QEGujQTkOxI/0baKZaukM1XkT047fXn9Aautey56HH8EtlXaVoApT1KzOyosvNq1LG iFljC59C8fme9o54MXLY9warFsGSZ7LoZy/LMyF0jA/KrLMHyDCdTBNBlup0weel5r RfB1DthM8L6Ibwgkm3uVDJGZJ3bCbdljjtP7pDMXQKSu89GD2nVNtjVVm/G/9R27aG qoeieHh4qQV0jZDTULljMR/bLFCT0yOCsrlAOUh9lUDud0u/Gh0FQCpD15LKW17QFG kUMgYHrVUHXnQ== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Fri, 06 Oct 2023 13:33:28 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 586D213EE4D; Fri, 6 Oct 2023 13:33:28 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 560A92804C0; Fri, 6 Oct 2023 13:33:28 +1300 (NZDT) From: Chris Packham To: gregory.clement@bootlin.com, andi.shyti@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, pierre.gondois@arm.com Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Packham Subject: [PATCH v2 1/3] dt-bindings: i2c: mv64xxx: update bindings for unstuck register Date: Fri, 6 Oct 2023 13:33:19 +1300 Message-ID: <20231006003321.2100016-2-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231006003321.2100016-1-chris.packham@alliedtelesis.co.nz> References: <20231006003321.2100016-1-chris.packham@alliedtelesis.co.nz> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.3 cv=Vf2Jw2h9 c=1 sm=1 tr=0 a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=bhdUkHdE2iEA:10 a=XYAwZIGsAAAA:8 a=b5Pq3k1ZBCuUTZ-Yr4IA:9 a=E8ToXWR_bxluHZ7gmE-Z:22 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Some newer Marvell SoCs support an "unstuck" function for I2C bus recovery. This is an alternative to the generic GPIO based recovery that the older SoCs use. The unstuck register falls outside of the usual address block for the I2C controller so requires an additional cell in the register property. This is optional and does not need to be supplied. Signed-off-by: Chris Packham Acked-by: Conor Dooley --- Notes: Changes in v2: - Collect ack from Conor .../devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml index 984fc1ed3ec6..461d1c9ee3f7 100644 --- a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml @@ -45,7 +45,10 @@ properties: auto-detects this and sets it appropriately. reg: - maxItems: 1 + minItems: 1 + items: + - description: I2C controller registers + - description: I2C unstuck register interrupts: maxItems: 1 From patchwork Fri Oct 6 00:33:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 730108 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D319EA2D for ; Fri, 6 Oct 2023 00:33:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="hKPxUN2e" Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [IPv6:2001:df5:b000:5::4]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CF3FDE9 for ; Thu, 5 Oct 2023 17:33:31 -0700 (PDT) Received: from svr-chch-seg1.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 967B52C043C; Fri, 6 Oct 2023 13:33:28 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1696552408; bh=ttASz5PFIq45SB63T27urLBr0KsSG9UVkEiGsDKUa0w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hKPxUN2ex/Y4eOieQZTMuQHLBMXtMUO8ORdjwqwPX5BZbjKwjkKAMWLyOxj8AlJiH RowRJanGmiQ4O/avQFu+UIdCAU8QPvTHARy7dnOwyX1mtTBvAPMNbNNO56swYbgVOy G5+ZITtpK6ZJwxUggBoxzsIwYHpmraLLadyf085eKuCLXv2DFpJt7Ji34r8WOo+f3D tyK8GYF8cfEt4EF5OsUe0eS2vkRvI/CWEpqSVaOSc7XeafYtxwP3tp4BpYOWQBIpZi wjl20mN4ePNgxFUTL89Byqe9dh3Gc/7myij3YBT7cKLRqsEfaJCwHIj7gsjmNIhorm MEN2qSV1lbrnw== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Fri, 06 Oct 2023 13:33:28 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 5A7BA13EE85; Fri, 6 Oct 2023 13:33:28 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 59C3028084D; Fri, 6 Oct 2023 13:33:28 +1300 (NZDT) From: Chris Packham To: gregory.clement@bootlin.com, andi.shyti@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, pierre.gondois@arm.com Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Packham Subject: [PATCH v2 2/3] arm64: dts: marvell: AC5: use I2C unstuck function Date: Fri, 6 Oct 2023 13:33:20 +1300 Message-ID: <20231006003321.2100016-3-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231006003321.2100016-1-chris.packham@alliedtelesis.co.nz> References: <20231006003321.2100016-1-chris.packham@alliedtelesis.co.nz> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.3 cv=Vf2Jw2h9 c=1 sm=1 tr=0 a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=bhdUkHdE2iEA:10 a=Jm_8IDygZZvVWM1ZSnEA:9 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_PASS,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net The AC5 SoC supports using a controller based I2C unstuck function for recovery. Use this instead of the generic GPIO recovery. Signed-off-by: Chris Packham --- arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi index c9ce1010c415..e52d3c3496d5 100644 --- a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi +++ b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi @@ -137,7 +137,7 @@ mdio: mdio@22004 { i2c0: i2c@11000{ compatible = "marvell,mv78230-i2c"; - reg = <0x11000 0x20>; + reg = <0x11000 0x20>, <0x110a0 0x4>; #address-cells = <1>; #size-cells = <0>; @@ -146,17 +146,14 @@ i2c0: i2c@11000{ interrupts = ; clock-frequency=<100000>; - pinctrl-names = "default", "gpio"; + pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; - pinctrl-1 = <&i2c0_gpio>; - scl-gpios = <&gpio0 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio0 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "disabled"; }; i2c1: i2c@11100{ compatible = "marvell,mv78230-i2c"; - reg = <0x11100 0x20>; + reg = <0x11100 0x20>, <0x110a4 0x4>; #address-cells = <1>; #size-cells = <0>; @@ -165,11 +162,8 @@ i2c1: i2c@11100{ interrupts = ; clock-frequency=<100000>; - pinctrl-names = "default", "gpio"; + pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; - pinctrl-1 = <&i2c1_gpio>; - scl-gpios = <&gpio0 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio0 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "disabled"; }; From patchwork Fri Oct 6 00:33:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 730109 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B35CB636 for ; Fri, 6 Oct 2023 00:33:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="fLDG8mdv" Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [IPv6:2001:df5:b000:5::4]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E329DEB for ; Thu, 5 Oct 2023 17:33:31 -0700 (PDT) Received: from svr-chch-seg1.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id A5FD32C07F0; Fri, 6 Oct 2023 13:33:28 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1696552408; bh=lHHeZ3xMn0xmJJCVd5cBfeh7/yXUVz2SulVsbcP+n2E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fLDG8mdvA0AvziNsAnaRIycCAJFWxZ6PvdCWqKy8SLFGliVRCbpN5NagUuogace29 ynNlIaKNk+EEwz7b/ljssCrHxMIys+ALvTUJxkmlv4cLc2Y2eHQp06b1+LK66nhi71 AOtJpSE7Qt9KV4mhf//JnmXNjlUuh30ERWHwu5EKRzr8j8Fbh6pj0dW3z7xkUI+KDe HeH19QGvM586/cSRPpVUwDwuTb2v50pxIl7vfB6v7vo/ZanHI924+JKUgdZUMv5lCj jecaU6bf+EIoY9hOPOTXc4CNWYPOWWdq95Rdb4CvQQSCAvNXR6y2iszDdD47j+iA2c Y8Y8SXEQ9Fzwg== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Fri, 06 Oct 2023 13:33:28 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 5DDDE13EEA1; Fri, 6 Oct 2023 13:33:28 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 5CD46280790; Fri, 6 Oct 2023 13:33:28 +1300 (NZDT) From: Chris Packham To: gregory.clement@bootlin.com, andi.shyti@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, pierre.gondois@arm.com Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Packham Subject: [PATCH v2 3/3] i2c: mv64xxx: add support for FSM based recovery Date: Fri, 6 Oct 2023 13:33:21 +1300 Message-ID: <20231006003321.2100016-4-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231006003321.2100016-1-chris.packham@alliedtelesis.co.nz> References: <20231006003321.2100016-1-chris.packham@alliedtelesis.co.nz> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.3 cv=Vf2Jw2h9 c=1 sm=1 tr=0 a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=bhdUkHdE2iEA:10 a=B8jpvDMl2VDXHxTB5w4A:9 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_PASS,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Some newer Marvell SoCs (AC5 and CN9130, possibly more) support a I2C unstuck function. This provides a recovery function as part of the FSM as an alternative to changing pinctrl modes and using the generic GPIO based recovery. Allow for using this by adding an optional resource to the platform data which contains the address of the I2C unstuck register for the I2C controller. Signed-off-by: Chris Packham --- Notes: Changes in v2: - shorted delay and timeout used with read_poll_timeout_atomic() - make use dev_dbg() for added messages - remove reference to "marvell,armada-8k-i2c" - I've elected to keep the behaviour that failing to ioremap the unstuck register (if supplied) is an error drivers/i2c/busses/i2c-mv64xxx.c | 68 ++++++++++++++++++++++++++++++-- 1 file changed, 65 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c index fd8403b07fa6..efd28bbecf61 100644 --- a/drivers/i2c/busses/i2c-mv64xxx.c +++ b/drivers/i2c/busses/i2c-mv64xxx.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -82,6 +83,13 @@ /* Bridge Status values */ #define MV64XXX_I2C_BRIDGE_STATUS_ERROR BIT(0) +/* Unstuck Register values */ +#define MV64XXX_I2C_UNSTUCK_TRIGGER BIT(0) +#define MV64XXX_I2C_UNSTUCK_ON_GOING BIT(1) +#define MV64XXX_I2C_UNSTUCK_ERROR BIT(2) +#define MV64XXX_I2C_UNSTUCK_COUNT(val) ((val & 0xf0) >> 4) +#define MV64XXX_I2C_UNSTUCK_INPROGRESS (MV64XXX_I2C_UNSTUCK_TRIGGER|MV64XXX_I2C_UNSTUCK_ON_GOING) + /* Driver states */ enum { MV64XXX_I2C_STATE_INVALID, @@ -126,6 +134,7 @@ struct mv64xxx_i2c_data { u32 aborting; u32 cntl_bits; void __iomem *reg_base; + void __iomem *unstuck_reg; struct mv64xxx_i2c_regs reg_offsets; u32 addr1; u32 addr2; @@ -735,6 +744,33 @@ mv64xxx_i2c_can_offload(struct mv64xxx_i2c_data *drv_data) return false; } +static int +mv64xxx_i2c_recover_bus(struct i2c_adapter *adap) +{ + struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap); + int ret; + u32 val; + + dev_dbg(&adap->dev, "Trying i2c bus recovery\n"); + writel(MV64XXX_I2C_UNSTUCK_TRIGGER, drv_data->unstuck_reg); + ret = readl_poll_timeout_atomic(drv_data->unstuck_reg, val, + !(val & MV64XXX_I2C_UNSTUCK_INPROGRESS), + 10, 1000); + if (ret) { + dev_err(&adap->dev, "recovery timeout\n"); + return ret; + } + + if (val & MV64XXX_I2C_UNSTUCK_ERROR) { + dev_err(&adap->dev, "recovery failed\n"); + return -EBUSY; + } + + dev_dbg(&adap->dev, "recovery complete after %d pulses\n", MV64XXX_I2C_UNSTUCK_COUNT(val)); + + return 0; +} + /* ***************************************************************************** * @@ -936,8 +972,21 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data, } #endif /* CONFIG_OF */ -static int mv64xxx_i2c_init_recovery_info(struct mv64xxx_i2c_data *drv_data, - struct device *dev) +static int mv64xxx_i2c_init_fsm_recovery_info(struct mv64xxx_i2c_data *drv_data, + struct device *dev) +{ + struct i2c_bus_recovery_info *rinfo = &drv_data->rinfo; + + dev_dbg(dev, "using FSM for recovery\n"); + rinfo->recover_bus = mv64xxx_i2c_recover_bus; + drv_data->adapter.bus_recovery_info = rinfo; + + return 0; + +} + +static int mv64xxx_i2c_init_gpio_recovery_info(struct mv64xxx_i2c_data *drv_data, + struct device *dev) { struct i2c_bus_recovery_info *rinfo = &drv_data->rinfo; @@ -986,6 +1035,7 @@ mv64xxx_i2c_probe(struct platform_device *pd) { struct mv64xxx_i2c_data *drv_data; struct mv64xxx_i2c_pdata *pdata = dev_get_platdata(&pd->dev); + struct resource *res; int rc; if ((!pdata && !pd->dev.of_node)) @@ -1000,6 +1050,14 @@ mv64xxx_i2c_probe(struct platform_device *pd) if (IS_ERR(drv_data->reg_base)) return PTR_ERR(drv_data->reg_base); + /* optional unstuck support */ + res = platform_get_resource(pd, IORESOURCE_MEM, 1); + if (res) { + drv_data->unstuck_reg = devm_ioremap_resource(&pd->dev, res); + if (IS_ERR(drv_data->unstuck_reg)) + return PTR_ERR(drv_data->unstuck_reg); + } + strscpy(drv_data->adapter.name, MV64XXX_I2C_CTLR_NAME " adapter", sizeof(drv_data->adapter.name)); @@ -1037,7 +1095,11 @@ mv64xxx_i2c_probe(struct platform_device *pd) return rc; } - rc = mv64xxx_i2c_init_recovery_info(drv_data, &pd->dev); + if (drv_data->unstuck_reg) + rc = mv64xxx_i2c_init_fsm_recovery_info(drv_data, &pd->dev); + else + rc = mv64xxx_i2c_init_gpio_recovery_info(drv_data, &pd->dev); + if (rc == -EPROBE_DEFER) return rc;