From patchwork Fri Oct 6 04:53:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devi Priya X-Patchwork-Id: 730101 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EDED020E3 for ; Fri, 6 Oct 2023 04:54:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="YfWwVWWy" Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70144DE; Thu, 5 Oct 2023 21:53:59 -0700 (PDT) Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3963d9U6022421; Fri, 6 Oct 2023 04:53:42 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=ym7AeYADiKI1I2XUjRkhj44BrtRJQi/RAV/mHmnnS8w=; b=YfWwVWWy+5XGdWi0Z1TxwcR/qxgV2LhSJOBTjHknmAxEDJ46xOR2fSayrBEot6ewgdQd PGkOS6KGvB2fIvA+K9zhVixZYXqAXuXbCTPkXB/PjXIrBnskZGVwx/oy5iTkdbq3VVyb rGwhsPpwKNd1gsmo1HrnB4cyfbtdoTkKNX7GfHW3IPIRmF2ergLh1D1FInkBwWW8wBm3 4AX+Hisygy34uOP2CgNtgRWlIoMP5ntuuTTkw3yr1aov42YgUNppA5+ab0VQWHmYVYFh GEWUA7Z7Nrxz5uajPOV9p6EmrskA8gkycNCKvaDB/jIW3ZOg6HqDDxQskeZ9WAgLHyTJ rw== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3thj6gk3dj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 06 Oct 2023 04:53:42 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3964rfEa003753 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 6 Oct 2023 04:53:41 GMT Received: from hu-devipriy-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Thu, 5 Oct 2023 21:53:36 -0700 From: Devi Priya To: , , , , , , , , , , , , , Subject: [PATCH 1/4] dt-bindings: pwm: Document the pwm compatible for ipq5332 & ipq9574 Date: Fri, 6 Oct 2023 10:23:14 +0530 Message-ID: <20231006045317.1056625-2-quic_devipriy@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231006045317.1056625-1-quic_devipriy@quicinc.com> References: <20231006045317.1056625-1-quic_devipriy@quicinc.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ZRqsp0yTo9oVO1J5rFcOmC9pa9Svk0yP X-Proofpoint-ORIG-GUID: ZRqsp0yTo9oVO1J5rFcOmC9pa9Svk0yP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-06_01,2023-10-05_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxscore=0 lowpriorityscore=0 suspectscore=0 spamscore=0 malwarescore=0 adultscore=0 priorityscore=1501 clxscore=1015 mlxlogscore=999 impostorscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310060036 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Use ipq6018 as the fallback for ipq5332 & ipq9574 and document its compatibles. Signed-off-by: Devi Priya --- .../devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml b/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml index 6d0d7ed271f7..8335c2952c2a 100644 --- a/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml @@ -11,7 +11,14 @@ maintainers: properties: compatible: - const: qcom,ipq6018-pwm + oneOf: + - items: + - enum: + - qcom,ipq5332-pwm + - qcom,ipq9574-pwm + - const: qcom,ipq6018-pwm + - enum: + - qcom,ipq6018-pwm reg: description: Offset of PWM register in the TCSR block. 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Signed-off-by: Devi Priya --- Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml index f836b973e382..1e1e25df4ee3 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml @@ -33,10 +33,8 @@ properties: - qcom,sm8450-tcsr - qcom,tcsr-apq8064 - qcom,tcsr-apq8084 - - qcom,tcsr-ipq5332 - qcom,tcsr-ipq8064 - qcom,tcsr-ipq8074 - - qcom,tcsr-ipq9574 - qcom,tcsr-mdm9615 - qcom,tcsr-msm8226 - qcom,tcsr-msm8660 @@ -47,7 +45,10 @@ properties: - qcom,tcsr-msm8996 - const: syscon - items: - - const: qcom,tcsr-ipq6018 + - enum: + - qcom,tcsr-ipq5332 + - qcom,tcsr-ipq6018 + - qcom,tcsr-ipq9574 - const: syscon - const: simple-mfd @@ -78,7 +79,9 @@ allOf: compatible: contains: enum: + - qcom,tcsr-ipq5332 - qcom,tcsr-ipq6018 + - qcom,tcsr-ipq9574 then: patternProperties: "pwm@[a-f0-9]+$": false From patchwork Fri Oct 6 04:53:16 2023 Content-Type: text/plain; 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Thu, 5 Oct 2023 21:53:46 -0700 From: Devi Priya To: , , , , , , , , , , , , , Subject: [PATCH 3/4] arm64: dts: qcom: ipq9574: Add pwm support Date: Fri, 6 Oct 2023 10:23:16 +0530 Message-ID: <20231006045317.1056625-4-quic_devipriy@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231006045317.1056625-1-quic_devipriy@quicinc.com> References: <20231006045317.1056625-1-quic_devipriy@quicinc.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: ywQB6DyHy_-d6w311jCjYxZQKtgkmhtz X-Proofpoint-GUID: ywQB6DyHy_-d6w311jCjYxZQKtgkmhtz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-06_01,2023-10-05_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxlogscore=870 mlxscore=0 suspectscore=0 impostorscore=0 adultscore=0 spamscore=0 clxscore=1015 malwarescore=0 priorityscore=1501 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310060036 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net The PWM is in the TCSR area. Make tcsr "simple-mfd" compatible and add pwm as a child of tcsr. Also, Enable pwm support in RDP418 of IPQ9574 SoC. Signed-off-by: Devi Priya --- arch/arm64/boot/dts/qcom/ipq9574-rdp418.dts | 12 ++++++++++++ arch/arm64/boot/dts/qcom/ipq9574.dtsi | 15 ++++++++++++++- 2 files changed, 26 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp418.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp418.dts index 2b093e02637b..d275c98b4df7 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp418.dts +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp418.dts @@ -43,6 +43,12 @@ &blsp1_uart2 { status = "okay"; }; +&pwm { + pinctrl-0 = <&pwm_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + &rpm_requests { regulators { compatible = "qcom,rpm-mp5496-regulators"; @@ -79,6 +85,12 @@ &sleep_clk { }; &tlmm { + pwm_pins: pwm-state { + pins = "gpio57"; + function = "pwm"; + drive-strength = <8>; + }; + sdc_default_state: sdc-default-state { clk-pins { pins = "gpio5"; diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 8a72ad4afd03..5465254fbdde 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -296,8 +296,21 @@ tcsr_mutex: hwlock@1905000 { }; tcsr: syscon@1937000 { - compatible = "qcom,tcsr-ipq9574", "syscon"; + compatible = "qcom,tcsr-ipq9574", "syscon", "simple-mfd"; reg = <0x01937000 0x21000>; + ranges = <0x0 0x01937000 0x21000>; + #address-cells = <1>; + #size-cells = <1>; + + pwm: pwm@a010 { + compatible = "qcom,ipq9574-pwm", "qcom,ipq6018-pwm"; + reg = <0xa010 0x20>; + clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clock-rates = <100000000>; + #pwm-cells = <2>; + status = "disabled"; + }; }; sdhc_1: mmc@7804000 { From patchwork Fri Oct 6 04:53:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devi Priya X-Patchwork-Id: 730100 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9BB6AEA1 for ; Fri, 6 Oct 2023 04:54:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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The PWM is in the TCSR area. Make tcsr "simple-mfd" compatible, and add pwm as a child of &tcsr. Signed-off-by: Devi Priya Reviewed-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/ipq5332.dtsi | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index d3fef2f80a81..7620f1ccd324 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -210,8 +210,21 @@ tcsr_mutex: hwlock@1905000 { }; tcsr: syscon@1937000 { - compatible = "qcom,tcsr-ipq5332", "syscon"; + compatible = "qcom,tcsr-ipq5332", "syscon", "simple-mfd"; reg = <0x01937000 0x21000>; + ranges = <0x0 0x01937000 0x21000>; + #address-cells = <1>; + #size-cells = <1>; + + pwm: pwm@a010 { + compatible = "qcom,ipq5332-pwm", "qcom,ipq6018-pwm"; + reg = <0xa010 0x20>; + clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clock-rates = <100000000>; + #pwm-cells = <2>; + status = "disabled"; + }; }; sdhc: mmc@7804000 {