From patchwork Wed Jul 31 22:41:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 170276 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp4576553ile; Wed, 31 Jul 2019 15:43:55 -0700 (PDT) X-Google-Smtp-Source: APXvYqxK20YJvyjXexuSSyhQJxB+KekDC0zDwW87YBpR6u1rACdGxz53UOFlygu1tbK/ai5vUEPW X-Received: by 2002:a65:448a:: with SMTP id l10mr90304566pgq.327.1564613034995; Wed, 31 Jul 2019 15:43:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1564613034; cv=none; d=google.com; s=arc-20160816; b=mDP54x9nT4a/cLOEnXnLPRZYh3wUYwSNOqNl5lyptlkINc+aAJUqvV4pd9phDsYVTJ 8CGAS7uohwmYDjN/630nD7OMKfTAr6GLhbcxLwbHRvA/zJNylju6TgQQTliwcrDSxqVd 8rgkZtAP/m9pJO35H3K/j5ELmLRSAZudbPd9ZidMLsnclKUo8L+cCEHrCSDa4KPNVc3j vxEiwA51Nn+j7hF+2dFVDFxYm+KvtFqwaGTTpnjPISDKOj+xANcbXZlgm6gQWu9KfWlf fqHzK3OFC+VWzjF6HHcZGpFiuosRO9Y/Sz/2kIPKtaz+wOT9qxXRmgFEzluOEeR6pkRb AnnQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=MymarW68RCKx3CSc/lO7aD1jk9ypkkXITH2/3hAWyDk=; b=bjCM0M6ul5T5muqeWwOV8SURoc+p7UlxR7sDAU8JwIefyIxdmVu1IIeaALabYECk0Z a+u+h398jJLHG1BPTWrdXG7GJVQW3U3lhJ8RjoLosaOX1qJRmtZO9qiZs/GLSafXAzb/ WvIFuioVYdfl7MTfv/73Q+b945/tf0TebFYgqkovev2w2ss2IbT0kTNSH8Arm0Us1Z+c t0TBotpRCLhE5xS4GjEg4Tgw3sivym8JEZLNCQAQlbkQ+2bJxZNb5Y0ibHyQGn8DJP6k 6+QIFL0kufqWiuBek22S3CG+ixjPHPoTcvHexdS2YeOsmEZM8YndaTcoQSlV2CRW0Qwa 05lA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=HgxoHcC5; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j191si34746458pgd.88.2019.07.31.15.43.54; Wed, 31 Jul 2019 15:43:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=HgxoHcC5; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730264AbfGaWnx (ORCPT + 29 others); Wed, 31 Jul 2019 18:43:53 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:48382 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730145AbfGaWnw (ORCPT ); Wed, 31 Jul 2019 18:43:52 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x6VMgjg9095987; Wed, 31 Jul 2019 17:42:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1564612965; bh=MymarW68RCKx3CSc/lO7aD1jk9ypkkXITH2/3hAWyDk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=HgxoHcC5xzjRBp7szKJHqW8skvEgU+Wm4HpM6k15RC3x/ihrbdMyCMNFiJ5E4VGM0 hMmQRBjkZeeC+x0UnAhLiIyh6HxZsSb6u1EGLnp0BQue7nxuGz7XJOzQq+Tr/pg4A0 H3WSYwB+lAima5X88VBsF4OM9dIe48GrXGU5pf80= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x6VMgjdf112874 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 31 Jul 2019 17:42:45 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 31 Jul 2019 17:42:44 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 31 Jul 2019 17:42:45 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id x6VMgiGE128542; Wed, 31 Jul 2019 17:42:44 -0500 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id x6VMghZ25799; Wed, 31 Jul 2019 17:42:44 -0500 (CDT) From: Suman Anna To: Marc Zyngier , Thomas Gleixner , Jason Cooper CC: Rob Herring , David Lechner , Tony Lindgren , "Andrew F. Davis" , Roger Quadros , Lokesh Vutla , Grygorii Strashko , Sekhar Nori , Murali Karicheri , , , , , Suman Anna Subject: [PATCH v2 5/6] irqchip/irq-pruss-intc: Implement irq_{get, set}_irqchip_state ops Date: Wed, 31 Jul 2019 17:41:48 -0500 Message-ID: <20190731224149.11153-6-s-anna@ti.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190731224149.11153-1-s-anna@ti.com> References: <20190731224149.11153-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner This implements the irq_get_irqchip_state and irq_set_irqchip_state callbacks for the TI PRUSS INTC driver. The set callback can be used by drivers to "kick" a PRU by enabling a PRU system event. Example: irq_set_irqchip_state(irq, IRQCHIP_STATE_PENDING, true); Signed-off-by: David Lechner Signed-off-by: Suman Anna --- v2: New patch from David replacing an exported API from v1, https://patchwork.kernel.org/patch/11034565/ drivers/irqchip/irq-pruss-intc.c | 41 ++++++++++++++++++++++++++++++-- 1 file changed, 39 insertions(+), 2 deletions(-) -- 2.22.0 diff --git a/drivers/irqchip/irq-pruss-intc.c b/drivers/irqchip/irq-pruss-intc.c index 63cfc665be1e..59e26dfbb179 100644 --- a/drivers/irqchip/irq-pruss-intc.c +++ b/drivers/irqchip/irq-pruss-intc.c @@ -7,6 +7,7 @@ * Suman Anna */ +#include #include #include #include @@ -40,8 +41,7 @@ #define PRU_INTC_HIEISR 0x0034 #define PRU_INTC_HIDISR 0x0038 #define PRU_INTC_GPIR 0x0080 -#define PRU_INTC_SRSR0 0x0200 -#define PRU_INTC_SRSR1 0x0204 +#define PRU_INTC_SRSR(x) (0x0200 + (x) * 4) #define PRU_INTC_SECR0 0x0280 #define PRU_INTC_SECR1 0x0284 #define PRU_INTC_ESR0 0x0300 @@ -439,6 +439,41 @@ static void pruss_intc_irq_relres(struct irq_data *data) module_put(THIS_MODULE); } +static int pruss_intc_irq_get_irqchip_state(struct irq_data *data, + enum irqchip_irq_state which, + bool *state) +{ + struct pruss_intc *intc = irq_data_get_irq_chip_data(data); + u32 reg, mask, srsr; + + if (which != IRQCHIP_STATE_PENDING) + return -EINVAL; + + reg = PRU_INTC_SRSR(data->hwirq / 32); + mask = BIT(data->hwirq % 32); + + srsr = pruss_intc_read_reg(intc, reg); + + *state = !!(srsr & mask); + + return 0; +} + +static int pruss_intc_irq_set_irqchip_state(struct irq_data *data, + enum irqchip_irq_state which, + bool state) +{ + struct pruss_intc *intc = irq_data_get_irq_chip_data(data); + + if (which != IRQCHIP_STATE_PENDING) + return -EINVAL; + + if (state) + return pruss_intc_check_write(intc, PRU_INTC_SISR, data->hwirq); + + return pruss_intc_check_write(intc, PRU_INTC_SICR, data->hwirq); +} + static int pruss_intc_irq_domain_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw) { @@ -583,6 +618,8 @@ static int pruss_intc_probe(struct platform_device *pdev) irqchip->irq_unmask = pruss_intc_irq_unmask; irqchip->irq_request_resources = pruss_intc_irq_reqres; irqchip->irq_release_resources = pruss_intc_irq_relres; + irqchip->irq_get_irqchip_state = pruss_intc_irq_get_irqchip_state; + irqchip->irq_set_irqchip_state = pruss_intc_irq_set_irqchip_state; irqchip->name = dev_name(dev); intc->irqchip = irqchip;