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To fix below issue: "gpio@43820080: gpio-ranges: [[30, 0, 84, 8], [30, 8, 66, 18], [30, 26, 34, 2], [30, 28, 0, 4]] is too long" Update the gpio-ranges property Acked-by: Krzysztof Kozlowski Reviewed-by: Fabio Estevam Reviewed-by: Linus Walleij Signed-off-by: Peng Fan --- Documentation/devicetree/bindings/gpio/gpio-vf610.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml index 7c2d152e8617..59427d97adf5 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml @@ -59,7 +59,8 @@ properties: - const: port gpio-ranges: - maxItems: 1 + minItems: 1 + maxItems: 4 patternProperties: "^.+-hog(-[0-9]+)?$": From patchwork Sun Oct 1 08:27:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan \(OSS\)" X-Patchwork-Id: 728393 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B2F59CA59 for ; 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Signed-off-by: Peng Fan --- drivers/gpio/gpio-vf610.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c index 8e12706c0b22..c03dfda41d4c 100644 --- a/drivers/gpio/gpio-vf610.c +++ b/drivers/gpio/gpio-vf610.c @@ -100,7 +100,7 @@ static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio) unsigned long mask = BIT(gpio); unsigned long offset = GPIO_PDIR; - if (port->sdata && port->sdata->have_paddr) { + if (port->sdata->have_paddr) { mask &= vf610_gpio_readl(port->gpio_base + GPIO_PDDR); if (mask) offset = GPIO_PDOR; @@ -124,7 +124,7 @@ static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) unsigned long mask = BIT(gpio); u32 val; - if (port->sdata && port->sdata->have_paddr) { + if (port->sdata->have_paddr) { val = vf610_gpio_readl(port->gpio_base + GPIO_PDDR); val &= ~mask; vf610_gpio_writel(val, port->gpio_base + GPIO_PDDR); @@ -140,7 +140,7 @@ static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, unsigned long mask = BIT(gpio); u32 val; - if (port->sdata && port->sdata->have_paddr) { + if (port->sdata->have_paddr) { val = vf610_gpio_readl(port->gpio_base + GPIO_PDDR); val |= mask; vf610_gpio_writel(val, port->gpio_base + GPIO_PDDR); From patchwork Sun Oct 1 08:27:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan \(OSS\)" X-Patchwork-Id: 728391 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C7D819CA59 for ; Sun, 1 Oct 2023 08:24:06 +0000 (UTC) Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on2082.outbound.protection.outlook.com [40.107.20.82]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81F6F83; Sun, 1 Oct 2023 01:23:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; 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Sun, 1 Oct 2023 08:23:54 +0000 From: "Peng Fan (OSS)" Date: Sun, 01 Oct 2023 16:27:58 +0800 Subject: [PATCH v5 7/7] arm64: dts: imx93: update gpio node Message-Id: <20231001-vf610-gpio-v5-7-8d873a8f224a@nxp.com> References: <20231001-vf610-gpio-v5-0-8d873a8f224a@nxp.com> In-Reply-To: <20231001-vf610-gpio-v5-0-8d873a8f224a@nxp.com> To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stefan Agner , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Marco Felsch Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Peng Fan X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1696148883; l=3170; i=peng.fan@nxp.com; s=20230812; h=from:subject:message-id; bh=SIdbIE7CpI/4V5dWp7tqZZ3kaf6GR+H5NOQPt9VJs8U=; b=sw0eRM102oJX7aMzGWC4D81n4Q1BozEFDpHuSOvwyVPnBvUMICCODZWfzMbLpK7cssQ/IWtnG bcbaVBHqgnFCY3tw6qDq3sz2oqX00wJ7OX0UzuvRuooNFI2KI1l/ByI X-Developer-Key: i=peng.fan@nxp.com; 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The current fsl,imx7ulp-gpio compatible could work for i.MX93 in gpio-vf610.c driver, it is based on the base address are splited into two with offset added in device tree node. Now following hardware design, using one register base in device tree node. This may break users who use compatible fsl,imx7ulp-gpio to enable i.MX93 GPIO. Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx93.dtsi | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index 6f85a05ee7e1..4b111b8c1931 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -825,11 +825,12 @@ usdhc3: mmc@428b0000 { }; gpio2: gpio@43810080 { - compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio"; - reg = <0x43810080 0x1000>, <0x43810040 0x40>; + compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio"; + reg = <0x43810000 0x1000>; gpio-controller; #gpio-cells = <2>; - interrupts = ; + interrupts = , + ; interrupt-controller; #interrupt-cells = <2>; clocks = <&clk IMX93_CLK_GPIO2_GATE>, @@ -839,11 +840,12 @@ gpio2: gpio@43810080 { }; gpio3: gpio@43820080 { - compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio"; - reg = <0x43820080 0x1000>, <0x43820040 0x40>; + compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio"; + reg = <0x43820000 0x1000>; gpio-controller; #gpio-cells = <2>; - interrupts = ; + interrupts = , + ; interrupt-controller; #interrupt-cells = <2>; clocks = <&clk IMX93_CLK_GPIO3_GATE>, @@ -854,11 +856,12 @@ gpio3: gpio@43820080 { }; gpio4: gpio@43830080 { - compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio"; - reg = <0x43830080 0x1000>, <0x43830040 0x40>; + compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio"; + reg = <0x43830000 0x1000>; gpio-controller; #gpio-cells = <2>; - interrupts = ; + interrupts = , + ; interrupt-controller; #interrupt-cells = <2>; clocks = <&clk IMX93_CLK_GPIO4_GATE>, @@ -868,11 +871,12 @@ gpio4: gpio@43830080 { }; gpio1: gpio@47400080 { - compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio"; - reg = <0x47400080 0x1000>, <0x47400040 0x40>; + compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio"; + reg = <0x47400000 0x1000>; gpio-controller; #gpio-cells = <2>; - interrupts = ; + interrupts = , + ; interrupt-controller; #interrupt-cells = <2>; clocks = <&clk IMX93_CLK_GPIO1_GATE>,