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Fri, 29 Sep 2023 03:36:55 -0700 From: Jon Hunter To: Jean Delvare , Guenter Roeck , "Rob Herring" , Krzysztof Kozlowski , Conor Dooley , Thierry Reding CC: , , , Ninad Malwade , "Thierry Reding" , Jon Hunter Subject: [PATCH V5 1/4] dt-bindings: hwmon: ina3221: Convert to json-schema Date: Fri, 29 Sep 2023 11:36:47 +0100 Message-ID: <20230929103650.86074-2-jonathanh@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230929103650.86074-1-jonathanh@nvidia.com> References: <20230929103650.86074-1-jonathanh@nvidia.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000042A8:EE_|CY5PR12MB6454:EE_ X-MS-Office365-Filtering-Correlation-Id: 9fc96328-9558-42e7-58cf-08dbc0d80780 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Sep 2023 10:37:07.2815 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9fc96328-9558-42e7-58cf-08dbc0d80780 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000042A8.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6454 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net From: Ninad Malwade Convert the TI INA3221 bindings from the free-form text format to json-schema. Note that the INA3221 input channels default to enabled in the chip. Unless channels are explicitly disabled in device-tree, input channels will be enabled. Signed-off-by: Thierry Reding Signed-off-by: Ninad Malwade Signed-off-by: Jon Hunter --- .../devicetree/bindings/hwmon/ina3221.txt | 54 ---------- .../devicetree/bindings/hwmon/ti,ina3221.yaml | 102 ++++++++++++++++++ 2 files changed, 102 insertions(+), 54 deletions(-) delete mode 100644 Documentation/devicetree/bindings/hwmon/ina3221.txt create mode 100644 Documentation/devicetree/bindings/hwmon/ti,ina3221.yaml diff --git a/Documentation/devicetree/bindings/hwmon/ina3221.txt b/Documentation/devicetree/bindings/hwmon/ina3221.txt deleted file mode 100644 index fa63b6171407..000000000000 --- a/Documentation/devicetree/bindings/hwmon/ina3221.txt +++ /dev/null @@ -1,54 +0,0 @@ -Texas Instruments INA3221 Device Tree Bindings - -1) ina3221 node - Required properties: - - compatible: Must be "ti,ina3221" - - reg: I2C address - - Optional properties: - - ti,single-shot: This chip has two power modes: single-shot (chip takes one - measurement and then shuts itself down) and continuous ( - chip takes continuous measurements). The continuous mode is - more reliable and suitable for hardware monitor type device, - but the single-shot mode is more power-friendly and useful - for battery-powered device which cares power consumptions - while still needs some measurements occasionally. - If this property is present, the single-shot mode will be - used, instead of the default continuous one for monitoring. - - = The node contains optional child nodes for three channels = - = Each child node describes the information of input source = - - - #address-cells: Required only if a child node is present. Must be 1. - - #size-cells: Required only if a child node is present. Must be 0. - -2) child nodes - Required properties: - - reg: Must be 0, 1 or 2, corresponding to IN1, IN2 or IN3 port of INA3221 - - Optional properties: - - label: Name of the input source - - shunt-resistor-micro-ohms: Shunt resistor value in micro-Ohm - -Example: - -ina3221@40 { - compatible = "ti,ina3221"; - reg = <0x40>; - #address-cells = <1>; - #size-cells = <0>; - - input@0 { - reg = <0x0>; - status = "disabled"; - }; - input@1 { - reg = <0x1>; - shunt-resistor-micro-ohms = <5000>; - }; - input@2 { - reg = <0x2>; - label = "VDD_5V"; - shunt-resistor-micro-ohms = <5000>; - }; -}; diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina3221.yaml b/Documentation/devicetree/bindings/hwmon/ti,ina3221.yaml new file mode 100644 index 000000000000..0fd8ae5f6a22 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/ti,ina3221.yaml @@ -0,0 +1,102 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/ti,ina3221.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments INA3221 Current and Voltage Monitor + +maintainers: + - Jean Delvare + - Guenter Roeck + +properties: + compatible: + const: ti,ina3221 + + reg: + maxItems: 1 + + ti,single-shot: + description: | + This chip has two power modes: single-shot (chip takes one measurement + and then shuts itself down) and continuous (chip takes continuous + measurements). The continuous mode is more reliable and suitable for + hardware monitor type device, but the single-shot mode is more power- + friendly and useful for battery-powered device which cares power + consumptions while still needs some measurements occasionally. + + If this property is present, the single-shot mode will be used, instead + of the default continuous one for monitoring. + $ref: /schemas/types.yaml#/definitions/flag + + "#address-cells": + description: Required only if a child node is present. + const: 1 + + "#size-cells": + description: Required only if a child node is present. + const: 0 + +patternProperties: + "^input@[0-2]$": + description: The node contains optional child nodes for three channels. + Each child node describes the information of input source. Input channels + default to enabled in the chip. Unless channels are explicitly disabled + in device-tree, input channels will be enabled. + type: object + additionalProperties: false + properties: + reg: + description: Must be 0, 1 and 2, corresponding to the IN1, IN2 or IN3 + ports of the INA3221, respectively. + enum: [ 0, 1, 2 ] + + label: + description: name of the input source + + shunt-resistor-micro-ohms: + description: shunt resistor value in micro-Ohm + + required: + - reg + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + power-sensor@40 { + compatible = "ti,ina3221"; + reg = <0x40>; + #address-cells = <1>; + #size-cells = <0>; + + input@0 { + reg = <0x0>; + /* + * Input channels are enabled by default in the device and so + * to disable, must be explicitly disabled in device-tree. + */ + status = "disabled"; + }; + + input@1 { + reg = <0x1>; + shunt-resistor-micro-ohms = <5000>; + }; + + input@2 { + reg = <0x2>; + label = "VDD_5V"; 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Fri, 29 Sep 2023 03:37:04 -0700 From: Jon Hunter To: Jean Delvare , Guenter Roeck , "Rob Herring" , Krzysztof Kozlowski , Conor Dooley , Thierry Reding CC: , , , Jon Hunter Subject: [PATCH V5 4/4] arm64: tegra: Add power-sensors for Tegra234 boards Date: Fri, 29 Sep 2023 11:36:50 +0100 Message-ID: <20230929103650.86074-5-jonathanh@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230929103650.86074-1-jonathanh@nvidia.com> References: <20230929103650.86074-1-jonathanh@nvidia.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D5:EE_|CY5PR12MB6549:EE_ X-MS-Office365-Filtering-Correlation-Id: 7d905c2e-7a79-4ae2-8d10-08dbc0d80ce6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: hr5WUhgZCW/rOeZDO3/URzYItRjl62Q8U61Z5hRuI1IT0FiIuWMAjmEMGCo6uWbxGAXr1Oq9i1fGkAFPuDRF/euwZ2+joELUZOZcNWC2pzmsAdUo+oVn+s0gYsuvaB7IOjTEMBwQ7fiCAJA3dnZTCifTGfGqjztXP1XHLsEutamoYKmnSOL0OiQYjeCi/w4ZoINvokeziFjxt7vG2MnWh48zxk4oFM6hyIeAhDq5b61DGt5Ro/vclDgrenBvaGxNbNhUS+veLhIKCHAULxJaWV8hDBEsfLA2FwP82YqAw2pqhDVZedbxr+UfvSQpcPMlaCbB2XTH2zZTUANqHRaMhtTe63LTJSRjjQLs3oEA+rATiDZGWo+eDE1AZJrnioJvNytLxxYA4RaXoGhI8pXk+QTnQQUo0/YYF36TCzqOeBIZPsWFHoHEajvJAjOR8JdZM00rIxG+w5+bxkPlEinrgSlwZKFxhoA6X3wY5PHsjW/loQ613NAB7BRzf402idT7NYXfs1RQQT5Dx1Z8G0LsAEgnO0V7CXAk+0S+33AR63Z93YZmd6IQwCkVV1MQf+Pnh+gnF0PGvLN9V9XrGWBJr9+iSPRv+QcmyG8R6ESo8naU10iGzPbuuVzaK+NoxsvGL8x4c8yhXr/mggfd6SmlPPI4kB0mVScaGC6CqXPpic4sNRMWPKmZ0nLt35ITHcVbN1TjUCGGEN8oEFhj7g8/gYmZtkBnKEfAccg859HNH6A= X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230031)(4636009)(136003)(376002)(396003)(39860400002)(346002)(230922051799003)(186009)(64100799003)(451199024)(82310400011)(1800799009)(36840700001)(46966006)(40470700004)(2906002)(5660300002)(40480700001)(70586007)(41300700001)(26005)(54906003)(110136005)(478600001)(316002)(70206006)(4326008)(1076003)(8676002)(8936002)(2616005)(6666004)(336012)(40460700003)(426003)(7636003)(47076005)(36860700001)(107886003)(36756003)(86362001)(356005)(82740400003)(83380400001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Sep 2023 10:37:16.3868 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7d905c2e-7a79-4ae2-8d10-08dbc0d80ce6 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D5.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6549 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Populate the ina219 and ina3221 power-sensors for the various Tegra234 boards. These sensors are located on the Tegra234 module boards and the configuration of some sensors is common across the different Tegra234 modules. Therefore, add any common sensor configurations to appropriate device tree source file so it can be re-used across modules. Signed-off-by: Jon Hunter --- .../boot/dts/nvidia/tegra234-p3701-0008.dtsi | 33 ++++++++++++ .../arm64/boot/dts/nvidia/tegra234-p3701.dtsi | 53 +++++++++++++++++++ .../arm64/boot/dts/nvidia/tegra234-p3767.dtsi | 29 ++++++++++ 3 files changed, 115 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0008.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0008.dtsi index 62c4fdad0b60..553fa4ba1cd4 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0008.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0008.dtsi @@ -44,6 +44,39 @@ i2c@c240000 { status = "okay"; }; + i2c@c250000 { + power-sensor@41 { + compatible = "ti,ina3221"; + reg = <0x41>; + #address-cells = <1>; + #size-cells = <0>; + + input@0 { + reg = <0x0>; + label = "CVB_ATX_12V"; + shunt-resistor-micro-ohms = <2000>; + }; + + input@1 { + reg = <0x1>; + label = "CVB_ATX_3V3"; + shunt-resistor-micro-ohms = <2000>; + }; + + input@2 { + reg = <0x2>; + label = "CVB_ATX_5V"; + shunt-resistor-micro-ohms = <2000>; + }; + }; + + power-sensor@44 { + compatible = "ti,ina219"; + reg = <0x44>; + shunt-resistor = <2000>; + }; + }; + rtc@c2a0000 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi index 5e7797df50c2..db6ef711674a 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi @@ -1987,5 +1987,58 @@ interrupt-controller@2a40000 { status = "okay"; }; }; + + i2c@c240000 { + status = "okay"; + + power-sensor@40 { + compatible = "ti,ina3221"; + reg = <0x40>; + #address-cells = <1>; + #size-cells = <0>; + + input@0 { + reg = <0x0>; + label = "VDD_GPU_SOC"; + shunt-resistor-micro-ohms = <2000>; + }; + + input@1 { + reg = <0x1>; + label = "VDD_CPU_CV"; + shunt-resistor-micro-ohms = <2000>; + }; + + input@2 { + reg = <0x2>; + label = "VIN_SYS_5V0"; + shunt-resistor-micro-ohms = <2000>; + ti,summation-disable; + }; + }; + + power-sensor@41 { + compatible = "ti,ina3221"; + reg = <0x41>; + #address-cells = <1>; + #size-cells = <0>; + + input@0 { + reg = <0x0>; + status = "disabled"; + }; + + input@1 { + reg = <0x1>; + label = "VDDQ_VDD2_1V8AO"; + shunt-resistor-micro-ohms = <2000>; + }; + + input@2 { + reg = <0x2>; + status = "disabled"; + }; + }; + }; }; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi index fe08e131b7b9..59c14ded5e9f 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi @@ -55,6 +55,35 @@ padctl@3520000 { avdd-usb-supply = <&vdd_3v3_ao>; }; + i2c@c240000 { + status = "okay"; + + power-sensor@40 { + compatible = "ti,ina3221"; + reg = <0x40>; + #address-cells = <1>; + #size-cells = <0>; + + input@0 { + reg = <0x0>; + label = "VDD_IN"; + shunt-resistor-micro-ohms = <5000>; + }; + + input@1 { + reg = <0x1>; + label = "VDD_CPU_GPU_CV"; + shunt-resistor-micro-ohms = <5000>; + }; + + input@2 { + reg = <0x2>; + label = "VDD_SOC"; + shunt-resistor-micro-ohms = <5000>; + }; + }; + }; + rtc@c2a0000 { status = "okay"; };