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Fixes: d4ea45e8a603 ("dt-bindings: imx: add scu resource id headfile") Signed-off-by: Frank Li --- drivers/genpd/imx/scu-pd.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/genpd/imx/scu-pd.c b/drivers/genpd/imx/scu-pd.c index 2f693b67ddb4..891c1d925a9d 100644 --- a/drivers/genpd/imx/scu-pd.c +++ b/drivers/genpd/imx/scu-pd.c @@ -150,7 +150,8 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { { "mclk-out-1", IMX_SC_R_MCLK_OUT_1, 1, false, 0 }, { "dma0-ch", IMX_SC_R_DMA_0_CH0, 32, true, 0 }, { "dma1-ch", IMX_SC_R_DMA_1_CH0, 16, true, 0 }, - { "dma2-ch", IMX_SC_R_DMA_2_CH0, 32, true, 0 }, + { "dma2-ch-0", IMX_SC_R_DMA_2_CH0, 5, true, 0 }, + { "dma2-ch-1", IMX_SC_R_DMA_2_CH5, 27, true, 0 }, { "dma3-ch", IMX_SC_R_DMA_3_CH0, 32, true, 0 }, { "asrc0", IMX_SC_R_ASRC_0, 1, false, 0 }, { "asrc1", IMX_SC_R_ASRC_1, 1, false, 0 }, From patchwork Mon Sep 25 20:49:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 726163 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E32D2375F for ; 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Signed-off-by: Frank Li --- .../boot/dts/freescale/imx8-ss-audio.dtsi | 88 +++++++++++++++++++ .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 62 +++++++++++++ .../boot/dts/freescale/imx8dxl-ss-adma.dtsi | 30 +++++++ .../boot/dts/freescale/imx8qm-ss-dma.dtsi | 52 +++++++++++ 4 files changed, 232 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi index f248e78fb1e0..9d75ce467569 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi @@ -20,6 +20,63 @@ audio_subsys: bus@59000000 { #size-cells = <1>; ranges = <0x59000000 0x0 0x59000000 0x1000000>; + edma0: dma-controller@591f0000 { + compatible = "fsl,imx8qm-edma"; + reg = <0x591f0000 0x190000>; + #dma-cells = <3>; + shared-interrupt; + dma-channels = <24>; + dma-channel-mask = <0x5c0c00>; + interrupts = , /* 0 asrc 0 */ + , /* 1 */ + , /* 2 */ + , /* 3 */ + , /* 4 */ + , /* 5 */ + , /* 6 esai0 */ + , /* 7 */ + , /* 8 spdif0 */ + , /* 9 */ + , /* 10 unused */ + , /* 11 unused */ + , /* 12 sai0 */ + , /* 13 */ + , /* 14 sai1 */ + , /* 15 */ + , /* 16 sai2 */ + , /* 17 sai3 */ + , /* 18 unused */ + , /* 19 unused */ + , /* 20 unused */ + , /* 21 */ + , /* 22 unused */ + ; /* 23 unused */ + power-domains = <&pd IMX_SC_R_DMA_0_CH0>, + <&pd IMX_SC_R_DMA_0_CH1>, + <&pd IMX_SC_R_DMA_0_CH2>, + <&pd IMX_SC_R_DMA_0_CH3>, + <&pd IMX_SC_R_DMA_0_CH4>, + <&pd IMX_SC_R_DMA_0_CH5>, + <&pd IMX_SC_R_DMA_0_CH6>, + <&pd IMX_SC_R_DMA_0_CH7>, + <&pd IMX_SC_R_DMA_0_CH8>, + <&pd IMX_SC_R_DMA_0_CH9>, + <&pd IMX_SC_R_DMA_0_CH10>, + <&pd IMX_SC_R_DMA_0_CH11>, + <&pd IMX_SC_R_DMA_0_CH12>, + <&pd IMX_SC_R_DMA_0_CH13>, + <&pd IMX_SC_R_DMA_0_CH14>, + <&pd IMX_SC_R_DMA_0_CH15>, + <&pd IMX_SC_R_DMA_0_CH16>, + <&pd IMX_SC_R_DMA_0_CH17>, + <&pd IMX_SC_R_DMA_0_CH18>, + <&pd IMX_SC_R_DMA_0_CH19>, + <&pd IMX_SC_R_DMA_0_CH20>, + <&pd IMX_SC_R_DMA_0_CH21>, + <&pd IMX_SC_R_DMA_0_CH22>, + <&pd IMX_SC_R_DMA_0_CH23>; + }; + dsp_lpcg: clock-controller@59580000 { compatible = "fsl,imx8qxp-lpcg"; reg = <0x59580000 0x10000>; @@ -65,4 +122,35 @@ dsp: dsp@596e8000 { memory-region = <&dsp_reserved>; status = "disabled"; }; + + edma1: dma-controller@599f0000 { + compatible = "fsl,imx8qm-edma"; + reg = <0x599f0000 0xc0000>; + #dma-cells = <3>; + shared-interrupt; + dma-channels = <11>; + dma-channel-mask = <0xc0>; + interrupts = , /* 0 asrc 1 */ + , /* 1 */ + , /* 2 */ + , /* 3 */ + , /* 4 */ + , /* 5 */ + , /* 6 unused */ + , /* 7 unused */ + , /* sai4 */ + , + ; /* sai5 */ + power-domains = <&pd IMX_SC_R_DMA_1_CH0>, + <&pd IMX_SC_R_DMA_1_CH1>, + <&pd IMX_SC_R_DMA_1_CH2>, + <&pd IMX_SC_R_DMA_1_CH3>, + <&pd IMX_SC_R_DMA_1_CH4>, + <&pd IMX_SC_R_DMA_1_CH5>, + <&pd IMX_SC_R_DMA_1_CH6>, + <&pd IMX_SC_R_DMA_1_CH7>, + <&pd IMX_SC_R_DMA_1_CH8>, + <&pd IMX_SC_R_DMA_1_CH9>, + <&pd IMX_SC_R_DMA_1_CH10>; + }; }; diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index a206526665d6..0519edd3f520 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -145,6 +145,68 @@ adma_pwm: pwm@5a190000 { power-domains = <&pd IMX_SC_R_LCD_0_PWM_0>; }; + edma2: dma-controller@5a1f0000 { + compatible = "fsl,imx8qm-edma"; + reg = <0x5a1f0000 0x170000>; + #dma-cells = <3>; + dma-channels = <16>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + power-domains = <&pd IMX_SC_R_DMA_2_CH0>, + <&pd IMX_SC_R_DMA_2_CH1>, + <&pd IMX_SC_R_DMA_2_CH2>, + <&pd IMX_SC_R_DMA_2_CH3>, + <&pd IMX_SC_R_DMA_2_CH4>, + <&pd IMX_SC_R_DMA_2_CH5>, + <&pd IMX_SC_R_DMA_2_CH6>, + <&pd IMX_SC_R_DMA_2_CH7>, + <&pd IMX_SC_R_DMA_2_CH8>, + <&pd IMX_SC_R_DMA_2_CH9>, + <&pd IMX_SC_R_DMA_2_CH10>, + <&pd IMX_SC_R_DMA_2_CH11>, + <&pd IMX_SC_R_DMA_2_CH12>, + <&pd IMX_SC_R_DMA_2_CH13>, + <&pd IMX_SC_R_DMA_2_CH14>, + <&pd IMX_SC_R_DMA_2_CH15>; + }; + + edma3: dma-controller@5a9f0000 { + compatible = "fsl,imx8qm-edma"; + reg = <0x5a9f0000 0x90000>; + #dma-cells = <3>; + dma-channels = <8>; + interrupts = , + , + , + , + , + , + , + ; + power-domains = <&pd IMX_SC_R_DMA_3_CH0>, + <&pd IMX_SC_R_DMA_3_CH1>, + <&pd IMX_SC_R_DMA_3_CH2>, + <&pd IMX_SC_R_DMA_3_CH3>, + <&pd IMX_SC_R_DMA_3_CH4>, + <&pd IMX_SC_R_DMA_3_CH5>, + <&pd IMX_SC_R_DMA_3_CH6>, + <&pd IMX_SC_R_DMA_3_CH7>; + }; + spi0_lpcg: clock-controller@5a400000 { compatible = "fsl,imx8qxp-lpcg"; reg = <0x5a400000 0x10000>; diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi index a9095964ac91..0a477f6318f1 100644 --- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi @@ -15,6 +15,36 @@ &adc0 { interrupts = ; }; +&edma2 { + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; +}; + +&edma3 { + interrupts = , + , + , + , + , + , + , + ; +}; + &i2c0 { compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c"; interrupts = ; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi index e9b198c13b2f..297ad4ef4a78 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi @@ -44,6 +44,58 @@ can2_lpcg: clock-controller@5acf0000 { }; }; +&edma2 { + reg = <0x5a1f0000 0x170000>; + #dma-cells = <3>; + dma-channels = <22>; + dma-channel-mask = <0xf00>; + interrupts = , + , + , + , + , + , + , + , + , /* unused */ + , /* unused */ + , /* unused */ + , /* unused */ + , + , + , + , + , + , + , + , + , + ; + power-domains = <&pd IMX_SC_R_DMA_0_CH0>, + <&pd IMX_SC_R_DMA_0_CH1>, + <&pd IMX_SC_R_DMA_0_CH2>, + <&pd IMX_SC_R_DMA_0_CH3>, + <&pd IMX_SC_R_DMA_0_CH4>, + <&pd IMX_SC_R_DMA_0_CH5>, + <&pd IMX_SC_R_DMA_0_CH6>, + <&pd IMX_SC_R_DMA_0_CH7>, + <&pd IMX_SC_R_DMA_0_CH8>, + <&pd IMX_SC_R_DMA_0_CH9>, + <&pd IMX_SC_R_DMA_0_CH10>, + <&pd IMX_SC_R_DMA_0_CH11>, + <&pd IMX_SC_R_DMA_0_CH12>, + <&pd IMX_SC_R_DMA_0_CH13>, + <&pd IMX_SC_R_DMA_0_CH14>, + <&pd IMX_SC_R_DMA_0_CH15>, + <&pd IMX_SC_R_DMA_0_CH16>, + <&pd IMX_SC_R_DMA_0_CH17>, + <&pd IMX_SC_R_DMA_0_CH18>, + <&pd IMX_SC_R_DMA_0_CH19>, + <&pd IMX_SC_R_DMA_0_CH20>, + <&pd IMX_SC_R_DMA_0_CH21>; + status = "okay"; +}; + &flexcan1 { fsl,clk-source = /bits/ 8 <1>; }; From patchwork Mon Sep 25 20:49:09 2023 Content-Type: text/plain; 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Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index 0519edd3f520..8fd924dfb029 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -93,6 +93,8 @@ lpuart0: serial@5a060000 { assigned-clocks = <&clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <80000000>; power-domains = <&pd IMX_SC_R_UART_0>; + dma-names = "tx","rx"; + dmas = <&edma2 9 0 0>, <&edma2 8 0 1>; status = "disabled"; }; @@ -105,6 +107,8 @@ lpuart1: serial@5a070000 { assigned-clocks = <&clk IMX_SC_R_UART_1 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <80000000>; power-domains = <&pd IMX_SC_R_UART_1>; + dma-names = "tx","rx"; + dmas = <&edma2 11 0 0>, <&edma2 10 0 1>; status = "disabled"; }; @@ -117,6 +121,8 @@ lpuart2: serial@5a080000 { assigned-clocks = <&clk IMX_SC_R_UART_2 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <80000000>; power-domains = <&pd IMX_SC_R_UART_2>; + dma-names = "tx","rx"; + dmas = <&edma2 13 0 0>, <&edma2 12 0 1>; status = "disabled"; }; @@ -129,6 +135,8 @@ lpuart3: serial@5a090000 { assigned-clocks = <&clk IMX_SC_R_UART_3 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <80000000>; power-domains = <&pd IMX_SC_R_UART_3>; + dma-names = "tx","rx"; + dmas = <&edma2 15 0 0>, <&edma2 14 0 1>; status = "disabled"; }; From patchwork Mon Sep 25 20:49:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 726162 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C57272375C for ; Mon, 25 Sep 2023 20:49:58 +0000 (UTC) Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-he1eur04on2044.outbound.protection.outlook.com [40.107.7.44]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E026D19C; 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Mon, 25 Sep 2023 20:49:53 +0000 From: Frank Li To: frank.li@nxp.com, shawnguo@kernel.org Cc: clin@suse.com, conor+dt@kernel.org, devicetree@vger.kernel.org, eagle.zhou@nxp.com, festevam@gmail.com, imx@lists.linux.dev, joy.zou@nxp.com, kernel@pengutronix.de, krzysztof.kozlowski+dt@linaro.org, leoyang.li@nxp.com, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com, linux-kernel@vger.kernel.org, pierre.gondois@arm.com, robh+dt@kernel.org, s.hauer@pengutronix.de, shenwei.wang@nxp.com, sherry.sun@nxp.com Subject: [PATCH v2 4/7] arm64: dts: imx8qm: Update edma channel for uart[0..3] Date: Mon, 25 Sep 2023 16:49:10 -0400 Message-Id: <20230925204913.3776656-5-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230925204913.3776656-1-Frank.Li@nxp.com> References: <20230925204913.3776656-1-Frank.Li@nxp.com> X-ClientProxiedBy: PH8PR07CA0045.namprd07.prod.outlook.com (2603:10b6:510:2cf::14) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AM8PR04MB7809:EE_ X-MS-Office365-Filtering-Correlation-Id: ff849374-ad88-41d9-c006-08dbbe08f7d2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi index 297ad4ef4a78..01539df335f8 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi @@ -116,18 +116,22 @@ &flexcan3 { &lpuart0 { compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart"; + dmas = <&edma2 13 0 0>, <&edma2 12 0 1>; }; &lpuart1 { compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart"; + dmas = <&edma2 15 0 0>, <&edma2 14 0 1>; }; &lpuart2 { compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart"; + dmas = <&edma2 17 0 0>, <&edma2 16 0 1>; }; &lpuart3 { compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart"; + dmas = <&edma2 19 0 0>, <&edma2 18 0 1>; }; &i2c0 { From patchwork Mon Sep 25 20:49:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 726566 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C5AA2375F for ; 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Received: from AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) by AM8PR04MB7809.eurprd04.prod.outlook.com (2603:10a6:20b:242::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6813.28; Mon, 25 Sep 2023 20:49:58 +0000 Received: from AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::1774:e25f:f99:aca2]) by AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::1774:e25f:f99:aca2%4]) with mapi id 15.20.6813.027; Mon, 25 Sep 2023 20:49:58 +0000 From: Frank Li To: frank.li@nxp.com, shawnguo@kernel.org Cc: clin@suse.com, conor+dt@kernel.org, devicetree@vger.kernel.org, eagle.zhou@nxp.com, festevam@gmail.com, imx@lists.linux.dev, joy.zou@nxp.com, kernel@pengutronix.de, krzysztof.kozlowski+dt@linaro.org, leoyang.li@nxp.com, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com, linux-kernel@vger.kernel.org, pierre.gondois@arm.com, robh+dt@kernel.org, s.hauer@pengutronix.de, shenwei.wang@nxp.com, sherry.sun@nxp.com Subject: [PATCH v2 5/7] arm64: dts: imx8: update lpuart[0..3] irq number Date: Mon, 25 Sep 2023 16:49:11 -0400 Message-Id: <20230925204913.3776656-6-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230925204913.3776656-1-Frank.Li@nxp.com> References: <20230925204913.3776656-1-Frank.Li@nxp.com> X-ClientProxiedBy: PH8PR07CA0045.namprd07.prod.outlook.com (2603:10b6:510:2cf::14) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AM8PR04MB7809:EE_ X-MS-Office365-Filtering-Correlation-Id: 085d22c6-559a-4d68-f46f-08dbbe08fa9d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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These doesn't match uart driver and dma engine's expection. Update to the irq numbers, which just uart can trigger. Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index 8fd924dfb029..ce66d30a4839 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -86,7 +86,7 @@ lpspi3: spi@5a030000 { lpuart0: serial@5a060000 { reg = <0x5a060000 0x1000>; - interrupts = ; + interrupts = ; clocks = <&uart0_lpcg IMX_LPCG_CLK_4>, <&uart0_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "baud"; @@ -100,7 +100,7 @@ lpuart0: serial@5a060000 { lpuart1: serial@5a070000 { reg = <0x5a070000 0x1000>; - interrupts = ; + interrupts = ; clocks = <&uart1_lpcg IMX_LPCG_CLK_4>, <&uart1_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "baud"; @@ -114,7 +114,7 @@ lpuart1: serial@5a070000 { lpuart2: serial@5a080000 { reg = <0x5a080000 0x1000>; - interrupts = ; + interrupts = ; clocks = <&uart2_lpcg IMX_LPCG_CLK_4>, <&uart2_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "baud"; @@ -128,7 +128,7 @@ lpuart2: serial@5a080000 { lpuart3: serial@5a090000 { reg = <0x5a090000 0x1000>; - interrupts = ; + interrupts = ; clocks = <&uart3_lpcg IMX_LPCG_CLK_4>, <&uart3_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "baud"; From patchwork Mon Sep 25 20:49:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 726161 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 096382375F for ; Mon, 25 Sep 2023 20:50:12 +0000 (UTC) Received: from EUR03-AM7-obe.outbound.protection.outlook.com (mail-am7eur03on2042.outbound.protection.outlook.com [40.107.105.42]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 64389194; Mon, 25 Sep 2023 13:50:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; 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Mon, 25 Sep 2023 20:50:02 +0000 From: Frank Li To: frank.li@nxp.com, shawnguo@kernel.org Cc: clin@suse.com, conor+dt@kernel.org, devicetree@vger.kernel.org, eagle.zhou@nxp.com, festevam@gmail.com, imx@lists.linux.dev, joy.zou@nxp.com, kernel@pengutronix.de, krzysztof.kozlowski+dt@linaro.org, leoyang.li@nxp.com, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com, linux-kernel@vger.kernel.org, pierre.gondois@arm.com, robh+dt@kernel.org, s.hauer@pengutronix.de, shenwei.wang@nxp.com, sherry.sun@nxp.com Subject: [PATCH v2 6/7] arm64: dts: imx8qxp-mek: enable 8qxp lpuart2 and lpuart3 Date: Mon, 25 Sep 2023 16:49:12 -0400 Message-Id: <20230925204913.3776656-7-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230925204913.3776656-1-Frank.Li@nxp.com> References: <20230925204913.3776656-1-Frank.Li@nxp.com> X-ClientProxiedBy: PH8PR07CA0045.namprd07.prod.outlook.com (2603:10b6:510:2cf::14) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AM8PR04MB7809:EE_ X-MS-Office365-Filtering-Correlation-Id: 99bb9f5d-8527-4bdf-a3a4-08dbbe08fd21 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts index 7924b0969ad8..99611729943c 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts @@ -187,6 +187,18 @@ &lpuart0 { status = "okay"; }; +&lpuart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart2>; + status = "okay"; +}; + +&lpuart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart3>; + status = "okay"; +}; + &mu_m0 { status = "okay"; }; @@ -340,6 +352,20 @@ IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020 >; }; + pinctrl_lpuart2: lpuart2grp { + fsl,pins = < + IMX8QXP_UART2_TX_ADMA_UART2_TX 0x06000020 + IMX8QXP_UART2_RX_ADMA_UART2_RX 0x06000020 + >; + }; + + pinctrl_lpuart3: lpuart3grp { + fsl,pins = < + IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX 0x06000020 + IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0x06000020 + >; + }; + pinctrl_typec: typecgrp { fsl,pins = < IMX8QXP_SPI2_SCK_LSIO_GPIO1_IO03 0x06000021 From patchwork Mon Sep 25 20:49:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 726565 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 450612375F for ; Mon, 25 Sep 2023 20:50:24 +0000 (UTC) Received: from EUR03-AM7-obe.outbound.protection.outlook.com (mail-am7eur03on2042.outbound.protection.outlook.com [40.107.105.42]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A186413A; Mon, 25 Sep 2023 13:50:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Hryn3dIzvhqiAKer7pUPLar2ZJB5LMCpvZc2Jfi5feSx6HXBxRMItOFvMybwAOIp4bhhADRZNHkc2/1L2fQK2aK4tz48e70i438hjXFUtpj6IRywDmD0E9mZAooLtp98WRCR0DuY0FFRozBicHHBZ1sLb3MVD8xL3mf5pXfHCm0KSPSe69K9CZ2wC3NhKS1Gcgk2wBXg2a5HTApJynqkjAq5j1wNo/8oXVGmaENIU/9EN9GpthTse55gbZxvSArpnvFhA9oOkGGmjduXMTm3nOpFsmHl2ILpeazfWhAKbxx5WOYlGVrsQd0irsckPnNK6XCpXI4TngFML0wXLJZX+g== ARC-Message-Signature: i=1; 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b=DYdv+P1is5xAM5gBHb6XKkaV/mkw5AOiBuylpChTukC/WgZD76VlfpAb/EmsIxKFJjfyBhwSIRoctMn1rtYRWDcHEnrgOIovUH9XwrfyEvRf+mf9UgybHOfq7s40chmh2/DU+cIdtnZdjWVYWQp+Z6ViWZvqLf2ijU7cHQZBpuY= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) by AM8PR04MB7809.eurprd04.prod.outlook.com (2603:10a6:20b:242::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6813.28; Mon, 25 Sep 2023 20:50:06 +0000 Received: from AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::1774:e25f:f99:aca2]) by AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::1774:e25f:f99:aca2%4]) with mapi id 15.20.6813.027; Mon, 25 Sep 2023 20:50:06 +0000 From: Frank Li To: frank.li@nxp.com, shawnguo@kernel.org Cc: clin@suse.com, conor+dt@kernel.org, devicetree@vger.kernel.org, eagle.zhou@nxp.com, festevam@gmail.com, imx@lists.linux.dev, joy.zou@nxp.com, kernel@pengutronix.de, krzysztof.kozlowski+dt@linaro.org, leoyang.li@nxp.com, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com, linux-kernel@vger.kernel.org, pierre.gondois@arm.com, robh+dt@kernel.org, s.hauer@pengutronix.de, shenwei.wang@nxp.com, sherry.sun@nxp.com Subject: [PATCH v2 7/7] arm64: dts: imx8qm-mek: enable 8qm lpuart2 and lpuart3 Date: Mon, 25 Sep 2023 16:49:13 -0400 Message-Id: <20230925204913.3776656-8-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230925204913.3776656-1-Frank.Li@nxp.com> References: <20230925204913.3776656-1-Frank.Li@nxp.com> X-ClientProxiedBy: PH8PR07CA0045.namprd07.prod.outlook.com (2603:10b6:510:2cf::14) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AM8PR04MB7809:EE_ X-MS-Office365-Filtering-Correlation-Id: 8054994f-3e14-4331-a0b2-08dbbe08ffb3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 26 ++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts index 0b34cc2250e1..6d50838ad17d 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts @@ -47,6 +47,18 @@ &lpuart0 { status = "okay"; }; +&lpuart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart2>; + status = "okay"; +}; + +&lpuart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart3>; + status = "okay"; +}; + &fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec1>; @@ -118,6 +130,20 @@ IMX8QM_UART0_TX_DMA_UART0_TX 0x06000020 >; }; + pinctrl_lpuart2: lpuart2grp { + fsl,pins = < + IMX8QM_UART0_RTS_B_DMA_UART2_RX 0x06000020 + IMX8QM_UART0_CTS_B_DMA_UART2_TX 0x06000020 + >; + }; + + pinctrl_lpuart3: lpuart3grp { + fsl,pins = < + IMX8QM_M41_GPIO0_00_DMA_UART3_RX 0x06000020 + IMX8QM_M41_GPIO0_01_DMA_UART3_TX 0x06000020 + >; + }; + pinctrl_usdhc1: usdhc1grp { fsl,pins = < IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041