From patchwork Sun Sep 24 20:37:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VGFtw6FzIFN6xbFjcw==?= X-Patchwork-Id: 725905 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9DD9217DB for ; Sun, 24 Sep 2023 20:37:59 +0000 (UTC) Received: from mail-0201.mail-europe.com (mail-0201.mail-europe.com [51.77.79.158]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6AC9EE8; Sun, 24 Sep 2023 13:37:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.ch; s=protonmail3; t=1695587873; x=1695847073; bh=uidef/P3KDtYZismR6gqXsHsKkj8yimkGdt20wsKK78=; h=Date:To:From:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=PyrH3GnXIUa2ge2X53+S+x5qTWT35QZv6XtRf1fvbvnLyh7mAjf47xKXB4Zj/T1qz 6sDqs6AHH1kGP3h3J3OwhqrUzQ9u3/qlvMV3vrgjojlIkNS1Mq/jiUrFJvWGTB3EqB rymbE2676fWKdovQgaYUHdyMjMborv7WqLqQJKRMisyfxaFblFt7k/sVdjfKRREDtx goxAREzQyem/od4jsEjSRgWEEgglhhwLb9cl9qjMzez38WAedjmJBqQAhqSp5R2iz9 5adj06hzbBDsgw90jCUQaWTGNfMMIKzKVgcbBBpdrLqVJBsurn1p2tpzsvXPDXkySm 0yut3M3ZjEZ8g== Date: Sun, 24 Sep 2023 20:37:45 +0000 To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Cristian Ciocaltea , Christopher Obbard , Sebastian Reichel , Shreeya Patel , FUKAUMI Naoki , =?utf-8?b?VGFtw6FzIFN6xbFjcw==?= , Jagan Teki , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org From: =?utf-8?b?VGFtw6FzIFN6xbFjcw==?= Subject: [PATCH] arm64: dts: rockchip: Add sdio node to rock-5b Message-ID: <20230924203740.65744-1-tszucs@protonmail.ch> Feedback-ID: 53029:user:proton Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Enable SDIO on Radxa ROCK 5 Model B M.2 Key E. Add sdio node and alias as mmc2. Add regulator for the 3.3 V rail bringing it up during boot. Make sure EKEY_EN is muxed as GPIO. Signed-off-by: Tamás Szűcs --- .../boot/dts/rockchip/rk3588-rock-5b.dts | 43 +++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts index 8ab60968f275..d1c3f9e10b3d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts @@ -12,6 +12,7 @@ / { aliases { mmc0 = &sdhci; mmc1 = &sdmmc; + mmc2 = &sdio; serial2 = &uart2; }; @@ -76,6 +77,21 @@ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { regulator-max-microvolt = <1100000>; vin-supply = <&vcc5v0_sys>; }; + + vcc3v3_wf: vcc3v3-wf-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_wf"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc3v3_wf_en>; + startup-delay-us = <50000>; + vin-supply = <&vcc5v0_sys>; + }; }; &cpu_b0 { @@ -222,6 +238,12 @@ vcc5v0_host_en: vcc5v0-host-en { rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + m2e { + vcc3v3_wf_en: vcc3v3-wf-en { + rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &pwm1 { @@ -258,6 +280,27 @@ &sdmmc { status = "okay"; }; +&sdio { + max-frequency = <200000000>; + no-sd; + no-mmc; + non-removable; + bus-width = <4>; + cap-sdio-irq; + disable-wp; + keep-power-in-suspend; + wakeup-source; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_wf>; + vqmmc-supply = <&vcc_1v8_s3>; + pinctrl-names = "default"; + pinctrl-0 = <&sdiom0_pins>; + status = "okay"; +}; + &spi2 { status = "okay"; assigned-clocks = <&cru CLK_SPI2>;