From patchwork Fri Sep 22 09:50:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: shravan chippa X-Patchwork-Id: 725365 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CCD3B1E527 for ; Fri, 22 Sep 2023 09:50:28 +0000 (UTC) Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 269411B2; Fri, 22 Sep 2023 02:50:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1695376227; x=1726912227; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bOTU9FvgSRoMLKxQGcC6y5VPLYv6tO9qTJIAc+cPB6o=; b=GcQcTpT1XA4+G8MvWr/fvn0eb2U4ek04NP75pVbEaAhFEmB2USxgxXlV AWVHZNFHfsV/FeDBEj1pUeOZ3jylL/JVhNZZuZac67FI03FViBKg7TCqm xGnftW45Z6ChRHtv7pykwEWFOPeTdGJkv9cIBa2zJlxmwI9/fKINJtXIH Po7ZbKEneqs0uHlUiC0m7YQ69J+HI2fL1C7uR3bQPah730ayAGT7tNjLS vrAIm3Zqd9fuOdshWVXx3ev5FMBxlW5kna978Fwpmei2cFAnoihhzTc83 rwdUpONpoKgYm57lw6vjC8s3E6v5uXo1r/KW0IUPmMDH1knhibUbY3Vv0 Q==; X-CSE-ConnectionGUID: JugbC+jaSBKADb3c9fFrtw== X-CSE-MsgGUID: tbJvmtlOR4KAvlrLk/GUPw== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.03,167,1694761200"; d="scan'208";a="6047509" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 22 Sep 2023 02:50:25 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Fri, 22 Sep 2023 02:50:04 -0700 Received: from microchip1-OptiPlex-9020.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Fri, 22 Sep 2023 02:49:59 -0700 From: shravan chippa To: , , , , , , , CC: , , , , , , Subject: [PATCH v1 1/3] dmaengine: sf-pdma: Support of_dma_controller_register() Date: Fri, 22 Sep 2023 15:20:37 +0530 Message-ID: <20230922095039.74878-2-shravan.chippa@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230922095039.74878-1-shravan.chippa@microchip.com> References: <20230922095039.74878-1-shravan.chippa@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL, SPF_HELO_PASS,SPF_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net From: Shravan Chippa Update sf-pdma driver to adopt generic DMA device tree bindings. It calls of_dma_controller_register() with sf-pdma specific of_dma_xlate to get the generic DMA device tree helper support and the DMA clients can look up the sf-pdma controller using standard APIs. Signed-off-by: Shravan Chippa --- drivers/dma/sf-pdma/sf-pdma.c | 41 +++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c index d1c6956af452..c7558c9f9ac3 100644 --- a/drivers/dma/sf-pdma/sf-pdma.c +++ b/drivers/dma/sf-pdma/sf-pdma.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include "sf-pdma.h" @@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma) } } +static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct sf_pdma *pdma = ofdma->of_dma_data; + struct device *dev = pdma->dma_dev.dev; + struct sf_pdma_chan *chan; + struct dma_chan *c; + u32 channel_id; + + if (dma_spec->args_count != 1) { + dev_err(dev, "Bad number of cells\n"); + return NULL; + } + + channel_id = dma_spec->args[0]; + + chan = &pdma->chans[channel_id]; + + c = dma_get_slave_channel(&chan->vchan.chan); + if (!c) { + dev_err(dev, "No more channels available\n"); + return NULL; + } + + return c; +} + static int sf_pdma_probe(struct platform_device *pdev) { struct sf_pdma *pdma; @@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device *pdev) return ret; } + ret = of_dma_controller_register(pdev->dev.of_node, + sf_pdma_of_xlate, pdma); + if (ret < 0) { + dev_err(&pdev->dev, + "Can't register SiFive Platform OF_DMA. (%d)\n", ret); + goto err_unregister; + } + return 0; + +err_unregister: + dma_async_device_unregister(&pdma->dma_dev); + + return ret; } static int sf_pdma_remove(struct platform_device *pdev) From patchwork Fri Sep 22 09:50:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: shravan chippa X-Patchwork-Id: 725366 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 33DE71E527 for ; Fri, 22 Sep 2023 09:50:16 +0000 (UTC) Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A34B7192; Fri, 22 Sep 2023 02:50:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1695376215; x=1726912215; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lacmBtTBGbdaCOwsWzi6JZgwiP0fwtmzcKJKP/0c+uQ=; b=h7ijL6EDe0XKspXebINGepEqKw3tnXVz1wRXWoV86tNnOFxyvz3szOpc Lx5Ka1EFhfENadcxJXvEBXTSFiFlMyO9BsTdDqAQOXJTAsPPoCrVmkRJU ncV2gm//KKvYW389qIR7hJdVg6Vqwa787a2ASGkRFFxVNysOeeBgMryjS K0oO21sILcxr8ccSF21cIg0MNYO31sXOLplgPDNoi9vZtPc5RZtTNtUcw 5ZBw5tGDwxhEIfbr6qQxgDgMiZqp8BNd5NapkQis04vhg5tg81LBUI3tf K32WN/VsMCXtK9HvJkUZs6CZGWYJ3pqlZXpaNbiKqajp1jOCmNsGONwxJ Q==; X-CSE-ConnectionGUID: fQsQIPFwSuS+RkzQs9lxqw== X-CSE-MsgGUID: RZFDWMWZQ7qxjkETvSSgcQ== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.03,167,1694761200"; d="scan'208";a="236602659" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 22 Sep 2023 02:50:14 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Fri, 22 Sep 2023 02:50:12 -0700 Received: from microchip1-OptiPlex-9020.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Fri, 22 Sep 2023 02:50:07 -0700 From: shravan chippa To: , , , , , , , CC: , , , , , , , Conor Dooley Subject: [PATCH v1 2/3] dt-bindings: dma: sf-pdma: add new compatible name Date: Fri, 22 Sep 2023 15:20:38 +0530 Message-ID: <20230922095039.74878-3-shravan.chippa@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230922095039.74878-1-shravan.chippa@microchip.com> References: <20230922095039.74878-1-shravan.chippa@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL, SPF_HELO_PASS,SPF_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net From: Shravan Chippa add new compatible name microchip,mpfs-pdma to support out of order dma transfers this will improve the dma throughput for mem-to-mem transfer Signed-off-by: Shravan Chippa Reviewed-by: Conor Dooley Signed-off-by: Conor Dooley --- .../bindings/dma/sifive,fu540-c000-pdma.yaml | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml index a1af0b906365..974467c4bacb 100644 --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml @@ -27,10 +27,14 @@ allOf: properties: compatible: - items: - - enum: - - sifive,fu540-c000-pdma - - const: sifive,pdma0 + oneOf: + - items: + - const: microchip,mpfs-pdma # Microchip out of order DMA transfer + - const: sifive,fu540-c000-pdma # Sifive in-order DMA transfer + - items: + - enum: + - sifive,fu540-c000-pdma + - const: sifive,pdma0 description: Should be "sifive,-pdma" and "sifive,pdma". Supported compatible strings are -