From patchwork Tue Sep 19 10:12:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 724408 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp2143297wro; Tue, 19 Sep 2023 03:14:23 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHhWvevVUecOg8tIVoO7A8Z3jvgyZzvr5Zb+6EqhXApF5Ki1A4Vziwv38gnYs/0yw8NV6Ye X-Received: by 2002:ac8:7d49:0:b0:410:8e9f:f082 with SMTP id h9-20020ac87d49000000b004108e9ff082mr14466300qtb.14.1695118463117; Tue, 19 Sep 2023 03:14:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695118463; cv=none; d=google.com; s=arc-20160816; b=C5f9q2X6hpDRrJH9H+DI7Nbui1/NQYqdB73bwpA6eqXA0MU3VWk6fmVpr2l9fpSDN9 PRoRqeZczmu8DHct1K7Rwt3pHpTPDb8pGN3FVgl/MJCXR/EEHW/ExNdSTVDu5pf9h5hX cVJnydJWl/pwqesYLnP7kABnTtv4/rbKfq8i2vupThs9eqDrkHdACPc5poZrfOcPYxTl ljX/NDSc6Lz2vvqR3SkQPWGdV80SchYHMclAq2a9/MYKK/Ej3PVDbZuxoQb5O54Olht6 ZIfwB/Yrag4BK/iom3mfHmhTJ2IHIvH4McnpuN67gHQlF0ZE7xtGcsTSUwCV4EJGoLK2 nPjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Qr6Clrpkq6ESZV/UlTcHGYlZcIctctlsSFi4SWetSSw=; fh=VnLaRVPcN1gpaQWLnE0jAsSHd7/auwbL0WCytLamgZU=; b=dJlZOwodrvv+oPa8GlqrEDBMHG/mubETTl4x99BtIVf/C8bAa3F20g1qoAUcn4R5Tt bokWmTlXKebaAZcGYmoKoSyy9P3FEFCT1XASdv5vDpJ8FJg1w0jPVi0gPEDqQsCutc4v JYVfoXfdMQB3dSTyS7Rrb8ztv+xGYFOtGHsqUqO7gVIcbCouhcMKgFSZZ4WEJOwRzORm YbcV+MxPLMN2WdYBcBGRNblQmnRs7eSAVACus2GikKRLo35POUxDppo9ZnH8gSGjffmO uHEYWKvKY3jpPw9ZIX8dDEHRT+A6903MsyLIhBmO+iJPIDfrGmaEFDmPs2ruj2NxfOSr UBDA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=v0xR1bP7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id o3-20020ac85a43000000b00417b94b364csi2085840qta.571.2023.09.19.03.14.22 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Sep 2023 03:14:23 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=v0xR1bP7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qiXix-0003IQ-0H; Tue, 19 Sep 2023 06:12:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qiXiq-0003Ej-Vb for qemu-devel@nongnu.org; Tue, 19 Sep 2023 06:12:50 -0400 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qiXin-0005Lp-Kq for qemu-devel@nongnu.org; Tue, 19 Sep 2023 06:12:47 -0400 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-3216ba1b01eso217008f8f.2 for ; Tue, 19 Sep 2023 03:12:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1695118363; x=1695723163; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Qr6Clrpkq6ESZV/UlTcHGYlZcIctctlsSFi4SWetSSw=; b=v0xR1bP749p2pcUKZwyFb3EWhFGtTSoMvTqLj34LgjbjOc3w8MkCdGKnrcrci0nSke H1VD68xYLe50Wxwi9U/7jjyTmd8mU+BHpXFsfs0qtVpxXd2yF17UCokCI0Uwtr/0LRXa 2kl6i0cm8qtfNFWNLjnAeYMkDftO6UEWwKZfIWZViqRk0Q4Dx4xw/Fob6KAVBv1Q8DMj BTWeIqfm3Ymftz5fRwNi4q/tAiVvghhnBf0jyqGAGavbIMUKl6WfcHgId9r3WHKr+wB4 XZnqUvwZ3JRnokBEKTHXrhzFdHcroiTkwchIH/tDxj1W7isqLNLhk0VK0gSte791qLTk PHiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695118363; x=1695723163; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Qr6Clrpkq6ESZV/UlTcHGYlZcIctctlsSFi4SWetSSw=; b=pKjNgSA1TN+b9WLyyBcKdrNabUwuVspz+vac/3UnzJHQmV+/iOLy04B7v/bT+JtWGx 3anfPI8xOmCfZL/P9GHR6rl2f/nRgJs1WByZTQLdcn/9MZV7QTmFs998RgiiPAK5um8W lklkRGY5ABWbjsNZmt3+KT88WknoGvmG2eDuNM4anWF7fAwtaObM0Dsi6YALob2jUdEy CNoskSZxaQOeocHrAvgywj1ifeFjti84KB5sCz79ZWu/8z3unRXMD8g1SI44LzajON7O n7E3pNUlg4XmoyrXSCrDXNScLnpZQRXKRPbIiFIT9m5Vjd0Dxfv1MIer2b5b24sTuvyf g0tA== X-Gm-Message-State: AOJu0Yw3DIxj9v1MpACnSwQXXtFbJMyBReD9YDySfO6ev9Of/50fEJw4 En34M+pkFFABnDNXRKe+dwslVA== X-Received: by 2002:a5d:6851:0:b0:31f:e5b8:4693 with SMTP id o17-20020a5d6851000000b0031fe5b84693mr9285336wrw.25.1695118363207; Tue, 19 Sep 2023 03:12:43 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ba13-20020a0560001c0d00b0031ddf6cc89csm12290136wrb.98.2023.09.19.03.12.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Sep 2023 03:12:42 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Leif Lindholm , Marcin Juszkiewicz , Ard Biesheuvel , Shannon Zhao , "Michael S. Tsirkin" , Igor Mammedov , Ani Sinha Subject: [RFC 1/3] tests/qtest/bios-tables-test: Allow changes to virt GTDT Date: Tue, 19 Sep 2023 11:12:38 +0100 Message-Id: <20230919101240.2569334-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230919101240.2569334-1-peter.maydell@linaro.org> References: <20230919101240.2569334-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Allow changes to the virt GTDT -- we are going to add the IRQ entry for a new timer to it. Signed-off-by: Peter Maydell --- tests/qtest/bios-tables-test-allowed-diff.h | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8bf..bcf131fc160 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,2 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/virt/GTDT", From patchwork Tue Sep 19 10:12:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 724405 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp2143132wro; Tue, 19 Sep 2023 03:14:00 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEzUHAji+4KC8blMKNuXXToPgn3tHn2vBaZqBoEnRec0mxH/Q9eegYsa7KqtS7EzymcGjI3 X-Received: by 2002:a37:c241:0:b0:76d:1cb8:9704 with SMTP id j1-20020a37c241000000b0076d1cb89704mr9786580qkm.26.1695118440128; Tue, 19 Sep 2023 03:14:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695118440; cv=none; d=google.com; s=arc-20160816; b=hm3CBboF/4FuYvw5gh+HwlsMkH7i1qxbqX0qjIoFnyZ3iEkalwT7tachoZN2pbiFyJ zQI1zATLe1lgIWc2AFfQ6PDSyEUh4UdQKgNO5xpm7qtMnIem7QakgRmQcNawO0vpTuuK GYlV0bSskj4iaquBF08hrh5KF5K+R8odAuxVSGPTdmTpaDrhO3tbxk7iPJPbJURwu+OV cDKK/xuQnFNfYFPnL0V3ghJ0VNe5bKsd2V0x9ANXF49hJAKSI/kt2oba+5Zaq9+LAD/1 ypN5PA2NoN5zdisXhXZoKKwm9CVffR4aML8Xy7lw02GyV7LKhfmD5RX0ELZOt5/5CQ59 jNZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=j8JmbSqEXt6UMOnruJcxa+Gd6UTGS29A+j/7/Q5TP94=; fh=VnLaRVPcN1gpaQWLnE0jAsSHd7/auwbL0WCytLamgZU=; b=XyelXmh0nl7RIKTWyOKl8+F2R4zhsa2qtOSeF0dWgcTZY16jrUTMvyoxW1z44cRbPC K6oEjQlkKjsgmL/E2zEp+jk3JCk2fcWdgPdTVB/IqS3I9iy6HWlNQt2x2Ice70Hzoimj /B3XA6ewSQs+yx8BT7VGrp2AAx0NjflgLgXm3Ql6+iWhIZfhZherZuug7fBMg+z9mcKF Jm3ZUN1oeoLiPxg4DovOmAyoSwTzC+91cc2dRmuDvF6NV4cLk0Z2VXXpNa6ZhRg/XLoe i0KE9fbrQx0SwRXnyEuBJive8gBhzukkfwin8VOxhE7ZMl8FHQ5HbDFJjHyM2L80yXHm S1Pg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eDS4TC21; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id c12-20020ac87dcc000000b00415184c4490si7463192qte.523.2023.09.19.03.13.59 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Sep 2023 03:14:00 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eDS4TC21; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qiXiy-0003Jh-M9; Tue, 19 Sep 2023 06:12:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qiXis-0003Fb-CI for qemu-devel@nongnu.org; Tue, 19 Sep 2023 06:12:50 -0400 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qiXio-0005M0-Qu for qemu-devel@nongnu.org; Tue, 19 Sep 2023 06:12:50 -0400 Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-31f737b8b69so5269959f8f.3 for ; Tue, 19 Sep 2023 03:12:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1695118364; x=1695723164; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=j8JmbSqEXt6UMOnruJcxa+Gd6UTGS29A+j/7/Q5TP94=; b=eDS4TC21ogB5QqxpQOBUftpGZl/vWPQM5H15xyAj7O8KKOl+bG3PAVMvGyEG8BWA+b Rf3gjZbLuKXzoqQqKC8QnWq9a0HOb4sn7DJo6fJ5UIdBWpocM/UpEEW3DQEhD8Q6R7Nm KLZaRP/3D2e30asarpJCZ6ndSMqoM5f6JYxrWQXugJH91HVkePVqrWAtfm94qww67yP0 6vBmFzOmarcBzw4cv2mkgnb6riSkiG4nRU2EQp7hk0vsKiPP2awZwIdm5OWSqDtiCQPc +r5aE+saLpSt1K5eXRXcrEirwdncBnzKkZ29eb/qd+l9fDJPCxXKfoq6xY+L4ydL4tra 6EKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695118364; x=1695723164; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=j8JmbSqEXt6UMOnruJcxa+Gd6UTGS29A+j/7/Q5TP94=; b=WDsezjG4p4/h5Z2Nd/ASdHg7q0Ybfako1pVg4PmlWJ1ggzSKUAu2n/X0wgHPGyyUbe mfM1WLVs6XzqG3kt4iV4xqwlwX5NpGEYIV780A2gkkrZhjYZfy32I9B1was6CnL5xGVw G1bZwYVe9IfrVfyjOIVhZumjMWN78uS8RSuB1O5l95AlYWDbBEwqqr4l5OXIvr8ZtQ/T q/3BVYPiA5rB23mjd1WTf3Ud3UpxNfH/8DaNRE7ys2aDbs9U5H8oDC1G8Eky2J9g1mx4 E+VPEA4aAMBPvxMkE1dc14eAjnnS3cEwQ79PUnQoHwK0IoeCNnfhGU2gz2VX+lhCoA0H 4SxA== X-Gm-Message-State: AOJu0YyWVn6Xgj91B3BJ05Hj9A8boFZQkfn3Y3Tvk+JsY8E49J73ecRC ImJMPYqBh4vAvidcPMkU4B2zbQ== X-Received: by 2002:a5d:66c7:0:b0:316:f24b:597a with SMTP id k7-20020a5d66c7000000b00316f24b597amr10388719wrw.46.1695118363947; Tue, 19 Sep 2023 03:12:43 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ba13-20020a0560001c0d00b0031ddf6cc89csm12290136wrb.98.2023.09.19.03.12.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Sep 2023 03:12:43 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Leif Lindholm , Marcin Juszkiewicz , Ard Biesheuvel , Shannon Zhao , "Michael S. Tsirkin" , Igor Mammedov , Ani Sinha Subject: [RFC 2/3] hw/arm/virt: Wire up non-secure EL2 virtual timer IRQ Date: Tue, 19 Sep 2023 11:12:39 +0100 Message-Id: <20230919101240.2569334-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230919101240.2569334-1-peter.maydell@linaro.org> References: <20230919101240.2569334-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Armv8.1+ CPUs have the Virtual Host Extension (VHE) which adds a non-secure EL2 virtual timer. We implemented the timer itself in the CPU model, but never wired up its IRQ line to the GIC. Wire up the IRQ line (this is always safe whether the CPU has the interrupt or not, since it always creates the outbound IRQ line). Report it to the guest via dtb and ACPI if the CPU has the feature. The DTB binding is documented in the kernel's Documentation/devicetree/bindings/timer/arm\,arch_timer.yaml and the ACPI table entries are documented in the ACPI specification version 6.3 or later. Signed-off-by: Peter Maydell Reviewed-by: Ard Biesheuvel --- include/hw/arm/virt.h | 2 ++ hw/arm/virt-acpi-build.c | 16 ++++++++++++---- hw/arm/virt.c | 29 ++++++++++++++++++++++++++++- 3 files changed, 42 insertions(+), 5 deletions(-) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index e1ddbea96be..79b1f9b737d 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -49,6 +49,7 @@ #define ARCH_TIMER_S_EL1_IRQ 13 #define ARCH_TIMER_NS_EL1_IRQ 14 #define ARCH_TIMER_NS_EL2_IRQ 10 +#define ARCH_TIMER_NS_EL2_VIRT_IRQ 12 #define VIRTUAL_PMU_IRQ 7 @@ -183,6 +184,7 @@ struct VirtMachineState { PCIBus *bus; char *oem_id; char *oem_table_id; + bool ns_el2_virt_timer_present; }; #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 6b674231c27..7bc120a0f13 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -573,8 +573,8 @@ build_srat(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) } /* - * ACPI spec, Revision 5.1 - * 5.2.24 Generic Timer Description Table (GTDT) + * ACPI spec, Revision 6.5 + * 5.2.25 Generic Timer Description Table (GTDT) */ static void build_gtdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) @@ -588,7 +588,7 @@ build_gtdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) uint32_t irqflags = vmc->claim_edge_triggered_timers ? 1 : /* Interrupt is Edge triggered */ 0; /* Interrupt is Level triggered */ - AcpiTable table = { .sig = "GTDT", .rev = 2, .oem_id = vms->oem_id, + AcpiTable table = { .sig = "GTDT", .rev = 3, .oem_id = vms->oem_id, .oem_table_id = vms->oem_table_id }; acpi_table_begin(&table, table_data); @@ -624,7 +624,15 @@ build_gtdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) build_append_int_noprefix(table_data, 0, 4); /* Platform Timer Offset */ build_append_int_noprefix(table_data, 0, 4); - + if (vms->ns_el2_virt_timer_present) { + /* Virtual EL2 Timer GSIV */ + build_append_int_noprefix(table_data, ARCH_TIMER_NS_EL2_VIRT_IRQ + 16, 4); + /* Virtual EL2 Timer Flags */ + build_append_int_noprefix(table_data, irqflags, 4); + } else { + build_append_int_noprefix(table_data, 0, 4); + build_append_int_noprefix(table_data, 0, 4); + } acpi_table_end(linker, &table); } diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 8ad78b23c24..4df7cd0a366 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -248,6 +248,19 @@ static void create_randomness(MachineState *ms, const char *node) qemu_fdt_setprop(ms->fdt, node, "rng-seed", seed.rng, sizeof(seed.rng)); } +/* + * The CPU object always exposes the NS EL2 virt timer IRQ line, + * but we don't want to advertise it to the guest in the dtb or ACPI + * table unless it's really going to do something. + */ +static bool ns_el2_virt_timer_present(void) +{ + ARMCPU *cpu = ARM_CPU(qemu_get_cpu(0)); + CPUARMState *env = &cpu->env; + + return arm_feature(env, ARM_FEATURE_EL2) && cpu_isar_feature(aa64_vh, cpu); +} + static void create_fdt(VirtMachineState *vms) { MachineState *ms = MACHINE(vms); @@ -365,11 +378,20 @@ static void fdt_add_timer_nodes(const VirtMachineState *vms) "arm,armv7-timer"); } qemu_fdt_setprop(ms->fdt, "/timer", "always-on", NULL, 0); - qemu_fdt_setprop_cells(ms->fdt, "/timer", "interrupts", + if (vms->ns_el2_virt_timer_present) { + qemu_fdt_setprop_cells(ms->fdt, "/timer", "interrupts", + GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_S_EL1_IRQ, irqflags, + GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL1_IRQ, irqflags, + GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_VIRT_IRQ, irqflags, + GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL2_IRQ, irqflags, + GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL2_VIRT_IRQ, irqflags); + } else { + qemu_fdt_setprop_cells(ms->fdt, "/timer", "interrupts", GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_S_EL1_IRQ, irqflags, GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL1_IRQ, irqflags, GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_VIRT_IRQ, irqflags, GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL2_IRQ, irqflags); + } } static void fdt_add_cpu_nodes(const VirtMachineState *vms) @@ -810,6 +832,7 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem) [GTIMER_VIRT] = ARCH_TIMER_VIRT_IRQ, [GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ, [GTIMER_SEC] = ARCH_TIMER_S_EL1_IRQ, + [GTIMER_HYPVIRT] = ARCH_TIMER_NS_EL2_VIRT_IRQ, }; for (irq = 0; irq < ARRAY_SIZE(timer_irq); irq++) { @@ -2249,6 +2272,10 @@ static void machvirt_init(MachineState *machine) qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); object_unref(cpuobj); } + + /* Now we've created the CPUs we can see if they have the hypvirt timer */ + vms->ns_el2_virt_timer_present = ns_el2_virt_timer_present(); + fdt_add_timer_nodes(vms); fdt_add_cpu_nodes(vms); From patchwork Tue Sep 19 10:12:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 724406 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp2143133wro; Tue, 19 Sep 2023 03:14:00 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGBLVyog0mte82OGbzSVwhy0zNNLW4hvHwbHYfP7ix7+1QILw6puPVQEh7YMogo2E8Cx9uZ X-Received: by 2002:a05:620a:2954:b0:76e:f5c5:1bac with SMTP id n20-20020a05620a295400b0076ef5c51bacmr12075919qkp.48.1695118440129; Tue, 19 Sep 2023 03:14:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695118440; cv=none; d=google.com; s=arc-20160816; b=SKzovLYn/3Olr6Dfc2YS5V7Uc2Ez2NewY+D1tvuIn039z+ivBQSK5QKfp02mK1hKG6 RXiMQEhu0g33KWyk7PLygXAJQbe3xZEMZjmUyN/B0oGoCdepV868AImu1ImUYYzO4g2j qxzZEXLm90Ej995qggOtvyybQy57p1k1zhcJTUuNLxvsHNBXK4y5BJk8GQajwguxnd8n Sw0OA/5V5RhPWp08RbjViqrZma/CalKS4PL+nQO9CtU78nniW5WPlixFndqnVMJSD5U+ fq7XiklVDopqT4C9uex3vNqpZzU3DdSdlztcujBA+uCxvxLWXNewWSshO/F6srWpcA6v RpYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=fkfSZkeHjzHFpYeTpLpvbhlV8kGEAEr7KKI6rYw3cRY=; fh=VnLaRVPcN1gpaQWLnE0jAsSHd7/auwbL0WCytLamgZU=; b=Q2oRD6wVpALrpMEmCUmcHz6lNy3ejMiBbuNNadavNBjqFUKlcqUSRvLKBRdfEARYGk IaNCufMql7IqDt1iU3ejNOkYU7XStyOaUo9kE9IFVcQQGPI++G2RBg7+RvzK5jcgoUJI +wrXMh/4y+1MzxqCp7JXypwf78QQKMQyGi115MJx3UMU6IUGdy9evurSFipgq9sOHpaj BIYJhEhEYHc31DbflmXVpfrVOtnFlNpsk9Ts1aL00/pZsKmzHezGqiojsrN9S+SUSjk/ qVnchDis2dbhRQG5muDn7bU9cFjTezDTb/+zCD7R/zMW9eBpwct14obw+b7ha/fRunRF sd3A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MxGlLQbO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id h4-20020a05620a244400b00773e6f8895fsi253022qkn.241.2023.09.19.03.13.59 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Sep 2023 03:14:00 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MxGlLQbO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qiXiz-0003Jy-9K; Tue, 19 Sep 2023 06:12:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qiXit-0003GN-5S for qemu-devel@nongnu.org; Tue, 19 Sep 2023 06:12:52 -0400 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qiXiq-0005M6-NX for qemu-devel@nongnu.org; Tue, 19 Sep 2023 06:12:50 -0400 Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-3214cdb4b27so1970443f8f.1 for ; Tue, 19 Sep 2023 03:12:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1695118364; x=1695723164; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fkfSZkeHjzHFpYeTpLpvbhlV8kGEAEr7KKI6rYw3cRY=; b=MxGlLQbOF2OjfYJOxLQY8v7xYP7d5ZUsEd6RqGyuN2JTyYy33NqeDtiVqRpyPJRbBa A0Xr22/+tgaagCQHb0gngkxPVud7zRxcTu6aZ9tyo52kdgZYISIdbRkjejxR5TVisC4h 6wkB/WjfBWoaxaFNqca0AEmszNpUPCh4wGMJOb4uxvRp/MhHmA7w2479+zilHgSHaHRf UITqkWl3troby2Jc1XXiEAf2WLlSsB7jpy8e93RH/bG9Bae6YLECflRWuxUpeh6cEoyO FBTV6QEmQoA1JQaPHrT+eKwjkI4N5+WnjC5hp8/GoWBVI2FbMfKeHW0/l2uLVMP7/YTV 9UGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695118364; x=1695723164; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fkfSZkeHjzHFpYeTpLpvbhlV8kGEAEr7KKI6rYw3cRY=; b=iF9C3c+skIHNAnE8tYGbwnCcy0bw/UoVIe3/nQ3aKrJNSDf+aAn9FeFueYJG+Vuq/A U7OnBoKIkA4e1Tj19CIdIGvqnjUvSdwAPwSyBgw+2hgmd5ZyB6Xlm4jjq1MrZlAoGzbX KeRyKCMG9Ni52wIIrG/F3qkPjdwHcFe3GabS01Z8yGzMT50YtM7HtgxhDZT57KRVUEnJ n5R2Ah5VjKGODVsklz7BqmZTUymL9Wu2JnrBKZGkWv5go14V22GoOA/+Po8JLeqfo0DL Wg5x4f+tGp4Z2f8jEPs0nTZD0bSzM5k0qq0cK1hoR817XtYYE7Hgf4OhunpPeD12q3E3 kb3Q== X-Gm-Message-State: AOJu0YzklXRONY2V5KgyIYQt79WYdaExxGNh6GQ31/f88XUMUO6uXlFj hjSQVS56fcT18a5g6wmK6I48Kg== X-Received: by 2002:adf:f9c2:0:b0:319:82c9:8e7d with SMTP id w2-20020adff9c2000000b0031982c98e7dmr8745698wrr.31.1695118364518; Tue, 19 Sep 2023 03:12:44 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ba13-20020a0560001c0d00b0031ddf6cc89csm12290136wrb.98.2023.09.19.03.12.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Sep 2023 03:12:44 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Leif Lindholm , Marcin Juszkiewicz , Ard Biesheuvel , Shannon Zhao , "Michael S. Tsirkin" , Igor Mammedov , Ani Sinha Subject: [RFC 3/3] tests/qtest/bios-tables-test: Update virt/GTDT golden reference Date: Tue, 19 Sep 2023 11:12:40 +0100 Message-Id: <20230919101240.2569334-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230919101240.2569334-1-peter.maydell@linaro.org> References: <20230919101240.2569334-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Update the virt/GTDT golden reference file to be a revision 3 table with space for the virtual EL2 timer. Diffs from iasl: @@ -1,32 +1,32 @@ /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20200925 (64-bit version) * Copyright (c) 2000 - 2020 Intel Corporation * - * Disassembly of tests/data/acpi/virt/GTDT, Mon Sep 18 16:19:17 2023 + * Disassembly of /tmp/aml-PXK8A2, Mon Sep 18 16:19:17 2023 * * ACPI Data Table [GTDT] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue */ [000h 0000 4] Signature : "GTDT" [Generic Timer Description Table] -[004h 0004 4] Table Length : 00000060 -[008h 0008 1] Revision : 02 -[009h 0009 1] Checksum : 9C +[004h 0004 4] Table Length : 00000068 +[008h 0008 1] Revision : 03 +[009h 0009 1] Checksum : 93 [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 8] Counter Block Address : FFFFFFFFFFFFFFFF [02Ch 0044 4] Reserved : 00000000 [030h 0048 4] Secure EL1 Interrupt : 0000001D [034h 0052 4] EL1 Flags (decoded below) : 00000000 Trigger Mode : 0 Polarity : 0 Always On : 0 [038h 0056 4] Non-Secure EL1 Interrupt : 0000001E @@ -37,25 +37,28 @@ [040h 0064 4] Virtual Timer Interrupt : 0000001B [044h 0068 4] VT Flags (decoded below) : 00000000 Trigger Mode : 0 Polarity : 0 Always On : 0 [048h 0072 4] Non-Secure EL2 Interrupt : 0000001A [04Ch 0076 4] NEL2 Flags (decoded below) : 00000000 Trigger Mode : 0 Polarity : 0 Always On : 0 [050h 0080 8] Counter Read Block Address : FFFFFFFFFFFFFFFF [058h 0088 4] Platform Timer Count : 00000000 [05Ch 0092 4] Platform Timer Offset : 00000000 +[060h 0096 4] Virtual EL2 Timer GSIV : 00000000 +[064h 0100 4] Virtual EL2 Timer Flags : 00000000 -Raw Table Data: Length 96 (0x60) +Raw Table Data: Length 104 (0x68) - 0000: 47 54 44 54 60 00 00 00 02 9C 42 4F 43 48 53 20 // GTDT`.....BOCHS + 0000: 47 54 44 54 68 00 00 00 03 93 42 4F 43 48 53 20 // GTDTh.....BOCHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC 0020: 01 00 00 00 FF FF FF FF FF FF FF FF 00 00 00 00 // ................ 0030: 1D 00 00 00 00 00 00 00 1E 00 00 00 04 00 00 00 // ................ 0040: 1B 00 00 00 00 00 00 00 1A 00 00 00 00 00 00 00 // ................ 0050: FF FF FF FF FF FF FF FF 00 00 00 00 00 00 00 00 // ................ + 0060: 00 00 00 00 00 00 00 00 // ........ Signed-off-by: Peter Maydell --- tests/qtest/bios-tables-test-allowed-diff.h | 1 - tests/data/acpi/virt/GTDT | Bin 96 -> 104 bytes 2 files changed, 1 deletion(-) diff --git a/tests/data/acpi/virt/GTDT b/tests/data/acpi/virt/GTDT index 6f8cb9b8f30b55f4c93fe515982621e3db50feb2..7f330e04d144f9cc22eef06127ecc19abf9e8009 100644 GIT binary patch delta 25 bcmYeu;BpUf3CUn!U|^m+kt>V?$N&QXMtB4L delta 16 Xcmc~u;BpUf2}xjJU|^avkt+-UB60)u diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index bcf131fc160..dfb8523c8bf 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,2 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/virt/GTDT",