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Use '-' instead. Pretty much run seds below for node names. s/zynqmp_ipi/zynqmp-ipi/ s/nvmem_firmware/nvmem-firmware/ s/soc_revision/soc-revision/ s/si5335_/si5335-/ Signed-off-by: Michal Simek --- arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts | 4 ++-- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts index d0091d3cb764..52f998c22538 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts @@ -123,13 +123,13 @@ ina226 { io-channels = <&u35 0>, <&u35 1>, <&u35 2>, <&u35 3>; }; - si5335_0: si5335_0 { /* clk0_usb - u23 */ + si5335_0: si5335-0 { /* clk0_usb - u23 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <26000000>; }; - si5335_1: si5335_1 { /* clk1_dp - u23 */ + si5335_1: si5335-1 { /* clk1_dp - u23 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index b61fc99cd911..e50e95cbe817 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -129,7 +129,7 @@ rproc_1_fw_image: memory@3ef00000 { }; }; - zynqmp_ipi: zynqmp_ipi { + zynqmp_ipi: zynqmp-ipi { bootph-all; compatible = "xlnx,zynqmp-ipi-mailbox"; interrupt-parent = <&gic>; @@ -194,12 +194,12 @@ zynqmp_power: zynqmp-power { mbox-names = "tx", "rx"; }; - nvmem_firmware { + nvmem-firmware { compatible = "xlnx,zynqmp-nvmem-fw"; #address-cells = <1>; #size-cells = <1>; - soc_revision: soc_revision@0 { + soc_revision: soc-revision@0 { reg = <0x0 0x4>; }; }; From patchwork Mon Sep 18 12:41:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 724249 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4539B13AF3 for ; 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Mon, 18 Sep 2023 07:41:29 -0500 From: Michal Simek To: , , , CC: Amit Kumar Mahapatra , Ashok Reddy Soma , Conor Dooley , "Krzysztof Kozlowski" , Laurent Pinchart , Manikanta Guntupalli , Parth Gajjar , "Piyush Mehta" , Rob Herring , "Vishal Sagar" , , Subject: [PATCH 4/6] arm64: xilinx: Put ethernet phys to mdio node Date: Mon, 18 Sep 2023 14:41:15 +0200 Message-ID: X-Mailer: git-send-email 2.36.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4352; i=michal.simek@amd.com; h=from:subject:message-id; bh=CguVKVNCrMXEr2XFc+tOnMLg9/2vSC1htIcg8rJVFbk=; b=owGbwMvMwCR4yjP1tKYXjyLjabUkhlQO10wHy6dyzS94frmdWbLertxR3i1wQ+MPXrZU++To3 Adv1vzviGVhEGRikBVTZJG2uXJmb+WMKcIXD8vBzGFlAhnCwMUpABPpOMIwT2VPQM0hkZ2nE3Mu bb9bwPCATW/iMYYFk1RWaqt6M75MeHT/Dud7Lj/GJDMvAA== X-Developer-Key: i=michal.simek@amd.com; a=openpgp; fpr=67350C9BF5CCEE9B5364356A377C7F21FE3D1F91 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE30:EE_|MN2PR12MB4406:EE_ X-MS-Office365-Filtering-Correlation-Id: 62a0af49-2d0e-4984-42fb-08dbb84495ca X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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With using mdio node there is an option to add reset property for the whole mdio bus. Signed-off-by: Michal Simek --- .../dts/xilinx/zynqmp-zc1751-xm015-dc1.dts | 8 ++++-- .../dts/xilinx/zynqmp-zc1751-xm016-dc2.dts | 16 +++++++----- .../dts/xilinx/zynqmp-zc1751-xm017-dc3.dts | 8 ++++-- .../dts/xilinx/zynqmp-zc1751-xm018-dc4.dts | 26 +++++++++++-------- .../dts/xilinx/zynqmp-zc1751-xm019-dc5.dts | 8 ++++-- 5 files changed, 43 insertions(+), 23 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts index e821d55d8d5a..73491626e01e 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts @@ -98,8 +98,12 @@ &gem3 { phy-mode = "rgmii-id"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gem3_default>; - phy0: ethernet-phy@0 { - reg = <0>; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@0 { + reg = <0>; + }; }; }; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts index b59e11316b4b..f767708fb50d 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts @@ -91,12 +91,16 @@ &gem2 { phy-mode = "rgmii-id"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gem2_default>; - phy0: ethernet-phy@5 { - reg = <5>; - ti,rx-internal-delay = <0x8>; - ti,tx-internal-delay = <0xa>; - ti,fifo-depth = <0x1>; - ti,dp83867-rxctrl-strap-quirk; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@5 { + reg = <5>; + ti,rx-internal-delay = <0x8>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <0x1>; + ti,dp83867-rxctrl-strap-quirk; + }; }; }; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts index 38b0a312171b..f553b317e6b2 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts @@ -88,8 +88,12 @@ &gem0 { status = "okay"; phy-handle = <&phy0>; phy-mode = "rgmii-id"; - phy0: ethernet-phy@0 { /* VSC8211 */ - reg = <0>; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@0 { /* VSC8211 */ + reg = <0>; + }; }; }; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts index 6636e76545a5..6ec1d9813973 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts @@ -116,17 +116,21 @@ &gem0 { status = "okay"; phy-mode = "rgmii-id"; phy-handle = <ðernet_phy0>; - ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */ - reg = <0>; - }; - ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */ - reg = <7>; - }; - ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */ - reg = <3>; - }; - ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */ - reg = <8>; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */ + reg = <0>; + }; + ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */ + reg = <7>; + }; + ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */ + reg = <3>; + }; + ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */ + reg = <8>; + }; }; }; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts index 0d2ea9c09a0a..b1857e17ab7e 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts @@ -77,8 +77,12 @@ &gem1 { phy-mode = "rgmii-id"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gem1_default>; - phy0: ethernet-phy@0 { - reg = <0>; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@0 { + reg = <0>; + }; }; }; From patchwork Mon Sep 18 12:41:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 724248 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1DB6F171BF for ; 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Mon, 18 Sep 2023 07:41:34 -0500 From: Michal Simek To: , , , CC: Conor Dooley , Krzysztof Kozlowski , Laurent Pinchart , Parth Gajjar , Radhey Shyam Pandey , Rob Herring , Tanmay Shah , , Subject: [PATCH 6/6] arm64: xilinx: Remove address/size-cells from gem nodes Date: Mon, 18 Sep 2023 14:41:17 +0200 Message-ID: <7252203d52af3ca8867764c8514affc4828e530d.1695040866.git.michal.simek@amd.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2350; i=michal.simek@amd.com; h=from:subject:message-id; bh=VxjWBEG/PxOMI66ltpxdPq0p6b+3O7VYB+YnbxR7cnc=; b=owGbwMvMwCR4yjP1tKYXjyLjabUkhlQO18zfM18mPdmVMefNHu+k7T9m97rM8EuTSm2cY9z/T 0z1bWttRywLgyATg6yYIou0zZUzeytnTBG+eFgOZg4rE8gQBi5OAZjIHROG+VmqeyXjme5oi2y8 Xdg0i6lGSVekkGFBI1vqH1ulX0sZm5aVr5/i+pBt0mFLAA== X-Developer-Key: i=michal.simek@amd.com; a=openpgp; fpr=67350C9BF5CCEE9B5364356A377C7F21FE3D1F91 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9CF:EE_|CH2PR12MB4102:EE_ X-MS-Office365-Filtering-Correlation-Id: 7cc68610-d404-4854-dda6-08dbb8449a94 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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SFS:(13230031)(4636009)(39860400002)(346002)(396003)(376002)(136003)(1800799009)(186009)(451199024)(82310400011)(46966006)(36840700001)(40470700004)(40460700003)(6666004)(83380400001)(82740400003)(81166007)(356005)(86362001)(36860700001)(47076005)(36756003)(2616005)(426003)(336012)(40480700001)(16526019)(26005)(110136005)(70586007)(70206006)(54906003)(41300700001)(316002)(2906002)(5660300002)(44832011)(8676002)(4326008)(8936002)(478600001)(2101003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2023 12:41:39.2853 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7cc68610-d404-4854-dda6-08dbb8449a94 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9CF.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4102 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Some boards are using one mdio bus which holds multiple phys and also boards are using mdio node for bus description. That's why there are cases where address/size-cells are unnecessary which is also reported by make W=1 dtbs. That's why remove them from zynqmp.dtsi and let board DTSes to handle it based on used description. Error log: /axi/ethernet@ff0e0000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Michal Simek --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 8 -------- 1 file changed, 8 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index e50e95cbe817..f5e1eb8cb3b7 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -584,8 +584,6 @@ gem0: ethernet@ff0b0000 { ; reg = <0x0 0xff0b0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; - #address-cells = <1>; - #size-cells = <0>; iommus = <&smmu 0x874>; power-domains = <&zynqmp_firmware PD_ETH_0>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>; @@ -600,8 +598,6 @@ gem1: ethernet@ff0c0000 { ; reg = <0x0 0xff0c0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; - #address-cells = <1>; - #size-cells = <0>; iommus = <&smmu 0x875>; power-domains = <&zynqmp_firmware PD_ETH_1>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>; @@ -616,8 +612,6 @@ gem2: ethernet@ff0d0000 { ; reg = <0x0 0xff0d0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; - #address-cells = <1>; - #size-cells = <0>; iommus = <&smmu 0x876>; power-domains = <&zynqmp_firmware PD_ETH_2>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>; @@ -632,8 +626,6 @@ gem3: ethernet@ff0e0000 { ; reg = <0x0 0xff0e0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; - #address-cells = <1>; - #size-cells = <0>; iommus = <&smmu 0x877>; power-domains = <&zynqmp_firmware PD_ETH_3>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>;