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[88.29.175.5]) by smtp.gmail.com with ESMTPSA id 7-20020a05600c230700b003fefcbe7fa8sm12155307wmo.28.2023.09.18.03.42.05 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 03:42:07 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Anton Johansson , Riku Voipio , Richard Henderson , Claudio Fontana , Yanan Wang , Paolo Bonzini , Alessandro Di Federico , Fabiano Rosas , Marcel Apfelbaum , Daniel Henrique Barboza , Mahmoud Mandour , Eduardo Habkost , Alexandre Iooss , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?Alex?= =?utf-8?q?_Benn=C3=A9e?= Subject: [PATCH 1/3] accel/tcg: Declare tcg_flush_jmp_cache() in 'exec/tb-flush.h' Date: Mon, 18 Sep 2023 12:41:50 +0200 Message-ID: <20230918104153.24433-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918104153.24433-1-philmd@linaro.org> References: <20230918104153.24433-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::132; envelope-from=philmd@linaro.org; helo=mail-lf1-x132.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org "exec/cpu-common.h" is meant to contain the declarations related to CPU usable with any accelerator / target combination. tcg_flush_jmp_cache() is specific to TCG, so restrict its declaration by moving it to "exec/tb-flush.h". Signed-off-by: Philippe Mathieu-Daudé --- include/exec/cpu-common.h | 1 - include/exec/tb-flush.h | 2 ++ accel/tcg/cputlb.c | 1 + accel/tcg/tcg-accel-ops.c | 1 + hw/core/cpu-common.c | 1 + plugins/core.c | 1 - 6 files changed, 5 insertions(+), 2 deletions(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 41788c0bdd..1eff233565 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -39,7 +39,6 @@ void cpu_list_unlock(void); unsigned int cpu_list_generation_id_get(void); void tcg_flush_softmmu_tlb(CPUState *cs); -void tcg_flush_jmp_cache(CPUState *cs); void tcg_iommu_init_notifier_list(CPUState *cpu); void tcg_iommu_free_notifier_list(CPUState *cpu); diff --git a/include/exec/tb-flush.h b/include/exec/tb-flush.h index d92d06565b..142c240d94 100644 --- a/include/exec/tb-flush.h +++ b/include/exec/tb-flush.h @@ -23,4 +23,6 @@ */ void tb_flush(CPUState *cs); +void tcg_flush_jmp_cache(CPUState *cs); + #endif /* _TB_FLUSH_H_ */ diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index c643d66190..b220c4536c 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -24,6 +24,7 @@ #include "exec/memory.h" #include "exec/cpu_ldst.h" #include "exec/cputlb.h" +#include "exec/tb-flush.h" #include "exec/memory-internal.h" #include "exec/ram_addr.h" #include "tcg/tcg.h" diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 3973591508..748539f289 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -34,6 +34,7 @@ #include "qemu/timer.h" #include "exec/exec-all.h" #include "exec/hwaddr.h" +#include "exec/tb-flush.h" #include "exec/gdbstub.h" #include "tcg-accel-ops.h" diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index ced66c2b34..b3b5ce6702 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -27,6 +27,7 @@ #include "qemu/main-loop.h" #include "exec/log.h" #include "exec/cpu-common.h" +#include "exec/tb-flush.h" #include "qemu/error-report.h" #include "qemu/qemu-print.h" #include "sysemu/tcg.h" diff --git a/plugins/core.c b/plugins/core.c index 3c4e26c7ed..c95c00a830 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -21,7 +21,6 @@ #include "qemu/xxhash.h" #include "qemu/rcu.h" #include "hw/core/cpu.h" -#include "exec/cpu-common.h" #include "exec/exec-all.h" #include "exec/tb-flush.h" From patchwork Mon Sep 18 10:41:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724148 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1609075wro; Mon, 18 Sep 2023 03:42:43 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF5ooty2eTEkzd3PUexptUr2DaQ6z9Y1ea2ccF8br+1nhXQ6J1qLJRTcJJwYi4Fz4RMrX91 X-Received: by 2002:a05:622a:1110:b0:410:a5e9:b7f0 with SMTP id e16-20020a05622a111000b00410a5e9b7f0mr12244038qty.3.1695033762891; Mon, 18 Sep 2023 03:42:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695033762; cv=none; d=google.com; s=arc-20160816; b=JSlwzumT9TL3nklsxYpbl3XOlzhw974tjwt2QyUpZ2JadOwV6/KOjXHLi1LhOaHdnU 2DcZG9G3m5zfD9jMNFZVHQuCdo5atiC/dnY6s8g+CQ9P7/4WFRxf7bfr9/4O/7FKlpvn zw9QArV7H3JOmJmFVUPya9UMVCngmWZ0YnUoPc+a8UTg8omWUn6LrDgU7u3YRmZ/9OyX hv9CvY0GC4YPKXG/qRnfkJ9ObtQeHLCgnD7y0x2AwtSD3cCG5bAhR6XtFyVHye7EGC+X kqjqH6gnBUH5SgyXSDXx9I3JJlHKpuJJLHGjYtmIHO5i7tAQVbIbRSpuEO8Je+rXEoHO 6hTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=W52OzMfh5+MNdMUtWyOMIRdFjsJUql/0VwepeW4hS+w=; fh=BF3LKKifiA+jF5p/lRDAQaBJUKq1weCvFbpq4CIoQ/U=; b=rBnVc7gqes96l4PqQEwdF9Favg7R1z2EC+YW1NXceKpKAntb1fH17YXwxrvnQH5Ghn mIgzbJi+HKCA+pUSHMrK58YtRNzqLjsAYC19M9suPtE4dhN96ykYT1hhAERO9A5l4USw 9xjYfSmszNaZFcMSZPxbAKcwZ2abjTJ2KqjGI8btjG2EQtrOEyjfw0B1uoYoM/VpImtx TQLQar+K9njX/JYweMPjeO2cCzY04OWBUkUOoDVQbX72hCVW0R9N9e8LnvhNlkXxiuyR JDCNeYvNLWEWNL3YLvFkzwawRMPPNGsDq/DTndujjLUBjdwB+XAl1agMmV3IZDWxBZ1L v8WQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qlOKRjtK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.29.175.5]) by smtp.gmail.com with ESMTPSA id n9-20020adfe789000000b003180fdf5589sm7926499wrm.6.2023.09.18.03.42.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 03:42:18 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Anton Johansson , Riku Voipio , Richard Henderson , Claudio Fontana , Yanan Wang , Paolo Bonzini , Alessandro Di Federico , Fabiano Rosas , Marcel Apfelbaum , Daniel Henrique Barboza , Mahmoud Mandour , Eduardo Habkost , Alexandre Iooss , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?Alex?= =?utf-8?q?_Benn=C3=A9e?= Subject: [PATCH 2/3] accel: Introduce cpu_exec_reset_hold() Date: Mon, 18 Sep 2023 12:41:51 +0200 Message-ID: <20230918104153.24433-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918104153.24433-1-philmd@linaro.org> References: <20230918104153.24433-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=philmd@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Introduce cpu_exec_reset_hold() which call an accelerator specific AccelOpsClass::cpu_reset_hold() handler. Define a stub on TCG user emulation, because CPU reset is irrelevant there. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 1 + include/sysemu/accel-ops.h | 1 + accel/tcg/user-exec-stub.c | 4 ++++ hw/core/cpu-common.c | 1 + softmmu/cpus.c | 7 +++++++ 5 files changed, 14 insertions(+) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 92a4234439..7bbfa81dcd 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -1011,6 +1011,7 @@ void cpu_class_init_props(DeviceClass *dc); void cpu_exec_initfn(CPUState *cpu); void cpu_exec_realizefn(CPUState *cpu, Error **errp); void cpu_exec_unrealizefn(CPUState *cpu); +void cpu_exec_reset_hold(CPUState *cpu); /** * target_words_bigendian: diff --git a/include/sysemu/accel-ops.h b/include/sysemu/accel-ops.h index 3c1fab4b1e..ef91fc28bb 100644 --- a/include/sysemu/accel-ops.h +++ b/include/sysemu/accel-ops.h @@ -30,6 +30,7 @@ struct AccelOpsClass { void (*ops_init)(AccelOpsClass *ops); bool (*cpus_are_resettable)(void); + void (*cpu_reset_hold)(CPUState *cpu); void (*create_vcpu_thread)(CPUState *cpu); /* MANDATORY NON-NULL */ void (*kick_vcpu_thread)(CPUState *cpu); diff --git a/accel/tcg/user-exec-stub.c b/accel/tcg/user-exec-stub.c index 874e1f1a20..b1bf8bed89 100644 --- a/accel/tcg/user-exec-stub.c +++ b/accel/tcg/user-exec-stub.c @@ -16,6 +16,10 @@ void qemu_init_vcpu(CPUState *cpu) { } +void cpu_exec_reset_hold(CPUState *cpu) +{ +} + /* User mode emulation does not support record/replay yet. */ bool replay_exception(void) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index b3b5ce6702..b50bc22fb7 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -137,6 +137,7 @@ static void cpu_common_reset_hold(Object *obj) cpu->crash_occurred = false; cpu->cflags_next_tb = -1; + cpu_exec_reset_hold(cpu); if (tcg_enabled()) { tcg_flush_jmp_cache(cpu); tcg_flush_softmmu_tlb(cpu); diff --git a/softmmu/cpus.c b/softmmu/cpus.c index 0848e0dbdb..952f15868c 100644 --- a/softmmu/cpus.c +++ b/softmmu/cpus.c @@ -201,6 +201,13 @@ bool cpus_are_resettable(void) return true; } +void cpu_exec_reset_hold(CPUState *cpu) +{ + if (cpus_accel->cpu_reset_hold) { + cpus_accel->cpu_reset_hold(cpu); + } +} + int64_t cpus_get_virtual_clock(void) { /* From patchwork Mon Sep 18 10:41:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724151 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1609314wro; Mon, 18 Sep 2023 03:43:27 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEGW2F28A0deb1BHSMslyoF3FR7rzqSAt1u2VqCwYSelA9PuTG51GFni59sCOz3ZoRpKsWE X-Received: by 2002:a0d:d204:0:b0:584:2ea4:a24b with SMTP id u4-20020a0dd204000000b005842ea4a24bmr8375539ywd.19.1695033807001; Mon, 18 Sep 2023 03:43:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695033806; cv=none; d=google.com; s=arc-20160816; b=aAeApAn28R83vS5uT2LaMuoijb23Sv6yVcuup4kAIzqDKWbWVslNljvBnAandHf0vK 4ybHk43B6ORybqJhD6k+zEiv+sLOmLwsxK9sQUdHEvUEcYOqvecNoirpXtgL1MAeP/fs OdIKaChRWJi3QRqhpbDf6dVXOSNNvYDY1xC6ztp1Lh1lx/hAEfPKbNVisn0pmO6uizio DS1C0Y9Qwv4+cFBqkqFFTiWbKP6ghAIEYCL4w6FDbS8FkFyLIu/+5Dg0OvaMrUD01acR +rqEaAP7K6tbWDtVOlzhQx0pfGMgpyHiUuoI+mcH2e9mFVGhrOsjsCv1NAfa1XhPwcxs OFRw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=YZeRMydDkG6M2arrXdQxyoLJFYtUvfDVk8wUBcDyUf4=; fh=BF3LKKifiA+jF5p/lRDAQaBJUKq1weCvFbpq4CIoQ/U=; b=g7gH27OEf0DkNjBCVkpNWuhibrvjfZZJ+cjsQbKf6FQIzxQxGhhV/Rl5FdmxIrkBor glHv7EZbZREEJPzqQ/byHr+8AcudehpdBFv0MYFJSVQr5EMqabBkJN3ah6etkirixJhq OLq4R4ApCdP6TGMlQPOc7Vh+3dl/8FvYp1oGYJCN9878WLNqvg88eSqHUaEljPgwQHsA e2fEnZUmZyi989q3zAByJPi8W+irU7eym2InkIBVwi292jvnYVFwwYKoIzuVxUFlQZ+M uHFJyUeeLUpOjnLMEsJkdQ8Z7zppSNWW2HhEnsvFuXnU8FlYuqM2KLcGCW85rX5oifFf 1Q2g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rvFfw7+D; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.29.175.5]) by smtp.gmail.com with ESMTPSA id q11-20020adff50b000000b0031c71693449sm12314748wro.1.2023.09.18.03.42.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 03:42:41 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Anton Johansson , Riku Voipio , Richard Henderson , Claudio Fontana , Yanan Wang , Paolo Bonzini , Alessandro Di Federico , Fabiano Rosas , Marcel Apfelbaum , Daniel Henrique Barboza , Mahmoud Mandour , Eduardo Habkost , Alexandre Iooss , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?Alex?= =?utf-8?q?_Benn=C3=A9e?= Subject: [PATCH 3/3] accel/tcg: Factor tcg_cpu_reset_hold() out Date: Mon, 18 Sep 2023 12:41:52 +0200 Message-ID: <20230918104153.24433-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918104153.24433-1-philmd@linaro.org> References: <20230918104153.24433-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Factor the TCG specific code from cpu_common_reset_hold() to tcg_cpu_reset_hold() within tcg-accel-ops.c. Since this file is sysemu specific, we can inline tcg_flush_softmmu_tlb(), removing its declaration in "exec/cpu-common.h". Signed-off-by: Philippe Mathieu-Daudé --- include/exec/cpu-common.h | 2 -- accel/stubs/tcg-stub.c | 4 ---- accel/tcg/tcg-accel-ops.c | 8 ++++++++ accel/tcg/translate-all.c | 8 -------- hw/core/cpu-common.c | 5 ----- 5 files changed, 8 insertions(+), 19 deletions(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 1eff233565..d71b4d712d 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -38,8 +38,6 @@ void cpu_list_lock(void); void cpu_list_unlock(void); unsigned int cpu_list_generation_id_get(void); -void tcg_flush_softmmu_tlb(CPUState *cs); - void tcg_iommu_init_notifier_list(CPUState *cpu); void tcg_iommu_free_notifier_list(CPUState *cpu); diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c index a9e7a2d5b4..8a496a2a6f 100644 --- a/accel/stubs/tcg-stub.c +++ b/accel/stubs/tcg-stub.c @@ -22,10 +22,6 @@ void tlb_set_dirty(CPUState *cpu, vaddr vaddr) { } -void tcg_flush_jmp_cache(CPUState *cpu) -{ -} - int probe_access_flags(CPUArchState *env, vaddr addr, int size, MMUAccessType access_type, int mmu_idx, bool nonfault, void **phost, uintptr_t retaddr) diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 748539f289..0882464d03 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -78,6 +78,13 @@ int tcg_cpus_exec(CPUState *cpu) return ret; } +static void tcg_cpu_reset_hold(CPUState *cpu) +{ + tcg_flush_jmp_cache(cpu); + + tlb_flush(cpu); +} + /* mask must never be zero, except for A20 change call */ void tcg_handle_interrupt(CPUState *cpu, int mask) { @@ -206,6 +213,7 @@ static void tcg_accel_ops_init(AccelOpsClass *ops) } } + ops->cpu_reset_hold = tcg_cpu_reset_hold; ops->supports_guest_debug = tcg_supports_guest_debug; ops->insert_breakpoint = tcg_insert_breakpoint; ops->remove_breakpoint = tcg_remove_breakpoint; diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index b2d4e22c17..0f3ed835cb 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -801,11 +801,3 @@ void tcg_flush_jmp_cache(CPUState *cpu) qatomic_set(&jc->array[i].tb, NULL); } } - -/* This is a wrapper for common code that can not use CONFIG_SOFTMMU */ -void tcg_flush_softmmu_tlb(CPUState *cs) -{ -#ifdef CONFIG_SOFTMMU - tlb_flush(cs); -#endif -} diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index b50bc22fb7..23040e0398 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -27,7 +27,6 @@ #include "qemu/main-loop.h" #include "exec/log.h" #include "exec/cpu-common.h" -#include "exec/tb-flush.h" #include "qemu/error-report.h" #include "qemu/qemu-print.h" #include "sysemu/tcg.h" @@ -138,10 +137,6 @@ static void cpu_common_reset_hold(Object *obj) cpu->cflags_next_tb = -1; cpu_exec_reset_hold(cpu); - if (tcg_enabled()) { - tcg_flush_jmp_cache(cpu); - tcg_flush_softmmu_tlb(cpu); - } } static bool cpu_common_has_work(CPUState *cs)