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[83.226.44.230]) by smtp.gmail.com with ESMTPSA id b6sm8268306lfa.54.2019.07.25.03.41.56 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 25 Jul 2019 03:41:56 -0700 (PDT) From: Niklas Cassel To: Viresh Kumar , Nishanth Menon , Stephen Boyd , Andy Gross , Ilia Lin Cc: linux-arm-msm@vger.kernel.org, jorge.ramirez-ortiz@linaro.org, bjorn.andersson@linaro.org, ulf.hansson@linaro.org, Sricharan R , Niklas Cassel , Rob Herring , Rob Herring , Mark Rutland , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 02/14] dt-bindings: cpufreq: Re-organise kryo cpufreq to use it for other nvmem based qcom socs Date: Thu, 25 Jul 2019 12:41:30 +0200 Message-Id: <20190725104144.22924-3-niklas.cassel@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190725104144.22924-1-niklas.cassel@linaro.org> References: <20190725104144.22924-1-niklas.cassel@linaro.org> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Sricharan R The kryo cpufreq driver reads the nvmem cell and uses that data to populate the opps. There are other qcom cpufreq socs like krait which does similar thing. Except for the interpretation of the read data, rest of the driver is same for both the cases. So pull the common things out for reuse. Signed-off-by: Sricharan R [niklas.cassel@linaro.org: split dt-binding into a separate patch and do not rename the compatible string.] Signed-off-by: Niklas Cassel Reviewed-by: Ilia Lin Reviewed-by: Rob Herring --- Changes since V1: -Picked up tags. .../opp/{kryo-cpufreq.txt => qcom-nvmem-cpufreq.txt} | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) rename Documentation/devicetree/bindings/opp/{kryo-cpufreq.txt => qcom-nvmem-cpufreq.txt} (98%) -- 2.21.0 diff --git a/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt similarity index 98% rename from Documentation/devicetree/bindings/opp/kryo-cpufreq.txt rename to Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt index c2127b96805a..198441e80ba8 100644 --- a/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt +++ b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt @@ -1,13 +1,13 @@ -Qualcomm Technologies, Inc. KRYO CPUFreq and OPP bindings +Qualcomm Technologies, Inc. NVMEM CPUFreq and OPP bindings =================================== -In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996 -that have KRYO processors, the CPU ferequencies subset and voltage value -of each OPP varies based on the silicon variant in use. +In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996, +the CPU frequencies subset and voltage value of each OPP varies based on +the silicon variant in use. Qualcomm Technologies, Inc. Process Voltage Scaling Tables defines the voltage and frequency value based on the msm-id in SMEM and speedbin blown in the efuse combination. -The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the SoC +The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC to provide the OPP framework with required information (existing HW bitmap). This is used to determine the voltage and frequency value for each OPP of operating-points-v2 table when it is parsed by the OPP framework. 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[83.226.44.230]) by smtp.gmail.com with ESMTPSA id h1sm7451290lfj.21.2019.07.25.03.42.14 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 25 Jul 2019 03:42:15 -0700 (PDT) From: Niklas Cassel To: Andy Gross , Ilia Lin , "Rafael J. Wysocki" , Viresh Kumar Cc: linux-arm-msm@vger.kernel.org, jorge.ramirez-ortiz@linaro.org, sboyd@kernel.org, vireshk@kernel.org, bjorn.andersson@linaro.org, ulf.hansson@linaro.org, Niklas Cassel , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 05/14] cpufreq: qcom: Refactor the driver to make it easier to extend Date: Thu, 25 Jul 2019 12:41:33 +0200 Message-Id: <20190725104144.22924-6-niklas.cassel@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190725104144.22924-1-niklas.cassel@linaro.org> References: <20190725104144.22924-1-niklas.cassel@linaro.org> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Refactor the driver to make it easier to extend in a later commit. Create a driver struct to collect all common resources, in order to make it easier to free up all common resources. Create a driver match_data struct to make it easier to extend the driver with support for new features that might only be supported on certain SoCs. Co-developed-by: Jorge Ramirez-Ortiz Signed-off-by: Jorge Ramirez-Ortiz Signed-off-by: Niklas Cassel Reviewed-by: Ilia Lin --- Changes since V1: -Picked up tags. -Fixed an incorrectly placed of_node_put(). drivers/cpufreq/qcom-cpufreq-nvmem.c | 123 +++++++++++++++++---------- 1 file changed, 79 insertions(+), 44 deletions(-) -- 2.21.0 diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c index fd08120768af..2d798a1685c5 100644 --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c @@ -43,6 +43,20 @@ enum _msm8996_version { NUM_OF_MSM8996_VERSIONS, }; +struct qcom_cpufreq_drv; + +struct qcom_cpufreq_match_data { + int (*get_version)(struct device *cpu_dev, + struct nvmem_cell *speedbin_nvmem, + struct qcom_cpufreq_drv *drv); +}; + +struct qcom_cpufreq_drv { + struct opp_table **opp_tables; + u32 versions; + const struct qcom_cpufreq_match_data *data; +}; + static struct platform_device *cpufreq_dt_pdev, *cpufreq_pdev; static enum _msm8996_version qcom_cpufreq_get_msm_id(void) @@ -76,7 +90,7 @@ static enum _msm8996_version qcom_cpufreq_get_msm_id(void) static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev, struct nvmem_cell *speedbin_nvmem, - u32 *versions) + struct qcom_cpufreq_drv *drv) { size_t len; u8 *speedbin; @@ -94,10 +108,10 @@ static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev, switch (msm8996_version) { case MSM8996_V3: - *versions = 1 << (unsigned int)(*speedbin); + drv->versions = 1 << (unsigned int)(*speedbin); break; case MSM8996_SG: - *versions = 1 << ((unsigned int)(*speedbin) + 4); + drv->versions = 1 << ((unsigned int)(*speedbin) + 4); break; default: BUG(); @@ -108,17 +122,17 @@ static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev, return 0; } +static const struct qcom_cpufreq_match_data match_data_kryo = { + .get_version = qcom_cpufreq_kryo_name_version, +}; + static int qcom_cpufreq_probe(struct platform_device *pdev) { - struct opp_table **opp_tables; - int (*get_version)(struct device *cpu_dev, - struct nvmem_cell *speedbin_nvmem, - u32 *versions); + struct qcom_cpufreq_drv *drv; struct nvmem_cell *speedbin_nvmem; struct device_node *np; struct device *cpu_dev; unsigned cpu; - u32 versions; const struct of_device_id *match; int ret; @@ -126,11 +140,6 @@ static int qcom_cpufreq_probe(struct platform_device *pdev) if (!cpu_dev) return -ENODEV; - match = pdev->dev.platform_data; - get_version = match->data; - if (!get_version) - return -ENODEV; - np = dev_pm_opp_of_get_opp_desc_node(cpu_dev); if (!np) return -ENOENT; @@ -141,23 +150,43 @@ static int qcom_cpufreq_probe(struct platform_device *pdev) return -ENOENT; } - speedbin_nvmem = of_nvmem_cell_get(np, NULL); - of_node_put(np); - if (IS_ERR(speedbin_nvmem)) { - if (PTR_ERR(speedbin_nvmem) != -EPROBE_DEFER) - dev_err(cpu_dev, "Could not get nvmem cell: %ld\n", - PTR_ERR(speedbin_nvmem)); - return PTR_ERR(speedbin_nvmem); + drv = kzalloc(sizeof(*drv), GFP_KERNEL); + if (!drv) + return -ENOMEM; + + match = pdev->dev.platform_data; + drv->data = match->data; + if (!drv->data) { + ret = -ENODEV; + goto free_drv; } - ret = get_version(cpu_dev, speedbin_nvmem, &versions); - nvmem_cell_put(speedbin_nvmem); - if (ret) - return ret; + if (drv->data->get_version) { + speedbin_nvmem = of_nvmem_cell_get(np, NULL); + if (IS_ERR(speedbin_nvmem)) { + if (PTR_ERR(speedbin_nvmem) != -EPROBE_DEFER) + dev_err(cpu_dev, + "Could not get nvmem cell: %ld\n", + PTR_ERR(speedbin_nvmem)); + ret = PTR_ERR(speedbin_nvmem); + goto free_drv; + } - opp_tables = kcalloc(num_possible_cpus(), sizeof(*opp_tables), GFP_KERNEL); - if (!opp_tables) - return -ENOMEM; + ret = drv->data->get_version(cpu_dev, speedbin_nvmem, drv); + if (ret) { + nvmem_cell_put(speedbin_nvmem); + goto free_drv; + } + nvmem_cell_put(speedbin_nvmem); + } + of_node_put(np); + + drv->opp_tables = kcalloc(num_possible_cpus(), sizeof(*drv->opp_tables), + GFP_KERNEL); + if (!drv->opp_tables) { + ret = -ENOMEM; + goto free_drv; + } for_each_possible_cpu(cpu) { cpu_dev = get_cpu_device(cpu); @@ -166,19 +195,23 @@ static int qcom_cpufreq_probe(struct platform_device *pdev) goto free_opp; } - opp_tables[cpu] = dev_pm_opp_set_supported_hw(cpu_dev, - &versions, 1); - if (IS_ERR(opp_tables[cpu])) { - ret = PTR_ERR(opp_tables[cpu]); - dev_err(cpu_dev, "Failed to set supported hardware\n"); - goto free_opp; + if (drv->data->get_version) { + drv->opp_tables[cpu] = + dev_pm_opp_set_supported_hw(cpu_dev, + &drv->versions, 1); + if (IS_ERR(drv->opp_tables[cpu])) { + ret = PTR_ERR(drv->opp_tables[cpu]); + dev_err(cpu_dev, + "Failed to set supported hardware\n"); + goto free_opp; + } } } cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1, NULL, 0); if (!IS_ERR(cpufreq_dt_pdev)) { - platform_set_drvdata(pdev, opp_tables); + platform_set_drvdata(pdev, drv); return 0; } @@ -187,26 +220,30 @@ static int qcom_cpufreq_probe(struct platform_device *pdev) free_opp: for_each_possible_cpu(cpu) { - if (IS_ERR_OR_NULL(opp_tables[cpu])) + if (IS_ERR_OR_NULL(drv->opp_tables[cpu])) break; - dev_pm_opp_put_supported_hw(opp_tables[cpu]); + dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]); } - kfree(opp_tables); + kfree(drv->opp_tables); +free_drv: + kfree(drv); return ret; } static int qcom_cpufreq_remove(struct platform_device *pdev) { - struct opp_table **opp_tables = platform_get_drvdata(pdev); + struct qcom_cpufreq_drv *drv = platform_get_drvdata(pdev); unsigned int cpu; platform_device_unregister(cpufreq_dt_pdev); for_each_possible_cpu(cpu) - dev_pm_opp_put_supported_hw(opp_tables[cpu]); + if (drv->opp_tables[cpu]) + dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]); - kfree(opp_tables); + kfree(drv->opp_tables); + kfree(drv); return 0; } @@ -220,10 +257,8 @@ static struct platform_driver qcom_cpufreq_driver = { }; static const struct of_device_id qcom_cpufreq_match_list[] __initconst = { - { .compatible = "qcom,apq8096", - .data = qcom_cpufreq_kryo_name_version }, - { .compatible = "qcom,msm8996", - .data = qcom_cpufreq_kryo_name_version }, + { .compatible = "qcom,apq8096", .data = &match_data_kryo }, + { .compatible = "qcom,msm8996", .data = &match_data_kryo }, {}, }; From patchwork Thu Jul 25 10:41:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 169698 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp11465024ilk; Thu, 25 Jul 2019 03:42:38 -0700 (PDT) X-Google-Smtp-Source: APXvYqyL2H7OOfxg3ZYZzmaNNhjBlvUzevco/VDLHN8zRoiY1NtlsylyJgbUh4mS8w1Lf1Fvc6m4 X-Received: by 2002:a17:90a:2ec1:: with SMTP id h1mr92454054pjs.101.1564051358271; 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[83.226.44.230]) by smtp.gmail.com with ESMTPSA id k124sm7461299lfd.60.2019.07.25.03.42.32 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 25 Jul 2019 03:42:33 -0700 (PDT) From: Niklas Cassel To: "Rafael J. Wysocki" , Viresh Kumar Cc: linux-arm-msm@vger.kernel.org, jorge.ramirez-ortiz@linaro.org, sboyd@kernel.org, vireshk@kernel.org, bjorn.andersson@linaro.org, ulf.hansson@linaro.org, Niklas Cassel , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 08/14] cpufreq: Add qcs404 to cpufreq-dt-platdev blacklist Date: Thu, 25 Jul 2019 12:41:36 +0200 Message-Id: <20190725104144.22924-9-niklas.cassel@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190725104144.22924-1-niklas.cassel@linaro.org> References: <20190725104144.22924-1-niklas.cassel@linaro.org> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Jorge Ramirez-Ortiz Add qcs404 to cpufreq-dt-platdev blacklist. Signed-off-by: Jorge Ramirez-Ortiz Co-developed-by: Niklas Cassel Signed-off-by: Niklas Cassel --- drivers/cpufreq/cpufreq-dt-platdev.c | 1 + 1 file changed, 1 insertion(+) -- 2.21.0 diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c index f9444ddd35ab..ec2057ddb4f4 100644 --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c @@ -125,6 +125,7 @@ static const struct of_device_id blacklist[] __initconst = { { .compatible = "qcom,apq8096", }, { .compatible = "qcom,msm8996", }, + { .compatible = "qcom,qcs404", }, { .compatible = "st,stih407", }, { .compatible = "st,stih410", },