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([71.212.131.115]) by smtp.gmail.com with ESMTPSA id z3-20020a637e03000000b0057754ae4eb7sm2958497pgc.39.2023.09.15.09.32.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Sep 2023 09:32:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: philmd@linaro.org Subject: [PATCH v2 1/3] softmmu: Use cpu->created in tcg_commit Date: Fri, 15 Sep 2023 09:32:52 -0700 Message-Id: <20230915163254.123338-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230915163254.123338-1-richard.henderson@linaro.org> References: <20230915163254.123338-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Use created not halt_cond to test for cpu created. Fixes: 0d58c660689f ("softmmu: Use async_run_on_cpu in tcg_commit") Reported-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- softmmu/physmem.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/softmmu/physmem.c b/softmmu/physmem.c index 18277ddd67..88fafec1da 100644 --- a/softmmu/physmem.c +++ b/softmmu/physmem.c @@ -2515,9 +2515,9 @@ static void tcg_commit(MemoryListener *listener) * the memory data structures. * * That said, the listener is also called during realize, before - * all of the tcg machinery for run-on is initialized: thus halt_cond. + * all of the tcg machinery for run-on is initialized: thus created. */ - if (cpu->halt_cond) { + if (cpu->created) { async_run_on_cpu(cpu, tcg_commit_cpu, RUN_ON_CPU_HOST_PTR(cpuas)); } else { tcg_commit_cpu(cpu, RUN_ON_CPU_HOST_PTR(cpuas)); From patchwork Fri Sep 15 16:32:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 723129 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp483693wro; Fri, 15 Sep 2023 09:34:01 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHFnVM58zeNHIT1cJrvjnhVJNIrXeyOHszSuoyH+9eii9mYYLgM5HqFj8wcsrUwV6gcBpPu X-Received: by 2002:ac8:7d8a:0:b0:412:309f:c0fa with SMTP id c10-20020ac87d8a000000b00412309fc0famr2341806qtd.64.1694795641636; Fri, 15 Sep 2023 09:34:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1694795641; cv=none; d=google.com; s=arc-20160816; b=axGcPMJV0qmh5Q+EXinE43/J1mgwGo9n4FOZgoIFUob7XT8Uvn63zoVZ+gKObj1Fxe 7Itlbf4UpTZjRmdqpxymrWJPV190HqCCzRAMoLn74cLKhQv+BUlOj53VvrZPgozVYA5w n8TleGiCu+c2FjR8MBFeReKnzvmGiN8ipU3DyBxqfGOQcmyau3oR9GWTNgwmvXlcN42A Xy+FNCxuW2eb6yfyPYibS+uTT93/lgN5wj7RMTxr+STI0oUTIVKYHCSbkFY8FUpATSMr d2qKgMvpg3X9M4X5k74/dP2zf0tJ7xvhulcToUkfJtrGthfot12v5xaVkjpii1OCtvFg yPiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=iJ6Oywpvjr1xG7Guou9tEnbUmyP3OUnn4VhCnCRzKJY=; fh=ycigHkwOPieh2u5PmcA89sNk/qPD1ZkdDlL8Mchfvw8=; b=n/Sa9wAA8g1QQIoax+alG2g/lQDAaVv8DeZgHovuWKpQxNGGcUXL4IFs3JmlLvSEWs fRDjWwTJ/790ShFrgwJqfPACXeMUYXUxAM0L3z6cWFch5IkYAZ8PMvvDYL/dLx8csYAy UV8DvEsS03bbT/5QlgtdWxYiSpvIHigO7o3qOphMcNUmw3coxPt6JddtKRdR8NmC6vDW 73BwG4qFIktq8H+NAKbjrc+AYa2Ky9xt1scTnkls45SESiYYvRyyXqlKDrtUu4r5/72R nUkWnoA/Q1mw7Kv4QLqc2QiSRv3ujyPXCHYERQ2Ws70FhaPHMhfe+RwAwwaz3TMmyjLN /1oQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BoHXb9ez; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([71.212.131.115]) by smtp.gmail.com with ESMTPSA id z3-20020a637e03000000b0057754ae4eb7sm2958497pgc.39.2023.09.15.09.32.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Sep 2023 09:32:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: philmd@linaro.org Subject: [PATCH v2 2/3] softmmu: Introduce AddressSpaceDispatch generation numbers Date: Fri, 15 Sep 2023 09:32:53 -0700 Message-Id: <20230915163254.123338-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230915163254.123338-1-richard.henderson@linaro.org> References: <20230915163254.123338-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Allow the cpu to easily check if an address space update is required. The acquire/release semantics will be used by a subsequent patch. Signed-off-by: Richard Henderson --- softmmu/physmem.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/softmmu/physmem.c b/softmmu/physmem.c index 88fafec1da..e1c535380a 100644 --- a/softmmu/physmem.c +++ b/softmmu/physmem.c @@ -163,6 +163,8 @@ struct CPUAddressSpace { AddressSpace *as; struct AddressSpaceDispatch *memory_dispatch; MemoryListener tcg_as_listener; + uint32_t commit_gen; + uint32_t layout_gen; }; struct DirtyBitmapSnapshot { @@ -2486,14 +2488,23 @@ static void tcg_log_global_after_sync(MemoryListener *listener) } } -static void tcg_commit_cpu(CPUState *cpu, run_on_cpu_data data) +static void tcg_commit_cpu_0(CPUState *cpu, CPUAddressSpace *cpuas) { - CPUAddressSpace *cpuas = data.host_ptr; - cpuas->memory_dispatch = address_space_to_dispatch(cpuas->as); tlb_flush(cpu); } +static void tcg_commit_cpu_1(CPUState *cpu, run_on_cpu_data data) +{ + CPUAddressSpace *cpuas = data.host_ptr; + uint32_t gen = qatomic_load_acquire(&cpuas->layout_gen); + + if (cpuas->commit_gen != gen) { + cpuas->commit_gen = gen; + tcg_commit_cpu_0(cpu, cpuas); + } +} + static void tcg_commit(MemoryListener *listener) { CPUAddressSpace *cpuas; @@ -2518,9 +2529,10 @@ static void tcg_commit(MemoryListener *listener) * all of the tcg machinery for run-on is initialized: thus created. */ if (cpu->created) { - async_run_on_cpu(cpu, tcg_commit_cpu, RUN_ON_CPU_HOST_PTR(cpuas)); + qatomic_store_release(&cpuas->layout_gen, cpuas->layout_gen + 1); + async_run_on_cpu(cpu, tcg_commit_cpu_1, RUN_ON_CPU_HOST_PTR(cpuas)); } else { - tcg_commit_cpu(cpu, RUN_ON_CPU_HOST_PTR(cpuas)); + tcg_commit_cpu_0(cpu, cpuas); } } From patchwork Fri Sep 15 16:32:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 723127 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp483612wro; Fri, 15 Sep 2023 09:33:53 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE/rrnVFhPrZiKnR0I9tz22V3YHW1PecTC6z9sOdpSr00KYH+re9qTML6WQkwtIQVyZmtoW X-Received: by 2002:ac8:5b85:0:b0:40f:df11:8bf0 with SMTP id a5-20020ac85b85000000b0040fdf118bf0mr2907877qta.14.1694795632790; Fri, 15 Sep 2023 09:33:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1694795632; cv=none; d=google.com; s=arc-20160816; b=mRT6+c4PV7hle9H0YrQJN4/QvXhqcGUULIdRbPH8v4z4Dn2SJgdELaTcu3eO9ACJQK MXHwhciZeKfBpHy08ABNG8/YMYNsG6+le52B9NvWYmUZU/kyyBoXe6Fv3Z4EFBC+h5vk qpdfPUOaKVVGbgsAj1mx5hF/0R+cGtI/PXr4aPJats7y0jhF+RGvcwbutTUAD3oUrVrL 1o7TWxZbDTNGmBjuPCs8EUenWPX2S11shoJMixvR5nuQDCP6686eKgmiaSWnkIPbK6HZ 3Kk7TJZB4snoi5Fdhznx7FD1XggHat+49k7lBiInRgf1ss0T1ad4M5qv+79TelJLpLra Kq3Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=FATEL2ITPMFfLfw0D9PblDYxfW6TvM3iJL7m+a0EPeE=; fh=ycigHkwOPieh2u5PmcA89sNk/qPD1ZkdDlL8Mchfvw8=; b=vCOx1Up+2DEoRglEM0FUVJIhBZOlJWre0m2oeI2i5ng0ZM6LSbzZY9YAqa9vhN75Ff 4XVLSMXAN5/V5pOUfcmDV1sJgmQIGPFJpiSl4bFJ2P5Mnc3FjewdCLRfYMkW6AsR7fIo KFevObOQlKJpAqhc+UAFbQ6mbAZpaEvfzv7fzLvIdbR8IHAY67wi/bZyFW8ILTt9pwtF Pbkdrw4lCMURBrtvDg6YFpdl27HMhCrtHj1FnhfAFZMhirYsh9a9xvyC6iWDhxf6g+82 g84JHugNMtOHyt3J/NuHSkLaoorga42vTk2ZpiA/dG4QQV5rcwDFyeY8+cI/pLDx+pxN MsfQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=b4DQFUMh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([71.212.131.115]) by smtp.gmail.com with ESMTPSA id z3-20020a637e03000000b0057754ae4eb7sm2958497pgc.39.2023.09.15.09.32.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Sep 2023 09:32:58 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: philmd@linaro.org Subject: [PATCH v2 3/3] softmmu: Introduce cpu_address_space_sync Date: Fri, 15 Sep 2023 09:32:54 -0700 Message-Id: <20230915163254.123338-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230915163254.123338-1-richard.henderson@linaro.org> References: <20230915163254.123338-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Synchronously check and update the address space for the current cpu for any slow path access. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1866 Signed-off-by: Richard Henderson --- include/exec/memory.h | 6 ++++++ accel/tcg/cputlb.c | 2 ++ softmmu/physmem.c | 20 ++++++++++++++++++++ 3 files changed, 28 insertions(+) diff --git a/include/exec/memory.h b/include/exec/memory.h index 68284428f8..7ec842076f 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -2780,6 +2780,12 @@ void address_space_cache_destroy(MemoryRegionCache *cache); IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr, bool is_write, MemTxAttrs attrs); +/* + * Ensure all cpu address spaces are up-to-date. + * Return true if changes made and tlb flushed. + */ +void cpu_address_space_sync(CPUState *cpu); + /* address_space_translate: translate an address range into an address space * into a MemoryRegion and an address range into that section. Should be * called from an RCU critical section, to avoid that the last reference diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 3270f65c20..91be3f3064 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1827,6 +1827,8 @@ static bool mmu_lookup(CPUArchState *env, vaddr addr, MemOpIdx oi, l->page[1].size = 0; crosspage = (addr ^ l->page[1].addr) & TARGET_PAGE_MASK; + cpu_address_space_sync(env_cpu(env)); + if (likely(!crosspage)) { mmu_lookup1(env, &l->page[0], l->mmu_idx, type, ra); diff --git a/softmmu/physmem.c b/softmmu/physmem.c index e1c535380a..5a89caa257 100644 --- a/softmmu/physmem.c +++ b/softmmu/physmem.c @@ -2536,6 +2536,26 @@ static void tcg_commit(MemoryListener *listener) } } +void cpu_address_space_sync(CPUState *cpu) +{ + int i, n = cpu->num_ases; + bool need_flush = false; + + for (i = 0; i < n; ++i) { + CPUAddressSpace *cpuas = &cpu->cpu_ases[i]; + uint32_t gen = qatomic_load_acquire(&cpuas->layout_gen); + + if (cpuas->commit_gen != gen) { + cpuas->commit_gen = gen; + cpuas->memory_dispatch = address_space_to_dispatch(cpuas->as); + need_flush = true; + } + } + if (need_flush) { + tlb_flush(cpu); + } +} + static void memory_map_init(void) { system_memory = g_malloc(sizeof(*system_memory));