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[176.171.209.234]) by smtp.gmail.com with ESMTPSA id br20-20020a170906d15400b0098669cc16b2sm2610559ejb.83.2023.09.15.09.20.50 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 15 Sep 2023 09:20:51 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Bernhard Beschow , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 1/2] target/i386: Only realize existing APIC device Date: Fri, 15 Sep 2023 18:20:41 +0200 Message-ID: <20230915162042.55890-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230915162042.55890-1-philmd@linaro.org> References: <20230915162042.55890-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::131; envelope-from=philmd@linaro.org; helo=mail-lf1-x131.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org APIC state is created under a certain condition, use the same condition to realize it. Having a NULL APIC state is a bug: use assert(). Signed-off-by: Philippe Mathieu-Daudé --- target/i386/cpu-sysemu.c | 9 +++------ target/i386/cpu.c | 8 +++++--- 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/target/i386/cpu-sysemu.c b/target/i386/cpu-sysemu.c index 2375e48178..6a164d3769 100644 --- a/target/i386/cpu-sysemu.c +++ b/target/i386/cpu-sysemu.c @@ -272,9 +272,7 @@ void x86_cpu_apic_create(X86CPU *cpu, Error **errp) APICCommonState *apic; APICCommonClass *apic_class = apic_get_class(errp); - if (!apic_class) { - return; - } + assert(apic_class); cpu->apic_state = DEVICE(object_new_with_class(OBJECT_CLASS(apic_class))); object_property_add_child(OBJECT(cpu), "lapic", @@ -293,9 +291,8 @@ void x86_cpu_apic_realize(X86CPU *cpu, Error **errp) APICCommonState *apic; static bool apic_mmio_map_once; - if (cpu->apic_state == NULL) { - return; - } + assert(cpu->apic_state); + qdev_realize(DEVICE(cpu->apic_state), NULL, errp); /* Map APIC MMIO area */ diff --git a/target/i386/cpu.c b/target/i386/cpu.c index b2a20365e1..a23d4795e0 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7448,9 +7448,11 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) } #ifndef CONFIG_USER_ONLY - x86_cpu_apic_realize(cpu, &local_err); - if (local_err != NULL) { - goto out; + if (cpu->env.features[FEAT_1_EDX] & CPUID_APIC || ms->smp.cpus > 1) { + x86_cpu_apic_realize(cpu, &local_err); + if (local_err != NULL) { + goto out; + } } #endif /* !CONFIG_USER_ONLY */ cpu_reset(cs); From patchwork Fri Sep 15 16:20:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 723124 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp477058wro; Fri, 15 Sep 2023 09:21:40 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEELpOl17DtJLsAmVerUwbHRopczdJ3UFUSzRIPVl0GdTLMn9Ez9wX7eCO29AwQNF87BPk4 X-Received: by 2002:a05:6358:2908:b0:13a:4f34:8063 with SMTP id y8-20020a056358290800b0013a4f348063mr2318106rwb.32.1694794900348; Fri, 15 Sep 2023 09:21:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1694794900; cv=none; d=google.com; s=arc-20160816; b=sQesHhz4Na1DgnHeX26EHoH03GmwKz9HGMlpUXVxQlCIFjUNMA4zeqsgQyVOHdlVXR NAwzlSv/v3t+A53pFrkXskCVAGfvg37texUKfpa37BKv5L3P+6pOpWWOrhwTJA4295H2 XrRnKGRPQW6foaK0uLnrd+EF0Q1DpFhmzNRety0ctUOncEemhdCnIWTwvNQbBWklIGCp CmWFCqCpn9A8MQFgJ/2UTSny8p7cT+/CHU+q3SVVQ2uFw0nIHxkuxQnOUsjI7LQRpglr RcKTPQuy7dAVnue+hS5ok26LsuwjlvywUg9EpSyYtKLPgGD1juAsfKA4HFrkeH1RFBDi 2Qeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=lJh8A0itxnh0qEmv9jrQE8icd48ukduXjwQKR8H2Trw=; fh=Gmfj+/HHPXfJ2ZMFio+eUbPUWnJmNnzWllvzf8cym6Y=; b=prtyeZngzCSC0ESaDVqqBfTrAU7NGxmmGqY1clU5rxvi2EAeo0F7fW+zHT643niXXy xoO2g36jUsbHglZW80rDjQcEfU+avDjtMFcvB1m528FMPQtsXJc7Vjgt/iNGD/BB1uey 7uEyFgEU90MwUR3zq7vJYqDHB3bHSYY7Z6jdikp9SxV1sqnUdFHDQjNGpoh+KdNxwctv MwjM2Wf0RuHDFScYXGsGKUfyg2ORBgNR3MIhuLSWGkxwlL3QTKMW9OmKX3dIsh3Pacjp sMwAhPFNfnw1pLehKrOoHV3zEe857asiyzhHDN+6fxxbQMA6GSttjcx3fa08fDZDIsIK vAwg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="mRk/hP13"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.171.209.234]) by smtp.gmail.com with ESMTPSA id gy18-20020a170906f25200b009a9fbeb15f5sm2606542ejb.46.2023.09.15.09.20.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 15 Sep 2023 09:20:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Bernhard Beschow , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 2/2] hw/intc/apic: Pass CPU using QOM link property Date: Fri, 15 Sep 2023 18:20:42 +0200 Message-ID: <20230915162042.55890-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230915162042.55890-1-philmd@linaro.org> References: <20230915162042.55890-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org QOM objects shouldn't access each other internals fields except using the QOM API. Declare the 'cpu' and 'base-addr' properties, set them using object_property_set_link() and qdev_prop_set_uint32() respectively. Signed-off-by: Philippe Mathieu-Daudé --- hw/intc/apic_common.c | 2 ++ target/i386/cpu-sysemu.c | 11 ++++++----- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c index 68ad30e2f5..e28f7402ab 100644 --- a/hw/intc/apic_common.c +++ b/hw/intc/apic_common.c @@ -394,6 +394,8 @@ static Property apic_properties_common[] = { true), DEFINE_PROP_BOOL("legacy-instance-id", APICCommonState, legacy_instance_id, false), + DEFINE_PROP_LINK("cpu", APICCommonState, cpu, TYPE_X86_CPU, X86CPU *), + DEFINE_PROP_UINT32("base-addr", APICCommonState, apicbase, 0), DEFINE_PROP_END_OF_LIST(), }; diff --git a/target/i386/cpu-sysemu.c b/target/i386/cpu-sysemu.c index 6a164d3769..6edfb7e2af 100644 --- a/target/i386/cpu-sysemu.c +++ b/target/i386/cpu-sysemu.c @@ -269,7 +269,6 @@ APICCommonClass *apic_get_class(Error **errp) void x86_cpu_apic_create(X86CPU *cpu, Error **errp) { - APICCommonState *apic; APICCommonClass *apic_class = apic_get_class(errp); assert(apic_class); @@ -279,11 +278,13 @@ void x86_cpu_apic_create(X86CPU *cpu, Error **errp) OBJECT(cpu->apic_state)); object_unref(OBJECT(cpu->apic_state)); + if (!object_property_set_link(OBJECT(cpu->apic_state), "cpu", + OBJECT(cpu), errp)) { + return; + } qdev_prop_set_uint32(cpu->apic_state, "id", cpu->apic_id); - /* TODO: convert to link<> */ - apic = APIC_COMMON(cpu->apic_state); - apic->cpu = cpu; - apic->apicbase = APIC_DEFAULT_ADDRESS | MSR_IA32_APICBASE_ENABLE; + qdev_prop_set_uint32(cpu->apic_state, "base-addr", + APIC_DEFAULT_ADDRESS | MSR_IA32_APICBASE_ENABLE); } void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)