From patchwork Tue Jul 23 14:23:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georgi Djakov X-Patchwork-Id: 169541 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp8949316ilk; Tue, 23 Jul 2019 07:23:52 -0700 (PDT) X-Google-Smtp-Source: APXvYqw3qIArNj0pUCx1AmtAz9SXp+r1j9ZNiPr3AXXuY3N5/ckT4vPMic4C9Hx+MmLVNGTS779L X-Received: by 2002:a17:90a:8d86:: with SMTP id d6mr82279677pjo.94.1563891832617; Tue, 23 Jul 2019 07:23:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1563891832; cv=none; d=google.com; s=arc-20160816; b=MvaL41eKJqmYXfogPCiuInIK97YlYOEfVuzrwCNbw2mz71aAPNpYLakx4BmnJ0qR6B IPZnl0FLt+oNl2afVIdc82yaurqgiqd6WagOzx/M+QFMANqnMOtZyr+3W8F64X8BwS9C ds/94/o2tKUUtfkz9W2Ykj5+yDDsHGbaldbt4F43vulbzSPlFOMedc4LSEdVAxVXVEuf w7MHlWr99dpFLHINSecyxrDhTn92RywgyqCOv3ml4rnHiEn+gaDOERLiTpw7BWqGo/Jl i8z3R83ykWfa1290+hwrjHwA8yb4WrkQkcyeSgXxV69eyR4D9WBOHSk92x+LezsWjC9p 821w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=oYU5uExLdvkd3JySXo4ikuWuU9TKWBHt3CrzgnJWCNA=; b=ZrozQjbdla6dAMVv1mOUXF5BHs4cLHd/n5yPgkggdY779ypI2SC4F8hGAxZ9BBzzi7 U2lszV7VjbiF409FYrXOkFTLKBifl2r51WOHO1Nix3vSZ0rHqA7qWUSwHyZ4Px0umtB3 S/+LMPFE+9QkN7wxpkVHquC18xmZAy2E9tZC2qjoro2/ktYxKnjzAWin7T/ssczP7KGY qLSjTXtEoBsJ91cxxaQxKJbaeeLW9QDPlw/hq8XXdJ+SjvTl/WwPFNJLD/WW4iRkPg9I Ox0Ap4vtG9k6RyP6RWatGzVtC9iceYWDtX9dFHdT3D3LgPkgZ9rUaLe1dDsCVDVAOyMG K7sA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dPqki8ih; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n1si6019711pgf.237.2019.07.23.07.23.52; Tue, 23 Jul 2019 07:23:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dPqki8ih; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727164AbfGWOXw (ORCPT + 15 others); Tue, 23 Jul 2019 10:23:52 -0400 Received: from mail-lj1-f195.google.com ([209.85.208.195]:38971 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730124AbfGWOXv (ORCPT ); Tue, 23 Jul 2019 10:23:51 -0400 Received: by mail-lj1-f195.google.com with SMTP id v18so41207543ljh.6 for ; Tue, 23 Jul 2019 07:23:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oYU5uExLdvkd3JySXo4ikuWuU9TKWBHt3CrzgnJWCNA=; b=dPqki8ih91xsb4gJhR/9Xcf6J/YbqCIpXb1A5GmOjH8xwHK0jukrf0nRMY5ktPDnKW a7Zju9SwtVgvgQydRt2flh2dnh345wbQNNbrlNAd+4rmnLxBQT9kMrvxNMJoC6NlEzOH nHNWb7PdQ8PHp2NodheRMTJEsfNwKzooTXfUG0r1l2rtIk86/B88s9644QpxA5D5IXUT 4w0mc6DsRkH5tkTPsVhWwg0VISWjkwdei6T7ra1S0NRGaJWF8SJoIy2vEaupo6m+MHIM 43Q90SR/MY5DYD3ttiTelTV2T4pLxz4nwtpXY/hhz4EmkdxlsUaefL1+f6ye0hj6idZg ifFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oYU5uExLdvkd3JySXo4ikuWuU9TKWBHt3CrzgnJWCNA=; b=REZ4mRp4MYc5RGTiREiEaQNb3njO5TftLEB1ZkcASwSAIo7kdR+lkdnBEbKiY0WK7w 41mQSoJX9jnS82LUJRtP9WFL7W4kKX6/ZlWsVPgDWouR1gv6qI2Jvy8juwi7sHu+/O9u pnZd+q5lUHHeYGFMmwPwPddeOASQK5RPBGQQ2tqwdCtqTFPa6W5DwnVN5LovoSju1+8v UzrfBTC8VNkhVFkMCB7RA1Llnv1rU/JAsH79xXgDQtr1lRmNMBZCWMRSBFO3yY9PL0q6 myS4YWivXBxJAKaufZ+oqYhULo6qariJniU++eI6MAzmYwnCyev+VZOiHdmiKdqg0E7B JACw== X-Gm-Message-State: APjAAAWiZ438M3pj90pOoablb0MQ1PujDizISVmCRmVXxGqVymlhW+5n Rey7p99yrXs1MeiwM8VisfZ4pw== X-Received: by 2002:a2e:9858:: with SMTP id e24mr16411197ljj.91.1563891828744; Tue, 23 Jul 2019 07:23:48 -0700 (PDT) Received: from localhost.localdomain ([212.45.67.2]) by smtp.googlemail.com with ESMTPSA id z17sm8048519ljc.37.2019.07.23.07.23.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 23 Jul 2019 07:23:48 -0700 (PDT) From: Georgi Djakov To: robh+dt@kernel.org, bjorn.andersson@linaro.org, agross@kernel.org, georgi.djakov@linaro.org Cc: vkoul@kernel.org, evgreen@chromium.org, daidavid1@codeaurora.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v5 3/5] interconnect: qcom: Add interconnect SMD over SMD driver Date: Tue, 23 Jul 2019 17:23:37 +0300 Message-Id: <20190723142339.27772-4-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190723142339.27772-1-georgi.djakov@linaro.org> References: <20190723142339.27772-1-georgi.djakov@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On some Qualcomm SoCs, there is a remote processor, which controls some of the Network-On-Chip interconnect resources. Other CPUs express their needs by communicating with this processor. Add a driver to handle communication with this remote processor. Reviewed-by: Bjorn Andersson Signed-off-by: Georgi Djakov --- v5: - Use the more succinct return !!icc_smd_rpm; - Picked Bjorn's r-b. v4: - Hide the driver from config menu. It will be selected by other driver. - Add remove() function to zero out the rpm handle. v3: - New patch. drivers/interconnect/qcom/Kconfig | 3 ++ drivers/interconnect/qcom/Makefile | 2 + drivers/interconnect/qcom/smd-rpm.c | 77 +++++++++++++++++++++++++++++ drivers/interconnect/qcom/smd-rpm.h | 15 ++++++ 4 files changed, 97 insertions(+) create mode 100644 drivers/interconnect/qcom/smd-rpm.c create mode 100644 drivers/interconnect/qcom/smd-rpm.h diff --git a/drivers/interconnect/qcom/Kconfig b/drivers/interconnect/qcom/Kconfig index d5e70ebc2410..03fd67173494 100644 --- a/drivers/interconnect/qcom/Kconfig +++ b/drivers/interconnect/qcom/Kconfig @@ -12,3 +12,6 @@ config INTERCONNECT_QCOM_SDM845 help This is a driver for the Qualcomm Network-on-Chip on sdm845-based platforms. + +config INTERCONNECT_QCOM_SMD_RPM + tristate diff --git a/drivers/interconnect/qcom/Makefile b/drivers/interconnect/qcom/Makefile index 1c1cea690f92..a600cf6cc272 100644 --- a/drivers/interconnect/qcom/Makefile +++ b/drivers/interconnect/qcom/Makefile @@ -1,5 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 qnoc-sdm845-objs := sdm845.o +icc-smd-rpm-objs := smd-rpm.o obj-$(CONFIG_INTERCONNECT_QCOM_SDM845) += qnoc-sdm845.o +obj-$(CONFIG_INTERCONNECT_QCOM_SMD_RPM) += icc-smd-rpm.o diff --git a/drivers/interconnect/qcom/smd-rpm.c b/drivers/interconnect/qcom/smd-rpm.c new file mode 100644 index 000000000000..dc8ff8d133a9 --- /dev/null +++ b/drivers/interconnect/qcom/smd-rpm.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * RPM over SMD communication wrapper for interconnects + * + * Copyright (C) 2019 Linaro Ltd + * Author: Georgi Djakov + */ + +#include +#include +#include +#include +#include +#include + +#include "smd-rpm.h" + +#define RPM_KEY_BW 0x00007762 + +static struct qcom_smd_rpm *icc_smd_rpm; + +struct icc_rpm_smd_req { + __le32 key; + __le32 nbytes; + __le32 value; +}; + +bool qcom_icc_rpm_smd_available(void) +{ + return !!icc_smd_rpm; +} +EXPORT_SYMBOL_GPL(qcom_icc_rpm_smd_available); + +int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val) +{ + struct icc_rpm_smd_req req = { + .key = cpu_to_le32(RPM_KEY_BW), + .nbytes = cpu_to_le32(sizeof(u32)), + .value = cpu_to_le32(val), + }; + + return qcom_rpm_smd_write(icc_smd_rpm, ctx, rsc_type, id, &req, + sizeof(req)); +} +EXPORT_SYMBOL_GPL(qcom_icc_rpm_smd_send); + +static int qcom_icc_rpm_smd_remove(struct platform_device *pdev) +{ + icc_smd_rpm = NULL; + + return 0; +} + +static int qcom_icc_rpm_smd_probe(struct platform_device *pdev) +{ + icc_smd_rpm = dev_get_drvdata(pdev->dev.parent); + + if (!icc_smd_rpm) { + dev_err(&pdev->dev, "unable to retrieve handle to RPM\n"); + return -ENODEV; + } + + return 0; +} + +static struct platform_driver qcom_interconnect_rpm_smd_driver = { + .driver = { + .name = "icc_smd_rpm", + }, + .probe = qcom_icc_rpm_smd_probe, + .remove = qcom_icc_rpm_smd_remove, +}; +module_platform_driver(qcom_interconnect_rpm_smd_driver); +MODULE_AUTHOR("Georgi Djakov "); +MODULE_DESCRIPTION("Qualcomm SMD RPM interconnect proxy driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:icc_smd_rpm"); diff --git a/drivers/interconnect/qcom/smd-rpm.h b/drivers/interconnect/qcom/smd-rpm.h new file mode 100644 index 000000000000..ca9d0327b8ac --- /dev/null +++ b/drivers/interconnect/qcom/smd-rpm.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2019, Linaro Ltd. + * Author: Georgi Djakov + */ + +#ifndef __DRIVERS_INTERCONNECT_QCOM_SMD_RPM_H +#define __DRIVERS_INTERCONNECT_QCOM_SMD_RPM_H + +#include + +bool qcom_icc_rpm_smd_available(void); +int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val); + +#endif From patchwork Tue Jul 23 14:23:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georgi Djakov X-Patchwork-Id: 169543 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp8949381ilk; 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Reviewed-by: Bjorn Andersson Signed-off-by: Georgi Djakov --- v5: - Rebased to v5.3-rc1 v4: - Insert the NoC DT nodes after rng@ to keep the nodes sorted by address. - Pick Bjorn's r-b. v3: - Update according to the new binding: add reg property and moved under the "soc" node. arch/arm64/boot/dts/qcom/qcs404.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 3d0789775009..8b9352347622 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2018, Linaro Limited +#include #include #include #include @@ -273,6 +274,15 @@ clock-names = "core"; }; + bimc: interconnect@400000 { + reg = <0x00400000 0x80000>; + compatible = "qcom,qcs404-bimc"; + #interconnect-cells = <1>; + clock-names = "bus", "bus_a"; + clocks = <&rpmcc RPM_SMD_BIMC_CLK>, + <&rpmcc RPM_SMD_BIMC_A_CLK>; + }; + tsens: thermal-sensor@4a9000 { compatible = "qcom,qcs404-tsens", "qcom,tsens-v1"; reg = <0x004a9000 0x1000>, /* TM */ @@ -283,6 +293,24 @@ #thermal-sensor-cells = <1>; }; + pcnoc: interconnect@500000 { + reg = <0x00500000 0x15080>; + compatible = "qcom,qcs404-pcnoc"; + #interconnect-cells = <1>; + clock-names = "bus", "bus_a"; + clocks = <&rpmcc RPM_SMD_PNOC_CLK>, + <&rpmcc RPM_SMD_PNOC_A_CLK>; + }; + + snoc: interconnect@580000 { + reg = <0x00580000 0x23080>; + compatible = "qcom,qcs404-snoc"; + #interconnect-cells = <1>; + clock-names = "bus", "bus_a"; + clocks = <&rpmcc RPM_SMD_SNOC_CLK>, + <&rpmcc RPM_SMD_SNOC_A_CLK>; + }; + remoteproc_cdsp: remoteproc@b00000 { compatible = "qcom,qcs404-cdsp-pas"; reg = <0x00b00000 0x4040>;