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Wysocki" , Huang Rui CC: , , , , Shuah Khan , , "Nathan Fontenot" , Deepak Sharma , Alex Deucher , Mario Limonciello , Shimmer Huang , "Perry Yuan" , Xiaojian Du , Viresh Kumar , Borislav Petkov , Meng Li Subject: [PATCH V6 1/7] x86: Drop CPU_SUP_INTEL from SCHED_MC_PRIO for the expansion. Date: Fri, 8 Sep 2023 15:46:47 +0800 Message-ID: <20230908074653.2799055-2-li.meng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230908074653.2799055-1-li.meng@amd.com> References: <20230908074653.2799055-1-li.meng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044FD:EE_|PH0PR12MB7932:EE_ X-MS-Office365-Filtering-Correlation-Id: 3ab827c5-69cc-45ab-8a6e-08dbb03fe145 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: NGPR2d+JerP6QPGbcegK2t/Yq1ScgOd2O4ye33BrieA+vMFHSyDveff73RlKqr5/sMdfW3c52sfyiMKub7Lf+ZqDkbsJgEmUTLTomQ+p42F0L9EjaRfolc1+9NWdH2T7IT3HtTCPGOi9eB3/kvmslfsINOq15bPKBOKtKxbNXKDSmIe0eWRaYJI8ZEgQ3O+blGWtquNmWmdtbR1V39dYchQWOhNDKDAH6RWD3tw4S+QNMgkDgodFsajU7pP8Z932ZP11m3B16x72Ytm4Znpg5f5ufV9Webp328a0Wnb2Aj9HhaHX3wcSOFGhczZGZgsCUcZ83pVxiv27hf68rz1m/o2lthCBXY7V5A6/sw7xcqZUghvZfufdoeWB2vkMAubYK/KRqFPu3ICq9jat0zlpHh1BZJCMa+8X0Ww1QACsXHe63gug+LAthz9LOL7AQCOFQiqdFceC+hW4Ykc3WTyOOuAKwqDrY5kvTPHhzxnt8Tuy6GbiAkeqGqymXQDmy8nFo2gCSK+pQkGG7eIm31wFSCj1JzSZ/dw+JXgnB9LaQYO0JHM74dEB2VTZF8kvjTjaB8AKwcT/ui1uAlUfD1eoHuRSydlQiPQ1L35evOutUy5nj7uNa/+6ryARmYwy4jKvLJMjiy4NbaqeNBMgMtwN7kfyx/yB4rlWApPsUTH2aMkb+Ek/p3AR/kaOgRYe3JHnsXK2edX7rf5zl0+3jJt6KUoVSIfInARSrgvltAvAGVxaw1iK7V5UX4D/ZR4ZXM46HY3KsSLVek1Ny1qWnADWrg== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(396003)(136003)(376002)(346002)(39860400002)(451199024)(82310400011)(186009)(1800799009)(46966006)(40470700004)(36840700001)(4744005)(8936002)(8676002)(4326008)(478600001)(110136005)(70206006)(70586007)(5660300002)(83380400001)(40480700001)(41300700001)(2906002)(54906003)(86362001)(316002)(6636002)(6666004)(82740400003)(26005)(40460700003)(2616005)(356005)(1076003)(81166007)(16526019)(7696005)(426003)(336012)(47076005)(36860700001)(36756003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Sep 2023 07:47:41.0353 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3ab827c5-69cc-45ab-8a6e-08dbb03fe145 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044FD.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB7932 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org amd-pstate driver also uses SCHED_MC_PRIO, so decouple the requirement of CPU_SUP_INTEL from the dependencies to allow compilation in kernels without Intel CPU support. Reviewed-by: Mario Limonciello Signed-off-by: Meng Li --- arch/x86/Kconfig | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 982b777eadc7..5dd2a2fd4718 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1054,8 +1054,9 @@ config SCHED_MC config SCHED_MC_PRIO bool "CPU core priorities scheduler support" - depends on SCHED_MC && CPU_SUP_INTEL - select X86_INTEL_PSTATE + depends on SCHED_MC + select X86_INTEL_PSTATE if CPU_SUP_INTEL + select X86_AMD_PSTATE if CPU_SUP_AMD select CPU_FREQ default y help From patchwork Fri Sep 8 07:46:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Meng, Li \(Jassmine\)" X-Patchwork-Id: 721045 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC5D7EE57E1 for ; Fri, 8 Sep 2023 07:47:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235667AbjIHHr4 (ORCPT ); Fri, 8 Sep 2023 03:47:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242313AbjIHHrw (ORCPT ); Fri, 8 Sep 2023 03:47:52 -0400 Received: from NAM11-CO1-obe.outbound.protection.outlook.com (mail-co1nam11on2087.outbound.protection.outlook.com [40.107.220.87]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BDB7B19A6; Fri, 8 Sep 2023 00:47:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Ij3SrfY+wwP0AvHRD20LANpSAS83e0q8jT7FgkCReFb5Ct5rg1NnyUfRkPtlGf5+PEokxe9yI7hcqIpb/0UkOFUCoeuJ2vIJRrtNt2FeJYFWULTIxsvDPXG8PpEClNF/b66OxoSPVXn1ovcM/+w80LCitgvc1rVzm2F8gxWXAT1JNWvXiPgaaGLupMs3ld/JKLwOBEVFDWm7Yx1tBVxFBfK2ufYziG2etr7vL3EYQ0VXd42v3zju5lmXlPFgGETc8hdGpjz3rOmpPtL8eKKmX4n+d6C2+hvO6HTqHHqUK2be0RLh6pvQNM8CXjW0Knw3JJZM3TqBEK6XI1fePoS0cQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=fEcCw6Oy9jPjG9wxDtofg2lXKlE0XnBiGA6X7ukonQE=; b=eOvJZcMPixzezQXPlhnUsMAZ1Et4KIuYSHL/9hzkTwrBHIYKltGKNnwxA8AcNTVF/M+lRaF7jULaisICh68aVb8NC9EHonAgwCYy6mX72TjuwhaRhGxjBFx8PnNfnOrnK0NkrV/CMd/+Q12Nl/Lbjd/6ezf5JNEKugmyWI8JqRsqikkHkb/O42P0p/t0GFPsGREahtUEjcrkSEgetCPF2bGqyoh9FjJzyK8dw9H+/NRdEy3LKCOawweqVcLQH8IEwxpse6+MyOTZGXuEX8LQjWm06QsNBVdEZuG5m7t8PnjLXEzIxPu19b7McBxsjgpW/hmUlsl68tEWjQjYKWUENw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=fEcCw6Oy9jPjG9wxDtofg2lXKlE0XnBiGA6X7ukonQE=; b=gLa/7R2zFe9U6DkildloRvT2hGriRwTbj/CTbwz+9+NSXxKMKrNc/uIH02M7yZPziBo4L2PT9EF8bqh+P+8hI9sA6RonK1i6wLwj5N74CAqwFJc5F0UU4Ud46lY9zwLyuxgD14ZWc0xI05ycaM/+SoA8L4e7pWZtsHg3Y+CTtD8= Received: from MW4PR04CA0210.namprd04.prod.outlook.com (2603:10b6:303:86::35) by DS7PR12MB6143.namprd12.prod.outlook.com (2603:10b6:8:99::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6768.30; Fri, 8 Sep 2023 07:47:46 +0000 Received: from CO1PEPF000044FD.namprd21.prod.outlook.com (2603:10b6:303:86::4) by MW4PR04CA0210.outlook.office365.com (2603:10b6:303:86::35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6768.30 via Frontend Transport; Fri, 8 Sep 2023 07:47:45 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1PEPF000044FD.mail.protection.outlook.com (10.167.241.203) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6792.1 via Frontend Transport; Fri, 8 Sep 2023 07:47:45 +0000 Received: from jasmine-meng.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Fri, 8 Sep 2023 02:47:40 -0500 From: Meng Li To: "Rafael J . Wysocki" , Huang Rui CC: , , , , Shuah Khan , , "Nathan Fontenot" , Deepak Sharma , Alex Deucher , Mario Limonciello , Shimmer Huang , "Perry Yuan" , Xiaojian Du , Viresh Kumar , Borislav Petkov , Meng Li , Wyes Karny Subject: [PATCH V6 2/7] acpi: cppc: Add get the highest performance cppc control Date: Fri, 8 Sep 2023 15:46:48 +0800 Message-ID: <20230908074653.2799055-3-li.meng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230908074653.2799055-1-li.meng@amd.com> References: <20230908074653.2799055-1-li.meng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044FD:EE_|DS7PR12MB6143:EE_ X-MS-Office365-Filtering-Correlation-Id: 372681d0-7925-4457-2f16-08dbb03fe413 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: PK6wyKMTIYKPYUlmxv7SiZRtxi6wop/NbC0igtDj0rIUSAyVFlPK31mVnsc4ke/ZUtWs4k4XlyeVugk+QBu7FvNBPbXt3FHy6ojeGPtItk9mp6TBijQx31Oo3ZUTowfH0WKgkF1abjzQ4Bf+Dwn3qqnvkMYNANdD+SXY0tc1xxT7J64ky8NhjGq8xSI9B5fkvPpWuNXLMhwnb6RnCiYJ9VM6fiqFZeJ3o6G4DUAxkwaIB+Nx+caZC+iGGoY7pPEH2IYTNdYylo69o1JITnSPn80Az152kiHWTb5H/kePGl8pZUiaVPKc8QV0phr1Lh/XGHacFrIC77paosaeiDiIhFUkQkGv/lqwxDK/hilXuYqITCLcyygIjIesbWNHmBNP2T2tjXWvIjOi2WhU+Y42A/MAnc+9DTtjnxPLPBlFRFRHJ2+SRbjRnynqdpb50bwFlmknybayHRlxbpzlKsJGwsNkZYpLWjF5ZRipV+PkiUIIVZychLsmzI0h28rrD2GGZqvGFhb6pk78/R119N+tWt9cqfPEZ3xCPoMbJlxCUhywnovfDkyG5lElIrVLIT1drS2oqkUMG0RP1Ghio7sM/SmKcQBOZKnwjvt/vGAQWJFwGqGajLTPshSBuPVyxRr6mjaBc3sg0zX27yUK8vE6mcEFcd++glk8UsLbINk6t3itiuIORd6zaPPCAqdkwZa7PBbFKt1yf4N7HerUJWK+1ncHTkp8Y074W9PGSCiqRaA3lTLfcV25pmt8e0xHMQ+kGuqjuAAhgwFSUTuSmZ9r1b2voWSFFPOtkBKz5wuiW9E= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(346002)(136003)(396003)(39860400002)(376002)(1800799009)(186009)(82310400011)(451199024)(40470700004)(36840700001)(46966006)(7696005)(966005)(478600001)(1076003)(2616005)(26005)(336012)(16526019)(426003)(2906002)(54906003)(6636002)(316002)(70586007)(70206006)(110136005)(41300700001)(5660300002)(4326008)(8676002)(8936002)(40460700003)(82740400003)(40480700001)(47076005)(36860700001)(36756003)(86362001)(356005)(81166007)(15583001)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Sep 2023 07:47:45.7385 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 372681d0-7925-4457-2f16-08dbb03fe413 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044FD.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6143 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add support for getting the highest performance to the generic CPPC driver. This enables downstream drivers such as amd-pstate to discover and use these values. Please refer to the ACPI_Spec for details on continuous performance control of CPPC. Reviewed-by: Mario Limonciello Reviewed-by: Wyes Karny Acked-by: Huang Rui Signed-off-by: Meng Li Link: https://uefi.org/specs/ACPI/6.5/08_Processor_Configuration_and_Control.html?highlight=cppc#cpc-continuous-performance-control --- drivers/acpi/cppc_acpi.c | 13 +++++++++++++ include/acpi/cppc_acpi.h | 5 +++++ 2 files changed, 18 insertions(+) diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c index 7ff269a78c20..ad388a0e8484 100644 --- a/drivers/acpi/cppc_acpi.c +++ b/drivers/acpi/cppc_acpi.c @@ -1154,6 +1154,19 @@ int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf) return cppc_get_perf(cpunum, NOMINAL_PERF, nominal_perf); } +/** + * cppc_get_highest_perf - Get the highest performance register value. + * @cpunum: CPU from which to get highest performance. + * @highest_perf: Return address. + * + * Return: 0 for success, -EIO otherwise. + */ +int cppc_get_highest_perf(int cpunum, u64 *highest_perf) +{ + return cppc_get_perf(cpunum, HIGHEST_PERF, highest_perf); +} +EXPORT_SYMBOL_GPL(cppc_get_highest_perf); + /** * cppc_get_epp_perf - Get the epp register value. * @cpunum: CPU from which to get epp preference value. diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h index 6126c977ece0..c0b69ffe7bdb 100644 --- a/include/acpi/cppc_acpi.h +++ b/include/acpi/cppc_acpi.h @@ -139,6 +139,7 @@ struct cppc_cpudata { #ifdef CONFIG_ACPI_CPPC_LIB extern int cppc_get_desired_perf(int cpunum, u64 *desired_perf); extern int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf); +extern int cppc_get_highest_perf(int cpunum, u64 *highest_perf); extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs); extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls); extern int cppc_set_enable(int cpu, bool enable); @@ -165,6 +166,10 @@ static inline int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf) { return -ENOTSUPP; } +static inline int cppc_get_highest_perf(int cpunum, u64 *highest_perf) +{ + return -ENOTSUPP; +} static inline int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs) { return -ENOTSUPP; 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Wysocki" , Huang Rui CC: , , , , Shuah Khan , , "Nathan Fontenot" , Deepak Sharma , Alex Deucher , Mario Limonciello , Shimmer Huang , "Perry Yuan" , Xiaojian Du , Viresh Kumar , Borislav Petkov , Meng Li Subject: [PATCH V6 3/7] cpufreq: amd-pstate: Enable amd-pstate preferred core supporting. Date: Fri, 8 Sep 2023 15:46:49 +0800 Message-ID: <20230908074653.2799055-4-li.meng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230908074653.2799055-1-li.meng@amd.com> References: <20230908074653.2799055-1-li.meng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044FC:EE_|CYYPR12MB8963:EE_ X-MS-Office365-Filtering-Correlation-Id: 2621ce0d-be69-4010-4006-08dbb03fe708 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: H/rB8cwDC9dqOwVe+HBZx1X1d0wgXmm0yuZpdjc5AqR05o7LjNIjklzMCDkE4nITuXgycSpWb/cUGZZJQ5oG0ZLYpx51j1fbPGT7EyY7DOg4SKXV8CFbyKIQkVHU4aijpaApOPFBnLiD9BX9doe4H67iusdUa943AYi/lIcSFwPM52qM044dnoT55Pt3MFQjRmd8RspqQPdhjEvfZLHncTfUszuatGkrJMJ+/Zk2NUMqkxCOfcH7YdQIYw8S3TrSTkPC8Md5JXiCxay/7mdllwWOWQPRhkb/MtvvegUzWmXQD6R90KKga2BiF2GlFNyd8m2nGcpw2PoQ/vUneBYnJx/RbBh97lUSVptmhPmRwXz+6qiAJYNkWBpbNlH+dDU3hEE3hfLqJJFDsthGGoC2s8Uaj85DUw97RtGHwT5sDU4Jj55hdaY+cYqrVzKEsPJoPYce2xM2AjlPa8JTKgTYQEQTTxJs0fWW3aKU2IXljPc826yq05XaOVJ9dEc4hKTwwxAa7Qvu9eKxq27zV97BoHmG7W5r+9lqa7CF4QWtB3Lnz4GO4FZ506C3/Cz19YgL24Uss95+0yt8LMfnGV+Lda+2PXnqhBCUnep4B8V2KbOD7hhf+K+qI5dgVy8NRzRh0T/TgEcXigi+LFyrGJZwmnWP2rqeMTWy/tuECH+cCwjBHfnCS+ky9p5wHg4jmWnicr6CjHcu/IsdtoAdWNnvJwylgp1eJdnoI+2nqeCgMcPaHewkCbvemJ3aXLYpVo+iY6KjJG9f6cpAfSCy/+PhpQ== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(346002)(136003)(396003)(39860400002)(376002)(1800799009)(186009)(82310400011)(451199024)(40470700004)(36840700001)(46966006)(7696005)(478600001)(83380400001)(1076003)(2616005)(26005)(336012)(16526019)(426003)(2906002)(54906003)(6636002)(316002)(70586007)(70206006)(110136005)(41300700001)(5660300002)(4326008)(8676002)(8936002)(40460700003)(82740400003)(40480700001)(47076005)(36860700001)(36756003)(86362001)(356005)(81166007)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Sep 2023 07:47:50.7156 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2621ce0d-be69-4010-4006-08dbb03fe708 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044FC.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB8963 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org amd-pstate driver utilizes the functions and data structures provided by the ITMT architecture to enable the scheduler to favor scheduling on cores which can be get a higher frequency with lower voltage. We call it amd-pstate preferrred core. Here sched_set_itmt_core_prio() is called to set priorities and sched_set_itmt_support() is called to enable ITMT feature. amd-pstate driver uses the highest performance value to indicate the priority of CPU. The higher value has a higher priority. The initial core rankings are set up by amd-pstate when the system boots. Add device attribute for hardware preferred core. It will check if the processor and power firmware support preferred core feature. Add device attribute for preferred core. Only when hardware supports preferred core and user set `enabled` in early parameter, it can be set to enabled. Add one new early parameter `disable` to allow user to disable the preferred core. Reviewed-by: Mario Limonciello Co-developed-by: Perry Yuan Signed-off-by: Perry Yuan Signed-off-by: Meng Li --- drivers/cpufreq/amd-pstate.c | 125 ++++++++++++++++++++++++++++++----- 1 file changed, 109 insertions(+), 16 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 9a1e194d5cf8..c71a91321384 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -37,6 +37,7 @@ #include #include #include +#include #include #include @@ -49,6 +50,8 @@ #define AMD_PSTATE_TRANSITION_LATENCY 20000 #define AMD_PSTATE_TRANSITION_DELAY 1000 +#define AMD_PSTATE_PREFCORE_THRESHOLD 166 +#define AMD_PSTATE_MAX_CPPC_PERF 255 /* * TODO: We need more time to fine tune processors with shared memory solution @@ -65,6 +68,12 @@ static struct cpufreq_driver amd_pstate_epp_driver; static int cppc_state = AMD_PSTATE_UNDEFINED; static bool cppc_enabled; +/*HW preferred Core featue is supported*/ +static bool hw_prefcore = true; + +/*Preferred Core featue is supported*/ +static bool prefcore = true; + /* * AMD Energy Preference Performance (EPP) * The EPP is used in the CCLK DPM controller to drive @@ -290,23 +299,21 @@ static inline int amd_pstate_enable(bool enable) static int pstate_init_perf(struct amd_cpudata *cpudata) { u64 cap1; - u32 highest_perf; int ret = rdmsrl_safe_on_cpu(cpudata->cpu, MSR_AMD_CPPC_CAP1, &cap1); if (ret) return ret; - /* - * TODO: Introduce AMD specific power feature. - * - * CPPC entry doesn't indicate the highest performance in some ASICs. + /* For platforms that do not support the preferred core feature, the + * highest_pef may be configured with 166 or 255, to avoid max frequency + * calculated wrongly. we take the AMD_CPPC_HIGHEST_PERF(cap1) value as + * the default max perf. */ - highest_perf = amd_get_highest_perf(); - if (highest_perf > AMD_CPPC_HIGHEST_PERF(cap1)) - highest_perf = AMD_CPPC_HIGHEST_PERF(cap1); - - WRITE_ONCE(cpudata->highest_perf, highest_perf); + if (hw_prefcore) + WRITE_ONCE(cpudata->highest_perf, AMD_PSTATE_PREFCORE_THRESHOLD); + else + WRITE_ONCE(cpudata->highest_perf, AMD_CPPC_HIGHEST_PERF(cap1)); WRITE_ONCE(cpudata->nominal_perf, AMD_CPPC_NOMINAL_PERF(cap1)); WRITE_ONCE(cpudata->lowest_nonlinear_perf, AMD_CPPC_LOWNONLIN_PERF(cap1)); @@ -318,17 +325,15 @@ static int pstate_init_perf(struct amd_cpudata *cpudata) static int cppc_init_perf(struct amd_cpudata *cpudata) { struct cppc_perf_caps cppc_perf; - u32 highest_perf; int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); if (ret) return ret; - highest_perf = amd_get_highest_perf(); - if (highest_perf > cppc_perf.highest_perf) - highest_perf = cppc_perf.highest_perf; - - WRITE_ONCE(cpudata->highest_perf, highest_perf); + if (hw_prefcore) + WRITE_ONCE(cpudata->highest_perf, AMD_PSTATE_PREFCORE_THRESHOLD); + else + WRITE_ONCE(cpudata->highest_perf, cppc_perf.highest_perf); WRITE_ONCE(cpudata->nominal_perf, cppc_perf.nominal_perf); WRITE_ONCE(cpudata->lowest_nonlinear_perf, @@ -676,6 +681,74 @@ static void amd_perf_ctl_reset(unsigned int cpu) wrmsrl_on_cpu(cpu, MSR_AMD_PERF_CTL, 0); } +/* + * Set amd-pstate preferred core enable can't be done directly from cpufreq callbacks + * due to locking, so queue the work for later. + */ +static void amd_pstste_sched_prefcore_workfn(struct work_struct *work) +{ + sched_set_itmt_support(); +} +static DECLARE_WORK(sched_prefcore_work, amd_pstste_sched_prefcore_workfn); + +/* + * Get the highest performance register value. + * @cpu: CPU from which to get highest performance. + * @highest_perf: Return address. + * + * Return: 0 for success, -EIO otherwise. + */ +static int amd_pstate_get_highest_perf(int cpu, u64 *highest_perf) +{ + int ret; + + if (boot_cpu_has(X86_FEATURE_CPPC)) { + u64 cap1; + + ret = rdmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &cap1); + if (ret) + return ret; + WRITE_ONCE(*highest_perf, AMD_CPPC_HIGHEST_PERF(cap1)); + } else { + ret = cppc_get_highest_perf(cpu, highest_perf); + } + + return (ret); +} + +static void amd_pstate_init_prefcore(void) +{ + int cpu, ret; + u64 highest_perf; + + if (!prefcore) + return; + + for_each_online_cpu(cpu) { + ret = amd_pstate_get_highest_perf(cpu, &highest_perf); + if (ret) + break; + + sched_set_itmt_core_prio(highest_perf, cpu); + + /* check if CPPC preferred core feature is enabled*/ + if (highest_perf == AMD_PSTATE_MAX_CPPC_PERF) { + pr_debug("AMD CPPC preferred core is unsupported!\n"); + hw_prefcore = false; + prefcore = false; + return; + } + } + + /* + * This code can be run during CPU online under the + * CPU hotplug locks, so sched_set_amd_prefcore_support() + * cannot be called from here. Queue up a work item + * to invoke it. + */ + schedule_work(&sched_prefcore_work); +} + static int amd_pstate_cpu_init(struct cpufreq_policy *policy) { int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret; @@ -1037,6 +1110,12 @@ static ssize_t status_store(struct device *a, struct device_attribute *b, return ret < 0 ? ret : count; } +static ssize_t prefcore_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + return sysfs_emit(buf, "%s\n", prefcore ? "enabled" : "disabled"); +} + cpufreq_freq_attr_ro(amd_pstate_max_freq); cpufreq_freq_attr_ro(amd_pstate_lowest_nonlinear_freq); @@ -1044,6 +1123,7 @@ cpufreq_freq_attr_ro(amd_pstate_highest_perf); cpufreq_freq_attr_rw(energy_performance_preference); cpufreq_freq_attr_ro(energy_performance_available_preferences); static DEVICE_ATTR_RW(status); +static DEVICE_ATTR_RO(prefcore); static struct freq_attr *amd_pstate_attr[] = { &amd_pstate_max_freq, @@ -1063,6 +1143,7 @@ static struct freq_attr *amd_pstate_epp_attr[] = { static struct attribute *pstate_global_attributes[] = { &dev_attr_status.attr, + &dev_attr_prefcore.attr, NULL }; @@ -1506,6 +1587,8 @@ static int __init amd_pstate_init(void) } } + amd_pstate_init_prefcore(); + return ret; global_attr_free: @@ -1527,7 +1610,17 @@ static int __init amd_pstate_param(char *str) return amd_pstate_set_driver(mode_idx); } + +static int __init amd_prefcore_param(char *str) +{ + if (!strcmp(str, "disable")) + prefcore = false; + + return 0; +} + early_param("amd_pstate", amd_pstate_param); +early_param("amd_prefcore", amd_prefcore_param); MODULE_AUTHOR("Huang Rui "); MODULE_DESCRIPTION("AMD Processor P-state Frequency Driver"); From patchwork Fri Sep 8 07:46:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Meng, Li \(Jassmine\)" X-Patchwork-Id: 721044 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 391C7EE57E2 for ; Fri, 8 Sep 2023 07:48:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242538AbjIHHsK (ORCPT ); Fri, 8 Sep 2023 03:48:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236539AbjIHHsJ (ORCPT ); Fri, 8 Sep 2023 03:48:09 -0400 Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2076.outbound.protection.outlook.com [40.107.243.76]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9393D19A6; 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Wysocki" , Huang Rui CC: , , , , Shuah Khan , , "Nathan Fontenot" , Deepak Sharma , Alex Deucher , Mario Limonciello , Shimmer Huang , "Perry Yuan" , Xiaojian Du , Viresh Kumar , Borislav Petkov , Meng Li Subject: [PATCH V6 4/7] cpufreq: Add a notification message that the highest perf has changed Date: Fri, 8 Sep 2023 15:46:50 +0800 Message-ID: <20230908074653.2799055-5-li.meng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230908074653.2799055-1-li.meng@amd.com> References: <20230908074653.2799055-1-li.meng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044FC:EE_|SA1PR12MB7038:EE_ X-MS-Office365-Filtering-Correlation-Id: 194781e2-cfdc-47a2-48e4-08dbb03fe97b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: w7MZyPIsOK4MeSjL8ZLsBbL4RqgUaPcZ64VeqUjXPuqq9F7LS6KbBi+WbuoUub/gYt000HfjSDWr02IA4pA2Iodi/XXtC4q78RGgYyWkX/XxzmE/z6UoZUZ95PT7lGuNrsu3P9Lgz9oloWKx+VQLIsBu43piMvgUT+Rp9YVs1gpn/KY/z2+SC/qfqj9zUGrVg363b3vzf6bnGA1a145KDOqPSHIUTGzSZq04MlLDg5v9MPK7NpS5LGUVDsoM9IbvED0bwwoJOzBFYhrdLdgGzlm/zVYLcRgP2/M+tA8U/lDV4DQybIuDCZ0ygDuauqkQu7Mdsold0GyJmqPPjdw9ZFDQs2MOMkgzPydnPODr3uoxAWIt1Z0u55qGrql2AwGX/AyX5hKZ7Ld4MMOrCDoYdWdjK38yn25qWbiET/1530IvewwIvRummf736929+KSVMzyicuXx0fqCF9GzrUnZ6jmGvQL++X8LscH9CKf3Np/WaiMK6MJ0hvbFhQUcectVbBL7CCibOZuDJ78m/1StJBk8CB1k5319Fr4Q3QeBaB+e2au9SK//cGMjAWgW7nqjaDNQ8ZDA1fdx6As49lWNvnt5z/LWd6zec1o9QekY+OLNNBQn3hIBmOPM5pB8Ep1o8IG2qlzkM4kPqegsJ7l2u1tBEpbXi0Hmvv2VlGfCQpK0B5ZVe+qAQDZdyWaIbhvhj5f3ul1keONNG2sce0UaB0fLfrEzjxZdO9h7X9SrF9cTou72XKRXhck8bV7S0Z5g4izvLCc6ZlxJFvv5c/TLjLDvrha1kGEcwRYisKJtY/8= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(396003)(136003)(376002)(346002)(39860400002)(451199024)(82310400011)(186009)(1800799009)(46966006)(40470700004)(36840700001)(15650500001)(966005)(8936002)(8676002)(4326008)(478600001)(110136005)(70206006)(70586007)(5660300002)(83380400001)(40480700001)(41300700001)(2906002)(54906003)(86362001)(316002)(6636002)(82740400003)(26005)(40460700003)(2616005)(356005)(1076003)(81166007)(16526019)(7696005)(426003)(336012)(47076005)(36860700001)(36756003)(226483002)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Sep 2023 07:47:54.8093 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 194781e2-cfdc-47a2-48e4-08dbb03fe97b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044FC.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7038 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org ACPI 6.5 section 8.4.6.1.1.1 specifies that Notify event 0x85 can be emmitted to cause the the OSPM to re-evaluate the highest performance register. Add support for this event. Signed-off-by: Meng Li Link: https://uefi.org/specs/ACPI/6.5/08_Processor_Configuration_and_Control.html?highlight=cppc#cpc-continuous-performance-control --- drivers/acpi/processor_driver.c | 6 ++++++ drivers/cpufreq/cpufreq.c | 13 +++++++++++++ include/linux/cpufreq.h | 5 +++++ 3 files changed, 24 insertions(+) diff --git a/drivers/acpi/processor_driver.c b/drivers/acpi/processor_driver.c index 4bd16b3f0781..29b2fb68a35d 100644 --- a/drivers/acpi/processor_driver.c +++ b/drivers/acpi/processor_driver.c @@ -27,6 +27,7 @@ #define ACPI_PROCESSOR_NOTIFY_PERFORMANCE 0x80 #define ACPI_PROCESSOR_NOTIFY_POWER 0x81 #define ACPI_PROCESSOR_NOTIFY_THROTTLING 0x82 +#define ACPI_PROCESSOR_NOTIFY_HIGEST_PERF_CHANGED 0x85 MODULE_AUTHOR("Paul Diefenbaugh"); MODULE_DESCRIPTION("ACPI Processor Driver"); @@ -83,6 +84,11 @@ static void acpi_processor_notify(acpi_handle handle, u32 event, void *data) acpi_bus_generate_netlink_event(device->pnp.device_class, dev_name(&device->dev), event, 0); break; + case ACPI_PROCESSOR_NOTIFY_HIGEST_PERF_CHANGED: + cpufreq_update_highest_perf(pr->id); + acpi_bus_generate_netlink_event(device->pnp.device_class, + dev_name(&device->dev), event, 0); + break; default: acpi_handle_debug(handle, "Unsupported event [0x%x]\n", event); break; diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c index 60ed89000e82..4ada787ff105 100644 --- a/drivers/cpufreq/cpufreq.c +++ b/drivers/cpufreq/cpufreq.c @@ -2718,6 +2718,19 @@ void cpufreq_update_limits(unsigned int cpu) } EXPORT_SYMBOL_GPL(cpufreq_update_limits); +/** + * cpufreq_update_highest_perf - Update highest performance for a given CPU. + * @cpu: CPU to update the highest performance for. + * + * Invoke the driver's ->update_highest_perf callback if present + */ +void cpufreq_update_highest_perf(unsigned int cpu) +{ + if (cpufreq_driver->update_highest_perf) + cpufreq_driver->update_highest_perf(cpu); +} +EXPORT_SYMBOL_GPL(cpufreq_update_highest_perf); + /********************************************************************* * BOOST * *********************************************************************/ diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h index 71d186d6933a..1cc1241fb698 100644 --- a/include/linux/cpufreq.h +++ b/include/linux/cpufreq.h @@ -235,6 +235,7 @@ int cpufreq_get_policy(struct cpufreq_policy *policy, unsigned int cpu); void refresh_frequency_limits(struct cpufreq_policy *policy); void cpufreq_update_policy(unsigned int cpu); void cpufreq_update_limits(unsigned int cpu); +void cpufreq_update_highest_perf(unsigned int cpu); bool have_governor_per_policy(void); bool cpufreq_supports_freq_invariance(void); struct kobject *get_governor_parent_kobj(struct cpufreq_policy *policy); @@ -263,6 +264,7 @@ static inline bool cpufreq_supports_freq_invariance(void) return false; } static inline void disable_cpufreq(void) { } +static inline void cpufreq_update_highest_perf(unsigned int cpu) { } #endif #ifdef CONFIG_CPU_FREQ_STAT @@ -380,6 +382,9 @@ struct cpufreq_driver { /* Called to update policy limits on firmware notifications. */ void (*update_limits)(unsigned int cpu); + /* Called to update highest performance on firmware notifications. */ + void (*update_highest_perf)(unsigned int cpu); + /* optional */ int (*bios_limit)(int cpu, unsigned int *limit); From patchwork Fri Sep 8 07:46:51 2023 Content-Type: text/plain; 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Wysocki" , Huang Rui CC: , , , , Shuah Khan , , "Nathan Fontenot" , Deepak Sharma , Alex Deucher , Mario Limonciello , Shimmer Huang , "Perry Yuan" , Xiaojian Du , Viresh Kumar , Borislav Petkov , Meng Li , Wyes Karny Subject: [PATCH V6 5/7] cpufreq: amd-pstate: Update amd-pstate preferred core ranking dynamically Date: Fri, 8 Sep 2023 15:46:51 +0800 Message-ID: <20230908074653.2799055-6-li.meng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230908074653.2799055-1-li.meng@amd.com> References: <20230908074653.2799055-1-li.meng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044FC:EE_|PH0PR12MB7789:EE_ X-MS-Office365-Filtering-Correlation-Id: 32c97e22-0a32-4cfa-3914-08dbb03fec57 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: AgmLBK3HCU4F2YfeJhWaqY+3DnLmRs/zd48Dg0Z6Lb3oRkdVAwJKluFo5Ju0Mc4y9FWHM57cMGe7/4iqwTgbkY34oLrXzhO7OPJvLxDVVzJZpUOQ2Td3LievJKiQP8Lxi6NXgZ69vEBPF7d96CTABuzkUYycPWdDwZ9IG30Y9hw9QTQiU028twqra/vKF7veU3iASfBeI/x0TzdOwrkfQ5o4KjyMOkeMhJVB2DI105NwwZZiVMCkmv4onXljczL+Bn3kBpKY5RvZoj0e38FSFtNz+Vy2zjID4ifVW/QLVl05/QOX0zEB/MHO/VPS6hKgWairddHSdB3OZXwPsEMDQ2v7Kd19xdk2dbiUVdFHaZBhf/QGEvvhbdUvTkkvdpV594xEiEDx9fU3mfyYhmlQ572meZVujnCPBVLvWMQuFfkKOwCSrYSdH/NlyU3UmL1L17VwgEeq7ido2jevDDgQSblFA5jM594l0t38x/jVaSXPkjzVNQfE+/7euExHWI1ZeNn1ulzF07q7t/lo65AzMufdoZO+uvV3RaDAme51EfNAttv1zHtAYITGLP4STQJTljfUz1PzZdgyy6sQC97tjBt+aw5w1Sfxg1y0lflcXnvjbxAEWSQr0nbV6NcMYKWyag7fqKqSFzu7tkULkVogi6Pvsw29O2O2a8XaR6crmDtDX22I3SGoI74+zU6m/DIQciv1jt3gPbnxx2chy77EBuI2GnXYIOBmsmzgDRKi3r2rMAnJ5x+gsOrM7VFeqcRyw1rC0UuDv9VhuiQYpz+aLQ== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(396003)(346002)(39860400002)(376002)(136003)(186009)(1800799009)(82310400011)(451199024)(40470700004)(46966006)(36840700001)(7696005)(40460700003)(41300700001)(66899024)(316002)(81166007)(82740400003)(36756003)(2906002)(478600001)(86362001)(356005)(110136005)(70206006)(54906003)(70586007)(6636002)(6666004)(15650500001)(40480700001)(83380400001)(2616005)(5660300002)(1076003)(47076005)(8936002)(4326008)(8676002)(16526019)(26005)(426003)(336012)(36860700001)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Sep 2023 07:47:59.6218 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 32c97e22-0a32-4cfa-3914-08dbb03fec57 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044FC.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB7789 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Preferred core rankings can be changed dynamically by the platform based on the workload and platform conditions and accounting for thermals and aging. When this occurs, cpu priority need to be set. Signed-off-by: Meng Li Reviewed-by: Wyes Karny --- drivers/cpufreq/amd-pstate.c | 36 ++++++++++++++++++++++++++++++++++-- include/linux/amd-pstate.h | 6 ++++++ 2 files changed, 40 insertions(+), 2 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index c71a91321384..1c1a76b5ca58 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -318,6 +318,7 @@ static int pstate_init_perf(struct amd_cpudata *cpudata) WRITE_ONCE(cpudata->nominal_perf, AMD_CPPC_NOMINAL_PERF(cap1)); WRITE_ONCE(cpudata->lowest_nonlinear_perf, AMD_CPPC_LOWNONLIN_PERF(cap1)); WRITE_ONCE(cpudata->lowest_perf, AMD_CPPC_LOWEST_PERF(cap1)); + WRITE_ONCE(cpudata->prefcore_ranking, AMD_CPPC_HIGHEST_PERF(cap1)); return 0; } @@ -339,6 +340,7 @@ static int cppc_init_perf(struct amd_cpudata *cpudata) WRITE_ONCE(cpudata->lowest_nonlinear_perf, cppc_perf.lowest_nonlinear_perf); WRITE_ONCE(cpudata->lowest_perf, cppc_perf.lowest_perf); + WRITE_ONCE(cpudata->prefcore_ranking, cppc_perf.highest_perf); if (cppc_state == AMD_PSTATE_ACTIVE) return 0; @@ -545,7 +547,7 @@ static void amd_pstate_adjust_perf(unsigned int cpu, if (target_perf < capacity) des_perf = DIV_ROUND_UP(cap_perf * target_perf, capacity); - min_perf = READ_ONCE(cpudata->highest_perf); + min_perf = READ_ONCE(cpudata->lowest_perf); if (_min_perf < capacity) min_perf = DIV_ROUND_UP(cap_perf * _min_perf, capacity); @@ -749,6 +751,34 @@ static void amd_pstate_init_prefcore(void) schedule_work(&sched_prefcore_work); } +static void amd_pstate_update_highest_perf(unsigned int cpu) +{ + struct cpufreq_policy *policy; + struct amd_cpudata *cpudata; + u32 prev_high = 0, cur_high = 0; + u64 highest_perf; + int ret; + + if (!prefcore) + return; + + ret = amd_pstate_get_highest_perf(cpu, &highest_perf); + if (ret) + return; + + policy = cpufreq_cpu_get(cpu); + cpudata = policy->driver_data; + cur_high = highest_perf; + prev_high = READ_ONCE(cpudata->prefcore_ranking); + + if (prev_high != cur_high) { + WRITE_ONCE(cpudata->prefcore_ranking, cur_high); + sched_set_itmt_core_prio(cur_high, cpu); + } + + cpufreq_cpu_put(policy); +} + static int amd_pstate_cpu_init(struct cpufreq_policy *policy) { int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret; @@ -913,7 +943,7 @@ static ssize_t show_amd_pstate_highest_perf(struct cpufreq_policy *policy, u32 perf; struct amd_cpudata *cpudata = policy->driver_data; - perf = READ_ONCE(cpudata->highest_perf); + perf = READ_ONCE(cpudata->prefcore_ranking); return sysfs_emit(buf, "%u\n", perf); } @@ -1473,6 +1503,7 @@ static struct cpufreq_driver amd_pstate_driver = { .suspend = amd_pstate_cpu_suspend, .resume = amd_pstate_cpu_resume, .set_boost = amd_pstate_set_boost, + .update_highest_perf = amd_pstate_update_highest_perf, .name = "amd-pstate", .attr = amd_pstate_attr, }; @@ -1487,6 +1518,7 @@ static struct cpufreq_driver amd_pstate_epp_driver = { .online = amd_pstate_epp_cpu_online, .suspend = amd_pstate_epp_suspend, .resume = amd_pstate_epp_resume, + .update_highest_perf = amd_pstate_update_highest_perf, .name = "amd-pstate-epp", .attr = amd_pstate_epp_attr, }; diff --git a/include/linux/amd-pstate.h b/include/linux/amd-pstate.h index 446394f84606..030a6a97c2b9 100644 --- a/include/linux/amd-pstate.h +++ b/include/linux/amd-pstate.h @@ -39,11 +39,16 @@ struct amd_aperf_mperf { * @cppc_req_cached: cached performance request hints * @highest_perf: the maximum performance an individual processor may reach, * assuming ideal conditions + * For platforms that do not support the preferred core feature, the + * highest_pef may be configured with 166 or 255, to avoid max frequency + * calculated wrongly. we take the fixed value as the highest_perf. * @nominal_perf: the maximum sustained performance level of the processor, * assuming ideal operating conditions * @lowest_nonlinear_perf: the lowest performance level at which nonlinear power * savings are achieved * @lowest_perf: the absolute lowest performance level of the processor + * @prefcore_ranking: the preferred core ranking, the higher value indicates a higher + * priority. * @max_freq: the frequency that mapped to highest_perf * @min_freq: the frequency that mapped to lowest_perf * @nominal_freq: the frequency that mapped to nominal_perf @@ -70,6 +75,7 @@ struct amd_cpudata { u32 nominal_perf; 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Fri, 8 Sep 2023 07:48:03 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1PEPF000044FC.mail.protection.outlook.com (10.167.241.202) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6792.1 via Frontend Transport; Fri, 8 Sep 2023 07:48:03 +0000 Received: from jasmine-meng.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Fri, 8 Sep 2023 02:47:59 -0500 From: Meng Li To: "Rafael J . Wysocki" , Huang Rui CC: , , , , Shuah Khan , , "Nathan Fontenot" , Deepak Sharma , Alex Deucher , Mario Limonciello , Shimmer Huang , "Perry Yuan" , Xiaojian Du , Viresh Kumar , Borislav Petkov , Meng Li Subject: [PATCH V6 6/7] Documentation: amd-pstate: introduce amd-pstate preferred core Date: Fri, 8 Sep 2023 15:46:52 +0800 Message-ID: <20230908074653.2799055-7-li.meng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230908074653.2799055-1-li.meng@amd.com> References: <20230908074653.2799055-1-li.meng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044FC:EE_|SJ0PR12MB6829:EE_ X-MS-Office365-Filtering-Correlation-Id: 59f5bd56-b4f6-4972-a604-08dbb03feead X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: x0a0n9L5Ke0oxVVje9azBwqkLNl7jz0RGXW3aFUTDgGPMHZKX5EXz32PN8V65HAoWI7hriZ1XdtoQrOmZdBl9YZckjtjfdrN1Q7BXYjbxXXcImtG9ikg39Jcg74uzE0/h+NVkx3DDxAQv33uTC5FTnwFDa8kkvI3nftPdBi9g0OQf4wY7y/FqqO0w3O3IqR4oDFFEk0iqOrutiIwFlL6tdzSJ94CZRkLCXOCQy6AG2lGKNHeO4BGdjnyFMBcg6KeJ0GMqTQIhTE/RbDKci9vawq3sFZje2XabfiM6KzED9tls8ak9NFoyiznDaGvOl260BGvFQygdoKPxgTEay+U11FnpjUa44rxU0dzg33JcpdGqPQzr5bQZjr3ZDLvijtzUvrg20e0fyTB8+T6U8adVq4XJekwdliLPaVKxUA7kml00tRr28msK7C8uTLz0VLwM4DSl1eLAEpcPkZicVLDtzN3R16r6SfjeDTEJ0QM5TWzJQ/BAQnIa16PZCG6GULe0t3hSISJd2o0+PsnuvWvDMhcLlddIrYxPx9fe/P1+vrv8BCgbrgF6FL88RjjJpeevWzpddnRMCaEuQNOtD587MJ3RN4mP8UImaaD7sumYBWoeD6eb37MmFqUwL99ItFbHrDDCBPKu45ssRfHOVJCklqGvg/kCwhVkhKZbQ4s6tNNZ3cdK8jxiYNNyfEve4Ba8rGilpX+eo0CnlV02HOjjExsgOANECFRRz9YZZ/U57R3tO1S4/Rx7/3PyJsMZEkkYtI0rS9A95ZRgtBlVmaorg== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(396003)(346002)(39860400002)(376002)(136003)(186009)(1800799009)(82310400011)(451199024)(40470700004)(46966006)(36840700001)(7696005)(40460700003)(41300700001)(316002)(81166007)(82740400003)(36756003)(2906002)(478600001)(86362001)(356005)(110136005)(70206006)(54906003)(70586007)(6636002)(6666004)(40480700001)(83380400001)(2616005)(5660300002)(1076003)(47076005)(8936002)(4326008)(8676002)(16526019)(26005)(426003)(336012)(36860700001)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Sep 2023 07:48:03.5436 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 59f5bd56-b4f6-4972-a604-08dbb03feead X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044FC.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB6829 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Introduce amd-pstate preferred core. check preferred core state: $ cat /sys/devices/system/cpu/amd-pstate/prefcore Signed-off-by: Meng Li --- Documentation/admin-guide/pm/amd-pstate.rst | 58 ++++++++++++++++++++- 1 file changed, 56 insertions(+), 2 deletions(-) diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst index 1cf40f69278c..b729bc6dabd8 100644 --- a/Documentation/admin-guide/pm/amd-pstate.rst +++ b/Documentation/admin-guide/pm/amd-pstate.rst @@ -300,8 +300,8 @@ platforms. The AMD P-States mechanism is the more performance and energy efficiency frequency management method on AMD processors. -AMD Pstate Driver Operation Modes -================================= +``amd-pstate`` Driver Operation Modes +====================================== ``amd_pstate`` CPPC has 3 operation modes: autonomous (active) mode, non-autonomous (passive) mode and guided autonomous (guided) mode. @@ -353,6 +353,48 @@ is activated. In this mode, driver requests minimum and maximum performance level and the platform autonomously selects a performance level in this range and appropriate to the current workload. +``amd-pstate`` Preferred Core +================================= + +The core frequency is subjected to the process variation in semiconductors. +Not all cores are able to reach the maximum frequency respecting the +infrastructure limits. Consequently, AMD has redefined the concept of +maximum frequency of a part. This means that a fraction of cores can reach +maximum frequency. To find the best process scheduling policy for a given +scenario, OS needs to know the core ordering informed by the platform through +highest performance capability register of the CPPC interface. + +``amd-pstate`` preferred core enables the scheduler to prefer scheduling on +cores that can achieve a higher frequency with lower voltage. The preferred +core rankings can dynamically change based on the workload, platform conditions, +thermals and ageing. + +The priority metric will be initialized by the ``amd-pstate`` driver. The ``amd-pstate`` +driver will also determine whether or not ``amd-pstate`` preferred core is +supported by the platform. + +``amd-pstate`` driver will provide an initial core ordering when the system boots. +The platform uses the CPPC interfaces to communicate the core ranking to the +operating system and scheduler to make sure that OS is choosing the cores +with highest performance firstly for scheduling the process. When ``amd-pstate`` +driver receives a message with the highest performance change, it will +update the core ranking and set the cpu's priority. + +``amd-pstate`` Preferred Core Switch +================================= +Kernel Parameters +----------------- + +``amd-pstate`` peferred core`` has two states: enable and disable. +Enable/disable states can be chosen by different kernel parameters. +Default enable ``amd-pstate`` preferred core. + +``amd_prefcore=disable`` + +For systems that support ``amd-pstate`` preferred core, the core rankings will +always be advertised by the platform. But OS can choose to ignore that via the +kernel parameter ``amd_prefcore=disable``. + User Space Interface in ``sysfs`` - General =========================================== @@ -385,6 +427,18 @@ control its functionality at the system level. They are located in the to the operation mode represented by that string - or to be unregistered in the "disable" case. +``prefcore`` + Preferred core state of the driver: "enabled" or "disabled". + + "enabled" + Enable the ``amd-pstate`` preferred core. + + "disabled" + Disable the ``amd-pstate`` preferred core + + + This attribute is read-only to check the state of preferred core. + ``cpupower`` tool support for ``amd-pstate`` =============================================== From patchwork Fri Sep 8 07:46:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Meng, Li \(Jassmine\)" X-Patchwork-Id: 722027 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E72DFEE57E3 for ; Fri, 8 Sep 2023 07:49:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235984AbjIHHtC (ORCPT ); Fri, 8 Sep 2023 03:49:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235651AbjIHHtC (ORCPT ); Fri, 8 Sep 2023 03:49:02 -0400 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2087.outbound.protection.outlook.com [40.107.93.87]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ADA241BEE; Fri, 8 Sep 2023 00:48:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=j4j3MFY4tU7S3cQy8jq5UPnQtM9p85IKe/mN130QzfE+OxP9oFj9LoNTWjBf2gqY4kc6p0KnoQzRfwhWjRDuI5mQvgsShroZQug1NidE4IpVkwFn6BZxrYWXyL7AeY3JCVv+Y3O11nRwjTgcHwd1f+BpTsELuNoLibammizgkDELg/pcXhG0/qwofJHZU57JOinbTtOyJePos0P+5AEZV8b5gmsJpGUY1sM56+5ymfkNEjqXdHh0Zx09vhwsy6R3TJFGy8lU1X41r/OvwdQplCwr+nsFXH6RTWmsTZJ+uXkHSHx4bNFHlS7VOd4vCUN0qxy8ts0AblRH+a3pQ89/VQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=g494rm/WucGNct/HgYJq9c6LXzNLWaO7uYjU96lfJiI=; b=RuaJ2UBJjsIFWG5fdD7kr6xO8c1/yJLIl4QoiLKi+t5JqmUq/1j+S0LG+37IxsWUEx2VwRiwG/2a0UsgNqMvKT0TCCoRn+wwa4YrI2ec9n4tyiXOlfhQ9/uL4u5GwD+jkzJ3JQhhN5MlyaSMbmRUI9KAOvWb6uKigE5t463woD06QS2x8N7AKf3KbIPPUhIwEhoeNvbJqb6oq32/qSrj4l48tV2cAcsnk+hJ8Mqhky9yPpUkSqoijinUa2sqX/DNtEdxk6bVpmgURJvddTYXsIbkH9AoijtJX5uiIaQG0NvD96Xh151iEsXzH6nq8nXUAhFGsNxgN/hc9iW4t5sOYQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=g494rm/WucGNct/HgYJq9c6LXzNLWaO7uYjU96lfJiI=; b=AqYwoHBTFLFEnBemvtiFlqaKnEtvqi2d8dmrKOOiylWswGpWTanWd11VwgZ28Zuzf01YXQfJ+5LExjOHmfj2NEBX8KPo6AmFsId6wV1I/VFwMFhQxeMxe8xM00cHSjf+zxmU7u8KXZPCY4RN+prP634FPPBK2IX0Fsa/06LlO2M= Received: from DS7PR03CA0226.namprd03.prod.outlook.com (2603:10b6:5:3ba::21) by PH0PR12MB5435.namprd12.prod.outlook.com (2603:10b6:510:ed::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6768.30; Fri, 8 Sep 2023 07:48:09 +0000 Received: from CO1PEPF000044F6.namprd21.prod.outlook.com (2603:10b6:5:3ba:cafe::14) by DS7PR03CA0226.outlook.office365.com (2603:10b6:5:3ba::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6768.30 via Frontend Transport; Fri, 8 Sep 2023 07:48:09 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1PEPF000044F6.mail.protection.outlook.com (10.167.241.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6792.1 via Frontend Transport; Fri, 8 Sep 2023 07:48:09 +0000 Received: from jasmine-meng.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Fri, 8 Sep 2023 02:48:03 -0500 From: Meng Li To: "Rafael J . Wysocki" , Huang Rui CC: , , , , Shuah Khan , , "Nathan Fontenot" , Deepak Sharma , Alex Deucher , Mario Limonciello , Shimmer Huang , "Perry Yuan" , Xiaojian Du , Viresh Kumar , Borislav Petkov , Meng Li , Wyes Karny Subject: [PATCH V6 7/7] Documentation: introduce amd-pstate preferrd core mode kernel command line options Date: Fri, 8 Sep 2023 15:46:53 +0800 Message-ID: <20230908074653.2799055-8-li.meng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230908074653.2799055-1-li.meng@amd.com> References: <20230908074653.2799055-1-li.meng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F6:EE_|PH0PR12MB5435:EE_ X-MS-Office365-Filtering-Correlation-Id: e04172fd-a9ab-4435-c1e4-08dbb03ff1fa X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: h0jVADhLQjqe90W9dnezUoOC6VMTq+KOUfnpuAPElrKWGkA8gtovtqj0Iv7HQz4CyXljwzy5wLuaM55Z2sPjm7Cq8p/6l9/pzo2Rm/WiVD/hQwHFzcX6aybkBAMw/03V+bOkThQTplkap6WjOATHCAVuTWBZYrnUSx4zni3EKHFMfqYrgryi7RaH5GJx6xGVgDjB3E3YxQWBbvB1oufxCGUmChLB+W84bGtqkzaqsOUdbhd7nZ1uGcbeDlOodTBYTuDIK5+A7AslL4+jT4ysCml1T4f7KsOT73hLATEGuGgzFUOwD46QQtclCj/0p4nnZpEk3NGMz01FEK8iFNokplqZvdonLpQodYPEsftiEzlrd1uBc5BN93OzS8AtbLaALW5jSUBuSsQNsAm65YMDQTGB4PTiWyusXohqo9CYopQ0yoKZUYb5D8OUBalDMI/I11Jf2c3/pHLBuNplnOA4QkdT4mXQkSh+PC8+6mdVQQqWncuIyzmw7g9QvJy3JE3T5NarAjM9LnnLya03+ulGerVj6rVCobGG8ZbXISC6eVwp51AoUEdEtlDEjjwXUJ0OYPi91Oik9xZ3KxbIf761meR3jSTQ9Ne8j+4i1t6KaBmbq+0y6QQuZB1KGPWarr4PC/iNqbemllKtJ4WM96mLJMVg9VR3xCShL2ZUpJXcwvRXQdi0w0hb3nUGKEYkbl69pmCCbOphX9vUVbjNhV4lmiwJmPdL1ARLHlcjezYxeFDNcrZnmJ/FHAV/+htZwmjP/M3gANR0lT1/rbhSRLl9WiPaf2ikciMj1P8qW2BQE6wz1REcKsigODwZOJuM6lXw X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(4636009)(376002)(39860400002)(346002)(136003)(396003)(1800799009)(451199024)(186009)(82310400011)(40470700004)(46966006)(36840700001)(40460700003)(47076005)(36756003)(82740400003)(83380400001)(81166007)(356005)(2906002)(36860700001)(40480700001)(110136005)(54906003)(70586007)(70206006)(6636002)(316002)(6666004)(7696005)(86362001)(478600001)(2616005)(1076003)(16526019)(26005)(426003)(336012)(8936002)(4326008)(8676002)(5660300002)(41300700001)(36900700001)(14943795004); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Sep 2023 07:48:09.0821 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e04172fd-a9ab-4435-c1e4-08dbb03ff1fa X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F6.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB5435 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org amd-pstate driver support enable/disable preferred core. Default enabled on platforms supporting amd-pstate preferred core. Disable amd-pstate preferred core with "amd_prefcore=disable" added to the kernel command line. Signed-off-by: Meng Li Reviewed-by: Mario Limonciello Reviewed-by: Wyes Karny --- Documentation/admin-guide/kernel-parameters.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 0a1731a0f0ef..e35b795aa8aa 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -363,6 +363,11 @@ selects a performance level in this range and appropriate to the current workload. + amd_prefcore= + [X86] + disable + Disable amd-pstate preferred core. + amijoy.map= [HW,JOY] Amiga joystick support Map of devices attached to JOY0DAT and JOY1DAT Format: ,