From patchwork Sat Sep 2 17:32:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 719908 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66150C83F3E for ; Sat, 2 Sep 2023 17:32:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229487AbjIBRcy (ORCPT ); Sat, 2 Sep 2023 13:32:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52418 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229436AbjIBRcq (ORCPT ); Sat, 2 Sep 2023 13:32:46 -0400 Received: from mail.z3ntu.xyz (mail.z3ntu.xyz [128.199.32.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D025A4; Sat, 2 Sep 2023 10:32:42 -0700 (PDT) Received: from [192.168.178.23] (k10064.upc-k.chello.nl [62.108.10.64]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 4073AD0764; Sat, 2 Sep 2023 17:32:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=z3ntu.xyz; s=z3ntu; t=1693675960; bh=29unbUdSjssR6lCbO5AvxRnTJpcHD6ixkyfP951p+1A=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=jniO2c/id9WRq0ST9jXwjuxGLn6z9r95u3jYdW40Uggp50sfJVDKyrQoos0Sc+wY1 z/fY3wllu6+KvUMfxEufOswPbkTv8NVNp1sqB2Dvnr8GSkVZPtvDgkI7pr5s3ztTaX YjLueZebKmuXjRdY9L2vxd1dyub0Ul83ZA4zKQas= From: Luca Weiss Date: Sat, 02 Sep 2023 19:32:24 +0200 Subject: [PATCH 1/2] pinctrl: qcom: msm8226: Add blsp_i2c6 function MIME-Version: 1.0 Message-Id: <20230902-msm8226-i2c6-v1-1-9632b8916789@z3ntu.xyz> References: <20230902-msm8226-i2c6-v1-0-9632b8916789@z3ntu.xyz> In-Reply-To: <20230902-msm8226-i2c6-v1-0-9632b8916789@z3ntu.xyz> To: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1885; i=luca@z3ntu.xyz; h=from:subject:message-id; bh=29unbUdSjssR6lCbO5AvxRnTJpcHD6ixkyfP951p+1A=; b=owEBbQKS/ZANAwAIAXLYQ7idTddWAcsmYgBk83G1izVHNETlovIhCBg9yuJuS/VWWe7y/qoD+ Y0bxBzruKWJAjMEAAEIAB0WIQQ5utIvCCzakboVj/py2EO4nU3XVgUCZPNxtQAKCRBy2EO4nU3X Vq9cD/9W2tmntRL/M3zo7gNixWZzbIZqVRJibbPPBBmtJkAKx65I/EwqqgLwi2AE6FSVC5SC6IO VGU93GmywZ8Dz+H34dFCicEWy9Xj/XP1pn4/+9JQFKIw42pcOG0DZlsQe+tVQGjywvUSgrK2u5a r56FF2FJyWhrPfZMef2FBpSfTCdIi7mcFLxIRNA2wMflY3R7A5PPho6GLVoUuaqnNSijprcCl6R ycl/r10Jw+gGOZc2hvZr7BRXEI2SgUpJikJdQ6KmDmeKLsysqBrTJj0bGupCNhRa+msWntqwtOS w9NgthxkX52ezoLOPnSzewxe1V0NNBFvHb1fFw1/pZHJjLAar+WlZmyKkS+CO2FtZYLeUfZX3Aj sSW1mbAl2t6o2fm3COSy3Y2Oa0yTcZpa/xGg/JEqt0eG2EDgakcAo6J9dcxRXZ84Qubc8mQw8eN I9SU40mJv/TWoioiVFch2xSqjpd8CCoeZwo9vZeGhPzxTCAA9TLmJTXmFsssYo7xrwP8dTOevdA GrQA7DtjqcabKBl1+7bNHPsZw+zJpSFWuheJilY26rK/MXjaYGRGgHlcH+7X9nuxSk+Ag1OgByL hYGvhGngYraT4gRCV8GlBliLV9OTIyLzZYyzdDinOres5GPO4hI81BEUtoi3DcAXUSA6BXaOPLU PeL7kfJzXbPEzVA== X-Developer-Key: i=luca@z3ntu.xyz; a=openpgp; fpr=BD04DA24C971B8D587B2B8D7FAF69CF6CD2D02CD Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On GPIO22 and GPIO23 there is another I2C bus. Add the function for it. Signed-off-by: Luca Weiss --- drivers/pinctrl/qcom/pinctrl-msm8226.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-msm8226.c b/drivers/pinctrl/qcom/pinctrl-msm8226.c index 994619840a70..da964eebd313 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm8226.c +++ b/drivers/pinctrl/qcom/pinctrl-msm8226.c @@ -336,6 +336,7 @@ enum msm8226_functions { msm_mux_blsp_i2c3, msm_mux_blsp_i2c4, msm_mux_blsp_i2c5, + msm_mux_blsp_i2c6, msm_mux_blsp_spi1, msm_mux_blsp_spi2, msm_mux_blsp_spi3, @@ -436,6 +437,8 @@ static const char * const blsp_spi5_groups[] = { "gpio16", "gpio17", "gpio18", "gpio19" }; +static const char * const blsp_i2c6_groups[] = { "gpio22", "gpio23" }; + static const char * const cci_i2c0_groups[] = { "gpio29", "gpio30" }; static const char * const cam_mclk0_groups[] = { "gpio26" }; @@ -459,6 +462,7 @@ static const struct pinfunction msm8226_functions[] = { MSM_PIN_FUNCTION(blsp_i2c3), MSM_PIN_FUNCTION(blsp_i2c4), MSM_PIN_FUNCTION(blsp_i2c5), + MSM_PIN_FUNCTION(blsp_i2c6), MSM_PIN_FUNCTION(blsp_spi1), MSM_PIN_FUNCTION(blsp_spi2), MSM_PIN_FUNCTION(blsp_spi3), @@ -507,8 +511,8 @@ static const struct msm_pingroup msm8226_groups[] = { PINGROUP(19, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA), PINGROUP(20, NA, NA, NA, NA, NA, NA, NA), PINGROUP(21, NA, NA, NA, NA, NA, NA, NA), - PINGROUP(22, NA, NA, NA, NA, NA, NA, NA), - PINGROUP(23, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(22, NA, NA, blsp_i2c6, NA, NA, NA, NA), + PINGROUP(23, NA, NA, blsp_i2c6, NA, NA, NA, NA), PINGROUP(24, NA, NA, NA, NA, NA, NA, NA), PINGROUP(25, NA, NA, NA, NA, NA, NA, NA), PINGROUP(26, cam_mclk0, NA, NA, NA, NA, NA, NA), From patchwork Sat Sep 2 17:32:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 719907 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE078CA0FF6 for ; Sat, 2 Sep 2023 17:33:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229723AbjIBRdY (ORCPT ); Sat, 2 Sep 2023 13:33:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35376 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229804AbjIBRdR (ORCPT ); Sat, 2 Sep 2023 13:33:17 -0400 Received: from mail.z3ntu.xyz (mail.z3ntu.xyz [128.199.32.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 49B0AA4; Sat, 2 Sep 2023 10:33:12 -0700 (PDT) Received: from [192.168.178.23] (k10064.upc-k.chello.nl [62.108.10.64]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 8DAA1D0765; Sat, 2 Sep 2023 17:32:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=z3ntu.xyz; s=z3ntu; t=1693675960; bh=G4bv/044FBMyHyk8YKL12LUcdZXw2wbi25M7HJWmSFg=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=OUHdblhBKl0J+Hq+80CLIyJwob2kBvtCXtzBZ+ijhM92C9m6FpZbguHnPadTLNk1M N+f0DqODnm7o53sfhXJKsjiY0tfcTnSvNrOJRUWFSBX6Ilq/88UnGzV1Cko+hlMGe9 JF8V4mJsZa/G0k6OJMTFgID44UKIdHTrmNgW3AwE= From: Luca Weiss Date: Sat, 02 Sep 2023 19:32:25 +0200 Subject: [PATCH 2/2] ARM: dts: qcom: msm8226: Add blsp1_i2c6 and blsp1_uart2 MIME-Version: 1.0 Message-Id: <20230902-msm8226-i2c6-v1-2-9632b8916789@z3ntu.xyz> References: <20230902-msm8226-i2c6-v1-0-9632b8916789@z3ntu.xyz> In-Reply-To: <20230902-msm8226-i2c6-v1-0-9632b8916789@z3ntu.xyz> To: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; 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a=openpgp; fpr=BD04DA24C971B8D587B2B8D7FAF69CF6CD2D02CD Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add more busses found on msm8226 SoC. Signed-off-by: Luca Weiss --- arch/arm/boot/dts/qcom/qcom-msm8226.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi index b6ae4b7936e3..3b6114049e61 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi @@ -230,6 +230,15 @@ blsp1_uart1: serial@f991d000 { status = "disabled"; }; + blsp1_uart2: serial@f991e000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0xf991e000 0x1000>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + blsp1_uart3: serial@f991f000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0xf991f000 0x1000>; @@ -313,6 +322,19 @@ blsp1_i2c5: i2c@f9927000 { #size-cells = <0>; }; + blsp1_i2c6: i2c@f9928000 { + status = "disabled"; + compatible = "qcom,i2c-qup-v2.1.1"; + reg = <0xf9928000 0x1000>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + pinctrl-names = "default"; + pinctrl-0 = <&blsp1_i2c6_pins>; + #address-cells = <1>; + #size-cells = <0>; + }; + cci: cci@fda0c000 { compatible = "qcom,msm8226-cci"; #address-cells = <1>; @@ -460,6 +482,13 @@ blsp1_i2c5_pins: blsp1-i2c5-state { bias-disable; }; + blsp1_i2c6_pins: blsp1-i2c6-state { + pins = "gpio22", "gpio23"; + function = "blsp_i2c6"; + drive-strength = <2>; + bias-disable; + }; + cci_default: cci-default-state { pins = "gpio29", "gpio30"; function = "cci_i2c0";