From patchwork Fri Aug 25 11:46:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Macpaul Lin X-Patchwork-Id: 717274 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5610C88CB2 for ; Fri, 25 Aug 2023 11:47:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243759AbjHYLrO (ORCPT ); Fri, 25 Aug 2023 07:47:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55080 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243476AbjHYLqp (ORCPT ); Fri, 25 Aug 2023 07:46:45 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CD9A9E7F; Fri, 25 Aug 2023 04:46:37 -0700 (PDT) X-UUID: 091e16f2433d11ee9cb5633481061a41-20230825 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=csGBmjXikOyh3y8p13e2JwCsy1lcw0WkGW0pikGKqoI=; b=iV4Sgo1PW15Bb2HP+gvNyKHijWOskBdl8FrEUmce5JCJIjPRXSFk1ED7EFS3YBu3XAfik+oYXtBcrDhfrZUYspdEEFzbB74IqjiFE3q0rSH7nnIIiq6o9DXv7BJhuih+PezPurtfoXlVdpyjT7H1AhznzjURoqMrfIHJxSazUVU=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.31, REQID:7ec91a70-76ab-43c6-ab4b-a024ee108136, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:0ad78a4, CLOUDID:8b353013-4929-4845-9571-38c601e9c3c9, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO, DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 091e16f2433d11ee9cb5633481061a41-20230825 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1291513685; Fri, 25 Aug 2023 19:46:32 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 25 Aug 2023 19:46:30 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 25 Aug 2023 19:46:30 +0800 From: Macpaul Lin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Fabien Parent , Macpaul Lin , , , , CC: Bear Wang , Pablo Sun , Macpaul Lin , Chunfeng Yun , Subject: [PATCH 1/4] arm64: dts: mediatek: mt8195-demo: fix the memory size to 8GB Date: Fri, 25 Aug 2023 19:46:20 +0800 Message-ID: <20230825114623.16884-1-macpaul.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The onboard dram of mt8195-demo board is 8GB. Cc: stable@vger.kernel.org # 6.1, 6.4 Fixes: 6147314aeedc ("arm64: dts: mediatek: Add device-tree for MT8195 Demo board") Signed-off-by: Macpaul Lin --- arch/arm64/boot/dts/mediatek/mt8195-demo.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts index b2485ddfd33b..ff363ab925e9 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts +++ b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts @@ -48,7 +48,7 @@ memory@40000000 { device_type = "memory"; - reg = <0 0x40000000 0 0x80000000>; + reg = <0 0x40000000 0x2 0x00000000>; }; reserved-memory { From patchwork Fri Aug 25 11:46:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Macpaul Lin X-Patchwork-Id: 716992 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50C60C3DA6F for ; Fri, 25 Aug 2023 11:47:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243862AbjHYLrP (ORCPT ); Fri, 25 Aug 2023 07:47:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55096 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243379AbjHYLqq (ORCPT ); Fri, 25 Aug 2023 07:46:46 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE39B1FD7; Fri, 25 Aug 2023 04:46:37 -0700 (PDT) X-UUID: 091fb26e433d11ee9cb5633481061a41-20230825 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=YZDBuQS+Ca2ZbSadM29MD7bji2+Rcb7UYW3UaJpZ9n0=; b=Plad1fmGr/zNdUgJx9a7wizp8yP2RVeP0SZFbqcfyGDuyv9bApmZ7PT5RcMYPB0ZpZnJPY2ygAD1IXPRgv0pF8tblinRhEvsTLZSlFaTD3wbHR0UvlAv0f2ZcvaePzX3hj1aI4reYwScbgHmYMZoAC5Kt24plqOoHuBpEkGl8kM=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.31, REQID:3fbacc7a-fc73-4d68-ba81-6df5e9129b24, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:0ad78a4, CLOUDID:8c353013-4929-4845-9571-38c601e9c3c9, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO, DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 091fb26e433d11ee9cb5633481061a41-20230825 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1244488006; Fri, 25 Aug 2023 19:46:32 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 25 Aug 2023 19:46:30 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 25 Aug 2023 19:46:30 +0800 From: Macpaul Lin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Fabien Parent , Macpaul Lin , , , , CC: Bear Wang , Pablo Sun , Macpaul Lin , Chunfeng Yun , Subject: [PATCH 2/4] arm64: dts: mediatek: mt8195-demo: update and reorder reserved memory regions Date: Fri, 25 Aug 2023 19:46:21 +0800 Message-ID: <20230825114623.16884-2-macpaul.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230825114623.16884-1-macpaul.lin@mediatek.com> References: <20230825114623.16884-1-macpaul.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The dts file of the MediaTek MT8195 demo board has been updated to include new reserved memory regions. These reserved memory regions are: - SCP - VPU, - Sound DMA - APU. These regions are defined with the "shared-dma-pool" compatible property. In addition, the existing reserved memory regions have been reordered by their addresses to improve readability and maintainability of the DTS file. Cc: stable@vger.kernel.org # 6.1, 6.4 Fixes: e4a417520101 ("arm64: dts: mediatek: mt8195-demo: fix the memory size of node secmon") Signed-off-by: Macpaul Lin --- arch/arm64/boot/dts/mediatek/mt8195-demo.dts | 38 ++++++++++++++++---- 1 file changed, 32 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts index ff363ab925e9..8aea6f5d72b3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts +++ b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts @@ -56,12 +56,6 @@ #size-cells = <2>; ranges; - /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ - bl31_secmon_reserved: secmon@54600000 { - no-map; - reg = <0 0x54600000 0x0 0x200000>; - }; - /* 12 MiB reserved for OP-TEE (BL32) * +-----------------------+ 0x43e0_0000 * | SHMEM 2MiB | @@ -75,6 +69,38 @@ no-map; reg = <0 0x43200000 0 0x00c00000>; }; + + scp_mem: memory@50000000 { + compatible = "shared-dma-pool"; + reg = <0 0x50000000 0 0x2900000>; + no-map; + }; + + vpu_mem: memory@53000000 { + compatible = "shared-dma-pool"; + size = <0 0x1400000>; /* 20 MB */ + alignment = <0 0x10000>; + reg = <0 0x53000000 0 0x1400000>; + }; + + /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ + bl31_secmon_mem: memory@54600000 { + no-map; + reg = <0 0x54600000 0x0 0x200000>; + }; + + snd_dma_mem: memory@60000000 { + compatible = "shared-dma-pool"; + reg = <0 0x60000000 0 0x1100000>; + no-map; + }; + + apu_mem: memory@62000000 { + compatible = "shared-dma-pool"; + size = <0 0x1400000>; /* 20 MB */ + alignment = <0 0x10000>; + reg = <0 0x62000000 0 0x1400000>; + }; }; }; From patchwork Fri Aug 25 11:46:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Macpaul Lin X-Patchwork-Id: 716991 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05FE1EE49A3 for ; Fri, 25 Aug 2023 11:47:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243909AbjHYLrR (ORCPT ); Fri, 25 Aug 2023 07:47:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243652AbjHYLqq (ORCPT ); Fri, 25 Aug 2023 07:46:46 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BC6CE1FF7; Fri, 25 Aug 2023 04:46:38 -0700 (PDT) X-UUID: 09545546433d11ee9cb5633481061a41-20230825 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=oaCx4GPrx89E/9c/EnzITbJJBX/TbYcU6esy3AWOiYI=; b=fXLqDKU5DlRNt2ZK7OFjZSYW9wFR42nKV9HmDbkhs2AYHYQe07qOmiF6S0Ad0LesodrWqyntPw+cyzWV2tz+AykQMZvZpfSdb1isJq2KAgai8Pa83ZV2zTEEeyJ+XsisA5FBShDZTevkDR/3iPb5QeHWv39TFhU+AVDLumU6OO4=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.31, REQID:02ecd74b-6448-4cc7-a9ed-d94de623140d, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:0ad78a4, CLOUDID:8d353013-4929-4845-9571-38c601e9c3c9, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO, DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 09545546433d11ee9cb5633481061a41-20230825 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1371122494; Fri, 25 Aug 2023 19:46:32 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 25 Aug 2023 19:46:31 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 25 Aug 2023 19:46:31 +0800 From: Macpaul Lin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Fabien Parent , Macpaul Lin , , , , CC: Bear Wang , Pablo Sun , Macpaul Lin , Chunfeng Yun Subject: [PATCH 3/4] arm64: dts: mediatek: mt6360: add PMIC MT6360 related nodes Date: Fri, 25 Aug 2023 19:46:22 +0800 Message-ID: <20230825114623.16884-3-macpaul.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230825114623.16884-1-macpaul.lin@mediatek.com> References: <20230825114623.16884-1-macpaul.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org MT6360 is the secondary PMIC for MT8195. It supports USB Type-C and PD functions. Add MT6360 related common nodes which is used for MT8195 platform, includes - charger - ADC - LED - regulators Signed-off-by: Macpaul Lin --- arch/arm64/boot/dts/mediatek/mt6360.dtsi | 112 +++++++++++++++++++++++ 1 file changed, 112 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt6360.dtsi diff --git a/arch/arm64/boot/dts/mediatek/mt6360.dtsi b/arch/arm64/boot/dts/mediatek/mt6360.dtsi new file mode 100644 index 000000000000..e841f4e5a54b --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt6360.dtsi @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2023 MediaTek Inc. + */ + +#include + +&mt6360 { + interrupt-controller; + interrupt-parent = <&pio>; + interrupt-names = "IRQB"; + + charger { + compatible = "mediatek,mt6360-chg"; + richtek,vinovp-microvolt = <14500000>; + + otg_vbus_regulator: usb-otg-vbus-regulator { + regulator-compatible = "usb-otg-vbus"; + regulator-name = "usb-otg-vbus"; + regulator-min-microvolt = <4425000>; + regulator-max-microvolt = <5825000>; + }; + }; + + adc { + compatible = "mediatek,mt6360-adc"; + #io-channel-cells = <1>; + }; + + led { + compatible = "mediatek,mt6360-led"; + }; + + regulator { + compatible = "mediatek,mt6360-regulator"; + LDO_VIN3-supply = <&mt6360_buck2>; + + mt6360_buck1: buck1 { + regulator-compatible = "BUCK1"; + regulator-name = "mt6360,buck1"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1300000>; + regulator-allowed-modes = ; + }; + + mt6360_buck2: buck2 { + regulator-compatible = "BUCK2"; + regulator-name = "mt6360,buck2"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1300000>; + regulator-allowed-modes = ; + }; + + mt6360_ldo1: ldo1 { + regulator-compatible = "LDO1"; + regulator-name = "mt6360,ldo1"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-allowed-modes = ; + }; + + mt6360_ldo2: ldo2 { + regulator-compatible = "LDO2"; + regulator-name = "mt6360,ldo2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-allowed-modes = ; + }; + + mt6360_ldo3: ldo3 { + regulator-compatible = "LDO3"; + regulator-name = "mt6360,ldo3"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-allowed-modes = ; + }; + + mt6360_ldo5: ldo5 { + regulator-compatible = "LDO5"; + regulator-name = "mt6360,ldo5"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3600000>; + regulator-allowed-modes = ; + }; + + mt6360_ldo6: ldo6 { + regulator-compatible = "LDO6"; + regulator-name = "mt6360,ldo6"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2100000>; + regulator-allowed-modes = ; + }; + + mt6360_ldo7: ldo7 { + regulator-compatible = "LDO7"; + regulator-name = "mt6360,ldo7"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2100000>; + regulator-allowed-modes = ; + }; + }; +}; From patchwork Fri Aug 25 11:46:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Macpaul Lin X-Patchwork-Id: 717273 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94FE1C7EE2C for ; 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Fri, 25 Aug 2023 19:46:32 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 25 Aug 2023 19:46:31 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 25 Aug 2023 19:46:31 +0800 From: Macpaul Lin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Fabien Parent , Macpaul Lin , , , , CC: Bear Wang , Pablo Sun , Macpaul Lin , Chunfeng Yun Subject: [PATCH 4/4] arm64: dts: mediatek: mt8195-demo: simplify mt6360 nodes Date: Fri, 25 Aug 2023 19:46:23 +0800 Message-ID: <20230825114623.16884-4-macpaul.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230825114623.16884-1-macpaul.lin@mediatek.com> References: <20230825114623.16884-1-macpaul.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The dts file for the MediaTek MT8195 demo board has been refactored to improve the configuration of the MT6360 multi-function PMIC. The changes include: - Addition of the mt6360.dtsi include file, which contains the common configuration of the MT6360 for all mt8195 boards. - Removal of the direct inclusion of the mt6360-regulator.h file. - Removal of the detailed configuration of the MT6360 PMIC since the included mt6360.dtsi is used. Signed-off-by: Macpaul Lin --- arch/arm64/boot/dts/mediatek/mt8195-demo.dts | 136 ++++++------------- 1 file changed, 39 insertions(+), 97 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts index 8aea6f5d72b3..da1c077c3d9e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts +++ b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts @@ -11,7 +11,6 @@ #include #include #include -#include / { model = "MediaTek MT8195 demo board"; @@ -130,103 +129,9 @@ mt6360: pmic@34 { compatible = "mediatek,mt6360"; reg = <0x34>; - interrupt-controller; + pinctrl-0 = <&mt6360_pins>; + pinctrl-names = "default"; interrupts-extended = <&pio 101 IRQ_TYPE_EDGE_FALLING>; - interrupt-names = "IRQB"; - - charger { - compatible = "mediatek,mt6360-chg"; - richtek,vinovp-microvolt = <14500000>; - - otg_vbus_regulator: usb-otg-vbus-regulator { - regulator-compatible = "usb-otg-vbus"; - regulator-name = "usb-otg-vbus"; - regulator-min-microvolt = <4425000>; - regulator-max-microvolt = <5825000>; - }; - }; - - regulator { - compatible = "mediatek,mt6360-regulator"; - LDO_VIN3-supply = <&mt6360_buck2>; - - mt6360_buck1: buck1 { - regulator-compatible = "BUCK1"; - regulator-name = "mt6360,buck1"; - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1300000>; - regulator-allowed-modes = ; - regulator-always-on; - }; - - mt6360_buck2: buck2 { - regulator-compatible = "BUCK2"; - regulator-name = "mt6360,buck2"; - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1300000>; - regulator-allowed-modes = ; - regulator-always-on; - }; - - mt6360_ldo1: ldo1 { - regulator-compatible = "LDO1"; - regulator-name = "mt6360,ldo1"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3600000>; - regulator-allowed-modes = ; - }; - - mt6360_ldo2: ldo2 { - regulator-compatible = "LDO2"; - regulator-name = "mt6360,ldo2"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3600000>; - regulator-allowed-modes = ; - }; - - mt6360_ldo3: ldo3 { - regulator-compatible = "LDO3"; - regulator-name = "mt6360,ldo3"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3600000>; - regulator-allowed-modes = ; - }; - - mt6360_ldo5: ldo5 { - regulator-compatible = "LDO5"; - regulator-name = "mt6360,ldo5"; - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <3600000>; - regulator-allowed-modes = ; - }; - - mt6360_ldo6: ldo6 { - regulator-compatible = "LDO6"; - regulator-name = "mt6360,ldo6"; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <2100000>; - regulator-allowed-modes = ; - }; - - mt6360_ldo7: ldo7 { - regulator-compatible = "LDO7"; - regulator-name = "mt6360,ldo7"; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <2100000>; - regulator-allowed-modes = ; - regulator-always-on; - }; - }; }; }; @@ -300,6 +205,34 @@ regulator-always-on; }; +#include "mt6360.dtsi" + +/* For EMI_VDD2 */ +&mt6360_buck1 { + regulator-always-on; +}; + +/* For EMI_VDDQ */ +&mt6360_buck2 { + regulator-always-on; +}; + +&mt6360_ldo1 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; +}; + +&mt6360_ldo2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; +}; + +/* For EMI_VMDDR_EN */ +&mt6360_ldo7 { + regulator-always-on; +}; + &pio { eth_default_pins: eth-default-pins { pins-txd { @@ -496,6 +429,15 @@ ; }; }; + + mt6360_pins: mt6360-pins { + pins { + pinmux = , + ; + input-enable; + bias-pull-up; + }; + }; };