From patchwork Fri Aug 25 18:13:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 717264 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E73B5C3DA6F for ; Fri, 25 Aug 2023 18:15:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229864AbjHYSOf (ORCPT ); Fri, 25 Aug 2023 14:14:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34622 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231868AbjHYSOE (ORCPT ); Fri, 25 Aug 2023 14:14:04 -0400 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 58C8B2D5D for ; Fri, 25 Aug 2023 11:13:30 -0700 (PDT) Received: by mail-lf1-x129.google.com with SMTP id 2adb3069b0e04-5008d16cc36so1835062e87.2 for ; Fri, 25 Aug 2023 11:13:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1692987198; x=1693591998; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=MuhapBp3CPAwUCh3zqvny55rPiH1liaha14zmfFzw5s=; b=kK3KWNiUDw5t6chwInYXJekOIqjN2XlJT3jUNEDg12YZIjcOH0N0REPmEDQQB4j4ln wSCj4yahtikhg39QP8oyVN+c9dx2BtYtxbMSIfj/m9zIE1VSlo26qQZcnQPPqBO7Qsav csuNBQh5F6tYz3jotH6cTbaW5zqiwx4t7TWIv4UBdQhYiccCG8feNafel/zrif51bc9P sXP0UsLmCli6RK/X56H5K5gKJKQNgjKAJG6bD4Vwo/j1g08imG2JjRoE1dReKPkwoQUB rItKu4jx+q2F7Q2uKDs2qXHvNckIuYBMLcixz3rZfw3ocoMAFSe1HmjML6vT7vG/vEoI L0Qg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692987198; x=1693591998; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MuhapBp3CPAwUCh3zqvny55rPiH1liaha14zmfFzw5s=; b=cG8JDcyUDvOPn+vDXccpfJDTVGZMlNd9f9a35DC2n9Gx55yJLNEjF1m+LynGQrvBGa 9kA/IV3WOyTK+92gDzYgg1VUpoEiEg0CXG5wsw6ojW8MxF6xHH1Z7NSeNKzUU/AaEL/A krknDYb2AmYxdbjJfJDCOiBZ11X0Mpr/ZoMI/s9M6ozRxrVjyJA7Wr/legiRkJTLGI2e xUlM2YkUXj6yIziglKnecooGYCg7LdAjmwoBZNkJmOMBJO6glMhdwoD2DduRbGu8EYAn RyfsxMb3jpB9xZ7X7m6d1QLpnB2xA1EDD4RIHcfHnETW3lG3grZ9yFo2Aza+H/NtfDLC PbXg== X-Gm-Message-State: AOJu0YyyvgFwV3mn2M7R/j/rL1lVQQLswo8459T5TZt2wuiulpDicw5x A9/xl451CisGl7jJJUJWOgHVAg== X-Google-Smtp-Source: AGHT+IE0U5BZSq1uRBeSg0n4P8ladgQa3d896q0eq0Hl6dGiC/o2r4u+vvVIh5JqDvN9PTYOw6l/tA== X-Received: by 2002:a05:6512:685:b0:4ff:a23b:de26 with SMTP id t5-20020a056512068500b004ffa23bde26mr17269545lfe.52.1692987198250; Fri, 25 Aug 2023 11:13:18 -0700 (PDT) Received: from [192.168.1.101] (abxh59.neoplus.adsl.tpnet.pl. [83.9.1.59]) by smtp.gmail.com with ESMTPSA id b2-20020ac247e2000000b005009920b6afsm374522lfp.9.2023.08.25.11.13.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Aug 2023 11:13:17 -0700 (PDT) From: Konrad Dybcio Date: Fri, 25 Aug 2023 20:13:15 +0200 Subject: [PATCH 1/3] dt-bindings: clock: Add Qualcomm SM6115 LPASS clock controller MIME-Version: 1.0 Message-Id: <20230825-topic-6115_lpasscc-v1-1-d4857be298e3@linaro.org> References: <20230825-topic-6115_lpasscc-v1-0-d4857be298e3@linaro.org> In-Reply-To: <20230825-topic-6115_lpasscc-v1-0-d4857be298e3@linaro.org> To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1692987195; l=2573; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=kh9vya1fBXN+tmE3ghCrACqatGt7v3zCJwgqf69cR3I=; b=bLOWaz2hsvA0KJdAFLk4QotDopwVVfRABaHBZl9cJYQZPg3IO/qfdAtrMs3zeyaCJIMlmde/M LM4E4rtCFQGBHwrmGewBP4dQqaII4R4/yLtWrp7zybo1qZElRwbhoma X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SM6115 (and its derivatives or similar SoCs) have a LPASS clock controller block which provides audio-related resets. Add bindings for it. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- .../bindings/clock/qcom,sm6115-lpasscc.yaml | 53 ++++++++++++++++++++++ include/dt-bindings/clock/qcom,sm6115-lpasscc.h | 15 ++++++ 2 files changed, 68 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml new file mode 100644 index 000000000000..58ee84aed073 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sm6115-lpasscc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm LPASS Core & Audio Clock Controller on SM6115 + +maintainers: + - Konrad Dybcio + - Srinivas Kandagatla + +description: | + Qualcomm LPASS core and audio clock controllers provide audio-related resets + on SM6115 and its derivatives. + + See also:: + include/dt-bindings/clock/qcom,sm6115-lpasscc.h + +properties: + compatible: + enum: + - qcom,sm6115-lpassaudiocc + - qcom,sm6115-lpasscc + + reg: + maxItems: 1 + + '#reset-cells': + const: 1 + +required: + - compatible + - reg + - '#reset-cells' + +additionalProperties: false + +examples: + - | + lpass_audiocc: clock-controller@a6a9000 { + compatible = "qcom,sm6115-lpassaudiocc"; + reg = <0x0a6a9000 0x1000>; + #reset-cells = <1>; + }; + + - | + lpasscc: clock-controller@a7ec000 { + compatible = "qcom,sm6115-lpasscc"; + reg = <0x0a7ec000 0x1000>; + #reset-cells = <1>; + }; +... diff --git a/include/dt-bindings/clock/qcom,sm6115-lpasscc.h b/include/dt-bindings/clock/qcom,sm6115-lpasscc.h new file mode 100644 index 000000000000..799274517c9a --- /dev/null +++ b/include/dt-bindings/clock/qcom,sm6115-lpasscc.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) 2023, Linaro Ltd. + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_LPASSCC_SM6115_H +#define _DT_BINDINGS_CLK_QCOM_LPASSCC_SM6115_H + +/* LPASS CC */ +#define LPASS_SWR_TX_CONFIG_CGCR 0 + +/* LPASS_AUDIO CC */ +#define LPASS_AUDIO_SWR_RX_CGCR 0 + +#endif From patchwork Fri Aug 25 18:13:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 716976 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 316B3EE49A3 for ; Fri, 25 Aug 2023 18:15:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231868AbjHYSOg (ORCPT ); Fri, 25 Aug 2023 14:14:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232185AbjHYSOF (ORCPT ); Fri, 25 Aug 2023 14:14:05 -0400 Received: from mail-lf1-x12b.google.com (mail-lf1-x12b.google.com [IPv6:2a00:1450:4864:20::12b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E07DC2720 for ; Fri, 25 Aug 2023 11:13:31 -0700 (PDT) Received: by mail-lf1-x12b.google.com with SMTP id 2adb3069b0e04-50098cc8967so1931832e87.1 for ; Fri, 25 Aug 2023 11:13:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1692987199; x=1693591999; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=/TeMnYPJ3KxrFwSpu3efDqnuLqJ80q872/kIEbrU7wo=; b=PSe8HD4sEuKxiWpHBktTQGkVtwyLfkec3S9zBkC3Ev8gHdNnb7dQpy+RgROSpiUu1h qMB7Y96Wr9ekOPP8CEpRZ3pkNxUo7hQPC2Vh+/LVvK/QA+Bn/cDDqDoY2B4Bb5FMLc2A Z0sv/V7K+1XU9GNCCxGY7mncJwm8mGI3wdP8XELkJjq8kNUf9Tta86goc//Xz8cgtoNf 3FXRO/YYKL7cH2jFT+m7pNHnDBzReo1OK34PppN2SAOF4Fq9rwmUlEHJb9rD7rkt2tff RGkKHflbDg7/S9jqRWM62jUapFjAyyQ9uC7XISja46nZ1RsGHX+pnLVvXAr7nUPaz58R U2/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692987199; x=1693591999; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/TeMnYPJ3KxrFwSpu3efDqnuLqJ80q872/kIEbrU7wo=; b=eSNLv0UVgstWu15mmOsV3OHrR+68viL6qU9qSezzT12iNQqJg2vIdN0c1MtRl9wYqC 8FGw0hjmjEJhpA2PCUn9KiU+W2YWy+7/p8nxP4KdbT2DF63GOd2M8XxFpro6nvfrxGAZ rUj+2Oxynhbar4zlBUnHbou+S4DBEHg4INGZVReM3B4Ux3sjEEilBmWh8ygN+v5O5HhG +4uyAhPjiDFWsYVn/xEtKvg5xqOOPBn2OIAVHpc6Zdj/n/U0mpqQTl0ERdjEGKhSJOZt 2gPknZWYvAhVm/piQUtm3WS4Ck64h81rXjwwVJ4uCNQREzW2UH4VQcus2i8FXJy6N8Mw 3Wig== X-Gm-Message-State: AOJu0Yx6AogDbX7VPn3q8uUHOMWRQ2Bzxsmu/KaT+oqoh2qmr6kf8X9a /PaPTGRtXCIK85JulhdBq8MEGA== X-Google-Smtp-Source: AGHT+IENTg/CoSs/0Snu/WkdvbcaXjnIW9+7z+J89mjofNi00Tg7fcMFN+cdA/EGlC9TqHO36xqDKA== X-Received: by 2002:a05:6512:3ba2:b0:500:8022:3dc7 with SMTP id g34-20020a0565123ba200b0050080223dc7mr14913390lfv.10.1692987199796; Fri, 25 Aug 2023 11:13:19 -0700 (PDT) Received: from [192.168.1.101] (abxh59.neoplus.adsl.tpnet.pl. [83.9.1.59]) by smtp.gmail.com with ESMTPSA id b2-20020ac247e2000000b005009920b6afsm374522lfp.9.2023.08.25.11.13.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Aug 2023 11:13:19 -0700 (PDT) From: Konrad Dybcio Date: Fri, 25 Aug 2023 20:13:16 +0200 Subject: [PATCH 2/3] clk: qcom: reset: Increase max reset delay MIME-Version: 1.0 Message-Id: <20230825-topic-6115_lpasscc-v1-2-d4857be298e3@linaro.org> References: <20230825-topic-6115_lpasscc-v1-0-d4857be298e3@linaro.org> In-Reply-To: <20230825-topic-6115_lpasscc-v1-0-d4857be298e3@linaro.org> To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1692987195; l=566; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=87NDHyI+LvwN9CqST5Jf5fNXtDFPiv1laEmkRq1a1As=; b=9MzaglliUVrbmVPVIQA+UDY17AoEE8NafqETUwAVa7cEVjHT4LHRz4JfryCS7/DWvuQ/nXuop C4quWHeRToIBD3efWWErIbDbHrvHCboI3CcMEdWQb7ADChjyYXqFhJo X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org u8 limits us to 255 microseconds of delay. Promote the delay variable to u16 to hold bigger values. Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/reset.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/qcom/reset.h b/drivers/clk/qcom/reset.h index 9a47c838d9b1..fe0561bf53d4 100644 --- a/drivers/clk/qcom/reset.h +++ b/drivers/clk/qcom/reset.h @@ -11,7 +11,7 @@ struct qcom_reset_map { unsigned int reg; u8 bit; - u8 udelay; + u16 udelay; u32 bitmask; }; From patchwork Fri Aug 25 18:13:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 717263 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08866C71134 for ; Fri, 25 Aug 2023 18:15:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231995AbjHYSOh (ORCPT ); Fri, 25 Aug 2023 14:14:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34844 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232867AbjHYSOK (ORCPT ); Fri, 25 Aug 2023 14:14:10 -0400 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B384A272C for ; Fri, 25 Aug 2023 11:13:40 -0700 (PDT) Received: by mail-lf1-x12f.google.com with SMTP id 2adb3069b0e04-4ffa94a7a47so1826858e87.1 for ; Fri, 25 Aug 2023 11:13:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1692987201; x=1693592001; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ELm30cfPyzIG/TZbjvqwagZo2Is2xhLq9tEiyh3zeHw=; b=CIohHlyoA//+r+yPRb5x6+dip/wynsQH340QPVM2jrHwm6aPkuFaXPLBrgbgFnuw6z 6LxFl/ciI+dWmgyPVVI6YA8/tsZF3cTD7b9IqgxQDUDWOAWNqX0vDOiAnJ54uYmn3mFK T0HcNJA7qfrLKyes9bIbwlL7x+NeWLDu3S7oV630LpSxJ/I83sOhBmkIWFYyFjsCZwgv gS5oHLkLwXqpnJ3+Cn0W47wYIIOfu8KqXSh5mIuhCsk65ZzrWsTHGR7+ueiDRAYVHwed JrC1hY+Dlpe+4jiHE37rLxy30IYhr3r20opR4hVTvDVKY6n/L+dStv1YgqF7UaxePgtP roRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692987201; x=1693592001; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ELm30cfPyzIG/TZbjvqwagZo2Is2xhLq9tEiyh3zeHw=; b=OcPcw5F3W0i70IOa7Z7WBYMw+BsdDVLurxQmAAnxe8edjAMiZZbVypReyk8bpP3NsY Qfx14UA6wQq/JcT31lnxJiF7rQIj0LezibssH4lPkjycouauE81bIxt8eTqVg/RveuZy YlAw6vIp0/Yrn5pgHqAZ7/3zMmJQZldpDJ7N3SM25h6+UT30BEutyNGZumM7Frs99MUW 0rFbpQwSYWVRXgAYeKG9fL6G1pmP5dvN8S0w0wjg9FX2++BfFBzfKXCV/J47gy5f0Cfv BIGqfI2EIK8GyXk0E8nRhabbIOl63mKPrXPcp4rJevpDU3Zk4Up2rWmeOkar3VAIKpax +bLw== X-Gm-Message-State: AOJu0YyvwYDM6VPd6Q56f5QIZt/R5w8XCZbhUWFd1ZUCpPXMsRsRoeQO PTbXgz8yAPewnUxxTMEeA+5Slw== X-Google-Smtp-Source: AGHT+IGswc4aau/HBnxyrq5ztPWud8GOeyX3tZiERT+wyt9vpoi6Hl+FhshReKOqEMlUe75lwI3RIQ== X-Received: by 2002:ac2:4f08:0:b0:4ff:78c2:6d8b with SMTP id k8-20020ac24f08000000b004ff78c26d8bmr16036211lfr.67.1692987201000; Fri, 25 Aug 2023 11:13:21 -0700 (PDT) Received: from [192.168.1.101] (abxh59.neoplus.adsl.tpnet.pl. [83.9.1.59]) by smtp.gmail.com with ESMTPSA id b2-20020ac247e2000000b005009920b6afsm374522lfp.9.2023.08.25.11.13.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Aug 2023 11:13:20 -0700 (PDT) From: Konrad Dybcio Date: Fri, 25 Aug 2023 20:13:17 +0200 Subject: [PATCH 3/3] clk: qcom: Add SM6115 LPASSCC MIME-Version: 1.0 Message-Id: <20230825-topic-6115_lpasscc-v1-3-d4857be298e3@linaro.org> References: <20230825-topic-6115_lpasscc-v1-0-d4857be298e3@linaro.org> In-Reply-To: <20230825-topic-6115_lpasscc-v1-0-d4857be298e3@linaro.org> To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1692987195; l=4383; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=apOX3hdOGey1znwpGB5xLtFMz1hlV86nLVwgjBM0kcY=; b=wY/yNZgIiIkFzV93iclndiGDM7zP595ileVmaloPXed+8rHh/U3D5zG8z+Hp79io1oOn6GKbX AZ1HmMV808ZCP24m+B6NKVKCAPjiUnYJEyOxgAG1Z34ODxJDNOyZhVE X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SM6115 (and its derivatives or similar SoCs) have a LPASS clock controller block which provides audio-related resets. Add the required code to support them. Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/Kconfig | 9 +++++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/lpasscc-sm6115.c | 84 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 94 insertions(+) diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index bd9bfb11b328..df9cf112e4b6 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -1001,6 +1001,15 @@ config SM_GPUCC_8550 Say Y if you want to support graphics controller devices and functionality such as 3D graphics. +config SM_LPASSCC_6115 + tristate "SM6115 Low Power Audio Subsystem (LPASS) Clock Controller" + depends on ARM64 || COMPILE_TEST + select SM_GCC_6115 + help + Support for the LPASS clock controller on SM6115 devices. + Say Y if you want to toggle LPASS-adjacent resets within + this clock controller to reset the LPASS subsystem. + config SM_TCSRCC_8550 tristate "SM8550 TCSR Clock Controller" depends on ARM64 || COMPILE_TEST diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile index 4790c8cca426..61e3c72fe954 100644 --- a/drivers/clk/qcom/Makefile +++ b/drivers/clk/qcom/Makefile @@ -128,6 +128,7 @@ obj-$(CONFIG_SM_GPUCC_8250) += gpucc-sm8250.o obj-$(CONFIG_SM_GPUCC_8350) += gpucc-sm8350.o obj-$(CONFIG_SM_GPUCC_8450) += gpucc-sm8450.o obj-$(CONFIG_SM_GPUCC_8550) += gpucc-sm8550.o +obj-$(CONFIG_SM_LPASSCC_6115) += lpasscc-sm6115.o obj-$(CONFIG_SM_TCSRCC_8550) += tcsrcc-sm8550.o obj-$(CONFIG_SM_VIDEOCC_8150) += videocc-sm8150.o obj-$(CONFIG_SM_VIDEOCC_8250) += videocc-sm8250.o diff --git a/drivers/clk/qcom/lpasscc-sm6115.c b/drivers/clk/qcom/lpasscc-sm6115.c new file mode 100644 index 000000000000..6aa19e16c53b --- /dev/null +++ b/drivers/clk/qcom/lpasscc-sm6115.c @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2022, 2023 Linaro Limited + */ + +#include +#include +#include +#include +#include +#include + +#include + +#include "common.h" +#include "reset.h" + +static const struct qcom_reset_map lpass_audiocc_sm6115_resets[] = { + [LPASS_AUDIO_SWR_RX_CGCR] = { .reg = 0x98, .bit = 1, .udelay = 500 }, +}; + +static struct regmap_config lpass_audiocc_sm6115_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .name = "lpass-audio-csr", + .max_register = 0x1000, +}; + +static const struct qcom_cc_desc lpass_audiocc_sm6115_reset_desc = { + .config = &lpass_audiocc_sm6115_regmap_config, + .resets = lpass_audiocc_sm6115_resets, + .num_resets = ARRAY_SIZE(lpass_audiocc_sm6115_resets), +}; + +static const struct qcom_reset_map lpasscc_sm6115_resets[] = { + [LPASS_SWR_TX_CONFIG_CGCR] = { .reg = 0x100, .bit = 1, .udelay = 500 }, +}; + +static struct regmap_config lpasscc_sm6115_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .name = "lpass-tcsr", + .max_register = 0x1000, +}; + +static const struct qcom_cc_desc lpasscc_sm6115_reset_desc = { + .config = &lpasscc_sm6115_regmap_config, + .resets = lpasscc_sm6115_resets, + .num_resets = ARRAY_SIZE(lpasscc_sm6115_resets), +}; + +static const struct of_device_id lpasscc_sm6115_match_table[] = { + { + .compatible = "qcom,sm6115-lpassaudiocc", + .data = &lpass_audiocc_sm6115_reset_desc, + }, { + .compatible = "qcom,sm6115-lpasscc", + .data = &lpasscc_sm6115_reset_desc, + }, + { }, +}; +MODULE_DEVICE_TABLE(of, lpasscc_sm6115_match_table); + +static int lpasscc_sm6115_probe(struct platform_device *pdev) +{ + const struct qcom_cc_desc *desc = of_device_get_match_data(&pdev->dev); + + return qcom_cc_probe_by_index(pdev, 0, desc); +} + +static struct platform_driver lpasscc_sm6115_driver = { + .probe = lpasscc_sm6115_probe, + .driver = { + .name = "lpasscc-sm6115", + .of_match_table = lpasscc_sm6115_match_table, + }, +}; + +module_platform_driver(lpasscc_sm6115_driver); + +MODULE_DESCRIPTION("QTI LPASSCC SM6115 Driver"); +MODULE_LICENSE("GPL");