From patchwork Fri Aug 18 13:57:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar X-Patchwork-Id: 714811 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E364C77B7A for ; Fri, 18 Aug 2023 13:58:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1359271AbjHRN6S (ORCPT ); Fri, 18 Aug 2023 09:58:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56094 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377723AbjHRN5k (ORCPT ); Fri, 18 Aug 2023 09:57:40 -0400 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3063F4202; Fri, 18 Aug 2023 06:57:39 -0700 (PDT) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-3fedba79923so712625e9.2; Fri, 18 Aug 2023 06:57:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692367057; x=1692971857; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xZWgrNspKoB0gULl9FriOTlRKkFCV7w76E4xQuu9Nl0=; b=KexVFDCysQJSKwqA2PHchcATu/fVdyN5dzj+MnC9lvuupAvcgUaERaEYU8fXez0XgX i43PyJBskBi//E9RB/S6PXpqLnh7lVciHUBjCJrYluBxaugnWRttJsl65oP7BNNKMu+c Jo24rl1VRSKWTnOfSNsHzTvaK81unipTMIddNapREu5xSZvMKQsgqda/UV4fJ5eU+FTL nunF8fYQsfMs04sEcizsvSn8l33AIieOkPvSKY/WC80+MPb9Q/o9joZ4/hnHvkDL1ExZ dASoED2bMcJ5sIRWxELsXgJFK9N9IuhLSu+NhvNxLgGLKjXkZicQt2ladZ9gwnTmZ6Hn JJOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692367057; x=1692971857; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xZWgrNspKoB0gULl9FriOTlRKkFCV7w76E4xQuu9Nl0=; b=detV1jFpEf+CLRtEKvVlGmTlq+6M/+gEDrCfDLhprd7oBWzaUqViWBEcmMzeTTe37l Kcy2jczDFPZc1N1/OJG5ITyagzmqnqAVhRW+DWi0Wzm6jF+g1R6Up3G9JqroDLqxWpsN iBu/11/jNTJmEA2WiDi4reyxfaEMYoYebPMziROrrgLob1FJY2N1B1+aqnXW2Bs579Zb UqtLFeBUy7JuhYJK/RHdbA04218zRGMeAr+gbdq+0btwFbBzZ3p+5RgSEm40ygZAt2ut g4o78GVc/z6UP/vSwCeR8oH6EXlK0YC1Vn+9lY9NaM/XJJBLrLoMKbdkDivJgybI9p6y 8o6g== X-Gm-Message-State: AOJu0Yzx/Rb4bXs2wSPLNN/lof1EgKM2CvfYXuUAluK5UhBvLKkunAQq UnHQaUV5uzW5xskJVW5KNTA= X-Google-Smtp-Source: AGHT+IGfQ7eoFxZQPgul7H6egLkGZJmIPP+0IzqWmxmsHEkAGop6rTnMrsK2OAKWZEjHE+l7fbJF1w== X-Received: by 2002:a7b:c4ce:0:b0:3fa:99d6:47a4 with SMTP id g14-20020a7bc4ce000000b003fa99d647a4mr2214398wmk.22.1692367057449; Fri, 18 Aug 2023 06:57:37 -0700 (PDT) Received: from prasmi.home ([2a00:23c8:2501:c701:4b30:13e8:1d57:42fb]) by smtp.gmail.com with ESMTPSA id s14-20020a05600c044e00b003fa96fe2bd9sm6444055wmb.22.2023.08.18.06.57.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Aug 2023 06:57:36 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Arnd Bergmann , Conor Dooley , Geert Uytterhoeven , Guo Ren , Andrew Jones , Paul Walmsley , Palmer Dabbelt , Albert Ou , Samuel Holland , linux-riscv@lists.infradead.org, Christoph Hellwig , Emil Renner Berthing Cc: Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Lad Prabhakar , Heiko Stuebner Subject: [PATCH v12 1/6] riscv: asm: vendorid_list: Add Andes Technology to the vendors list Date: Fri, 18 Aug 2023 14:57:18 +0100 Message-Id: <20230818135723.80612-2-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230818135723.80612-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20230818135723.80612-1-prabhakar.mahadev-lad.rj@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Lad Prabhakar Add Andes Technology to the vendors list. Signed-off-by: Lad Prabhakar Reviewed-by: Heiko Stuebner Reviewed-by: Conor Dooley Reviewed-by: Geert Uytterhoeven Tested-by: Conor Dooley # tyre-kicking on a d1 --- v11 -> v12 * No change v10 -> v11 * No change v9 -> v10 * Included TB tag from Conor v8 -> v9 * Included RB tag from Geert v7 -> v8 * No change v6 -> v7 * No change v5 -> v6 * No change v4 -> v5 * Included RB tags RFC v3 -> v4 * New patch --- arch/riscv/include/asm/vendorid_list.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/include/asm/vendorid_list.h b/arch/riscv/include/asm/vendorid_list.h index cb89af3f0704..e55407ace0c3 100644 --- a/arch/riscv/include/asm/vendorid_list.h +++ b/arch/riscv/include/asm/vendorid_list.h @@ -5,6 +5,7 @@ #ifndef ASM_VENDOR_LIST_H #define ASM_VENDOR_LIST_H +#define ANDESTECH_VENDOR_ID 0x31e #define SIFIVE_VENDOR_ID 0x489 #define THEAD_VENDOR_ID 0x5b7 From patchwork Fri Aug 18 13:57:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar X-Patchwork-Id: 714812 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6E06C71159 for ; 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Fri, 18 Aug 2023 06:57:41 -0700 (PDT) Received: from prasmi.home ([2a00:23c8:2501:c701:4b30:13e8:1d57:42fb]) by smtp.gmail.com with ESMTPSA id s14-20020a05600c044e00b003fa96fe2bd9sm6444055wmb.22.2023.08.18.06.57.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Aug 2023 06:57:41 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Arnd Bergmann , Conor Dooley , Geert Uytterhoeven , Guo Ren , Andrew Jones , Paul Walmsley , Palmer Dabbelt , Albert Ou , Samuel Holland , linux-riscv@lists.infradead.org, Christoph Hellwig , Emil Renner Berthing Cc: Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Lad Prabhakar , Rob Herring Subject: [PATCH v12 4/6] dt-bindings: cache: andestech,ax45mp-cache: Add DT binding documentation for L2 cache controller Date: Fri, 18 Aug 2023 14:57:21 +0100 Message-Id: <20230818135723.80612-5-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230818135723.80612-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20230818135723.80612-1-prabhakar.mahadev-lad.rj@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Lad Prabhakar Add DT binding documentation for L2 cache controller found on RZ/Five SoC. The Renesas RZ/Five microprocessor includes a RISC-V CPU Core (AX45MP Single) from Andes. The AX45MP core has an L2 cache controller, this patch describes the L2 cache block. Signed-off-by: Lad Prabhakar Reviewed-by: Rob Herring Reviewed-by: Conor Dooley Tested-by: Conor Dooley # tyre-kicking on a d1 --- v11 -> v12 * No Change v10 -> v11 * No Change v9 -> v10 * No Change v8 -> v9 * No Change v7 -> v8 * Updated commit header message v6 -> v7 * No Change v5 -> v6 * Included RB tag from Rob v4 -> v5 * Dropped L2 cache configuration properties * Dropped PMA configuration properties * Ordered the required list to match the properties list RFC v3 -> v4 * Dropped l2 cache configuration parameters * s/larger/large * Added minItems/maxItems for andestech,pma-regions --- .../cache/andestech,ax45mp-cache.yaml | 81 +++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml diff --git a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml new file mode 100644 index 000000000000..9ab5f0c435d4 --- /dev/null +++ b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (C) 2023 Renesas Electronics Corp. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/cache/andestech,ax45mp-cache.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Andestech AX45MP L2 Cache Controller + +maintainers: + - Lad Prabhakar + +description: + A level-2 cache (L2C) is used to improve the system performance by providing + a large amount of cache line entries and reasonable access delays. The L2C + is shared between cores, and a non-inclusive non-exclusive policy is used. + +select: + properties: + compatible: + contains: + enum: + - andestech,ax45mp-cache + + required: + - compatible + +properties: + compatible: + items: + - const: andestech,ax45mp-cache + - const: cache + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + cache-line-size: + const: 64 + + cache-level: + const: 2 + + cache-sets: + const: 1024 + + cache-size: + enum: [131072, 262144, 524288, 1048576, 2097152] + + cache-unified: true + + next-level-cache: true + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + - cache-line-size + - cache-level + - cache-sets + - cache-size + - cache-unified + +examples: + - | + #include + + cache-controller@2010000 { + compatible = "andestech,ax45mp-cache", "cache"; + reg = <0x13400000 0x100000>; + interrupts = <508 IRQ_TYPE_LEVEL_HIGH>; + cache-line-size = <64>; + cache-level = <2>; + cache-sets = <1024>; + cache-size = <262144>; + cache-unified; + }; From patchwork Fri Aug 18 13:57:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar X-Patchwork-Id: 714810 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4DB73C7EE2A for ; Fri, 18 Aug 2023 13:58:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377523AbjHRN6R (ORCPT ); Fri, 18 Aug 2023 09:58:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35628 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377477AbjHRN5r (ORCPT ); Fri, 18 Aug 2023 09:57:47 -0400 Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 999553C2D; Fri, 18 Aug 2023 06:57:46 -0700 (PDT) Received: by mail-lj1-x230.google.com with SMTP id 38308e7fff4ca-2bb99fbaebdso14998611fa.0; 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Signed-off-by: Lad Prabhakar Reviewed-by: Conor Dooley Reviewed-by: Geert Uytterhoeven Acked-by: Geert Uytterhoeven Tested-by: Conor Dooley # tyre-kicking on a d1 --- v11 -> v12 * No change v10 -> v11 * No change v9 -> v10 * No change v8 -> v9 * No change v7 -> v8 * Included RB tag from Geert v6 -> v7 * Included RB tag from Conor v5 -> v6 * New patch --- drivers/soc/renesas/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig index de31589ed054..67604f24973e 100644 --- a/drivers/soc/renesas/Kconfig +++ b/drivers/soc/renesas/Kconfig @@ -334,6 +334,10 @@ if RISCV config ARCH_R9A07G043 bool "RISC-V Platform support for RZ/Five" select ARCH_RZG2L + select AX45MP_L2_CACHE + select DMA_GLOBAL_POOL + select ERRATA_ANDES + select ERRATA_ANDES_CMO help This enables support for the Renesas RZ/Five SoC.