From patchwork Tue Aug 15 06:03:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenglin Wu X-Patchwork-Id: 713844 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D3A2C04A94 for ; Tue, 15 Aug 2023 06:04:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234818AbjHOGEP (ORCPT ); Tue, 15 Aug 2023 02:04:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234788AbjHOGDo (ORCPT ); Tue, 15 Aug 2023 02:03:44 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0EB9C10F0; Mon, 14 Aug 2023 23:03:43 -0700 (PDT) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37F5e0Lp013310; Tue, 15 Aug 2023 06:03:33 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=w3H+w2i9i25VHAqCSTbXgTQgMD2PoTCIEA7OBbxNaTg=; b=c1swAwR6C7g00HNARnLACQQpS9Eg/z5GUiR1HU7yRs1lb1bzFG7hevEmDBEMiC42qWQp 4rchwOeHFvXagbtU4Ll0dIhIRf6RdJpFJIBaXXHhkkc13VpW5uO1w9mEkf9bBbssaC05 lRVeliA+dW4B949XkM5fNfDL8cH5h8qB3R61S0zehZ79zp5DolcW3esm2Tm+2rt5PD6L 5wtYqc2wBsLm8SdU1PmLwsnONwT4jXXvF0eOkg/K7MUEFqbDpliFWMN9pcMK/NImrQlW qFJJKs8Y1esBcAk4yVitr0jHB8ue6lk6itBXxYrREwqH7E7Z0TR0aga2Jn/5BgGa1sKt 0Q== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3sfh74j3ap-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 15 Aug 2023 06:03:33 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 37F63W60006622 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 15 Aug 2023 06:03:32 GMT Received: from fenglinw2-gv.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Mon, 14 Aug 2023 23:03:29 -0700 From: Fenglin Wu To: , , , , , , , Konrad Dybcio , Dmitry Torokhov , CC: , , , , Subject: [PATCH v5 1/3] input: pm8xxx-vib: refactor to easily support new SPMI vibrator Date: Tue, 15 Aug 2023 14:03:12 +0800 Message-ID: <20230815060314.352103-2-quic_fenglinw@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230815060314.352103-1-quic_fenglinw@quicinc.com> References: <20230815060314.352103-1-quic_fenglinw@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 6hS0b9Q3kGbRrQz3eJqR12HwR8OyHk44 X-Proofpoint-GUID: 6hS0b9Q3kGbRrQz3eJqR12HwR8OyHk44 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-15_04,2023-08-10_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxscore=0 malwarescore=0 suspectscore=0 adultscore=0 mlxlogscore=999 phishscore=0 priorityscore=1501 impostorscore=0 clxscore=1015 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2308150055 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Currently, all vibrator control register addresses are hard coded, including the base address and the offset, it's not flexible to support new SPMI vibrator module which is usually included in different PMICs with different base address. Refactor this by defining register offset with HW type combination, and register base address which is defined in 'reg' property is added for SPMI vibrators. Signed-off-by: Fenglin Wu --- drivers/input/misc/pm8xxx-vibrator.c | 122 ++++++++++++++++----------- 1 file changed, 73 insertions(+), 49 deletions(-) diff --git a/drivers/input/misc/pm8xxx-vibrator.c b/drivers/input/misc/pm8xxx-vibrator.c index 04cb87efd799..d6b468324c77 100644 --- a/drivers/input/misc/pm8xxx-vibrator.c +++ b/drivers/input/misc/pm8xxx-vibrator.c @@ -12,36 +12,44 @@ #include #include +#define SSBL_VIB_DRV_REG 0x4A +#define SSBI_VIB_DRV_EN_MANUAL_MASK GENMASK(7, 2) +#define SSBI_VIB_DRV_LEVEL_MASK GENMASK(7, 3) +#define SSBI_VIB_DRV_SHIFT 3 + +#define SPMI_VIB_DRV_REG 0x41 +#define SPMI_VIB_DRV_LEVEL_MASK GENMASK(4, 0) +#define SPMI_VIB_DRV_SHIFT 0 + +#define SPMI_VIB_EN_REG 0x46 +#define SPMI_VIB_EN_BIT BIT(7) + #define VIB_MAX_LEVEL_mV (3100) #define VIB_MIN_LEVEL_mV (1200) #define VIB_MAX_LEVELS (VIB_MAX_LEVEL_mV - VIB_MIN_LEVEL_mV) #define MAX_FF_SPEED 0xff -struct pm8xxx_regs { - unsigned int enable_addr; - unsigned int enable_mask; +enum vib_hw_type { + SSBI_VIB, + SPMI_VIB, +}; - unsigned int drv_addr; - unsigned int drv_mask; - unsigned int drv_shift; - unsigned int drv_en_manual_mask; +struct pm8xxx_vib_data { + enum vib_hw_type hw_type; + unsigned int enable_addr; + unsigned int drv_addr; }; -static const struct pm8xxx_regs pm8058_regs = { - .drv_addr = 0x4A, - .drv_mask = 0xf8, - .drv_shift = 3, - .drv_en_manual_mask = 0xfc, +static const struct pm8xxx_vib_data ssbi_vib_data = { + .hw_type = SSBI_VIB, + .drv_addr = SSBL_VIB_DRV_REG, }; -static struct pm8xxx_regs pm8916_regs = { - .enable_addr = 0xc046, - .enable_mask = BIT(7), - .drv_addr = 0xc041, - .drv_mask = 0x1F, - .drv_shift = 0, - .drv_en_manual_mask = 0, +static const struct pm8xxx_vib_data spmi_vib_data = { + .hw_type = SPMI_VIB, + .enable_addr = SPMI_VIB_EN_REG, + .drv_addr = SPMI_VIB_DRV_REG, }; /** @@ -49,7 +57,8 @@ static struct pm8xxx_regs pm8916_regs = { * @vib_input_dev: input device supporting force feedback * @work: work structure to set the vibration parameters * @regmap: regmap for register read/write - * @regs: registers' info + * @data: vibrator HW info + * @reg_base: the register base of the module * @speed: speed of vibration set from userland * @active: state of vibrator * @level: level of vibration to set in the chip @@ -59,7 +68,8 @@ struct pm8xxx_vib { struct input_dev *vib_input_dev; struct work_struct work; struct regmap *regmap; - const struct pm8xxx_regs *regs; + const struct pm8xxx_vib_data *data; + unsigned int reg_base; int speed; int level; bool active; @@ -75,24 +85,31 @@ static int pm8xxx_vib_set(struct pm8xxx_vib *vib, bool on) { int rc; unsigned int val = vib->reg_vib_drv; - const struct pm8xxx_regs *regs = vib->regs; + u32 mask = SPMI_VIB_DRV_LEVEL_MASK; + u32 shift = SPMI_VIB_DRV_SHIFT; + + if (vib->data->hw_type == SSBI_VIB) { + mask = SSBI_VIB_DRV_LEVEL_MASK; + shift = SSBI_VIB_DRV_SHIFT; + } if (on) - val |= (vib->level << regs->drv_shift) & regs->drv_mask; + val |= (vib->level << shift) & mask; else - val &= ~regs->drv_mask; + val &= ~mask; - rc = regmap_write(vib->regmap, regs->drv_addr, val); + rc = regmap_update_bits(vib->regmap, vib->reg_base + vib->data->drv_addr, mask, val); if (rc < 0) return rc; vib->reg_vib_drv = val; - if (regs->enable_mask) - rc = regmap_update_bits(vib->regmap, regs->enable_addr, - regs->enable_mask, on ? ~0 : 0); + if (vib->data->hw_type == SSBI_VIB) + return 0; - return rc; + mask = SPMI_VIB_EN_BIT; + val = on ? SPMI_VIB_EN_BIT : 0; + return regmap_update_bits(vib->regmap, vib->reg_base + vib->data->enable_addr, mask, val); } /** @@ -102,13 +119,6 @@ static int pm8xxx_vib_set(struct pm8xxx_vib *vib, bool on) static void pm8xxx_work_handler(struct work_struct *work) { struct pm8xxx_vib *vib = container_of(work, struct pm8xxx_vib, work); - const struct pm8xxx_regs *regs = vib->regs; - int rc; - unsigned int val; - - rc = regmap_read(vib->regmap, regs->drv_addr, &val); - if (rc < 0) - return; /* * pmic vibrator supports voltage ranges from 1.2 to 3.1V, so @@ -168,9 +178,9 @@ static int pm8xxx_vib_probe(struct platform_device *pdev) { struct pm8xxx_vib *vib; struct input_dev *input_dev; + const struct pm8xxx_vib_data *data; int error; - unsigned int val; - const struct pm8xxx_regs *regs; + unsigned int val, reg_base; vib = devm_kzalloc(&pdev->dev, sizeof(*vib), GFP_KERNEL); if (!vib) @@ -187,19 +197,33 @@ static int pm8xxx_vib_probe(struct platform_device *pdev) INIT_WORK(&vib->work, pm8xxx_work_handler); vib->vib_input_dev = input_dev; - regs = of_device_get_match_data(&pdev->dev); + data = of_device_get_match_data(&pdev->dev); + if (!data) + return -EINVAL; - /* operate in manual mode */ - error = regmap_read(vib->regmap, regs->drv_addr, &val); - if (error < 0) - return error; + if (data->hw_type != SSBI_VIB) { + error = fwnode_property_read_u32(pdev->dev.fwnode, "reg", ®_base); + if (error < 0) { + dev_err(&pdev->dev, "Failed to read reg address, rc=%d\n", error); + return error; + } + + vib->reg_base += reg_base; + } - val &= regs->drv_en_manual_mask; - error = regmap_write(vib->regmap, regs->drv_addr, val); + error = regmap_read(vib->regmap, vib->reg_base + data->drv_addr, &val); if (error < 0) return error; - vib->regs = regs; + /* operate in manual mode */ + if (data->hw_type == SSBI_VIB) { + val &= SSBI_VIB_DRV_EN_MANUAL_MASK; + error = regmap_write(vib->regmap, vib->reg_base + data->drv_addr, val); + if (error < 0) + return error; + } + + vib->data = data; vib->reg_vib_drv = val; input_dev->name = "pm8xxx_vib_ffmemless"; @@ -239,9 +263,9 @@ static int pm8xxx_vib_suspend(struct device *dev) static DEFINE_SIMPLE_DEV_PM_OPS(pm8xxx_vib_pm_ops, pm8xxx_vib_suspend, NULL); static const struct of_device_id pm8xxx_vib_id_table[] = { - { .compatible = "qcom,pm8058-vib", .data = &pm8058_regs }, - { .compatible = "qcom,pm8921-vib", .data = &pm8058_regs }, - { .compatible = "qcom,pm8916-vib", .data = &pm8916_regs }, + { .compatible = "qcom,pm8058-vib", .data = &ssbi_vib_data }, + { .compatible = "qcom,pm8921-vib", .data = &ssbi_vib_data }, + { .compatible = "qcom,pm8916-vib", .data = &spmi_vib_data }, { } }; MODULE_DEVICE_TABLE(of, pm8xxx_vib_id_table); From patchwork Tue Aug 15 06:03:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenglin Wu X-Patchwork-Id: 714155 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 321CBC001B0 for ; Tue, 15 Aug 2023 06:04:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234805AbjHOGEQ (ORCPT ); Tue, 15 Aug 2023 02:04:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234977AbjHOGDn (ORCPT ); Tue, 15 Aug 2023 02:03:43 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4AAA511D; Mon, 14 Aug 2023 23:03:41 -0700 (PDT) Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37F5xxit013108; Tue, 15 Aug 2023 06:03:38 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=eRo+KqFCUvut0lTML8k2L89clzqzSPF29e124dI/wt0=; b=CyG1b+dQpTiqAcU8mHV3tFR4JH4How1FF7kHMtx4KRRcPRrOtwgvtpQ7pUF8ijGAeDLq 0Kft2P6RTwSMV+PsK+4OkKXbox69S5sTtqSAeI9duM35zlJs71/7YNfMwUryUQ3YYuBn mOC8/LFqdIVMJ1pHNa44poYkQOeHYoG4xCw4qDeqvVVZio40WJ+PxBlv/sdYJzTWPWX0 S9rvYv8qejU4LQTBPkwYF+8XeejIIT3nBwvpPPSf+18chjzTQEEx2penZDyU7+hqloMc BCofEfg9+g7a7JIBBFVT9IVRytnwGEB0LyoL4JCvgdqsIDcL8bKZwdjBf4HdBew4DIVN uQ== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3sfx0qgfnw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 15 Aug 2023 06:03:37 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 37F63atF027696 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 15 Aug 2023 06:03:36 GMT Received: from fenglinw2-gv.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Mon, 14 Aug 2023 23:03:33 -0700 From: Fenglin Wu To: , , , , , , , Konrad Dybcio , Dmitry Torokhov , , CC: , , , , Subject: [PATCH v5 2/3] dt-bindings: input: qcom,pm8xxx-vib: add new SPMI vibrator module Date: Tue, 15 Aug 2023 14:03:13 +0800 Message-ID: <20230815060314.352103-3-quic_fenglinw@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230815060314.352103-1-quic_fenglinw@quicinc.com> References: <20230815060314.352103-1-quic_fenglinw@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 7YoB8pEto1iXLibhSDcuHTrZ7rPnX8-X X-Proofpoint-ORIG-GUID: 7YoB8pEto1iXLibhSDcuHTrZ7rPnX8-X X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-15_04,2023-08-10_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 clxscore=1015 suspectscore=0 mlxlogscore=999 adultscore=0 impostorscore=0 phishscore=0 priorityscore=1501 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2308150055 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add compatible strings to support vibrator module inside PMI632, PMI7250B, PM7325B, PM7550BA. Signed-off-by: Fenglin Wu --- .../bindings/input/qcom,pm8xxx-vib.yaml | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml b/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml index c8832cd0d7da..72b72c67a9b6 100644 --- a/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml +++ b/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml @@ -11,10 +11,17 @@ maintainers: properties: compatible: - enum: - - qcom,pm8058-vib - - qcom,pm8916-vib - - qcom,pm8921-vib + oneOf: + - enum: + - qcom,pm8058-vib + - qcom,pm8916-vib + - qcom,pm8921-vib + - items: + - enum: + - qcom,pm7250b-vib + - qcom,pm7325b-vib + - qcom,pm7550ba-vib + - const: qcom,pmi632-vib reg: maxItems: 1 From patchwork Tue Aug 15 06:03:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenglin Wu X-Patchwork-Id: 713843 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E724CC04FE2 for ; Tue, 15 Aug 2023 06:04:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234829AbjHOGES (ORCPT ); Tue, 15 Aug 2023 02:04:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234799AbjHOGDs (ORCPT ); Tue, 15 Aug 2023 02:03:48 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C34793; Mon, 14 Aug 2023 23:03:46 -0700 (PDT) Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37F5UEwA014462; Tue, 15 Aug 2023 06:03:42 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=W1ZndHb06o1CqBfEMHAQs0xKzsPqR8W26l51gDxt9tE=; b=l0QYp/a/ndOuDYURMdVL31uaACkI+Ktakb5YS5BbvRH6uQR++Y5rPsMNEYaiLoxv1gQ/ rZUQQewRxqmlcGfWOLwuWC7MicIqBIyJxSgXttoDu4Zylfr6EiFOPevCckaEhPCgzzjW tXfU8AthMWOyCEtxyyL/R85g2IfVHzlzrCyWcjBcpP8Cy42HEGug89yn+OW5pmP9s1QH 9IcnyxY/YKHZrtg3YuQnl9kpM9qm1n36OAsaZRm35XTz0ZCc+8EnJa8VcCiHy+VYAkzT YHoq4jyZmtaH2Iz2w3SuCVH57YOJ6EMCEiaxL/NoZvlYAH8ZHw4HoWmXP0TecBwtXh/6 Qw== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3sfxqrrdan-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 15 Aug 2023 06:03:41 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 37F63eWb006637 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 15 Aug 2023 06:03:40 GMT Received: from fenglinw2-gv.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Mon, 14 Aug 2023 23:03:37 -0700 From: Fenglin Wu To: , , , , , , , Konrad Dybcio , Dmitry Torokhov , CC: , , , , , Luca Weiss Subject: [PATCH v5 3/3] input: pm8xxx-vibrator: add new SPMI vibrator support Date: Tue, 15 Aug 2023 14:03:14 +0800 Message-ID: <20230815060314.352103-4-quic_fenglinw@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230815060314.352103-1-quic_fenglinw@quicinc.com> References: <20230815060314.352103-1-quic_fenglinw@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: B0d9tHDdxCSuJ7Al-Kj539hUcdJjHuz7 X-Proofpoint-ORIG-GUID: B0d9tHDdxCSuJ7Al-Kj539hUcdJjHuz7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-15_04,2023-08-10_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 adultscore=0 clxscore=1011 impostorscore=0 mlxscore=0 phishscore=0 bulkscore=0 spamscore=0 malwarescore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2308150055 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add new SPMI vibrator module which is very similar to the SPMI vibrator module inside PM8916 but just has a finer drive voltage step (1mV vs 100mV) hence its drive level control is expanded to across 2 registers. The vibrator module can be found in Qualcomm PMIC PMI632, then following PM7250B, PM7325B, PM7550BA PMICs. Signed-off-by: Fenglin Wu Tested-by: Luca Weiss # sdm632-fairphone-fp3 (pmi632) --- drivers/input/misc/pm8xxx-vibrator.c | 55 +++++++++++++++++++++++++--- 1 file changed, 50 insertions(+), 5 deletions(-) diff --git a/drivers/input/misc/pm8xxx-vibrator.c b/drivers/input/misc/pm8xxx-vibrator.c index d6b468324c77..990e8a9ac018 100644 --- a/drivers/input/misc/pm8xxx-vibrator.c +++ b/drivers/input/misc/pm8xxx-vibrator.c @@ -21,6 +21,13 @@ #define SPMI_VIB_DRV_LEVEL_MASK GENMASK(4, 0) #define SPMI_VIB_DRV_SHIFT 0 +#define SPMI_VIB_GEN2_DRV_REG 0x40 +#define SPMI_VIB_GEN2_DRV_MASK GENMASK(7, 0) +#define SPMI_VIB_GEN2_DRV_SHIFT 0 +#define SPMI_VIB_GEN2_DRV2_REG 0x41 +#define SPMI_VIB_GEN2_DRV2_MASK GENMASK(3, 0) +#define SPMI_VIB_GEN2_DRV2_SHIFT 8 + #define SPMI_VIB_EN_REG 0x46 #define SPMI_VIB_EN_BIT BIT(7) @@ -33,12 +40,14 @@ enum vib_hw_type { SSBI_VIB, SPMI_VIB, + SPMI_VIB_GEN2 }; struct pm8xxx_vib_data { enum vib_hw_type hw_type; unsigned int enable_addr; unsigned int drv_addr; + unsigned int drv2_addr; }; static const struct pm8xxx_vib_data ssbi_vib_data = { @@ -52,6 +61,13 @@ static const struct pm8xxx_vib_data spmi_vib_data = { .drv_addr = SPMI_VIB_DRV_REG, }; +static const struct pm8xxx_vib_data spmi_vib_gen2_data = { + .hw_type = SPMI_VIB_GEN2, + .enable_addr = SPMI_VIB_EN_REG, + .drv_addr = SPMI_VIB_GEN2_DRV_REG, + .drv2_addr = SPMI_VIB_GEN2_DRV2_REG, +}; + /** * struct pm8xxx_vib - structure to hold vibrator data * @vib_input_dev: input device supporting force feedback @@ -85,12 +101,24 @@ static int pm8xxx_vib_set(struct pm8xxx_vib *vib, bool on) { int rc; unsigned int val = vib->reg_vib_drv; - u32 mask = SPMI_VIB_DRV_LEVEL_MASK; - u32 shift = SPMI_VIB_DRV_SHIFT; + u32 mask, shift; - if (vib->data->hw_type == SSBI_VIB) { + + switch (vib->data->hw_type) { + case SSBI_VIB: mask = SSBI_VIB_DRV_LEVEL_MASK; shift = SSBI_VIB_DRV_SHIFT; + break; + case SPMI_VIB: + mask = SPMI_VIB_DRV_LEVEL_MASK; + shift = SPMI_VIB_DRV_SHIFT; + break; + case SPMI_VIB_GEN2: + mask = SPMI_VIB_GEN2_DRV_MASK; + shift = SPMI_VIB_GEN2_DRV_SHIFT; + break; + default: + return -EINVAL; } if (on) @@ -104,6 +132,19 @@ static int pm8xxx_vib_set(struct pm8xxx_vib *vib, bool on) vib->reg_vib_drv = val; + if (vib->data->hw_type == SPMI_VIB_GEN2) { + mask = SPMI_VIB_GEN2_DRV2_MASK; + shift = SPMI_VIB_GEN2_DRV2_SHIFT; + if (on) + val = (vib->level >> shift) & mask; + else + val = 0; + rc = regmap_update_bits(vib->regmap, + vib->reg_base + vib->data->drv2_addr, mask, val); + if (rc < 0) + return rc; + } + if (vib->data->hw_type == SSBI_VIB) return 0; @@ -128,10 +169,13 @@ static void pm8xxx_work_handler(struct work_struct *work) vib->active = true; vib->level = ((VIB_MAX_LEVELS * vib->speed) / MAX_FF_SPEED) + VIB_MIN_LEVEL_mV; - vib->level /= 100; + if (vib->data->hw_type != SPMI_VIB_GEN2) + vib->level /= 100; } else { vib->active = false; - vib->level = VIB_MIN_LEVEL_mV / 100; + vib->level = VIB_MIN_LEVEL_mV; + if (vib->data->hw_type != SPMI_VIB_GEN2) + vib->level /= 100; } pm8xxx_vib_set(vib, vib->active); @@ -266,6 +310,7 @@ static const struct of_device_id pm8xxx_vib_id_table[] = { { .compatible = "qcom,pm8058-vib", .data = &ssbi_vib_data }, { .compatible = "qcom,pm8921-vib", .data = &ssbi_vib_data }, { .compatible = "qcom,pm8916-vib", .data = &spmi_vib_data }, + { .compatible = "qcom,pmi632-vib", .data = &spmi_vib_gen2_data }, { } }; MODULE_DEVICE_TABLE(of, pm8xxx_vib_id_table);