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[83.9.29.188]) by smtp.gmail.com with ESMTPSA id v19-20020a197413000000b004fdfeee003csm794976lfe.228.2023.08.11.10.35.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Aug 2023 10:35:53 -0700 (PDT) From: Konrad Dybcio Date: Fri, 11 Aug 2023 19:35:53 +0200 Subject: [PATCH] clk: qcom: gcc-sm8450: Use floor ops for SDCC RCGs MIME-Version: 1.0 Message-Id: <20230811-topic-8450_clk-v1-1-88031478d548@linaro.org> X-B4-Tracking: v=1; b=H4sIAHhx1mQC/x2N0QrCMAwAf6Xk2UC7Tan+iohkbXTB0o5Wx2Ds3 xd8vIPjNmhchRvczAaVF2lSsoI7GQgT5TejRGXobNdb7xx+yywB/XC2z5A+6Mk7e4kcabiCRiM 1xrFSDpNm+ZeSyrnyS9b/5f7Y9wO+7RcTdQAAAA== To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Vinod Koul Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1691775353; l=1261; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=PX0bPY4Yk70OpSIODbp0s8wfu2ffU9qawAOfbJJPy7I=; b=7G+QXuBhurMxCmWUUbDQtLVIN1NB+HTz+q3r3hPjodip+cs+TJzInqx7DzYzITpBJPtMCDfUF +ljqwYrGwGTC/AEhy96cr2fh/8h/JlG8GzSF1tJ/0NiVaAW96aihonj X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use the floor ops to prevent warnings like this at suspend exit and boot: mmc0: Card appears overclocked; req 800000 Hz, actual 25000000 Hz Fixes: db0c944ee92b ("clk: qcom: Add clock driver for SM8450") Signed-off-by: Konrad Dybcio Reviewed-by: Vinod Koul --- drivers/clk/qcom/gcc-sm8450.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- base-commit: 21ef7b1e17d039053edaeaf41142423810572741 change-id: 20230811-topic-8450_clk-8a8106deda49 Best regards, diff --git a/drivers/clk/qcom/gcc-sm8450.c b/drivers/clk/qcom/gcc-sm8450.c index 86ad085260db..563542982551 100644 --- a/drivers/clk/qcom/gcc-sm8450.c +++ b/drivers/clk/qcom/gcc-sm8450.c @@ -936,7 +936,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = { .parent_data = gcc_parent_data_7, .num_parents = ARRAY_SIZE(gcc_parent_data_7), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_floor_ops, }, }; @@ -959,7 +959,7 @@ static struct clk_rcg2 gcc_sdcc4_apps_clk_src = { .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_floor_ops, }, };