From patchwork Fri Jul 12 09:34:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 168923 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp627832ilk; Fri, 12 Jul 2019 02:35:20 -0700 (PDT) X-Google-Smtp-Source: APXvYqz2VhA5dm5xQVzQelALxQ61ZsFvGiUwESpWmemIL9wpWzIS1izY7+x/hQE+F9mNH08kknsW X-Received: by 2002:a17:902:6b07:: with SMTP id o7mr9989148plk.180.1562924120184; Fri, 12 Jul 2019 02:35:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1562924120; cv=none; d=google.com; s=arc-20160816; b=KNHdS60y3XE1qHIS2BqkmfkoOHGIqlo2Z492pZAcEV+3I9bIKFB56ek6jnWUpeCY8f SlMhj/c6VJkj18lgt0krGPQiOFIldJA97QHwKPuulNtfwAfQBuY7hOHj/5K/khHM8KRt cVwpXfDLuFb9kYMQPJPDpG3nvMSFnW67sLYRQEDeeiS/x8I+am/9flSCfcgcunneT/Uo DFlu+ogMwcuLQE/HvmNqnvCv6F38IUdtqCvHUsH2vIPRPuzy34+8Oom4HOXhDi5tLqhg k/Rb4OexH1Ks9Xsgl3jTrRtmP1SjsF6/PxBi2JEsUxyf0zBb5IicEjQMof87zGjBEAvF eLAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:mime-version:message-id:date:subject:to:from :delivered-to; bh=x4tLQV8gIXDXgSrkJAmqyGobiDmx1tezcGF6qJi6Aiw=; b=xnzTAFkqAPBMh9bQi0Lq8phAKHY9NRe3bPmpZXP1D9NrnIBJOKuVRzXt8qDZU1DG33 ioocNCbIA5gpLkDvMYDCX10orF2EIXAVdiEppqs1ox7AlEjNgY2Y6xn4AOHQOhXddRXr qmq7Kc77B2KE1W3QZlga1E41TXg3oWYculZP3u/gWMjA0LAwTqk0P0vB8tx4oS5M84ov aiZ0989Bg+hMCuKuuSrrk2RL+mYStPHJH3tXrvk4Skq5waagjLEmoE4sO6zUy4RAX9V1 xftEGanedUgo3923LQj5UYOMYRP6W9AkDtjOYSAHnUi0mdPHgewKk6zCnAarH9E1xc/6 CrEQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id a88si7482497pje.6.2019.07.12.02.35.19 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 12 Jul 2019 02:35:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6DC576E336; Fri, 12 Jul 2019 09:35:18 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mout.kundenserver.de (mout.kundenserver.de [212.227.126.131]) by gabe.freedesktop.org (Postfix) with ESMTPS id 74E306E336; Fri, 12 Jul 2019 09:35:16 +0000 (UTC) Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue009 [212.227.15.129]) with ESMTPA (Nemesis) id 1MuUvS-1idHrA1K1y-00raHL; Fri, 12 Jul 2019 11:35:10 +0200 From: Arnd Bergmann To: Alex Deucher , =?utf-8?q?Christian_K=C3=B6n?= =?utf-8?q?ig?= , "David (ChunMing) Zhou" , David Airlie , Daniel Vetter Subject: [PATCH] drm/amd: work around llvm bug #42576 Date: Fri, 12 Jul 2019 11:34:57 +0200 Message-Id: <20190712093508.1420279-1-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 MIME-Version: 1.0 X-Provags-ID: V03:K1:T0t9yMg8w/+NPQa9xO428uGk7wZdKsknl8QBX4d3SnulUoORRM/ trO21OtppDiYQuT3C4jVcKiiTnNnS6/5eKvCrjLKi+uRjvPt5MQZMv9b6D5BKTd/052kBFw akgzrRcmNIQyyldfjHRhBbtJ6Gkx/BDwtqZB4H0qV71ENh6YpR7eLIXuvYRe6ArKTSYl++G QgIeU6F+4ybc1xwYgbYEQ== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:uJnPJIwtCWU=:ZuTP/RSLwgHQipfLeMHCG3 RibAJkLb9sr5VnedmiI47Wahdi0mNwmExruwBc0yE5dw7Iz+cCTj8DYQTyJT3baRm4kedpuu9 XE1yvzo5sYN5y2cyj9jJImvM+uCBzrCw2HvFrBwfBwdpe7pR0RzxRY58oj9Glcrggz3LJtEj3 AnjMoWibdpZ5g3xolKyDEcUdQoOWLQHFSxM+/IS3DChRY4OoFy2dFpusCCiEVOVl0PVLXVCz+ aXfdH5gmJdVPwVGpWJiO3DaRknezrgtxfr4QjHQBvpu7Ibhe6MH03BWKGric15VglyrwwRZ9B wXU9jZSZdxQ2Xu2AJQJMGskauUlJrXlfB/cnWcnHXh9z48b0t44qEWq4l1lbnBAnEEfAkSWv7 QypLsVSqiy8fvChwlaFNg6NFL6cR8U5DrxWAJ4vtKitaK+gvnrxm01YnD3RsL51bgM7aPGGvT jJ3manEXCDccgF4YJk3SXXRT1yyLLnytJPHQ63o8fdpnJotMxuUQQWvenBUmALhN3LEWxvhnq D2kbWHN6N3gj9ABSJLsjGapb8ltOtI0cMR6i7XmBirdJOqOtLYt5511Pkow5N5zi+NsvFLaAw qN4Ahnbzc07s4zcPakcEjon7luREwtRxvQwpg/yd3nu4ygtnNAAeStV/UPLn1U+SLFzcFAOOe 50s+fjsrsnPA5zEK69kR28mY+JGeNx+/8DgtT/gfNkru0iC8O/9VII1C+ZnjG8gfbizNytMBp jwyqt1/X9UFIp/QTWnimQBjsJyp7nqZv/yTRmg== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Philip Yang , Arnd Bergmann , Oak Zeng , xinhui pan , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, clang-built-linux@googlegroups.com, Huang Rui , dri-devel@lists.freedesktop.org, Evan Quan , Rex Zhu Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Code in the amdgpu driver triggers a bug when using clang to build an arm64 kernel: /tmp/sdma_v4_0-f95fd3.s: Assembler messages: /tmp/sdma_v4_0-f95fd3.s:44: Error: selected processor does not support `bfc w0,#1,#5' I expect this to be fixed in llvm soon, but we can also work around it by inserting a barrier() that prevents the optimization. Link: https://bugs.llvm.org/show_bug.cgi?id=42576 Signed-off-by: Arnd Bergmann --- Sending this for completeness, please decide for yourselves whether to apply it or not, given that it's a trivial workaround but probably not needed in the long run. --- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index 4428018672d3..154416a626df 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c @@ -773,6 +773,7 @@ static uint32_t sdma_v4_0_rb_cntl(struct amdgpu_ring *ring, uint32_t rb_cntl) /* Set ring buffer size in dwords */ uint32_t rb_bufsz = order_base_2(ring->ring_size / 4); + barrier(); /* work around https://bugs.llvm.org/show_bug.cgi?id=42576 */ rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_SIZE, rb_bufsz); #ifdef __BIG_ENDIAN rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_SWAP_ENABLE, 1);