From patchwork Mon Aug 7 07:40:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinbo Zhu X-Patchwork-Id: 711748 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5AE7EC001DB for ; Mon, 7 Aug 2023 07:41:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230036AbjHGHlF (ORCPT ); Mon, 7 Aug 2023 03:41:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42488 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229989AbjHGHlE (ORCPT ); Mon, 7 Aug 2023 03:41:04 -0400 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 22EA010FE; Mon, 7 Aug 2023 00:41:01 -0700 (PDT) Received: from loongson.cn (unknown [10.20.42.201]) by gateway (Coremail) with SMTP id _____8AxFvEJoNBkCOARAA--.40060S3; Mon, 07 Aug 2023 15:40:57 +0800 (CST) Received: from localhost.localdomain (unknown [10.20.42.201]) by localhost.localdomain (Coremail) with SMTP id AQAAf8BxB838n9Bk+dBMAA--.56868S3; Mon, 07 Aug 2023 15:40:56 +0800 (CST) From: Yinbo Zhu To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jianmin Lv , wanghongliang@loongson.cn, loongson-kernel@lists.loongnix.cn, Yinbo Zhu Subject: [PATCH v3 1/2] gpio: dt-bindings: add parsing of loongson gpio offset Date: Mon, 7 Aug 2023 15:40:42 +0800 Message-Id: <20230807074043.31288-2-zhuyinbo@loongson.cn> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20230807074043.31288-1-zhuyinbo@loongson.cn> References: <20230807074043.31288-1-zhuyinbo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8BxB838n9Bk+dBMAA--.56868S3 X-CM-SenderInfo: 52kx5xhqerqz5rrqw2lrqou0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Loongson GPIO controllers come in multiple variants that are compatible except for certain register offset values. Add support in yaml file for device properties allowing to specify them in DT. Signed-off-by: Yinbo Zhu --- .../bindings/gpio/loongson,ls-gpio.yaml | 40 ++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml b/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml index fb86e8ce6349..fc51cf40fccd 100644 --- a/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml @@ -14,6 +14,7 @@ properties: enum: - loongson,ls2k-gpio - loongson,ls7a-gpio + - loongson,ls2k1000-gpio reg: maxItems: 1 @@ -29,6 +30,33 @@ properties: gpio-ranges: true + loongson,gpio-conf-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + This option indicate this GPIO configuration register offset address. + + loongson,gpio-out-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + This option indicate this GPIO output register offset address. + + loongson,gpio-in-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + This option indicate this GPIO input register offset address. + + loongson,gpio-ctrl-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + This option indicate this GPIO control mode, where '0' represents + bit control mode and '1' represents byte control mode. + + loongson,gpio-inten-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + This option indicate this GPIO interrupt enable register offset + address. + interrupts: minItems: 1 maxItems: 64 @@ -39,6 +67,11 @@ required: - ngpios - "#gpio-cells" - gpio-controller + - loongson,gpio-conf-offset + - loongson,gpio-in-offset + - loongson,gpio-out-offset + - loongson,gpio-ctrl-mode + - loongson,gpio-inten-offset - gpio-ranges - interrupts @@ -49,11 +82,16 @@ examples: #include gpio0: gpio@1fe00500 { - compatible = "loongson,ls2k-gpio"; + compatible = "loongson,ls2k1000-gpio"; reg = <0x1fe00500 0x38>; ngpios = <64>; #gpio-cells = <2>; gpio-controller; + loongson,gpio-conf-offset = <0>; + loongson,gpio-in-offset = <0x20>; + loongson,gpio-out-offset = <0x10>; + loongson,gpio-ctrl-mode = <0>; + loongson,gpio-inten-offset = <0x30>; gpio-ranges = <&pctrl 0 0 15>, <&pctrl 16 16 15>, <&pctrl 32 32 10>, From patchwork Mon Aug 7 07:40:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinbo Zhu X-Patchwork-Id: 711384 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B823DEB64DD for ; Mon, 7 Aug 2023 07:41:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230115AbjHGHlH (ORCPT ); Mon, 7 Aug 2023 03:41:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42482 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229487AbjHGHlE (ORCPT ); Mon, 7 Aug 2023 03:41:04 -0400 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 30B7710FD; Mon, 7 Aug 2023 00:41:00 -0700 (PDT) Received: from loongson.cn (unknown [10.20.42.201]) by gateway (Coremail) with SMTP id _____8AxDOsLoNBkDeARAA--.34612S3; Mon, 07 Aug 2023 15:40:59 +0800 (CST) Received: from localhost.localdomain (unknown [10.20.42.201]) by localhost.localdomain (Coremail) with SMTP id AQAAf8BxB838n9Bk+dBMAA--.56868S4; Mon, 07 Aug 2023 15:40:57 +0800 (CST) From: Yinbo Zhu To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jianmin Lv , wanghongliang@loongson.cn, loongson-kernel@lists.loongnix.cn, Yinbo Zhu Subject: [PATCH v3 2/2] gpio: loongson: add firmware offset parse support Date: Mon, 7 Aug 2023 15:40:43 +0800 Message-Id: <20230807074043.31288-3-zhuyinbo@loongson.cn> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20230807074043.31288-1-zhuyinbo@loongson.cn> References: <20230807074043.31288-1-zhuyinbo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8BxB838n9Bk+dBMAA--.56868S4 X-CM-SenderInfo: 52kx5xhqerqz5rrqw2lrqou0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Loongson GPIO controllers come in multiple variants that are compatible except for certain register offset values. Add support for device properties allowing to specify them in ACPI or DT. Signed-off-by: Yinbo Zhu --- drivers/gpio/gpio-loongson-64bit.c | 74 +++++++++++++++++++++++++++--- 1 file changed, 67 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/gpio-loongson-64bit.c b/drivers/gpio/gpio-loongson-64bit.c index 06213bbfabdd..51bcd6e8660f 100644 --- a/drivers/gpio/gpio-loongson-64bit.c +++ b/drivers/gpio/gpio-loongson-64bit.c @@ -26,6 +26,7 @@ struct loongson_gpio_chip_data { unsigned int conf_offset; unsigned int out_offset; unsigned int in_offset; + unsigned int inten_offset; }; struct loongson_gpio_chip { @@ -117,7 +118,17 @@ static void loongson_gpio_set(struct gpio_chip *chip, unsigned int pin, int valu static int loongson_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) { + unsigned int u; struct platform_device *pdev = to_platform_device(chip->parent); + struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip); + + if (lgpio->chip_data->mode == BIT_CTRL_MODE) { + u = readl(lgpio->reg_base + lgpio->chip_data->inten_offset + offset / 32 * 4); + u |= BIT(offset % 32); + writel(u, lgpio->reg_base + lgpio->chip_data->inten_offset + offset / 32 * 4); + } else { + writeb(1, lgpio->reg_base + lgpio->chip_data->inten_offset + offset); + } return platform_get_irq(pdev, offset); } @@ -127,11 +138,30 @@ static int loongson_gpio_init(struct device *dev, struct loongson_gpio_chip *lgp { int ret; u32 ngpios; + unsigned int io_width; lgpio->reg_base = reg_base; + if (device_property_read_u32(dev, "ngpios", &ngpios) || !ngpios) + return -EINVAL; + + ret = DIV_ROUND_UP(ngpios, 8); + switch (ret) { + case 1 ... 2: + io_width = ret; + break; + case 3 ... 4: + io_width = 0x4; + break; + case 5 ... 8: + io_width = 0x8; + break; + default: + dev_err(dev, "unsupported io width\n"); + return -EINVAL; + } if (lgpio->chip_data->mode == BIT_CTRL_MODE) { - ret = bgpio_init(&lgpio->chip, dev, 8, + ret = bgpio_init(&lgpio->chip, dev, io_width, lgpio->reg_base + lgpio->chip_data->in_offset, lgpio->reg_base + lgpio->chip_data->out_offset, NULL, NULL, @@ -151,16 +181,35 @@ static int loongson_gpio_init(struct device *dev, struct loongson_gpio_chip *lgp spin_lock_init(&lgpio->lock); } - device_property_read_u32(dev, "ngpios", &ngpios); - - lgpio->chip.can_sleep = 0; lgpio->chip.ngpio = ngpios; - lgpio->chip.label = lgpio->chip_data->label; - lgpio->chip.to_irq = loongson_gpio_to_irq; + lgpio->chip.can_sleep = 0; + if (lgpio->chip_data->label) + lgpio->chip.label = lgpio->chip_data->label; + else + lgpio->chip.label = kstrdup(to_platform_device(dev)->name, GFP_KERNEL); + + if (lgpio->chip_data->inten_offset) + lgpio->chip.to_irq = loongson_gpio_to_irq; return devm_gpiochip_add_data(dev, &lgpio->chip, lgpio); } +static int loongson_gpio_get_props(struct device *dev, + struct loongson_gpio_chip *lgpio) +{ + const struct loongson_gpio_chip_data *d = lgpio->chip_data; + + if (device_property_read_u32(dev, "loongson,gpio-conf-offset", (u32 *)&d->conf_offset) + || device_property_read_u32(dev, "loongson,gpio-in-offset", (u32 *)&d->in_offset) + || device_property_read_u32(dev, "loongson,gpio-out-offset", (u32 *)&d->out_offset) + || device_property_read_u32(dev, "loongson,gpio-ctrl-mode", (u32 *)&d->mode)) + return -EINVAL; + + device_property_read_u32(dev, "loongson,gpio-inten-offset", (u32 *)&d->inten_offset); + + return 0; +} + static int loongson_gpio_probe(struct platform_device *pdev) { void __iomem *reg_base; @@ -172,7 +221,12 @@ static int loongson_gpio_probe(struct platform_device *pdev) if (!lgpio) return -ENOMEM; - lgpio->chip_data = device_get_match_data(dev); + lgpio->chip_data = devm_kzalloc(dev, sizeof(*lgpio->chip_data), GFP_KERNEL); + if (!lgpio->chip_data) + return -ENOMEM; + + if (loongson_gpio_get_props(dev, lgpio)) + lgpio->chip_data = device_get_match_data(dev); reg_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(reg_base)) @@ -206,6 +260,9 @@ static const struct of_device_id loongson_gpio_of_match[] = { .compatible = "loongson,ls7a-gpio", .data = &loongson_gpio_ls7a_data, }, + { + .compatible = "loongson,ls2k1000-gpio", + }, {} }; MODULE_DEVICE_TABLE(of, loongson_gpio_of_match); @@ -215,6 +272,9 @@ static const struct acpi_device_id loongson_gpio_acpi_match[] = { .id = "LOON0002", .driver_data = (kernel_ulong_t)&loongson_gpio_ls7a_data, }, + { + .id = "LOON0007", + }, {} }; MODULE_DEVICE_TABLE(acpi, loongson_gpio_acpi_match);