From patchwork Sat Aug 5 18:39:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 710760 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99F52C001DB for ; Sat, 5 Aug 2023 18:41:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229808AbjHESlo (ORCPT ); Sat, 5 Aug 2023 14:41:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45410 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229441AbjHESln (ORCPT ); Sat, 5 Aug 2023 14:41:43 -0400 Received: from smtpbgsg2.qq.com (smtpbgsg2.qq.com [54.254.200.128]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 52263B7; Sat, 5 Aug 2023 11:41:40 -0700 (PDT) X-QQ-mid: bizesmtp89t1691260768tw064d93 Received: from linux-lab-host.localdomain ( [116.30.131.233]) by bizesmtp.qq.com (ESMTP) with id ; Sun, 06 Aug 2023 02:39:26 +0800 (CST) X-QQ-SSF: 01200000000000E0X000B00A0000000 X-QQ-FEAT: Bal8MUPVNvSRP1gcMhZpw5y2IOuTCiThWveMGsSRcCoNINeBt6NEHTQF/z1J7 8PsW4DBq4HaNrUALysyLgnajul0e+YkZvYbyUI6xVOYj5O1Ki63mDgwTuEPIEe0wt3lkpgG ghTTc7KBE/etbITpNxfuyPecpBWMDbLICqW8TTmpsfK9UieTq0wmrukFLWKKTYRj/bxHLeJ qEfuA/nx3ZsbU7q9gnqSAcI9d0h7puDDHRNOpES9HEV3tKdSvVDW+Ab8d8iqLKv5CVrPPCq 2VhgpYkBLvl/2t8cVrBrV9lkxn52Fqt5WapUPrqvhbpBhvM+kwHez3KQYiY/VstskvzLqP/ nU2vMLhI1uHWLeLU1siP2aHTM5hN0oAWumWIuGKKWSBQYtTm7IciZfkP4q7CPRtK0ICoKVF bq+VasuDa2I= X-QQ-GoodBg: 0 X-BIZMAIL-ID: 11633529993115481996 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, tanyuan@tinylab.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei=C3=9Fschuh?= Subject: [PATCH v6 1/8] tools/nolibc: add support for powerpc Date: Sun, 6 Aug 2023 02:39:26 +0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Both syscall declarations and _start code definition are added for powerpc to nolibc. Like mips, powerpc uses a register (exactly, the summary overflow bit) to record the error occurred, and uses another register to return the value [1]. So, the return value of every syscall declaration must be normalized to match the __sysret() helper, return -value when there is an error, otheriwse, return value directly. Glibc and musl use different methods to check the summary overflow bit, glibc (sysdeps/unix/sysv/linux/powerpc/sysdep.h) saves the cr register to r0 at first, and then check the summary overflow bit in cr0: mfcr r0 r0 & (1 << 28) ? -r3 : r3 --> 10003c14: 7c 00 00 26 mfcr r0 10003c18: 74 09 10 00 andis. r9,r0,4096 10003c1c: 41 82 00 08 beq 0x10003c24 10003c20: 7c 63 00 d0 neg r3,r3 Musl (arch/powerpc/syscall_arch.h) directly checks the summary overflow bit with the 'bns' instruction, it is smaller: /* no summary overflow bit means no error, return value directly */ bns+ 1f /* otherwise, return negated value */ neg r3, r3 1: --> 10000418: 40 a3 00 08 bns 0x10000420 1000041c: 7c 63 00 d0 neg r3,r3 Like musl, Linux (arch/powerpc/include/asm/vdso/gettimeofday.h) uses the same method for do_syscall_2() too. Here applies the second method to get smaller size. [1]: https://man7.org/linux/man-pages/man2/syscall.2.html Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/include/nolibc/arch-powerpc.h | 197 ++++++++++++++++++++++++++++ tools/include/nolibc/arch.h | 2 + 2 files changed, 199 insertions(+) create mode 100644 tools/include/nolibc/arch-powerpc.h diff --git a/tools/include/nolibc/arch-powerpc.h b/tools/include/nolibc/arch-powerpc.h new file mode 100644 index 000000000000..8332c9d3e5d6 --- /dev/null +++ b/tools/include/nolibc/arch-powerpc.h @@ -0,0 +1,197 @@ +/* SPDX-License-Identifier: LGPL-2.1 OR MIT */ +/* + * PowerPC specific definitions for NOLIBC + * Copyright (C) 2023 Zhangjin Wu + */ + +#ifndef _NOLIBC_ARCH_POWERPC_H +#define _NOLIBC_ARCH_POWERPC_H + +#include "compiler.h" +#include "crt.h" + +/* Syscalls for PowerPC : + * - stack is 16-byte aligned + * - syscall number is passed in r0 + * - arguments are in r3, r4, r5, r6, r7, r8, r9 + * - the system call is performed by calling "sc" + * - syscall return comes in r3, and the summary overflow bit is checked + * to know if an error occurred, in which case errno is in r3. + * - the arguments are cast to long and assigned into the target + * registers which are then simply passed as registers to the asm code, + * so that we don't have to experience issues with register constraints. + */ + +#define _NOLIBC_SYSCALL_CLOBBERLIST \ + "memory", "cr0", "r12", "r11", "r10", "r9" + +#define my_syscall0(num) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num) \ + : \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8", "r7", "r6", "r5", "r4" \ + ); \ + _ret; \ +}) + +#define my_syscall1(num, arg1) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8", "r7", "r6", "r5", "r4" \ + ); \ + _ret; \ +}) + + +#define my_syscall2(num, arg1, arg2) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + register long _arg2 __asm__ ("r4") = (long)(arg2); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num), "+r"(_arg2) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8", "r7", "r6", "r5" \ + ); \ + _ret; \ +}) + + +#define my_syscall3(num, arg1, arg2, arg3) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + register long _arg2 __asm__ ("r4") = (long)(arg2); \ + register long _arg3 __asm__ ("r5") = (long)(arg3); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num), "+r"(_arg2), "+r"(_arg3) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8", "r7", "r6" \ + ); \ + _ret; \ +}) + + +#define my_syscall4(num, arg1, arg2, arg3, arg4) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + register long _arg2 __asm__ ("r4") = (long)(arg2); \ + register long _arg3 __asm__ ("r5") = (long)(arg3); \ + register long _arg4 __asm__ ("r6") = (long)(arg4); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num), "+r"(_arg2), "+r"(_arg3), \ + "+r"(_arg4) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8", "r7" \ + ); \ + _ret; \ +}) + + +#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + register long _arg2 __asm__ ("r4") = (long)(arg2); \ + register long _arg3 __asm__ ("r5") = (long)(arg3); \ + register long _arg4 __asm__ ("r6") = (long)(arg4); \ + register long _arg5 __asm__ ("r7") = (long)(arg5); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num), "+r"(_arg2), "+r"(_arg3), \ + "+r"(_arg4), "+r"(_arg5) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8" \ + ); \ + _ret; \ +}) + +#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + register long _arg2 __asm__ ("r4") = (long)(arg2); \ + register long _arg3 __asm__ ("r5") = (long)(arg3); \ + register long _arg4 __asm__ ("r6") = (long)(arg4); \ + register long _arg5 __asm__ ("r7") = (long)(arg5); \ + register long _arg6 __asm__ ("r8") = (long)(arg6); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num), "+r"(_arg2), "+r"(_arg3), \ + "+r"(_arg4), "+r"(_arg5), "+r"(_arg6) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST \ + ); \ + _ret; \ +}) + +/* FIXME: For 32-bit PowerPC, with newer gcc compilers (e.g. gcc 13.1.0), + * "omit-frame-pointer" fails with __attribute__((no_stack_protector)) but + * works with __attribute__((__optimize__("-fno-stack-protector"))) + */ +#ifdef __no_stack_protector +#undef __no_stack_protector +#define __no_stack_protector __attribute__((__optimize__("-fno-stack-protector"))) +#endif + +/* startup code */ +void __attribute__((weak, noreturn, optimize("Os", "omit-frame-pointer"))) __no_stack_protector _start(void) +{ + __asm__ volatile ( + "mr 3, 1\n" /* save stack pointer to r3, as arg1 of _start_c */ + "clrrwi 1, 1, 4\n" /* align the stack to 16 bytes */ + "li 0, 0\n" /* zero the frame pointer */ + "stwu 1, -16(1)\n" /* the initial stack frame */ + "bl _start_c\n" /* transfer to c runtime */ + ); + __builtin_unreachable(); +} + +#endif /* _NOLIBC_ARCH_POWERPC_H */ diff --git a/tools/include/nolibc/arch.h b/tools/include/nolibc/arch.h index 82b43935650f..e276fb0680af 100644 --- a/tools/include/nolibc/arch.h +++ b/tools/include/nolibc/arch.h @@ -25,6 +25,8 @@ #include "arch-aarch64.h" #elif defined(__mips__) && defined(_ABIO32) #include "arch-mips.h" +#elif defined(__powerpc__) +#include "arch-powerpc.h" #elif defined(__riscv) #include "arch-riscv.h" #elif defined(__s390x__) From patchwork Sat Aug 5 18:42:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 710759 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 154ACC001DB for ; Sat, 5 Aug 2023 18:43:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230021AbjHESnD (ORCPT ); Sat, 5 Aug 2023 14:43:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229441AbjHESnD (ORCPT ); Sat, 5 Aug 2023 14:43:03 -0400 Received: from smtpbgau2.qq.com (smtpbgau2.qq.com [54.206.34.216]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7FA21FA; Sat, 5 Aug 2023 11:43:00 -0700 (PDT) X-QQ-mid: bizesmtp82t1691260969t7f7paue Received: from linux-lab-host.localdomain ( [116.30.131.233]) by bizesmtp.qq.com (ESMTP) with id ; Sun, 06 Aug 2023 02:42:48 +0800 (CST) X-QQ-SSF: 01200000000000E0X000B00A0000000 X-QQ-FEAT: hoArX50alxHe+LG930oTCoN8UcIoR96135u+XWn6mkEwd0LvnmOseMiK8ZsCV qTdHjFayED5dmWG/j2aRiB/U7nISQB6crrt+wKiBXvCD+SVM9GlVhi4TqAo7HUs7MKxEl+e ntC0Q8LUNa0MemGLXOrJ699PaKzoDM8K9Aq264BQM2akqEdUVivCkPVb2irFUO1PuqKvj7d b+kpaTH0ZWlSNLQGey/P84QkeMgvRneKrCpvEctlKMW/Tk6LF3uSu2N3P2OjRA4yaDU50EC IQiqh2rlLFyyxOB7lbutJI5PbVPKNzeYXbGDdgoDym7a7Xpblweq7xoTzYo2Jx7VQMkSIFT Yqxn5kVoVso9Spa+uZ0pBEBuA193UlPX2Hh1vC14yKviuS1mkPTNfT6MTJCa/XEvo5HQZcT s2f1kFm1vAE= X-QQ-GoodBg: 0 X-BIZMAIL-ID: 1566790808252503887 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, tanyuan@tinylab.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei=C3=9Fschuh?= Subject: [PATCH v6 4/8] selftests/nolibc: add test support for ppc Date: Sun, 6 Aug 2023 02:42:43 +0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Kernel uses ARCH=powerpc for both 32-bit and 64-bit PowerPC, here adds a ppc variant for 32-bit PowerPC and uses it as the default variant of powerpc architecture. Users can pass XARCH=ppc (or ARCH=powerpc) to test 32-bit PowerPC. The default qemu-system-ppc g3beige machine [1] is used to run 32-bit powerpc kernel with pmac32_defconfig. The missing PMACZILOG serial tty and console are enabled in another patch [2]. Note, - zImage doesn't boot due to "qemu-system-ppc: Some ROM regions are overlapping" error, so, vmlinux is used instead. - since the VSX support may be disabled in kernel side, to avoid "illegal instruction" errors due to missing VSX kernel support, let's simply let compiler not generate vector/scalar (VSX) instructions via the '-mno-vsx' option. - as 'man gcc' shows, '-mmultiple' is used to generate code that uses the load multiple word instructions and the store multiple word instructions. Those instructions do not work when the processor is in little-endian mode (except PPC740/PPC750), so, we only enable it for big endian powerpc. [1]: https://qemu.readthedocs.io/en/latest/system/ppc/powermac.html [2]: https://lore.kernel.org/lkml/bb7b5f9958b3e3a20f6573ff7ce7c5dc566e7e32.1690982937.git.tanyuan@tinylab.org/ Suggested-by: Willy Tarreau Link: https://lore.kernel.org/lkml/ZL9leVOI25S2+0+g@1wt.eu/ Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/testing/selftests/nolibc/Makefile | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/tools/testing/selftests/nolibc/Makefile b/tools/testing/selftests/nolibc/Makefile index 46a2312b06f5..cac501e0c7cf 100644 --- a/tools/testing/selftests/nolibc/Makefile +++ b/tools/testing/selftests/nolibc/Makefile @@ -30,9 +30,11 @@ endif # architectures where both are equal. # configure default variants for target kernel supported architectures +XARCH_powerpc = ppc XARCH = $(or $(XARCH_$(ARCH)),$(ARCH)) # map from user input variants to their kernel supported architectures +ARCH_ppc = powerpc ARCH := $(or $(ARCH_$(XARCH)),$(XARCH)) # kernel image names by architecture @@ -42,6 +44,7 @@ IMAGE_x86 = arch/x86/boot/bzImage IMAGE_arm64 = arch/arm64/boot/Image IMAGE_arm = arch/arm/boot/zImage IMAGE_mips = vmlinuz +IMAGE_ppc = vmlinux IMAGE_riscv = arch/riscv/boot/Image IMAGE_s390 = arch/s390/boot/bzImage IMAGE_loongarch = arch/loongarch/boot/vmlinuz.efi @@ -55,6 +58,7 @@ DEFCONFIG_x86 = defconfig DEFCONFIG_arm64 = defconfig DEFCONFIG_arm = multi_v7_defconfig DEFCONFIG_mips = malta_defconfig +DEFCONFIG_ppc = pmac32_defconfig DEFCONFIG_riscv = defconfig DEFCONFIG_s390 = defconfig DEFCONFIG_loongarch = defconfig @@ -70,6 +74,7 @@ QEMU_ARCH_x86 = x86_64 QEMU_ARCH_arm64 = aarch64 QEMU_ARCH_arm = arm QEMU_ARCH_mips = mipsel # works with malta_defconfig +QEMU_ARCH_ppc = ppc QEMU_ARCH_riscv = riscv64 QEMU_ARCH_s390 = s390x QEMU_ARCH_loongarch = loongarch64 @@ -82,6 +87,7 @@ QEMU_ARGS_x86 = -M pc -append "console=ttyS0,9600 i8042.noaux panic=-1 $( QEMU_ARGS_arm64 = -M virt -cpu cortex-a53 -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_arm = -M virt -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_mips = -M malta -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" +QEMU_ARGS_ppc = -M g3beige -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_riscv = -M virt -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_s390 = -M s390-ccw-virtio -m 1G -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_loongarch = -M virt -append "console=ttyS0,115200 panic=-1 $(TEST:%=NOLIBC_TEST=%)" @@ -97,6 +103,7 @@ else Q=@ endif +CFLAGS_ppc = -m32 -mbig-endian -mno-vsx $(call cc-option,-mmultiple) CFLAGS_s390 = -m64 CFLAGS_mips = -EL CFLAGS_STACKPROTECTOR ?= $(call cc-option,-mstack-protector-guard=global $(call cc-option,-fstack-protector-all)) From patchwork Sat Aug 5 18:44:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 710758 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11236C001DB for ; Sat, 5 Aug 2023 18:45:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230186AbjHESpP (ORCPT ); Sat, 5 Aug 2023 14:45:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47244 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229441AbjHESpO (ORCPT ); Sat, 5 Aug 2023 14:45:14 -0400 Received: from smtpbgbr1.qq.com (smtpbgbr1.qq.com [54.207.19.206]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7E9331BE4; Sat, 5 Aug 2023 11:45:10 -0700 (PDT) X-QQ-mid: bizesmtp78t1691261100tidbvvh9 Received: from linux-lab-host.localdomain ( [116.30.131.233]) by bizesmtp.qq.com (ESMTP) with id ; Sun, 06 Aug 2023 02:44:59 +0800 (CST) X-QQ-SSF: 00200000000000E0X000B00A0000000 X-QQ-FEAT: UJd4nZbM1CcH9VmzxClkr0cKwdDukNdu9aGDvRmht/UB70m5zE7F3giKejMEj JUN8J66vLKn6mlGW3Jza2xaIB5Dh3+tIqiX8BmRKEZdO/aVqXvaCjk2QGC5PbLe/PwxVoE7 QOQ5UaPdMgrfUR3NQ2dtJ6cJitapMwzZBd8444fG/y8C2dhF0xfwSxhLCfEj899ySPFTRHB Dtr8zZkNc+NXt1h7Vg90U1eMsyaBJmTTZA50nbUho6y7PR4SnOOalGqPj+mpW3rScYtcU8I ZxneTrjfDCaKRQJp8QYbBK+3fpxIOP96gwZ3tzMQZukeyd/fOivAc8c1OXlTuVsOHzJQ3uC vHgSVGmha1k+9tLwiVb48pIVmrmEa21PY5X4tAiBEfD84E+uo3V2luZqBBIeVDErI59BfyS ESGfsOOjJQM= X-QQ-GoodBg: 0 X-BIZMAIL-ID: 3337033072005867611 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, tanyuan@tinylab.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei=C3=9Fschuh?= Subject: [PATCH v6 6/8] selftests/nolibc: add test support for ppc64 Date: Sun, 6 Aug 2023 02:44:58 +0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Kernel uses ARCH=powerpc for both 32-bit and 64-bit PowerPC, here adds a ppc64 variant for big endian 64-bit PowerPC, users can pass XARCH=ppc64 to test it. The powernv machine of qemu-system-ppc64 is used with powernv_be_defconfig. As the document [1] shows: PowerNV (as Non-Virtualized) is the “bare metal” platform using the OPAL firmware. It runs Linux on IBM and OpenPOWER systems and it can be used as an hypervisor OS, running KVM guests, or simply as a host OS. Notes, - differs from little endian 64-bit PowerPC, vmlinux is used instead of zImage, because big endian zImage [2] only boot on qemu with x-vof=on (added from qemu v7.0) and a fixup patch [3] for qemu v7.0.51: - since the VSX support may be disabled in kernel side, to avoid "illegal instruction" errors due to missing VSX kernel support, let's simply let compiler not generate vector/scalar (VSX) instructions via the '-mno-vsx' option. - as 'man gcc' shows, '-mmultiple' is used to generate code that uses the load multiple word instructions and the store multiple word instructions. Those instructions do not work when the processor is in little-endian mode (except PPC740/PPC750), so, we only enable it for big endian powerpc. - for big endian ppc64, as the help message from arch/powerpc/Kconfig shows, the V2 ABI is standard for 64-bit little-endian, but for big-endian it is less well tested by kernel and toolchain, so, use elfv1 as-is, no need to explicitly ask toolchain to use elfv2 here. [1]: https://qemu.readthedocs.io/en/latest/system/ppc/powernv.html [2]: https://github.com/linuxppc/issues/issues/402 [3]: https://lore.kernel.org/qemu-devel/20220504065536.3534488-1-aik@ozlabs.ru/ Suggested-by: Willy Tarreau Link: https://lore.kernel.org/lkml/20230722121019.GD17311@1wt.eu/ Link: https://lore.kernel.org/lkml/20230719043353.GC5331@1wt.eu/ Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/testing/selftests/nolibc/Makefile | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/tools/testing/selftests/nolibc/Makefile b/tools/testing/selftests/nolibc/Makefile index 586f278ddd66..452d8e424d28 100644 --- a/tools/testing/selftests/nolibc/Makefile +++ b/tools/testing/selftests/nolibc/Makefile @@ -35,6 +35,7 @@ XARCH = $(or $(XARCH_$(ARCH)),$(ARCH)) # map from user input variants to their kernel supported architectures ARCH_ppc = powerpc +ARCH_ppc64 = powerpc ARCH_ppc64le = powerpc ARCH := $(or $(ARCH_$(XARCH)),$(XARCH)) @@ -46,6 +47,7 @@ IMAGE_arm64 = arch/arm64/boot/Image IMAGE_arm = arch/arm/boot/zImage IMAGE_mips = vmlinuz IMAGE_ppc = vmlinux +IMAGE_ppc64 = vmlinux IMAGE_ppc64le = arch/powerpc/boot/zImage IMAGE_riscv = arch/riscv/boot/Image IMAGE_s390 = arch/s390/boot/bzImage @@ -61,6 +63,7 @@ DEFCONFIG_arm64 = defconfig DEFCONFIG_arm = multi_v7_defconfig DEFCONFIG_mips = malta_defconfig DEFCONFIG_ppc = pmac32_defconfig +DEFCONFIG_ppc64 = powernv_be_defconfig DEFCONFIG_ppc64le = powernv_defconfig DEFCONFIG_riscv = defconfig DEFCONFIG_s390 = defconfig @@ -78,6 +81,7 @@ QEMU_ARCH_arm64 = aarch64 QEMU_ARCH_arm = arm QEMU_ARCH_mips = mipsel # works with malta_defconfig QEMU_ARCH_ppc = ppc +QEMU_ARCH_ppc64 = ppc64 QEMU_ARCH_ppc64le = ppc64le QEMU_ARCH_riscv = riscv64 QEMU_ARCH_s390 = s390x @@ -92,6 +96,7 @@ QEMU_ARGS_arm64 = -M virt -cpu cortex-a53 -append "panic=-1 $(TEST:%=NOLIBC QEMU_ARGS_arm = -M virt -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_mips = -M malta -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_ppc = -M g3beige -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" +QEMU_ARGS_ppc64 = -M powernv -append "console=hvc0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_ppc64le = -M powernv -append "console=hvc0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_riscv = -M virt -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_s390 = -M s390-ccw-virtio -m 1G -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" @@ -109,6 +114,7 @@ Q=@ endif CFLAGS_ppc = -m32 -mbig-endian -mno-vsx $(call cc-option,-mmultiple) +CFLAGS_ppc64 = -m64 -mbig-endian -mno-vsx $(call cc-option,-mmultiple) CFLAGS_ppc64le = -m64 -mlittle-endian -mno-vsx $(call cc-option,-mabi=elfv2) CFLAGS_s390 = -m64 CFLAGS_mips = -EL From patchwork Sat Aug 5 18:47:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 710757 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 475AEC001DE for ; Sat, 5 Aug 2023 18:47:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230140AbjHESr1 (ORCPT ); Sat, 5 Aug 2023 14:47:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48658 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229662AbjHESr0 (ORCPT ); Sat, 5 Aug 2023 14:47:26 -0400 Received: from smtpbgau1.qq.com (smtpbgau1.qq.com [54.206.16.166]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 670622D72; Sat, 5 Aug 2023 11:47:22 -0700 (PDT) X-QQ-mid: bizesmtp82t1691261231ty7dc1hm Received: from linux-lab-host.localdomain ( [116.30.131.233]) by bizesmtp.qq.com (ESMTP) with id ; Sun, 06 Aug 2023 02:47:10 +0800 (CST) X-QQ-SSF: 01200000000000E0X000B00A0000000 X-QQ-FEAT: IflLXxRcVR1gTGRr2ilcxmRzcus46IF74wtKQ1oFpYWF072KtLJW0K9dIyVlQ tohiSan5e61KVmLF1i837mkqkFeEpBoKGRNFKxoJR7iO7LtaKY504LrTMtnCdLw3BYmNgR0 uAi3fjj2iGvwuTi3rX88NGC8qRmaNrQaKg1Z9XcDF7Lj0ZJrxsHLZIh4VM2TT+i3H1cW0y7 qcJ+At/jX0gv6Djuqg7s54+B6Il6vJ24id4luOv9ZOxNwnxIXbeIPQr5OH2x0C04z0ga7vt Hxy0/9GCxzQbl2AlPzJ6lKTqHblp+b1WlhabeplbLHHAzCY/Vvi5tTAuJrvo/1ny6BZSttY kHzK8vCDkB0l2k6jjCiaTu9GUsveogjLy9M0n/VrT6raAe5sFlMMbf46ftfwEgLPzuxUDYw X-QQ-GoodBg: 0 X-BIZMAIL-ID: 2403698746126952363 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, tanyuan@tinylab.org, thomas@t-8ch.de Subject: [PATCH v6 8/8] selftests/nolibc: customize CROSS_COMPILE for 32/64-bit powerpc Date: Sun, 6 Aug 2023 02:47:09 +0800 Message-Id: <2c3ac4542621ddc4b2cab006ae8e3a7b709921f1.1691259983.git.falcon@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org The little-endian powerpc64le compilers provided by Ubuntu and Fedora are able to compile big endian kernel and big endian nolibc-test [1]. These default CROSS_COMPILE settings allow to test target architectures with: $ cd /path/to/tools/testing/selftests/nolibc/ $ for arch in ppc ppc64 ppc64le; do \ make run-user XARCH=$arch | grep "status: "; \ done If want to use another cross compiler, please simply pass CROSS_COMPILE or CC as before. For example, it is able to build 64-bit nolibc-test with the big endian powerpc64-linux-gcc crosstool from [2]: $ wget -c https://mirrors.edge.kernel.org/pub/tools/crosstool/files/bin/x86_64/13.1.0/x86_64-gcc-13.1.0-nolibc-powerpc64-linux.tar.xz $ tar xvf x86_64-gcc-13.1.0-nolibc-powerpc64-linux.tar.xz $ export PATH=$PWD/gcc-13.1.0-nolibc/powerpc64-linux/bin/:$PATH $ export CROSS_COMPILE_ppc=powerpc64-linux- $ export CROSS_COMPILE_ppc64=powerpc64-linux- $ export CROSS_COMPILE_ppc64le=powerpc64-linux- $ for arch in ppc ppc64 ppc64le; do \ make run-user XARCH=$arch | grep "status: "; \ done Or specify CC directly with full path: $ export CC=$PWD/gcc-13.1.0-nolibc/powerpc64-linux/bin/powerpc64-linux-gcc $ for arch in ppc ppc64 ppc64le; do \ make run-user XARCH=$arch | grep "status: "; \ done [1]: https://github.com/open-power/skiboot [2]: https://mirrors.edge.kernel.org/pub/tools/crosstool/ Signed-off-by: Zhangjin Wu --- tools/testing/selftests/nolibc/Makefile | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tools/testing/selftests/nolibc/Makefile b/tools/testing/selftests/nolibc/Makefile index 45d231b9c5c2..b4171a754eb2 100644 --- a/tools/testing/selftests/nolibc/Makefile +++ b/tools/testing/selftests/nolibc/Makefile @@ -56,6 +56,9 @@ IMAGE = $(IMAGE_$(XARCH)) IMAGE_NAME = $(notdir $(IMAGE)) # CROSS_COMPILE: cross toolchain prefix by architecture +CROSS_COMPILE_ppc ?= powerpc-linux-gnu- +CROSS_COMPILE_ppc64 ?= powerpc64le-linux-gnu- +CROSS_COMPILE_ppc64le ?= powerpc64le-linux-gnu- CROSS_COMPILE ?= $(CROSS_COMPILE_$(XARCH)) # make sure CC is prefixed with CROSS_COMPILE